Method and system for measuring impedance of power electronic devices

Abstract

This application relates to the field of impedance measurement technology and provides a method and system for measuring the impedance of power electronic devices. The method includes: acquiring a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test (DUT), and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the DUT; the first and second disturbances have the same frequency but different amplitudes; calculating the impedance of the DUT at the preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal; and sequentially using multiple target frequencies within a preset frequency sweep interval as preset frequencies, performing the steps of acquiring the disturbance signal and response signal, and calculating the impedance of the DUT at the preset frequencies, to obtain the impedance of the DUT at each target frequency within the preset frequency sweep interval. This application can improve the measurement accuracy of the impedance of the DUT.

Description

Technical Field

[0001] This application relates to the field of impedance measurement technology, specifically to an impedance measurement method and system for power electronic devices. Background Technology

[0002] In recent years, my country's installed capacity of new energy sources has continued to climb, with distributed power sources, new energy sources, and energy storage devices all connected to the grid through power electronic devices. However, power electronic devices have drawbacks such as strong nonlinearity and low power quality, which can easily lead to frequency oscillation problems such as low-frequency oscillations and subsynchronous oscillations. This poses a significant challenge to the power quality and safe and stable operation of the power grid, and frequency oscillation has become one of the key factors affecting the new power system dominated by new energy sources.

[0003] The impedance of power electronic devices can characterize their grid connection characteristics, and further analysis of the stability and reliability of the power system can be based on these characteristics. Therefore, impedance measurement of power electronic devices is particularly important. However, conventional methods for measuring the impedance of power electronic devices suffer from problems such as low measurement accuracy and inaccurate testing. Summary of the Invention

[0004] In view of this, embodiments of this application provide a method and system for measuring the impedance of power electronic devices, in order to solve the technical problems of low impedance measurement accuracy and inaccurate testing of conventional impedance measurement methods for power electronic devices.

[0005] In a first aspect, embodiments of this application provide a method for measuring the impedance of a power electronic device, comprising: acquiring a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test, and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the device under test; the first disturbance and the second disturbance have the same frequency but different amplitudes; the device under test is a power electronic device to be tested; calculating the impedance of the device under test at a preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal; sequentially using multiple target frequencies within a preset frequency sweep interval as preset frequencies, performing the steps of acquiring the disturbance signal and the response signal, and calculating the impedance of the device under test at the preset frequency, to obtain the impedance of the device under test at each target frequency within the preset frequency sweep interval.

[0006] In one possible implementation of the first aspect, calculating the impedance of the device under test at a preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal includes: performing discrete Fourier transforms on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal respectively to obtain corresponding first disturbance frequency domain signal, first response frequency domain signal, second disturbance frequency domain signal, and second response frequency domain signal; and calculating the impedance of the device under test at the preset frequency based on the impedance calculation formula and the first disturbance frequency domain signal, the first response frequency domain signal, the second disturbance frequency domain signal, and the second response frequency domain signal.

[0007] In one possible implementation of the first aspect, the impedance calculation formula is as follows:

[0008]

[0009] In the formula, The impedance complex vector of the device under test. The amplitude is Z g (h), phase angle is The resistive component is R g The sensibility component is L g Angular frequency is ω h h is the preset frequency. and These are the first perturbation frequency domain signal and the first response frequency domain signal, respectively. and These are the second perturbation frequency domain signal and the second response frequency domain signal, respectively. and These are the first response frequency domain signal and the first disturbance frequency domain signal, respectively. and These are the second response frequency domain signal and the second disturbance frequency domain signal, respectively.

[0010] In one possible implementation of the first aspect, the first disturbance and the second disturbance are three-phase disturbances; the disturbance signal includes a three-phase disturbance signal, and the response signal includes a three-phase response signal; performing Discrete Fourier Transform on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal respectively to obtain corresponding first disturbance frequency domain signal, first response frequency domain signal, second disturbance frequency domain signal, and second response frequency domain signal includes: performing Discrete Fourier Transform on the disturbance signal of a preset phase in the first disturbance signal to obtain a corresponding first disturbance frequency domain signal; the preset phase is any one of the three phases; performing Discrete Fourier Transform on the response signal of the preset phase in the first response signal to obtain a corresponding first response frequency domain signal; performing Discrete Fourier Transform on the disturbance signal of the preset phase in the second disturbance signal to obtain a corresponding second disturbance frequency domain signal; and performing Discrete Fourier Transform on the response signal of the preset phase in the second response signal to obtain a corresponding second response frequency domain signal.

[0011] In one possible implementation of the first aspect, before acquiring the first disturbance signal and the first response signal when a first disturbance of a preset frequency is injected into the device under test, and the second disturbance signal and the second response signal when a second disturbance of a preset frequency is injected into the device under test, the method further includes: acquiring the background harmonic content at the preset frequency when no disturbance is injected into the device under test; acquiring the disturbance background harmonic content when multiple disturbances of the preset frequency are injected into the device under test; wherein the multiple disturbances have the same frequency but different amplitudes; calculating the harmonic change corresponding to each disturbance based on the background harmonic content and the background harmonic content of each disturbance; calculating the average harmonic change based on each harmonic change, and determining that the two disturbances corresponding to the two harmonic changes with the smallest difference from the average harmonic change are the first disturbance and the second disturbance, respectively.

[0012] In one possible implementation of the first aspect, the first disturbance and the second disturbance are of the same type, namely, a voltage disturbance or a current disturbance; when the first disturbance and the second disturbance are voltage disturbances, the disturbance signal is a voltage disturbance signal and the response signal is a current response signal; when the first disturbance and the second disturbance are current disturbances, the disturbance signal is a current disturbance signal and the response signal is a voltage response signal; before acquiring the first disturbance signal and the first response signal when a first disturbance of a preset frequency is injected into the device under test, and the second disturbance signal and the second response signal when a second disturbance of a preset frequency is injected into the device under test. It also includes: acquiring the grid-side voltage disturbance component and the device-under-test voltage disturbance component when a voltage disturbance of a preset frequency is injected into the device under test, and calculating a first ratio between the device-under-test voltage disturbance component and the grid-side voltage disturbance component; acquiring the grid-side current disturbance component and the device-under-test current disturbance component when a current disturbance of a preset frequency is injected into the device under test, and calculating a second ratio between the device-under-test current disturbance component and the grid-side current disturbance component; comparing the magnitudes of the first ratio and the second ratio, and determining the type of disturbance corresponding to the larger ratio as the type of disturbance injected into the device under test.

[0013] In a second aspect, embodiments of this application provide a power electronic device impedance measurement system, which performs a power electronic device impedance measurement method as described in any of the first aspects when measuring the impedance of the device under test.

[0014] The aforementioned measurement system includes: a grid-connected switch, a first adjustable reactor, a second adjustable reactor, a third adjustable reactor, a first disturbance voltage source, a second disturbance voltage source, a first disturbance current source, and a second disturbance current source; the first terminal of the grid-connected switch is connected to the power grid, and the second terminal of the grid-connected switch is connected to the first terminal of the first adjustable reactor; the second terminal of the first adjustable reactor is connected to the first terminal of the first disturbance voltage source, and the second terminal of the first disturbance voltage source is connected to the first terminal of the second adjustable reactor; the first terminal of the first disturbance voltage source is also connected in parallel with the first disturbance current source; the second terminal of the first adjustable reactor is also connected to the first terminal of the second disturbance voltage source, and the second terminal of the second disturbance voltage source is connected to the first terminal of the third adjustable reactor; the first terminal of the second disturbance voltage source is also connected in parallel with the second disturbance current source; the second terminal of the second adjustable reactor is the first test point; the area between the second terminal of the first adjustable reactor and the first terminal of the second disturbance voltage source is the second test point; the second terminal of the third adjustable reactor is the third test point; and the device under test is connected to either the second or third test point.

[0015] In one possible implementation of the second aspect, it further includes: a first bypass switch and a second bypass switch; the first bypass switch is connected in parallel with a first disturbance voltage source, and the second bypass switch is connected in parallel with a second disturbance voltage source.

[0016] In one possible implementation of the second aspect, it further includes: a data acquisition unit connected to the device under test; the data acquisition unit is used to acquire a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test, and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the device under test; and to sequentially use a plurality of target frequencies within a preset frequency sweep interval as preset frequencies.

[0017] In one possible implementation of the second aspect, it further includes: a control calculation unit connected to the data acquisition unit; the control calculation unit is used to calculate the impedance of the device under test at a preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal.

[0018] It is understandable that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0019] The power electronic device impedance measurement method and system provided in this application inject multiple disturbances at a preset frequency into the device under test (DUT), determine the first disturbance and the second disturbance based on the multiple disturbances, determine the impedance of the DUT at the preset frequency based on the disturbance signal and response signal under the first disturbance and the second disturbance, and then determine the impedance of the DUT at each target frequency within the preset frequency sweep interval. This can reduce the interference of background harmonics on the impedance measurement of the DUT, improve the measurement accuracy of the impedance of the DUT, and thus improve the accuracy of subsequent grid connection characteristic analysis of the DUT.

[0020] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a schematic flowchart of an embodiment of the impedance measurement method for power electronic devices provided in this application;

[0023] Figure 2 This is a schematic diagram of an injection current disturbance provided in an embodiment of this application;

[0024] Figure 3 This is a schematic diagram of an injection voltage disturbance provided in an embodiment of this application;

[0025] Figure 4 This is a schematic flowchart of an impedance measurement method for a power electronic device provided in another embodiment of this application;

[0026] Figure 5 This is a schematic diagram of the structure of a power electronic device impedance measurement system provided in an embodiment of this application;

[0027] Figure 6 This is a block diagram of current disturbance control provided in one embodiment of this application. Detailed Implementation

[0028] The present application will be described more clearly below with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the function of the present application, but do not limit the present application in any way. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These all fall within the protection scope of the present application.

[0029] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0030] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0031] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0032] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0033] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0034] Figure 1 This is a schematic flowchart of an embodiment of the impedance measurement method for power electronic devices provided in this application.

[0035] like Figure 1 As shown, the method in the embodiments of this application may include:

[0036] Step 101: Acquire the first disturbance signal and the first response signal when a first disturbance of a preset frequency is injected into the device under test, and the second disturbance signal and the second response signal when a second disturbance of a preset frequency is injected into the device under test.

[0037] The first and second disturbances have the same frequency but different amplitudes. The device under test is a power electronic device. This power electronic device can be a grid-connected inverter, a virtual synchronous machine, or a droop-controlled inverter, etc.

[0038] For example, the disturbance injected into the device under test can be a voltage disturbance or a current disturbance. Since the disturbance injected into the device under test will be divided by the power grid, when the proportion of voltage division or current division by the power grid is large, it is impossible to accurately measure the impedance of the device under test.

[0039] To avoid the above situation, in one possible implementation, voltage disturbances and current disturbances are injected into the device under test (DUT) in this application embodiment, and the type of disturbance injected into the DUT is determined according to the voltage division ratio and current shunt ratio between the DUT side and the power grid side, so as to improve the accuracy of impedance measurement of the DUT. Specifically, before step 101, steps S1 to S3 may also be included.

[0040] S1. When a voltage disturbance of a preset frequency is injected into the device under test, the voltage disturbance component on the grid side and the voltage disturbance component on the device under test side are obtained, and the first ratio of the voltage disturbance component on the device under test side to the voltage disturbance component on the grid side is calculated.

[0041] S2. When a current disturbance of a preset frequency is injected into the device under test, the current disturbance component on the grid side and the current disturbance component on the device under test side are obtained, and the second ratio of the current disturbance component on the device under test side to the current disturbance component on the grid side is calculated.

[0042] S3. Compare the first ratio and the second ratio, and determine the type of disturbance corresponding to the larger ratio as the type of disturbance injected into the device under test.

[0043] The first and second disturbances are of the same type, either voltage disturbances or current disturbances. When the first and second disturbances are voltage disturbances, the first and second disturbance signals are voltage disturbance signals, and the first and second response signals are current response signals. When the first and second disturbances are current disturbances, the first and second disturbance signals are current disturbance signals, and the first and second response signals are voltage response signals.

[0044] In practical applications, when the impedance of the device under test (DUT) is greater than the equivalent impedance of the mains grid, the voltage division ratio on the DUT side is large, resulting in a high signal-to-noise ratio and utilization rate of the voltage disturbance signal. In this case, injecting a voltage disturbance into the DUT and calculating its impedance based on this disturbance can improve the accuracy of impedance measurement.

[0045] When the impedance of the device under test (DUT) is less than the equivalent impedance of the mains grid, the current shunt ratio of the DUT is large, resulting in a high signal-to-noise ratio and high utilization rate of the current disturbance signal. In this case, injecting a current disturbance into the DUT and calculating its impedance based on this disturbance can improve the accuracy of impedance measurement.

[0046] When the impedance of the device under test is equal to the equivalent impedance of the power grid, either voltage or current disturbance can be injected into the device under test.

[0047] Optionally, when the first ratio is greater than the second ratio, it is determined that a voltage disturbance has been injected into the device under test. When the first ratio is less than the second ratio, it is determined that a current disturbance has been injected into the device under test. When the first ratio is equal to the second ratio, it is determined that either a voltage disturbance or a current disturbance has been injected into the device under test.

[0048] It should be noted that the first and second disturbances are three-phase disturbances. Accordingly, the disturbance signal includes the three-phase disturbance signal, and the response signal includes the three-phase response signal. Figure 2 This is a schematic diagram of injected current disturbance provided in one embodiment of this application. (Refer to...) Figure 2 The injected current disturbance is a parallel injection, i pa i pb and i pc For the total current disturbance signal of the injected current disturbance, i ga i gb and i gc The current disturbance signal on the grid side is the total current disturbance signal (i.e., the grid-side current disturbance component), u pga u pgb and u pgc For i ga i gb and i gc The voltage response signal Z generated across the equivalent impedance on the grid side. ga Zgb and Z gc The equivalent impedance on the grid side, u ga u gb and u gc This refers to the AC grid voltage on the grid side. la i lb and i lc The current disturbance signal on the device under test side is the total current disturbance signal (i.e., the current disturbance component on the device under test side), u pla u plb and u plc For i la i lb and i lc The voltage response signal Z generated across the impedance on the side of the device under test. a Z b and Z c The impedance is the impedance on the device under test side.

[0049] Figure 3 This is a schematic diagram of an injected voltage disturbance provided in one embodiment of this application. Similarly, refer to... Figure 3 The injected voltage disturbance is a series injection u' pa 、u' pb and u' pc The total voltage disturbance signal, u', is the injected voltage disturbance. pga 、u' pgb and u' pgc i' represents the voltage disturbance signal on the grid side of the total voltage disturbance signal (i.e., the grid-side voltage disturbance component). ga 、i' gb and i' gc For u' pga 、u' pgb and u' pgc The current response signal Z' generated across the equivalent impedance on the grid side. ga Z' gb and Z' gc U' is the equivalent impedance on the grid side. ga 、u' gb and u' gc This represents the AC grid voltage on the grid side. u' pla 、u' plb and u' plc i' represents the voltage disturbance signal on the device under test side of the total voltage disturbance signal (i.e., the voltage disturbance component on the device under test side). la 、i' lb and i' lc For u' pla 、u' plb and u' plcThe current response signal Z' generated on the impedance of the device under test. a Z' b and Z' c The impedance is the impedance on the device under test side.

[0050] For example, after determining the type of disturbance injected into the device under test (DUT), a disturbance of a preset frequency is injected into the DUT. Since background harmonics exist in the power system, to avoid interference from these background harmonics on the impedance measurement of the DUT, in one possible implementation, multiple disturbances are injected into the DUT at the same preset frequency in this embodiment of the application to reduce the interference of background harmonics on the impedance measurement and improve the accuracy of the impedance measurement of the DUT. Specifically, referring to... Figure 4 Before step 101, it may also include:

[0051] S11. Obtain the background harmonic content at a preset frequency when no disturbance is injected into the device under test.

[0052] S12. Obtain the background harmonic content of the disturbance when multiple disturbances of a preset frequency are injected into the device under test; the frequencies of the multiple disturbances are the same but the amplitudes are different.

[0053] S13. Based on the background harmonic content and the background harmonic content of each disturbance, calculate the harmonic change corresponding to each disturbance.

[0054] S14. Calculate the average harmonic variation based on the variation of each harmonic, and determine the two disturbances corresponding to the two harmonic variations with the smallest difference from the average harmonic variation as the first disturbance and the second disturbance, respectively.

[0055] For example, the following description illustrates the process of injecting three disturbances into the device under test (DUT) at the same preset frequency. The background harmonic content H0 at the preset frequency is obtained when no disturbance is injected into the DUT. The background harmonic content H1 at the preset frequency is obtained when the first disturbance of the preset frequency is injected into the DUT, the background harmonic content H2 at the preset frequency is injected into the DUT, and the background harmonic content H3 at the preset frequency is injected into the DUT.

[0056] The first, second, and third disturbances are identical in type, frequency, and phase angle, but differ in amplitude. All frequencies are preset frequencies.

[0057] Optionally, calculate the harmonic variation fa1 = H1 - H0 corresponding to the first disturbance, the harmonic variation fa2 = H2 - H1 corresponding to the second disturbance, and the harmonic variation fa3 = H3 - H2 corresponding to the third disturbance. Calculate the average harmonic variation fa by averaging fa1, fa2, and fa3. Calculate the differences between fa1, fa2, fa3, and fa, and take the two disturbances corresponding to the two harmonic variations with the smallest differences as the first disturbance and the second disturbance in step 101.

[0058] Step 102: Calculate the impedance of the device under test at the preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal.

[0059] As can be seen from the foregoing, the first disturbance and the second disturbance are of the same type, the first disturbance signal and the second disturbance signal are of the same type, and the first response signal and the second response signal are of the same type.

[0060] Optionally, the first disturbance signal is the portion of the total disturbance signal of the injected first disturbance that flows into the device under test (DUT), and the first response signal is the response signal generated by the DUT. The second disturbance signal is the portion of the total disturbance signal of the injected second disturbance that flows into the DUT, and the second response signal is the response signal generated by the DUT.

[0061] It should be noted that the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal mentioned above are all time-domain signals.

[0062] In one possible implementation, step 102 may specifically include:

[0063] Step 1021: Perform Discrete Fourier Transform on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal respectively to obtain the corresponding first disturbance frequency domain signal, first response frequency domain signal, second disturbance frequency domain signal, and second response frequency domain signal.

[0064] Step 1022: Calculate the impedance of the device under test at the preset frequency based on the impedance calculation formula and the first disturbance frequency domain signal, the first response frequency domain signal, the second disturbance frequency domain signal, and the second response frequency domain signal.

[0065] In one possible implementation, as described above, the first disturbance and the second disturbance are three-phase disturbances, the disturbance signal includes a three-phase disturbance signal, and the response signal includes a three-phase response signal. Step 1021 may specifically include:

[0066] Perform a discrete Fourier transform on the disturbance signal of the preset phase in the first disturbance signal to obtain the corresponding first disturbance frequency domain signal; the preset phase is any one of the three phases.

[0067] Perform a discrete Fourier transform on the response signal of the preset phase in the first response signal to obtain the corresponding first response frequency domain signal.

[0068] Perform a discrete Fourier transform on the disturbance signal of the preset phase in the second disturbance signal to obtain the corresponding second disturbance frequency domain signal.

[0069] The response signal of the preset phase in the second response signal is subjected to discrete Fourier transform to obtain the corresponding second response frequency domain signal.

[0070] Optionally, any one of the three phases can be selected as a preset phase. For example, phase A can be selected as the preset phase. Then, a Discrete Fourier Transform (DFT) is performed on the A-phase disturbance signal in the first disturbance signal to obtain the corresponding first disturbance frequency domain signal. Similarly, the first response frequency domain signal, the second disturbance frequency domain signal, and the second response frequency domain signal are obtained respectively.

[0071] For example, the impedance calculation formula is as follows:

[0072]

[0073] In the formula, The impedance complex vector of the device under test. The amplitude is Z g (h), phase angle is The resistive component is R g The sensibility component is L g Angular frequency is ω h h is the preset frequency. and These are the first perturbation frequency domain signal and the first response frequency domain signal, respectively. and These are the second perturbation frequency domain signal and the second response frequency domain signal, respectively. and These are the first response frequency domain signal and the first disturbance frequency domain signal, respectively. and These are the second response frequency domain signal and the second disturbance frequency domain signal, respectively.

[0074] Step 103: Take multiple target frequencies within the preset frequency sweep interval as preset frequencies in sequence, and perform the above steps of acquiring disturbance signals and response signals, and calculating the impedance of the device under test at the preset frequencies, to obtain the impedance of the device under test at each target frequency within the preset frequency sweep interval.

[0075] Optionally, the preset frequency sweep interval can be [0Hz, 10000Hz]. Within the [0Hz, 100Hz] interval, the target frequency interval can be 0.1Hz, and within the (100Hz, 10000Hz] interval, the target frequency interval can be 1Hz. Multiple target frequencies within the preset frequency sweep interval are sequentially used as preset frequencies. Steps 101 to 102, and steps S11 to S14, are executed, namely, the steps of acquiring disturbance signals and response signals, calculating the impedance of the device under test at the preset frequencies, and determining the first disturbance and the second disturbance, to obtain the impedance of the device under test at each target frequency within the preset frequency sweep interval.

[0076] For example, the impedance calculation formula shows that the amplitude and phase angle of the impedance of the device under test at each target frequency within a preset frequency sweep interval can be obtained. By connecting the amplitude values ​​of the impedance of the device under test at each target frequency to form a curve, the amplitude-frequency characteristic of the device under test can be obtained. By connecting the phase angles of the impedance of the device under test at each target frequency to form a curve, the phase-frequency characteristic of the device under test can be obtained.

[0077] This application provides an impedance measurement method for power electronic devices. By injecting multiple disturbances at a preset frequency into the device under test (DUT), and determining a first disturbance and a second disturbance based on these disturbances, the impedance of the DUT at the preset frequency is determined based on the disturbance signals and response signals under the first and second disturbances. This allows for the determination of the impedance of the DUT at each target frequency within a preset frequency sweep interval. This method can reduce the interference of background harmonics on the impedance measurement of the DUT, improve the accuracy of impedance measurement, and thus improve the accuracy of subsequent grid connection characteristic analysis of the DUT.

[0078] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0079] Figure 5 This is a schematic diagram of the structure of a power electronic device impedance measurement system provided in an embodiment of this application. Figure 5 As shown, the power electronic device impedance measurement system provided in this embodiment performs a power electronic device impedance measurement method when measuring the impedance of the device under test. The measurement system includes: a grid-connected switch, a first adjustable reactor, a second adjustable reactor, a third adjustable reactor, a first disturbance voltage source, a second disturbance voltage source, a first disturbance current source, and a second disturbance current source.

[0080] The first end of the grid-connected switch is connected to the power grid, and the second end of the grid-connected switch is connected to the first end of the first adjustable reactor.

[0081] The second terminal of the first adjustable reactor is connected to the first terminal of the first disturbance voltage source, and the second terminal of the first disturbance voltage source is connected to the first terminal of the second adjustable reactor; the first terminal of the first disturbance voltage source is also connected in parallel with a first disturbance current source. The second terminal of the first adjustable reactor is also connected to the first terminal of the second disturbance voltage source, and the second terminal of the second disturbance voltage source is connected to the first terminal of the third adjustable reactor; the first terminal of the second disturbance voltage source is also connected in parallel with a second disturbance current source.

[0082] The second terminal of the second adjustable reactance is the first test point; the area between the second terminal of the first adjustable reactance and the first terminal of the second disturbance voltage source is the second test point; the second terminal of the third adjustable reactance is the third test point. The device under test is connected to either the second or the third test point.

[0083] The above-mentioned power electronic device impedance measurement method can be any power electronic device impedance measurement method provided in any embodiment of this application.

[0084] Optionally, the aforementioned disturbance current sources are used to inject current disturbances into the device under test, and the aforementioned disturbance voltage sources are used to inject voltage disturbances into the device under test. Both the aforementioned disturbance current sources and disturbance voltage sources are isolated and powered by individual lithium batteries. The first and second disturbance current sources can be full-bridge inverters, MMC-controlled inverters, or linear amplifiers, etc.

[0085] For example, a control method combining quasi-proportional (QPR) control and grid voltage feedforward control is used to control the disturbance current source, that is, to control the total current disturbance signal of the disturbance current source. Since the three phases are symmetrical, taking phase A as an example... Figure 6 This is a block diagram illustrating the control of current disturbances according to an embodiment of this application. (Refer to...) Figure 6 The current command signal for the disturbance current source The total current disturbance signal i obtained by sampling the current disturbance injected into the device under test pa The difference is calculated to obtain the error amount Δi. pa Error amount Δi pa After QPR control via the current loop, the sum of the controlled signal and the grid voltage feedforward is modulated by SPWM to obtain the switching control signal for the disturbance current source. This switching control signal controls the opening and closing of the corresponding bridge arm switch in the disturbance current source, thereby controlling the disturbance current source. Wherein, K... pwm G is the proportional coefficient for SPWM control. PR K is the equivalent control coefficient for QPR control. f L is the proportional coefficient for feedforward voltage feedback. f For the input line inductance parameter, v sa This is the voltage at the grid connection point.

[0086] The transfer function for QPR control is:

[0087]

[0088] In the formula, H QPR (s) is the transfer function of QPR control, s is the operator, and K p K is the proportional coefficient for QPR control. i ω is the integral coefficient of QPR control. c The resonant bandwidth can be 4π rad / s, and ω0 is the angular frequency of the injected total current disturbance signal.

[0089] Optionally, the above measurement system may further include: a first bypass switch and a second bypass switch. The first bypass switch is connected in parallel with a first disturbance voltage source, and the second bypass switch is connected in parallel with a second disturbance voltage source.

[0090] For example, the above measurement system may further include a data acquisition unit (not shown) connected to the device under test. This data acquisition unit is used to acquire a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test, and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the device under test. Herein, multiple target frequencies within a preset frequency sweep interval are sequentially used as preset frequencies.

[0091] Optionally, the above measurement system may further include a control calculation unit (not shown) connected to the data acquisition unit. This control calculation unit is used to calculate the impedance of the device under test at a preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal.

[0092] The control and calculation unit is also connected to each disturbance voltage source and each disturbance current source respectively, so as to take multiple target frequencies in the preset frequency sweep interval as preset frequencies in sequence, and control the disturbance voltage source and disturbance current source to generate disturbances at preset frequencies as needed, so as to obtain the impedance of the device under test at each target frequency in the preset frequency sweep interval.

[0093] The power electronic device impedance measurement system provided in this application executes a power electronic device impedance measurement method when measuring the impedance of the device under test, which can accurately measure the impedance of the device under test and improve the measurement accuracy of the impedance of the device under test.

[0094] In actual testing, based on the power electronic device impedance measurement system provided in any embodiment of this application, the impedance measurement method of the power electronic device provided in any embodiment of this application is used to perform impedance measurement on the device under test under different test modes.

[0095] Test Mode 1: Large power grid connection operation test mode.

[0096] In test mode 1, connect the device under test to test point 3, close the grid-connected switch, close the first bypass switch, turn off the first disturbance current source and the first disturbance voltage source, and adjust the reactance value of the third adjustable reactance to 0.

[0097] The reactance value of the first adjustable reactance is adjusted from a short-circuit ratio of 2 to a short-circuit ratio of 10, with a variation interval of 0.5 short-circuit ratio. The impedance of the device under test is measured at 18 target reactance values. That is, at each target reactance value, the first to fourth tests in the following embodiments are performed on the device under test.

[0098] In the first test, the voltage amplitude of the total voltage disturbance signal injected by the second disturbance voltage source is set to 2% to 10% of the rated voltage amplitude of the device under test, and the phase sequence is in phase with the grid voltage. The preset sweep frequency range is [0Hz, 10000Hz]. Based on the acquired voltage disturbance signal and current response signal, the impedance of the device under test under positive sequence voltage disturbance is calculated, and then the amplitude-frequency characteristic and phase-frequency characteristic of the impedance under test are obtained.

[0099] In the second test, the amplitude of the total current disturbance signal injected by the second disturbance current source is set to 2% to 10% of the rated current amplitude of the device under test, and the phase sequence is in phase with the grid voltage. The preset sweep frequency range is [0Hz, 10000Hz]. Based on the acquired current disturbance signal and voltage response signal, the impedance of the device under test under positive sequence current disturbance is calculated, and then the amplitude-frequency characteristic and phase-frequency characteristic of the measured impedance are obtained.

[0100] In the third test, the voltage amplitude of the total voltage disturbance signal injected by the second disturbance voltage source was set to 2% to 10% of the rated voltage amplitude of the device under test, and the phase sequence was set to the negative sequence grid voltage phase. The preset frequency sweep range was [0Hz, 10000Hz]. Based on the acquired voltage disturbance signal and current response signal, the impedance of the device under test under negative sequence voltage disturbance was calculated, and thus the amplitude-frequency characteristics and phase-frequency characteristics of the measured impedance were obtained.

[0101] In the fourth test, the amplitude of the total current disturbance signal injected by the second disturbance current source was set to 2% to 10% of the rated current amplitude of the device under test, and the phase sequence was set to the negative sequence grid voltage phase. The preset frequency sweep range was [0Hz, 10000Hz]. Based on the acquired current disturbance signal and voltage response signal, the impedance of the device under test under negative sequence current disturbance was calculated, and thus the amplitude-frequency characteristics and phase-frequency characteristics of the measured impedance were obtained.

[0102] Test Mode 2: Off-grid operation test mode for large power grids.

[0103] In test mode 2, connect the energy storage inverter to test point 1 and the device under test (DUT) to test point 2. Set the energy storage inverter to operate in voltage source mode to provide voltage support for the microgrid, enabling impedance measurement of the DUT under standard capacity power supply. Disconnect the grid-connected switch, close the second bypass switch, shut down the second disturbance current source and the second disturbance voltage source, and adjust the reactance value of the third adjustable reactance to 0.

[0104] The reactance value of the second adjustable reactance is adjusted from a short-circuit ratio of 10 to a short-circuit ratio of 2, with a change interval of 0.5 short-circuit ratio. The impedance of the device under test is measured at 18 target reactance values. That is, at each target reactance value, the first to fourth tests in the aforementioned embodiment are performed on the device under test to obtain the amplitude-frequency characteristics and phase-frequency characteristics of the measured impedance.

[0105] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for measuring the impedance of a power electronic device, characterized in that, include: Step 101: Acquire a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test, and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the device under test; the first disturbance and the second disturbance have the same frequency but different amplitudes; the device under test is a power electronic device to be tested. Step 102: Calculate the impedance of the device under test at the preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal; Step 103: Take multiple target frequencies within the preset frequency sweep interval as the preset frequency in sequence, and execute steps 101 and 102 to obtain the impedance of the device under test at each target frequency within the preset frequency sweep interval. The method further includes, before acquiring the first disturbance signal and the first response signal when a first disturbance of a preset frequency is injected into the device under test, and the second disturbance signal and the second response signal when a second disturbance of a preset frequency is injected into the device under test, the method further includes: Obtain the background harmonic content at the preset frequency when no disturbance is injected into the device under test; The background harmonic content of the disturbance is obtained when the device under test is subjected to multiple disturbances of a preset frequency; the multiple disturbances have the same frequency but different amplitudes. Based on the background harmonic content and the background harmonic content of each disturbance, the harmonic change corresponding to each disturbance is calculated respectively. The average harmonic variation is calculated based on the variation of each harmonic, and the two disturbances corresponding to the two harmonic variations with the smallest difference from the average harmonic variation are identified as the first disturbance and the second disturbance.

2. The impedance measurement method for power electronic devices according to claim 1, characterized in that, The step of calculating the impedance of the device under test at the preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal includes: Discrete Fourier transforms are performed on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal respectively to obtain the corresponding first disturbance frequency domain signal, first response frequency domain signal, second disturbance frequency domain signal, and second response frequency domain signal. The impedance of the device under test at the preset frequency is calculated based on the impedance calculation formula and the first disturbance frequency domain signal, the first response frequency domain signal, the second disturbance frequency domain signal, and the second response frequency domain signal.

3. The impedance measurement method for power electronic devices according to claim 2, characterized in that, The impedance calculation formula is as follows: In the formula, The impedance complex vector of the device under test. The amplitude is Z g (h), phase angle is The resistive component is R g The sensibility component is L g Angular frequency is ω h h is the preset frequency. and These are the first perturbation frequency domain signal and the first response frequency domain signal, respectively. and These are respectively the second perturbation frequency domain signal and the second response frequency domain signal, or... and These are the first response frequency domain signal and the first disturbance frequency domain signal, respectively. and These are the second response frequency domain signal and the second disturbance frequency domain signal, respectively.

4. The impedance measurement method for power electronic devices according to claim 2, characterized in that, The first disturbance and the second disturbance are three-phase disturbances; the disturbance signal includes a three-phase disturbance signal, and the response signal includes a three-phase response signal; The step of performing discrete Fourier transforms on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal respectively to obtain the corresponding first disturbance frequency domain signal, first response frequency domain signal, second disturbance frequency domain signal, and second response frequency domain signal includes: Perform a Discrete Fourier Transform on the disturbance signal of a preset phase in the first disturbance signal to obtain the corresponding first disturbance frequency domain signal; the preset phase is any one of the three phases; Perform a discrete Fourier transform on the response signal of the preset phase in the first response signal to obtain the corresponding first response frequency domain signal; Perform a discrete Fourier transform on the disturbance signal of the preset phase in the second disturbance signal to obtain the corresponding second disturbance frequency domain signal; Perform a discrete Fourier transform on the response signal of the preset phase in the second response signal to obtain the corresponding second response frequency domain signal.

5. The impedance measurement method for power electronic devices according to claim 1, characterized in that, The first disturbance and the second disturbance are of the same type, namely voltage disturbance or current disturbance; when the first disturbance and the second disturbance are voltage disturbances, the disturbance signal is a voltage disturbance signal and the response signal is a current response signal; when the first disturbance and the second disturbance are current disturbances, the disturbance signal is a current disturbance signal and the response signal is a voltage response signal. Before acquiring the first disturbance signal and the first response signal when a first disturbance of a preset frequency is injected into the device under test, and the second disturbance signal and the second response signal when a second disturbance of a preset frequency is injected into the device under test, the method further includes: When a voltage disturbance of a preset frequency is injected into the device under test, the voltage disturbance component on the grid side and the voltage disturbance component on the device under test side are obtained, and a first ratio of the voltage disturbance component on the device under test side to the voltage disturbance component on the grid side is calculated. When a current disturbance of a preset frequency is injected into the device under test, the current disturbance component on the grid side and the current disturbance component on the device under test side are obtained, and a second ratio of the current disturbance component on the device under test side to the current disturbance component on the grid side is calculated. By comparing the first ratio and the second ratio, the type of disturbance corresponding to the larger ratio is determined as the type of disturbance injected into the device under test.

6. An impedance measurement system for a power electronic device, characterized in that, When measuring the impedance of the device under test, the power electronic device impedance measurement method as described in any one of claims 1 to 5 is performed; The measurement system includes: a grid-connected switch, a first adjustable reactor, a second adjustable reactor, a third adjustable reactor, a first disturbance voltage source, a second disturbance voltage source, a first disturbance current source, and a second disturbance current source; The first end of the grid-connected switch is connected to the power grid, and the second end of the grid-connected switch is connected to the first end of the first adjustable reactor. The second end of the first adjustable reactance is connected to the first end of the first disturbance voltage source, and the second end of the first disturbance voltage source is connected to the first end of the second adjustable reactance; the first end of the first disturbance voltage source is also connected in parallel with the first disturbance current source; The second end of the first adjustable reactor is also connected to the first end of the second disturbance voltage source, and the second end of the second disturbance voltage source is connected to the first end of the third adjustable reactor; the first end of the second disturbance voltage source is also connected in parallel with the second disturbance current source; The second end of the second adjustable reactance is the first test point; the area between the second end of the first adjustable reactance and the first end of the second disturbance voltage source is the second test point; the second end of the third adjustable reactance is the third test point. The device under test is connected to the second test point or the third test point.

7. The impedance measurement system for power electronic devices according to claim 6, characterized in that, Also includes: First bypass switch and second bypass switch; The first bypass switch is connected in parallel with the first disturbance voltage source, and the second bypass switch is connected in parallel with the second disturbance voltage source.

8. The impedance measurement system for power electronic devices according to claim 6, characterized in that, Also includes: The data acquisition unit connected to the device under test; The data acquisition unit is used to acquire a first disturbance signal and a first response signal when a first disturbance of a preset frequency is injected into the device under test, and a second disturbance signal and a second response signal when a second disturbance of a preset frequency is injected into the device under test. Multiple target frequencies within a preset sweep frequency range are sequentially used as the preset frequencies.

9. The impedance measurement system for power electronic devices according to claim 8, characterized in that, Also includes: The control computing unit is connected to the data acquisition unit; The control calculation unit is used to calculate the impedance of the device under test at the preset frequency based on the first disturbance signal, the first response signal, the second disturbance signal, and the second response signal.

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