Discrete Attraction Law Method for Composite Interference Compensation DC Buck Converter

Abstract

The present invention discloses a discrete attraction law method for a DC buck converter using composite interference compensation. A composite interference compensation strategy is adopted and embedded into a discrete non-switching power attraction law to construct an ideal error dynamic with interference suppression capability. A discrete time controller is designed based on the ideal error dynamic, and the signal obtained by the current controller calculation is used as the control input of the DC buck converter. The specific controller parameter tuning work can be carried out according to the indicators of the system tracking error attraction process, and specific expressions are given to characterize the steady-state error band boundary of the tracking error attraction process and the maximum number of convergence steps required for the tracking error to enter the steady-state error band for the first time. The present invention has fast convergence and non-switching characteristics, and can also improve the tracking accuracy and anti-interference capability of the DC buck converter and effectively reduce the output voltage ripple.

Description

Technical Field

[0001] The present invention relates to a discrete attraction law method using a composite interference compensation DC buck converter. The method is suitable for buck-type DC power supplies and also suitable for DC-DC power supplies in industrial control. Background Art

[0002] A DC step-down (Buck) converter is a power electronic device that converts voltage in a DC circuit. Due to its simple and lightweight system structure, stable step-down, and safe and reliable operation, DC buck converters are currently widely used in industries such as electric vehicle charging, LED driving, and aerospace.

[0003] Traditional DC buck converter voltage control often relies on linear proportional-integral-derivative (PID) control. However, due to various disturbances such as sudden load changes, input voltage fluctuations, and model parameter perturbations, high-performance control cannot be achieved. Sliding mode control is a nonlinear control method with advantages such as simple control implementation, fast output response, and good robustness. However, sliding mode control itself has inherent chattering issues. Applying it to DC buck converters can increase output voltage ripple. Therefore, reducing system chattering is a key research focus in sliding mode control.

[0004] The reaching law approach to sliding mode control employs a reaching law, dividing the dynamic response of the closed-loop system into a reaching process and a sliding mode. Its stability and convergence are determined by the specific reaching law and sliding mode function. The attraction law approach directly utilizes the tracking error signal, eliminating the need to define a sliding mode function, making controller design more straightforward and concise. The dynamic response of the closed-loop system is determined solely by the attraction law. In the presence of disturbances, disturbance rejection measures are embedded within the attraction law to construct ideal error dynamics with disturbance rejection. Designing a discrete-time controller based on the ideal error dynamics ensures that the closed-loop system exhibits the error dynamics characterized by the ideal error dynamics, thereby improving the control system's interference rejection and tracking performance. When designing a discrete controller using the attraction law approach, the attraction law can provide two indicators of the transient and steady-state behavior of the tracking error: the absolute attraction layer and the steady-state error band. The specific values ​​of these two indicators depend on the controller parameters. Given the specific form of the attraction law, specific expressions for these two indicators can be pre-determined and used for controller parameter tuning.

[0005] DC step-down converters are subject to various disturbances (such as sudden load changes and input voltage fluctuations), requiring effective compensation and suppression for each of these interference signals. A commonly used approach for disturbance compensation and suppression is the "one-step delay disturbance estimation" technique. This technique effectively compensates and suppresses constant and slowly varying disturbances. However, this approach can introduce issues such as measurement noise amplification and one-step delay, which can reduce the control accuracy and stability of the DC step-down converter. Therefore, effectively improving the DC step-down converter's interference suppression capability and reducing output voltage ripple (minimizing steady-state error) are key concerns in controller design and represent pressing challenges. Summary of the Invention

[0006] To overcome the problems of large output voltage ripple and noise amplification associated with existing control methods, this invention provides a discrete attraction law approach for a DC buck converter using composite interference compensation. Composite interference compensation measures are embedded within the attraction law to construct an ideal error dynamics with interference compensation capabilities, effectively suppressing various interference signals such as noise and model nonlinearity. This digital control technology for DC buck converters employing a composite interference compensation strategy achieves precise reference signal tracking, exhibits interference immunity, and effectively reduces output voltage ripple.

[0007] The technical solution adopted by the present invention to solve the above technical problems is: using a discrete attraction law method of a composite interference compensation DC buck converter, comprising the following steps:

[0008] Step 1: Establish a mathematical model of the DC buck converter control system

[0009] The mathematical model of the DC buck converter control system is established as:

[0010]

[0011] Among them, V k+1 ,V k ,V k-1 They represent the output voltage of the DC step-down converter at time k+1, k, and k-1 respectively, and u k represents the control input signal of the DC buck converter at the kth moment, T s is the switching period of the power switch tube, R, L, C are the load resistance, inductance and capacitance of the DC buck converter respectively; V in is the input voltage signal; w k+1 is the total interference signal of the system at time k+1;

[0012] Step 2: Construct a discrete non-switching power attraction law

[0013] Constructing discrete non-switching power attraction laws

[0014]

[0015] Among them, e k =r k -V k is the tracking error of the DC buck converter at the kth moment, r k is the given reference signal at the kth moment, V k is the actual output voltage signal of the DC buck converter at the kth moment; the nonlinear function is The convergence rate parameter of the tracking error satisfies In the attraction law (2), the tracking error starts from an arbitrary initial value e0 and passes through After the step, it converges monotonically to the origin without chattering, where is not less than k * The smallest integer k * The expression is

[0016]

[0017] Step 3: Composite interference compensation strategy

[0018] In order to improve the anti-interference ability of the system, the composite interference compensation measure is embedded into the attraction law (2) to construct the ideal error dynamics with interference compensation ability:

[0019]

[0020] in, It is a composite disturbance compensator based on one-step delay disturbance estimation technology and extended state observation technology, and satisfies

[0021]

[0022] w in formula (5) k is the one-step delayed interference estimate, and

[0023]

[0024] In formula (5) is the extended state observation value, and

[0025]

[0026] in, are the interference observation values ​​of the DC buck converter at time k+1, k, and k-1 respectively; Respectively represent the output voltage observation values ​​of the DC buck converter at time k+1, k, k-1, and k-2; u k ,u k-1are the control input signals of the DC step-down converter at time k and k-1 respectively; the composite interference compensation error satisfy Where Δ is the supremum of the composite interference compensation error.

[0027] Step 4: Design the controller based on the desired error dynamics

[0028] Substituting equation (1) into equation (4), the expression of the discrete-time controller of the DC buck converter can be obtained as

[0029]

[0030] will u k As the control input signal of the DC buck converter, the voltage output signal V of the DC buck converter can be measured. k Following the reference signal r k The dynamic characteristics of the tracking error of the closed-loop system are described by formula (4).

[0031] Furthermore, in order to characterize the steady-state performance and convergence performance of the attraction law, the present invention provides the steady-state error band boundary Δ SSE The maximum number of convergence steps required for the tracking error to enter the steady-state error band for the first time The expressions of these two indicators can be used to guide controller parameter tuning, where the steady-state error band boundary is defined as follows:

[0032] |e k+1 |≤Δ SSE , when |e k |≤Δ SSE (9)

[0033] Here, Δ SSE is the boundary of the steady-state error band. The expressions of its various indicators are as follows:

[0034] 1) Steady-state error band boundary Δ SSE Expressed as:

[0035]

[0036] 2) Convergence steps

[0037]

[0038] The technical concept of this invention is to employ a discrete attraction law approach for a composite interference-compensated DC step-down converter. Composite interference compensation measures are embedded in the attraction law to form ideal error dynamics with interference compensation capabilities. Based on the ideal error dynamics, a discrete-time controller is designed to accurately track a given reference signal, thereby improving the DC step-down converter's anti-interference capability and effectively reducing output voltage ripple.

[0039] The control effect of the present invention is mainly manifested in: using a composite interference compensation technology to suppress system interference signals to improve tracking accuracy. At the same time, using a discrete non-switching power attraction law to achieve rapid convergence and suppress system chattering, resulting in better control performance and anti-interference capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a flow chart of the attraction law method of DC buck converter.

[0041] Figure 2 It is a circuit diagram of a DC step-down converter.

[0042] Figure 3 This is the block diagram of the discrete-time controller for the DC buck converter.

[0043] Figure 4 is the proposed discrete non-switching power attraction law and the discrete exponential attraction law e k+1 =(1-ρ)e k -εsgn(e k )’s convergence speed comparison chart.

[0044] Figure 5 is a one-step delay interference compensation error

[0045] Figure 6 When the interference w k = sin(πk / 15) and controller parameters ρ = 0.3, ε = 0.2, tracking error signal under the action of discrete time controller (19) based on discrete exponential attraction law and one-step delayed disturbance estimator.

[0046] Figure 7 Is a composite interference compensation error

[0047] Figure 8 When the interference w k =sin(πk / 15) and controller parameters ρ=0.3, ε=0.2, α=0.5, β=1.4, μ=ν=0.9, the tracking error signal under the action of the discrete time controller (20) based on the discrete non-switching power attraction law and the composite interference compensator.

[0048] Figure 9 When the interference w k=sin(πk / 15) and controller parameters ρ=0.3, ε=0.4, α=0.5, β=1.4, λ=5, μ=ν=0.9, a tracking error signal under the action of a discrete time controller (20) based on a discrete non-switching power attraction law and a composite disturbance compensator.

[0049] Figure 10 The input voltage signal V is the value of the discrete time controller (19) based on the discrete exponential attraction law and one-step delay disturbance estimator when the input DC voltage is sinusoidally fluctuating. in And the output voltage signal V out .

[0050] Figure 11 The input voltage signal V is obtained when a discrete time controller (20) based on a discrete non-switching power attraction law and a composite interference compensator is used under the condition of sinusoidal fluctuation of the input DC voltage. in And the output voltage signal V out .

[0051] Figure 12 The input voltage signal V is the value of the discrete time controller (19) based on the discrete exponential attraction law and the one-step delay disturbance estimator when tracking the target voltage output variation. in And the output voltage signal V out .

[0052] Figure 13 The input voltage signal V is obtained when a discrete time controller (20) based on a discrete non-switching power attraction law and a composite disturbance compensator is used to track the target voltage output variation. in And the output voltage signal V out .

[0053] Figure 14 is the output current I under load mutation when the discrete time controller (19) based on discrete exponential attraction law and one-step delay disturbance estimator is used. out and the output voltage V out .

[0054] Figure 15 is the output current I when the discrete time controller (20) based on discrete non-switching power attraction law and composite disturbance compensator is used under load mutation condition. out and the output voltage V out . DETAILED DESCRIPTION

[0055] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0056] Reference Figure 1-15, using the discrete attraction law method of the composite interference compensation DC buck converter as Figure 1 As shown, the following steps are included:

[0057] Step (1): Establish a mathematical model of the DC buck converter

[0058] Figure 2 The circuit structure diagram of the DC step-down converter, where V in is the DC input voltage; V T is the power switch tube; V D is a diode; R, L, C are the load resistance, inductance and capacitance of the DC step-down converter respectively; i L is the inductor current; V0 is the output voltage of the continuous system. According to Kirchhoff's voltage and current laws, when the switch is closed and turned off, the DC buck converter control system model is as follows:

[0059] a) Switch closed:

[0060]

[0061] b) Switch off:

[0062]

[0063] The average mathematical model is

[0064]

[0065] Where u is the duty cycle, which is provided by the pulse width modulation signal as a control signal. The following voltage equation can be obtained from formula (3):

[0066]

[0067] Using the Euler approximation method, equation (4) becomes

[0068]

[0069] Among them, V k+1 ,V k ,V k-1 is the discrete system output voltage of the DC step-down converter at time k+1, k, and k-1, u k represents the control input signal of the DC buck converter at the kth moment, T s is the switching period of the power switch tube, R, L, C are the load resistance, inductance and capacitance of the DC buck converter respectively; V in is the input voltage signal; Δw k+1 is the discrete error.

[0070] Considering the uncertainty disturbance of the DC buck converter system and the measurement error of R, L, and C, the second-order input-output system model of the DC buck converter becomes

[0071]

[0072] Among them, ΔR, ΔL, ΔC are the measurement errors of R, L, and C respectively. The mathematical model of the DC buck converter can be obtained from formula (6):

[0073]

[0074] Among them, w k+1 is the total interference signal of the system at time k+1, and its specific expression is

[0075]

[0076] Step (2): Construct a discrete non-switching power attraction law

[0077] Constructing discrete non-switching power attraction laws

[0078]

[0079] Among them, e k =r k -V k is the tracking error of the DC buck converter at the kth moment, r k is the given reference signal at the kth moment, V k is the actual output voltage signal of the DC buck converter at the kth moment; the nonlinear function is The convergence rate parameter of the tracking error satisfies In the attraction law (9), the tracking error starts from an arbitrary initial value e0 and passes through After the step, it converges monotonically to the origin without chattering, where is not less than k * The smallest integer k * The expression is

[0080]

[0081] Step (3): Composite interference compensation strategy

[0082] In order to improve the anti-interference ability of the system, the composite interference compensation measure is embedded into the attraction law (9) to construct an ideal error dynamics with interference compensation ability.

[0083]

[0084] in, It is a composite disturbance compensator based on one-step delay disturbance estimation technology and extended state observation technology, and satisfies

[0085]

[0086] w in formula (12) k is the one-step delayed interference estimate, and

[0087]

[0088] In formula (12) is the extended state observation value, and

[0089]

[0090] in, are the interference observation values ​​of the DC buck converter at time k+1, k, and k-1 respectively; are the output voltage observation values ​​of the DC buck converter at time k+1, k, k-1, and k-2 respectively; u k ,u k-1 Respectively represent the control input signals of the DC step-down converter at time k and k-1; the composite interference compensation error satisfy Where Δ is the supremum of the composite interference compensation error.

[0091] Step (4): Dynamically design the controller based on the ideal error

[0092] Substituting equation (7) into equation (11), the expression of the discrete-time controller of the DC buck converter can be obtained as

[0093]

[0094] will u k As the control input signal of the DC buck converter, the voltage output signal V of the DC buck converter can be measured. k Following the reference signal r k The dynamic characteristics of the tracking error of the closed-loop system are described by formula (11).

[0095] Furthermore, in order to characterize the steady-state performance and convergence performance of the attraction law, the present invention provides the steady-state error band boundary Δ SSE The maximum number of convergence steps required for the tracking error to enter the steady-state error band for the first time The expressions of these two indicators can be used to guide controller parameter tuning, where the steady-state error band boundary is defined as follows:

[0096] |e k+1 |≤Δ SSE , when |ek |≤Δ SSE (16)

[0097] Here, Δ SSE is the boundary of the steady-state error band. The expressions of its various indicators are as follows:

[0098] 1) Steady-state error band boundary Δ SSE Expressed as:

[0099]

[0100] 2) Convergence steps

[0101]

[0102] Furthermore, after the discrete time controller of the DC buck converter is designed, the controller parameters need to be tuned. The adjustable parameters ρ, ε, α, and β are tuned according to the two indicators that characterize the convergence process of the attraction law. When the tracking error enters the steady-state error band, the linear function θ k ≈β.

[0103] Example

[0104] The output voltage of the DC buck converter is controlled in a closed loop. The digital control block diagram of the DC buck converter is as follows: Figure 3 As shown in the figure. The DC step-down converter uses high-frequency PWM pulse width modulation technology to achieve the circuit step-down function. The control part uses a high-performance DSP (digital signal processor) to generate a PWM wave with adjustable duty cycle. The drive circuit turns the switch on and off, and the duty cycle is adjusted to achieve adjustable output voltage. In order to achieve accurate closed-loop voltage control, the circuit adds an AD sampling module to collect the output voltage signal V k Returns DSP, with the given reference signal r k The comparison generates an error signal, which is then calculated by the designed digital controller to correct the PWM duty cycle, thereby achieving high-performance and precise tracking control of the DC buck converter and effectively suppressing the nonlinear interference and various disturbances (load icon, input voltage mutation, etc.) of the DC buck converter model.

[0105] The following is the design process of the discrete-time controller for the DC buck converter.

[0106] First, establish the mathematical model of the DC buck converter. Figure 2 The main control circuit, sampling circuit and low-pass filter of the DC buck converter are used as the objects for mechanism modeling. The switching period of the power switch tube is T s =100us, load resistance R = 20Ω, inductance L = 209.5uH, capacitance C = 403.3uF, control period T = 0.1ms, input voltage V in=30V, given reference signal r k =5V.

[0107] The discrete-time controller based on the discrete exponential attraction law and the one-step delayed disturbance estimator is as follows:

[0108]

[0109] The discrete-time controller based on the discrete non-switching power attraction law and the composite disturbance compensator is as follows:

[0110]

[0111] This embodiment will illustrate the effectiveness and superiority of the discrete-time controller design method provided by the present invention through numerical verification and DC buck converter experimental results.

[0112] First, numerical results are used to illustrate the effectiveness of the discrete non-switching power attraction law (9) given by the present invention, and the discrete exponential attraction law e k+1 =(1-ρ)e k -εsgn(e k ) for comparison, further illustrating the superiority of the discrete non-switching power attraction law (9) proposed in the present invention. In the simulation, the initial tracking error value is e o =15, the controller parameters are selected as ρ = 0.3, ε = 0.2, α = 0.5, β = 1.4, and the numerical simulation results are shown in Figure 4 . Figure 4 The solid line in is the discrete non-switching power attraction law (9) curve, and the dotted line is the discrete exponential attraction law curve. Figure 4 It can be seen that the discrete non-switching power attraction law (9) provided by the present invention has a faster convergence speed than the discrete exponential attraction law and eliminates the chattering phenomenon of the closed-loop system.

[0113] Given the position reference signal r k =15, the initial tracking error value is e o =15, the interference signal is w k =sin(πk / 15).

[0114] Under the action of the discrete time controller (19) based on the discrete exponential attraction law and the one-step delay disturbance estimator, the supremum of the one-step delay disturbance compensation error is Δ=0.2079 (see Figure 5 ). When the controller parameters ρ=0.3,ε=0.2, the steady-state error band boundary Δ SSE =ε+Δ=0.4079. Simulation Figure 6 .

[0115] Under the action of discrete time controller (20) based on discrete non-switching power attraction law and composite disturbance compensator, the supremum of composite disturbance compensation error is Δ=0.0915 (see Figure 7 ). When the controller parameters ρ=0.3,ε=0.2,α=0.5,β=1.4,μ=ν=0.9, the steady-state error band boundary is

[0116]

[0117] Simulation Figure 8 When the controller parameters ρ=0.3,ε=0.4,α=0.5,β=1.4,μ=ν=0.9,the steady-state error band boundary Δ SSE =Δ=0.0915, simulation results show Figure 9 .

[0118] from Figure 5 and Figure 7 It can be seen that compared with the one-step delay interference estimator, the composite interference compensator can obtain smaller interference compensation error, that is, it has better interference suppression capability.

[0119] from Figure 6 、 Figure 8 and Figure 9 It can be seen that the discrete-time controller (20) based on the discrete non-switching power attraction law and the composite disturbance compensator can achieve faster convergence speed and smaller steady-state error than the discrete-time controller (19) based on the discrete exponential attraction law and one-step delayed disturbance estimation.

[0120] The block diagram of the discrete time controller of the DC buck converter used in the experiment is as follows: Figure 3 As shown, it is used to verify the effectiveness and superiority of the discrete time controller design method provided by the present invention when the input DC voltage fluctuates sinusoidally, the target voltage output changes and the load changes suddenly.

[0121] (1) Input DC voltage sinusoidal fluctuation

[0122] The input voltage adopts an alternating signal with a maximum value of Vmax = 29V, a minimum value of Vmin = 20V, and a sinusoidal fluctuation frequency of 20Hz. The output voltage target value is r k =5V. Under the action of discrete time controller (19) based on discrete exponential attraction law and one-step delayed disturbance estimation, the controller parameters are selected as ρ = 0.15, ε = 0.01, and the experimental results are shown in Figure 10 . Figure 10 The experimental data are input voltage Vin and output voltage Vout, respectively. Figure 10It can be clearly seen that the output voltage has an output fluctuation of about 733mV in peak-to-peak value (Vpp). Under the action of the discrete time controller (20) based on discrete non-switching power attraction law and composite interference compensator provided by the present invention, the controller parameters are selected as α=0.85, β=1.1, ε=0.01, μ=ν=0.8, and the experimental results are shown in FIG. Figure 11 . Figure 11 The experimental data are input voltage signal Vin and output voltage Vout. Figure 11 It can be seen that the output voltage peak-to-peak value (Vpp) is about 447mV. Figure 10 and Figure 11 It can be seen that the discrete-time controller (20) proposed in the present invention can achieve better interference suppression capability than the conventional discrete-time controller (19).

[0123] (2) Tracking target voltage output changes

[0124] Input voltage V in =25V remains unchanged, and the output voltage tracks the target value by r k =5V suddenly changes to r k =15V, and other parameters remain unchanged. Under the action of discrete time controller (19) based on discrete exponential attraction law and one-step delay disturbance estimation, the controller parameters are selected as ρ = 0.15, ε = 0.01, and the experimental results are shown in Figure 12 . Figure 12 The experimental data are input voltage V in and the output voltage V out , in the process of output voltage stepping from 5V to 15V, the response time is about 39ms. Under the action of the discrete time controller (20) based on discrete non-switching power attraction law and composite interference compensator provided by the present invention, the controller parameters are selected as α=0.85, β=1.1, ε=0.01, μ=ν=0.8, and the experimental results are shown in Figure 13 . Figure 13 The experimental data are input voltage V in and the output voltage V out , in the process of output voltage step response from 5V to 15V, the response time is about 23ms. Figure 12 and Figure 13 It can be seen that the discrete time controller (20) proposed in the present invention can achieve a faster response speed than the conventional discrete time controller (19).

[0125] (3) Load mutation situation

[0126] Input voltage V in=25V remains unchanged, and the output voltage is stabilized at 10V tracking control. The load current changes from 0.5A to 1A and then back to 0.5A, and other parameters remain unchanged. Under the action of the discrete time controller (19) based on the discrete exponential attraction law and one-step delay disturbance estimation, the controller parameters are selected as ρ = 0.15, ε = 0.01, and the experimental results are shown in Figure 14 . Figure 14 The experimental data are output current I out and the output voltage V out When the load current changes from 0.5A to 1A and then back to 0.5A, the output voltage rise response time is about 33.8ms and the fall response time is about 34.3ms. Under the action of the discrete time controller (20) based on the discrete non-switching power attraction law and the composite interference compensator provided by the present invention, the controller parameters are selected as α=0.85, β=1.1, ε=0.01, μ=ν=0.8, and the experimental results are shown in FIG. Figure 15 . Figure 15 The experimental data are output current I out and the output voltage V out When the load current changes from 0.5A to 1A and then back to 0.5A, the output voltage rise response time is about 23.8ms and the fall response time is about 24.7ms. Figure 14 and Figure 15 It can be seen that the discrete time controller (20) proposed in the present invention can achieve a faster load adjustment response speed than the conventional discrete time controller (19).

Claims

1. A discrete attraction law method of a composite interference compensation DC buck converter is used, characterized in that: The following steps are involved: Step 1: Establish a mathematical model of the DC buck converter control system Among them, V k+1 ,V k ,V k-1 They represent the output voltage of the DC step-down converter at time k+1, k, and k-1 respectively, and u k represents the control input signal of the DC buck converter at the kth moment, T s is the switching period of the power switch tube, R, L, C represent the load resistance, inductance and capacitance of the DC buck converter respectively; V in is the input voltage; w k+1 is the total interference signal of the system at time k+1; Step 2: Construct a discrete non-switching power attraction law Among them, e k =r k -V k is the tracking error of the DC buck converter at the kth moment, r k is the given reference signal at the kth moment, V k is the actual output voltage signal of the DC buck converter at the kth moment; the nonlinear function is The convergence rate parameter of the tracking error satisfies In the attraction law (2), the tracking error starts from an arbitrary initial value e0 and passes through After the step, it converges monotonically to the origin without chattering, where is not less than k * The smallest integer k * The expression is Step 3: Composite interference compensation strategy The composite disturbance compensation measure is embedded into the attraction law (2) to construct the ideal error dynamics with disturbance compensation capability: in, It is a composite disturbance compensator based on one-step delay disturbance estimation technology and extended state observation technology, and satisfies w in formula (5) k is the one-step delayed interference estimate, and In formula (5) is the extended state observation value, and in, are the interference observation values ​​of the DC buck converter at time k+1, k, and k-1 respectively; are the output voltage observation values ​​of the DC buck converter at time k+1, k, k-1, and k-2 respectively; u k ,u k-1 Respectively represent the control input signals of the DC step-down converter at time k and k-1; the composite interference compensation error satisfy Where Δ is the supremum of the composite interference compensation error; Step 4: Controller Design Substituting equation (1) into equation (4), the expression of the discrete-time controller of the DC buck converter can be obtained as will u k As the control input signal of the DC buck converter, the voltage output signal V of the DC buck converter can be measured. k Following the reference signal r k The dynamic characteristics of the tracking error of the closed-loop system are represented by formula (4).

2. The discrete attraction law method using a composite interference compensation DC buck converter according to claim 1, characterized in that: The adjustable parameters ρ, ε, α, β of the discrete time controller are tuned according to the index of the attraction process that characterizes the attraction law. The index that characterizes the attraction process of the system includes the steady-state error band boundary Δ SSE The maximum number of convergence steps required for the tracking error to enter the steady-state error band for the first time 1) Steady-state error band boundary Δ SSE Expressed as: 2) Convergence steps

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