A flying capacitor type three-phase five-level inverter and a control method and system thereof

Abstract

The present disclosure belongs to the technical field of three-phase five-level converter, and particularly relates to a flying capacitor type three-phase five-level inverter and a control method and system thereof, which comprises a DC side topology adopting a DC power supply; an inverter topology comprising first, second, third, fourth, fifth and sixth power switching tubes connected in series; seventh and eighth power switching tubes connected in parallel between the third and fourth power switching tubes; a third flying capacitor connected in parallel between the third and fourth power switching tubes; a first flying capacitor connected in parallel between the second and third power switching tubes; and a second flying capacitor connected in parallel between the fourth and fifth power switching tubes; and the seventh and eighth power switching tubes are connected in series.

Description

Technical Field

[0001] This disclosure belongs to the technical field of three-phase five-level converters, specifically relating to a flying capacitor type three-phase five-level inverter and its control method and system. Background Technology

[0002] The statements in this section are merely background information relating to this disclosure and do not necessarily constitute prior art.

[0003] Three-phase five-level converters can be applied to photovoltaic power generation, motor drives, battery energy storage systems, and other fields, especially in medium and high voltage applications. Common five-level inverter topologies fall into three main categories: neutral-point clamping, cascaded H-bridge, and flying capacitor. For the neutral-point clamping five-level topology, each phase requires 12 diodes and 8 power switches. The excessive number of diodes makes neutral-point voltage balance control difficult and increases cost with the number of diodes; this type of topology is more suitable for inverters with fewer output levels. The cascaded H-bridge also requires DC-side capacitors and multiple DC-side power supplies to provide the power supply voltage, increasing the size and cost of the inverter system. Traditional flying capacitor five-level inverters require 18 flying capacitors to support the five-level output. These numerous capacitors enable the inverter to operate under short-term voltage interruptions and severe voltage drops; however, the excessive number of flying capacitors in the five-level flying capacitor inverter leads to increased inverter size and cost, and makes capacitor voltage control particularly complex.

[0004] In recent years, based on the neutral-point clamped five-level inverter, some scholars have proposed an active neutral-point clamped (ANPC) three-phase five-level inverter, which has attracted widespread attention due to its advantages such as fewer power switches, smaller size, and lower cost. However, the three-phase five-level ANPC inverter requires simultaneous control of the DC-side capacitor and the flying capacitor to achieve five-level phase voltage output; if the DC-side capacitor voltage and the flying capacitor voltage deviate, it will affect the stability of the system. The control of the DC-side capacitor voltage and the flying capacitor voltage are mutually coupled, which brings difficulties to simultaneously controlling both. In addition, each phase of the three-phase five-level ANPC inverter consists of eight power switches, but four of these switches have a voltage stress of 1 / 2 of the DC-side voltage, and four switches have a voltage stress of 1 / 4 of the DC-side voltage. Therefore, when applied to higher voltage applications, in order for the switches to withstand higher voltages and ensure cost, the voltage stress borne by each switch should be consistent; in this case, each phase of the three-phase five-level ANPC inverter typically requires 12 switches, and each switch bears a voltage of 1 / 4 of the DC-side voltage.

[0005] According to the inventors, Model Predictive Control (MPC) is an emerging nonlinear control technology in multilevel converter control. It has attracted widespread attention due to its fast computation speed and rapid current tracking response, as seen in applications such as multi-objective optimization and fast dynamic response commands. Currently, cost reduction and efficiency improvement in power converters are hot topics in photovoltaic power generation systems. Therefore, researching a three-phase five-level inverter with flying capacitors that can withstand lower voltage stress, requires fewer flying capacitors, eliminates the need for DC-side capacitor voltage balance control, and maintains excellent output performance is of great significance for the application of power converters in high-voltage fields. Summary of the Invention

[0006] To address the aforementioned issues, this disclosure proposes a flying capacitor type three-phase five-level inverter and its control method and system. Based on a low-voltage-stress, multi-switching-state flying capacitor type three-phase five-level inverter (referred to as a multi-switching-state flying capacitor type five-level (RSS_FC5L) inverter), control is achieved through a hybrid single-dual vector model predictive control method. This method can withstand lower switching voltage stress, does not require DC-side capacitor voltage balance control, has more redundant switching states, and can effectively control the balance of the flying capacitor voltage to achieve five-level output.

[0007] According to some embodiments, the first solution of this disclosure provides a flying capacitor type three-phase five-level inverter, which adopts the following technical solution:

[0008] A flying capacitor type three-phase five-level inverter includes:

[0009] DC-side topology, using DC power supply;

[0010] The inverter topology includes a first power switch, a second power switch, a third power switch, a fourth power switch, a fifth power switch, and a sixth power switch connected in series; a seventh power switch and an eighth power switch connected in parallel between the third power switch and the fourth power switch; a third flying capacitor connected in parallel between the third power switch and the fourth power switch; a first flying capacitor connected in parallel between the second power switch and the third power switch; and a second flying capacitor connected in parallel between the fourth power switch and the fifth power switch; the seventh power switch and the eighth power switch are connected in series.

[0011] As a further technical limitation, the switching voltage stress of the first power switch and the sixth power switch is both... The switching voltage stress of the second, third, fourth, fifth, seventh, and eighth power switches is all... The voltages of the first flying capacitor, the second flying capacitor, and the third flying capacitor are all controlled to be... At this time, the inverter outputs a five-level signal, i.e. and The five output levels are denoted as -2, -1, 0, 1, and 2; where U dc This indicates the DC power supply voltage.

[0012] As a further technical limitation, the three-phase output level combination of the flying capacitor type three-phase five-level inverter has 5... 3 kind.

[0013] According to some embodiments, the second solution of this disclosure provides a control method for a flying capacitor type three-phase five-level inverter, which adopts the flying capacitor type three-phase five-level inverter provided in the first solution, and adopts the following technical solution:

[0014] A control method for a flying capacitor type three-phase five-level inverter, employing hybrid single and dual vector model predictive control, includes:

[0015] Obtain the three-phase currents of the inverter and predict the reference voltage vector at the next moment;

[0016] The region to which the reference voltage vector belongs is determined based on the magnitude of the amplitude and phase of the obtained reference voltage;

[0017] If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0018] If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0019] As a further technical limitation, the differential equation of the inverter phase voltage model is:

[0020]

[0021] in, and These represent the reference phase voltages of phases a, b, and c at the current time k; L represents the filter inductance, and R represents the load resistance. and These represent the reference phase currents of phases a, b, and c at the next time step k+1, respectively; i a (k), i b (k) and i c (k) represent the phase a current, phase b current, and phase c current at the current time k, respectively;

[0022] The value function of the model predictive control is:

[0023]

[0024] Among them, v a (k), v b (k) and v c (k) represents the phase a voltage, phase b voltage, and phase c voltage at the current time k, respectively.

[0025] Furthermore, in the process of predicting the reference voltage vector at the next moment, the phase currents i of phases a, b, and c are obtained respectively. a (k), i b (k) and i c (k), for the obtained phase current i a (k), i b (k) and i c (k) Perform coordinate transformation to obtain the current value i in the two-phase stationary coordinate system. α (k) and i β (k), that is:

[0026]

[0027] The current value was obtained by Lagrange extrapolation. and That is:

[0028]

[0029] The predicted reference voltage vector for the next moment is calculated in the two-phase stationary coordinate system. and That is:

[0030]

[0031]

[0032] Furthermore, according to the volt-second balance principle, the equation corresponding to the two vectors is:

[0033]

[0034] Among them, V ref As the reference voltage vector, T sFor a sampling time or a switching cycle; V1 and V2 represent the two vectors used to synthesize the vectors, and t1 and t2 represent the corresponding action times of V1 and V2.

[0035] Based on the value function of the model predictive control, the cost values ​​y1 and y2 corresponding to V1 and V2 are calculated, i.e. Where K is a constant greater than 0;

[0036] Eliminating the constant K, i.e.:

[0037]

[0038] Based on the respective action times of the two vectors used and the three-phase level state corresponding to the reference voltage vector, the control of the flying capacitor type three-phase five-level inverter is realized.

[0039] According to some embodiments, the third solution of this disclosure provides a control system for a flying capacitor type three-phase five-level inverter, which adopts the following technical solution:

[0040] A control system for a flying capacitor type three-phase five-level inverter employs hybrid single- and dual-vector model predictive control, including:

[0041] The prediction module is configured to acquire the three-phase currents of the inverter and predict the reference voltage vector for the next moment.

[0042] The judgment control module is configured to determine the region to which the reference voltage vector belongs based on the magnitude of the amplitude and phase of the obtained reference voltage;

[0043] If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0044] If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0045] According to some embodiments, the fourth solution of this disclosure provides a computer-readable storage medium, which adopts the following technical solution:

[0046] A computer-readable storage medium having a program stored thereon that, when executed by a processor, implements the steps in the control method for a flying capacitor type three-phase five-level inverter as described in the second aspect of this disclosure.

[0047] According to some embodiments, the fifth application of this disclosure provides an electronic device that adopts the following technical solution:

[0048] An electronic device includes a memory, a processor, and a program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps in the control method for a flying capacitor type three-phase five-level inverter as described in the second aspect of this disclosure.

[0049] Compared with the prior art, the beneficial effects of this disclosure are as follows:

[0050] This disclosure presents for the first time a flying capacitor-type three-phase five-level inverter with better voltage withstand capability. Compared with the traditional ANPC five-level inverter, the voltage stress borne by each of the four switching transistors in each phase is U. dc / 2, the voltage stress per phase of a flying capacitor type three-phase five-level inverter is U. dc / 2 significantly improves withstand voltage capability. In other words, when applied to higher voltage applications, the three-phase RSS_FC5L inverter only requires 10 switching transistors per phase to ensure that the voltage stress of each switching transistor is 1 / 4 of the DC side voltage, while under the same conditions, the traditional three-phase five-level ANPC inverter requires 12 switching transistors.

[0051] The flying capacitor type three-phase five-level inverter disclosed herein has 16 switching states, including four redundant switching states in the 1, 0, and -1 level states, and two redundant switching states in the 2 and -2 level states. Compared with the 8 switching states of a traditional five-level inverter, the RSS_FC5L inverter provides greater freedom for flying capacitor voltage control due to its more switching states, and more effectively limits the fluctuation of the flying capacitor voltage, with the fluctuation of the flying capacitor voltage remaining stable within 10%.

[0052] The flying capacitor type three-phase five-level inverter disclosed herein does not require a DC-side capacitor. Compared to traditional ANPC five-level inverters, which require simultaneous control of the coupled DC-side capacitor voltage and flying capacitor voltage, this invention does not require DC-side capacitor voltage balancing; it only needs to control the flying capacitor voltage, making the control design simpler.

[0053] This disclosure improves the output performance in the high-modulus region by using single-vector model predictive control for low-modulus conditions and dual-vector model predictive control for high-modulus conditions. The model predictive method also improves computation speed, results in rapid current tracking response, low output current ripple, and good control of the flying capacitor voltage. Attached Figure Description

[0054] The accompanying drawings, which form part of this disclosure, are used to provide a further understanding of this disclosure. The illustrative embodiments of this disclosure and their descriptions are used to explain this disclosure and do not constitute an undue limitation of this disclosure.

[0055] Figure 1 This is a schematic diagram of the topology of a conventional three-phase five-level ANPC inverter system disclosed herein;

[0056] Figure 2 This is a topology diagram of a flying capacitor type three-phase five-level inverter in Embodiment 1 of this disclosure;

[0057] Figure 3 This is a basic space vector diagram of the flying capacitor type three-phase five-level inverter in Embodiment 1 of this disclosure;

[0058] Figure 4 This is a schematic diagram of the switching on state of one phase of the flying capacitor type three-phase five-level inverter in Embodiment 1 of this disclosure.

[0059] Figure 5 This is a flowchart of the control method for the flying capacitor type three-phase five-level inverter in Embodiment 2 of this disclosure;

[0060] Figure 6 This is a control block diagram of the control method for the flying capacitor type three-phase five-level inverter in Embodiment 2 of this disclosure;

[0061] Figure 7(a) is a schematic diagram of the single and double vector group regions in Embodiment 2 of this disclosure; (light color represents the single vector group region, and dark color represents the double vector group region)

[0062] Figure 7(b) is a schematic diagram of the candidate dual vector group region and its corresponding vector and switching sequence of the RSS_FC5L inverter system in Embodiment 2 of this disclosure;

[0063] Figure 8(a) is a schematic diagram of the phase voltage of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using only single-vector model predictive control;

[0064] Figure 8(b) is a schematic diagram of the line voltage of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using only single-vector model predictive control;

[0065] Figure 8(c) is a schematic diagram of the three-phase current of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using only single-vector model predictive control;

[0066] Figure 8(d) is a schematic diagram of the C1 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using only single-vector model predictive control.

[0067] Figure 8(e) is a schematic diagram of the C2 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using only single-vector model predictive control.

[0068] Figure 8(f) is a schematic diagram of the C3 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using only single-vector model predictive control.

[0069] Figure 8(g) is a schematic diagram of the total harmonic distortion of the output current of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using only a single vector model predictive control.

[0070] Figure 9(a) is a schematic diagram of the phase voltage of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using hybrid single and double vector model predictive control;

[0071] Figure 9(b) is a schematic diagram of the line voltage of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using hybrid single and dual vector model predictive control;

[0072] Figure 9(c) is a schematic diagram of the three-phase current of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using hybrid single and double vector model predictive control;

[0073] Figure 9(d) is a schematic diagram of the C1 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using hybrid single and double vector model predictive control.

[0074] Figure 9(e) is a schematic diagram of the C2 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using hybrid single and double vector model predictive control.

[0075] Figure 9(f) is a schematic diagram of the C3 capacitor voltage in the RSS_FC5L inverter system of Embodiment 2 of this disclosure using hybrid single and double vector model predictive control.

[0076] Figure 9(g) is a schematic diagram of the total harmonic distortion of the output current of the RSS_FC5L inverter system in Embodiment 2 of this disclosure using a hybrid single and double vector model predictive control.

[0077] Figure 10 This is a structural block diagram of the control system of the flying capacitor type three-phase five-level inverter in Embodiment 3 of this disclosure. Detailed Implementation

[0078] The present disclosure will be further described below with reference to the accompanying drawings and embodiments.

[0079] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this disclosure. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains.

[0080] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this disclosure. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms “comprising” and / or “including” are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0081] In this disclosure, terms such as "upper," "lower," "left," "right," "front," "back," "vertical," "horizontal," "side," and "bottom" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are merely relational terms determined for the convenience of describing the structural relationship of the various components or elements in this disclosure, and do not specifically refer to any component or element in this disclosure, nor should they be construed as limiting this disclosure.

[0082] In this disclosure, terms such as "fixed connection," "connected," and "linked" should be interpreted broadly, indicating a fixed connection, an integral connection, or a detachable connection; a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can determine the specific meaning of these terms in this disclosure based on the specific circumstances, and they should not be construed as limitations on this disclosure.

[0083] Where there is no conflict, the embodiments and features described herein can be combined with each other.

[0084] Example 1

[0085] Embodiment 1 of this disclosure introduces a flying capacitor type three-phase five-level inverter.

[0086] In one or more embodiments, a conventional three-phase five-level ANPC inverter is disclosed, with reference to Figure 1 , Figure 1 This is a diagram of a traditional three-phase five-level ANPC inverter system. The DC side includes the DC power supply and the DC side capacitor. Assume the DC power supply voltage is U. dc The inverter topology consists of eight power switches and one flying capacitor per phase, where the switching voltage stress of switches S1-S4 is U. dc / 2, the switching voltage stress of switches S5-S8 is U dc / 4.

[0087] Figure 2This is the first flying capacitor type three-phase five-level inverter topology proposed in this embodiment, referred to here as the three-phase RSS_FC5L inverter topology. The DC side includes a DC power supply but no DC-side capacitor. The inverter topology consists of eight power switches and three flying capacitors. The switching voltage stress of switches S1 and S6 is U. dc / 2, the switching voltage stress of the remaining six switches S2-S5, S7, and S8 is U dc / 4. Control the voltage of the three flying capacitors to U. dc / 4, the inverter can then output five levels, namely -U dc / 2、-U dc / 4、0、U dc / 4、U dc / 2, here the five levels are denoted as -2, -1, 0, 1, 2; therefore, there are a total of 5 three-phase output level combinations (also known as voltage vectors). 3 Based on this, its spatial vector model diagram can be drawn as follows: Figure 3 As shown, each 60 0 Each sector is a separate sector, and there are a total of six sectors.

[0088] As shown in Table 1, each phase of the three-phase RSS_FC5L inverter has 16 switching states. Figure 3 It is a schematic diagram of the corresponding switch conduction state; from Table 1 and Figure 3 It can be seen that the three-phase RSS_FC5L inverter has a large number of redundant switching states. The level states "-2" and "2" each have two redundant states, while the level states "-1", "0" and "1" each have four redundant states. This provides greater freedom for the design of the flying capacitor voltage.

[0089] Table 1 Switching states and their corresponding flying capacitor control

[0090]

[0091]

[0092] Note:

[0093] 1. Switch state S x =1, indicating conduction; S x =0 indicates that it is turned off; where x = 1, 2, 3, 4, 5, 6, 7, 8;

[0094] 2.ΔC wj =(V Cwj -U dc / 4)*i Cwj (w = a, b, c & j = 1, 2, 3).

[0095] The expression for the difference between the actual value of the flying capacitor voltage and the reference value of the flying capacitor voltage is as follows:

[0096] ΔC wj =(V Cwj -U dc / 4)*i Cwj (w=a,b,c&j=1,2,3) (1)

[0097] Where V Cwj i represents the actual value of the flying capacitor voltage in a certain phase. Cwj This represents the current across the capacitor.

[0098] For the three-phase RSS_FC5L inverter topology in this embodiment, the voltage of each phase needs to be controlled by three flying capacitors, which is U. dc / 4. The flying capacitor voltage control is achieved by alternating the use of different redundant switch states under the same level state; otherwise, if control is performed under different level states, it will lead to voltage jumps and current distortion. As can be seen from formula (1), the phase current is taken as the reference direction, and the outflow of phase current is taken as the positive direction; assuming that the flying capacitor voltage is greater than the reference value U dc / 4. To reduce the flying capacitor voltage, the flying capacitor needs to discharge, meaning the current flows out from the positive terminal and into the negative terminal. If the flying capacitor current is in the same direction as the phase current, the flying capacitor voltage will decrease (marked as "+" in Table 1); if the flying capacitor current is in the opposite direction to the phase current, the flying capacitor voltage will continue to increase (marked as "-" in Table 1). In other words, the switching state selection principle is that when the flying capacitor voltage is greater than the reference value U... dc / 4, select "+"; otherwise, select "-". Furthermore, regarding the flying capacitor voltage, the flying capacitor of each phase of the inverter is independent, and there is no coupling between phases. This means that the switching combination of each phase only affects the flying capacitor voltage of that phase and has no effect on other phases. Therefore, the flying capacitor voltage control of the three phases is consistent. For example... Figure 4 The diagram shown illustrates the switching state of one phase of the RSS_FC5L inverter system. Taking phase a as an example, Table 1 shows that ΔC... a1 ΔC a2 ΔC a3 In the case of capacitor C a3 The two switch states N4 and N5 corresponding to the level state "-1" can respectively control the capacitor C. a3 During charging and discharging, therefore, when the flying capacitor voltage is greater than the reference value U... dc / 4, that is, using ΔC a3 For N4, the sign is "+"; otherwise, ΔC is used. a3N5 is marked with a "-". Other similar cases are noted in Table 1. For the "uncontrolled" level states "-2" and "2" in Table 1, unidirectional control of the flying capacitor voltage is also possible, but in practice, the other three level states are sufficient for flying capacitor voltage control. Furthermore, it must be pointed out that the flying capacitor C... a1 C a2 Control can only be performed when the voltage level is "0", therefore, there is a priority issue between the two. This brings some difficulties to the application of control strategies. This example uses voltage vectors with more "0" voltage levels to synthesize the data, which significantly improves this problem.

[0099] Example 2

[0100] Embodiment 2 of this disclosure introduces a control method for a flying capacitor type three-phase five-level inverter.

[0101] like Figure 5 The control method for a flying capacitor type three-phase five-level inverter shown employs hybrid single and dual vector model predictive control, including:

[0102] Obtain the three-phase currents of the inverter and predict the reference voltage vector at the next moment;

[0103] The region to which the reference voltage vector belongs is determined based on the magnitude of the amplitude and phase of the obtained reference voltage;

[0104] If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0105] If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0106] like Figure 6 The control block diagram of the RSS_FC5L inverter system shown demonstrates the implementation of five-level output through a hybrid single and dual vector model predictive control method.

[0107] The value function expression for model predictive control is as follows:

[0108]

[0109] Based on the system block diagram, the differential equations for the phase voltage model can be established as follows:

[0110]

[0111] First, the three-phase currents a, b, and c are sampled. The sampled currents are then transformed using Clark coordinates to obtain the current values ​​i in the two-phase stationary coordinate system. α (k) and i β (k); the corresponding Clark transformation formulas are as follows:

[0112]

[0113] The current value was obtained by Lagrange extrapolation. and as follows:

[0114]

[0115] Combining the above three equations (3)-(5), the predicted reference voltage vector at the next moment is calculated in the two-phase stationary coordinate system. and as follows:

[0116]

[0117] Compared to a three-phase rotating coordinate system, a two-phase stationary coordinate system is a planar coordinate system. By analyzing the phase magnitude of the reference voltage, it is easy to determine the sector to which the reference voltage vector belongs. Each sector is symmetrical, and the principle is the same. The following explanation uses the first sector as an example.

[0118] Figure 7(a) shows the region formed by the single and double vector groups. According to... Figure 3 The spatial vector diagram shows that in the region with lower modulation, there are sufficient voltage vectors containing "0" level states. This is necessary for better control of the flying capacitor C. x1 C x2 For voltage selection, voltage vectors with the most "0" level states should be chosen, as shown in Figure 7(a), where the light-colored small hexagonal areas represent the selected vectors for the single vector group. For more precise control, the single vectors should be evenly distributed. Therefore, the voltage vectors corresponding to the centers of these light-colored small hexagons are used to synthesize the voltage vectors. However, as shown in Figure 7(a), the dashed circle near the origin of the spatial vector diagram shows that among the small hexagons covered by this circle, only one phase of the voltage vectors contains "0" or none at all; for example, voltage vector "01-2" only has phase a containing a "0" level state, while voltage vector "11-2" does not contain any "0" level states.

[0119] Therefore, to improve the output effect in this area, the selected 12 dark areas are synthesized using two adjacent vectors containing a "0" level state to form a reference vector, which is the candidate dual-vector group area. Figure 7(b) shows the two adjacent vectors used by the dark small hexagons. Taking sector I as an example, the small hexagon containing "20-1" uses two voltage vectors "200" and "20-2" with more "0" level states to synthesize the reference voltage vector. The other dual-vector group small hexagon areas are similar.

[0120] The region to which a voltage vector belongs is determined by its location. If the reference voltage vector is in a single-vector group region, then within a sampling time T... S The vector is synthesized using a single vector, meaning the duration of the vector's action is T. s If the reference voltage vector is in the dual-vector group region, then in a sampling time T s Two vectors are used for synthesis, denoted as V1 for vector 1 and V2 for vector 2. As shown in Figure 7(b), to reduce current ripple, a three-segment sequence is adopted, where vector V1 is divided into two segments, the first and second segments, with an application time of t1 / 2 respectively; vector V2 serves as the middle segment, with an application time of t2. The formula for calculating the application time is as follows:

[0121] According to the volt-second balance principle, the equations corresponding to the two vectors are as follows:

[0122]

[0123] Among them, V ref As the reference voltage vector, T s For a sampling time or a switching cycle; V1 and V2 represent the two vectors used to synthesize, and t1 and t2 represent the corresponding action times of V1 and V2.

[0124] Suppose that the cost values ​​corresponding to V1 and V2 are y1 and y2 obtained through the value function, then we have

[0125]

[0126] Where K is a constant greater than 0.

[0127] Combining equations (5) and (6), and eliminating the constant K, we get:

[0128]

[0129] Therefore, the voltage vector and its duration are determined. Then, based on the three-phase level states corresponding to the voltage vector, the control of the flying capacitor voltage is determined. Since the flying capacitor voltage control is consistent for each phase, we will take one phase as an example:

[0130] (1) When the level is "-2" and "2", no flying capacitor voltage control is performed;

[0131] (2) When the level is "-1", control C3, if ΔC w3 >0, use N4; if ΔC w3 If the value is less than 0, then use N5;

[0132] (3) When the level is "1", control C3, if ΔC w3 >0, use N10; if ΔC w3 If the value is less than 0, then use N11;

[0133] (4) When the voltage level is "0", an upper limit value M is given to the capacitor voltage control of capacitors C1 and C2. If the voltage exceeds the upper limit, overpass capacitor voltage control is required; if the voltage is below the upper limit, overpass capacitor voltage control is not performed. In this case, the overpass capacitor control situation can be divided into the following two types:

[0134] i. If |ΔC w1 |*|ΔC w2 |>0, at this time ΔC w1 and ΔC w2 Same sign. Simultaneously control C1 and C2. As shown in Table 1, N7 corresponds to both being positive; N9 corresponds to both being negative.

[0135] ii. If |ΔC w1 |*|ΔC w2 |≤0, at this time ΔC w1 and ΔC w2 If the signs are opposite or at least one is 0, and both absolute values ​​are greater than M, then C1 takes precedence. That is, |ΔC w1 When |>M, control C1, when ΔC w1 When ΔC > 0, N7 is used preferentially, while ΔC w1 When <0, N8 is used preferentially; |ΔC w1 When |≤M, control C2, when ΔC w2 When ΔC > 0, N6 is used preferentially, while ΔC w2 When the value is less than 0, N9 is used preferentially.

[0136] The final switching state is determined by controlling the voltage across the capacitor, thereby generating the PWM signal that drives the switching signal.

[0137] This example was verified through simulation. In the simulation, a 400V DC power supply was used instead of the DC power supply for the photovoltaic array, and a fixed output resistor was used instead of the grid on the grid side. The resistance value was 8Ω, the fixed reference current amplitude was 23A, and the AC side filter inductor was 4.5mH.

[0138] Figures 8(a), 8(b), 8(c), 8(d), 8(e), 8(f), and 8(g) show the phase voltage, line voltage, current, and flying capacitor C of the three-phase RSS_FC5L inverter system in this embodiment when using the single-vector model predictive control method across the entire range, with a modulation index of 0.8. w1 Voltage, flying capacitor C w2 Voltage and flying capacitance C w3 The voltage waveform and current THD are shown. It can be seen that when using single-vector predictive control at a modulation index of 0.8, the control effect on the flying capacitor voltage is not ideal, resulting in severe output waveform distortion and large output current ripple. The main reason is that under this modulation index, if only a single vector is used, its "0" level state content is low, leading to unsatisfactory control of the flying capacitor voltage.

[0139] Figures 9(a), 9(b), 9(c), 9(d), 9(e), 9(f), and 9(g) show the phase voltage, line voltage, current, and flying capacitor C of the three-phase RSS_FC5L inverter system in this embodiment when using the hybrid single- and dual-vector model predictive control method at a modulation index of 0.8. w1 Voltage, flying capacitor C w2 Voltage and flying capacitance C w3 The voltage waveform and current THD are shown. It can be seen that the hybrid single- and dual-vector predictive control, under this modulation, achieves better control of the flying capacitor voltage, with fluctuations kept within 5%. In the dual-vector region, the two synthesized vectors not only have a high content of "0" level states, thus better controlling the flying capacitor voltage, but also, as shown in the switching sequence diagram in Figure 7(b), two phases in each switching sequence are clamped to two of the levels: "-2", "0", and "2". Furthermore, the phase voltage in Figure 9(a) shows clamping, and the line voltage being seven levels also supports this conclusion, implying fewer switching actions and reducing the impact of high dual-vector switching losses. Simultaneously, the current THD is approximately half that of the single-vector predictive control.

[0140] This embodiment improves the output performance in the high-modulus region by using single-vector model predictive control for low-modulus conditions and dual-vector model predictive control for high-modulus conditions. The model predictive method also improves computation speed, results in rapid current tracking response, low output current ripple, and good control of the flying capacitor voltage.

[0141] Example 3

[0142] Embodiment 3 of this disclosure introduces a control system for a flying capacitor type three-phase five-level inverter.

[0143] like Figure 10The control system of a flying capacitor type three-phase five-level inverter shown employs hybrid single and dual vector model predictive control, including:

[0144] The prediction module is configured to acquire the three-phase currents of the inverter and predict the reference voltage vector for the next moment.

[0145] The judgment control module is configured to determine the region to which the reference voltage vector belongs based on the magnitude of the amplitude and phase of the obtained reference voltage;

[0146] If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0147] If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

[0148] The detailed steps are the same as the control method of the flying capacitor type three-phase five-level inverter provided in Example 2, and will not be repeated here.

[0149] Example 4

[0150] Embodiment 4 of this disclosure provides a computer-readable storage medium.

[0151] A computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the steps in the control method for a flying capacitor type three-phase five-level inverter as described in Embodiment 2 of this disclosure.

[0152] The detailed steps are the same as the control method of the flying capacitor type three-phase five-level inverter provided in Example 2, and will not be repeated here.

[0153] Example 5

[0154] Embodiment 5 of this disclosure provides an electronic device.

[0155] An electronic device includes a memory, a processor, and a program stored in the memory and executable on the processor. When the processor executes the program, it implements the steps in the control method for a flying capacitor type three-phase five-level inverter as described in Embodiment 2 of this disclosure.

[0156] The detailed steps are the same as the control method of the flying capacitor type three-phase five-level inverter provided in Example 2, and will not be repeated here.

[0157] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

[0158] While the specific embodiments of this disclosure have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of this disclosure. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of this disclosure are still within the scope of protection of this disclosure.

Claims

1. A control method for a flying capacitor type three-phase five-level inverter, characterized in that, Hybrid single- and dual-vector predictive control is employed, including: Obtain the three-phase currents of the inverter and predict the reference voltage vector at the next moment; The region to which the reference voltage vector belongs is determined based on the magnitude of the amplitude and phase of the obtained reference voltage; If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector. If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

2. The control method for a flying capacitor type three-phase five-level inverter as described in claim 1, characterized in that, The differential equation for the inverter phase voltage model is: in, , and They represent the current time. k of a Mutually, b Harmony c The reference phase voltage of the phase; L Indicates the filter inductance. R Indicates the load resistance. , and They represent the next moment. k+1 of a Mutually, b Harmony c The reference phase current of the phase; , and They represent the current time. k of a Phase current, b Phase current and c Phase current; The value function of the model predictive control is: in, , and They represent the current time. k of a Phase voltage, b Phase voltage and c Phase voltage.

3. The control method for a flying capacitor type three-phase five-level inverter as described in claim 2, characterized in that, In the process of predicting the reference voltage vector at the next moment, the following are obtained respectively: a , b , c Three-phase phase current , and The obtained phase current , and By performing a coordinate transformation, the current values ​​in the two-phase stationary coordinate system are obtained. i α (k) and i β (k) That is: The current value was obtained by Lagrange extrapolation. and That is: The predicted reference voltage vector for the next moment is calculated in the two-phase stationary coordinate system. and That is: 。 4. The control method for a flying capacitor type three-phase five-level inverter as described in claim 2, characterized in that, According to the volt-second balance principle, the equation corresponding to the two vectors is: in, V ref For the reference voltage vector, T s For one sampling time or one switching cycle; V 1 and V 2 indicates that it is used to synthesize two vectors. t 1 and t 2 indicates V 1 and V 2 corresponds to the duration of action; Based on the value function of the model predictive control, calculate V 1 and V 2 corresponds to cost Value y 1 and y 2, that is ,in, K A constant greater than 0; Elimination constant K ,Right now: ； Based on the respective action times of the two vectors used and the three-phase level state corresponding to the reference voltage vector, the control of the flying capacitor type three-phase five-level inverter is realized.

5. The control method for a flying capacitor type three-phase five-level inverter as described in claim 1, characterized in that, The flying capacitor type three-phase five-level inverter includes: DC-side topology, using DC power supply; The inverter topology includes a first power switch, a second power switch, a third power switch, a fourth power switch, a fifth power switch, and a sixth power switch connected in series; a seventh power switch and an eighth power switch connected in parallel between the third power switch and the fourth power switch; a third flying capacitor connected in parallel between the third power switch and the fourth power switch; a first flying capacitor connected in parallel between the second power switch and the third power switch; and a second flying capacitor connected in parallel between the fourth power switch and the fifth power switch; the seventh power switch and the eighth power switch are connected in series.

6. The control method for a flying capacitor type three-phase five-level inverter as described in claim 5, characterized in that, The switching voltage stress of the first power switch and the sixth power switch are both The switching voltage stress of the second, third, fourth, fifth, seventh, and eighth power switches is all... The voltages of the first flying capacitor, the second flying capacitor, and the third flying capacitor are all controlled to be... At this time, the inverter outputs a five-level signal, i.e. , 0 and The five output levels are denoted as follows: , 0 and ;in, This indicates the DC power supply voltage.

7. The control method for a flying capacitor type three-phase five-level inverter as described in claim 5, characterized in that, The three-phase output level combination of the flying capacitor type three-phase five-level inverter includes: kind.

8. A control system for a flying capacitor type three-phase five-level inverter, employing the control method for a flying capacitor type three-phase five-level inverter as described in any one of claims 1-7, characterized in that, Hybrid single- and dual-vector predictive control is employed, including: The prediction module is configured to acquire the three-phase currents of the inverter and predict the reference voltage vector for the next moment. The judgment control module is configured to determine the region to which the reference voltage vector belongs based on the magnitude of the amplitude and phase of the obtained reference voltage; If the reference voltage vector is in the single vector group region, the reference voltage vector is synthesized using a single vector within the sampling time. The action time of the single vector used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector. If the reference voltage vector is in the dual-vector group region, the two vectors are used to synthesize the reference voltage vector within the sampling time. The action time of the two vectors used is calculated based on the value function of model predictive control. The control of the flying capacitor type three-phase five-level inverter is determined according to the three-phase level state corresponding to the reference voltage vector.

9. A computer-readable storage medium having a program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps in the control method for a flying capacitor type three-phase five-level inverter as described in any one of claims 1-7.

10. An electronic device comprising a memory, a processor, and a program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps in the control method for a flying capacitor type three-phase five-level inverter as described in any one of claims 1-7.

Images