Data processing method and device based on high-low carry instruction, and electronic device
By optimizing the computation process of elliptic curve cryptography algorithm through a data processing method based on high and low carry instructions, the high computational complexity and security issues of fast reduction techniques are solved, achieving more efficient and secure computation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHINA TELECOM CORP LTD
- Filing Date
- 2022-12-28
- Publication Date
- 2026-05-19
AI Technical Summary
Existing fast reduction techniques in elliptic curve cryptography algorithms have high computational complexity and rely on while loops for final carry-and-reduce operations, making them vulnerable to side-channel timing attacks.
A data processing method based on high and low carry instructions is adopted. By dividing the product result of large integers into high-order and low-order product results and using the properties of Mersenne primes for modular arithmetic, the calculation process is optimized, the number of instructions is reduced, while loops are avoided, and security is improved.
It improves the computational efficiency of elliptic curve cryptography, reduces the number of instructions, ensures fixed computational delay, and effectively resists side-channel timing attacks.
Smart Images
Figure CN116192391B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of network security technology, and in particular to a data processing method, apparatus, electronic device and storage medium based on carry-in instructions. Background Technology
[0002] Public-key cryptography algorithms are widely used in digital signatures, key exchange, and data encryption. Compared to traditional RSA public-key cryptography, elliptic curve cryptography has a significant advantage in key length and is currently the most widely used public-key cryptography algorithm.
[0003] With the rapid development of cloud computing and Internet of Things technologies, the number of applications with strong requirements for data privacy protection, such as Internet finance and mobile payment, has exploded. This poses a severe challenge to cryptographic algorithms, especially public-key cryptography algorithms with high computational complexity. Improving the computational performance of elliptic curve cryptography has important practical value and research significance.
[0004] Elliptic curve cryptography (ECC) algorithms mainly consist of four levels of operations: finite field operations, point arithmetic, scalar multiplication, and protocol layer. Finite field operations are the lowest and most fundamental operations in ECC, and modular multiplication is the most time-consuming low-level operation in ECC. Fast reduction performance directly affects the algorithm's performance and security, and should be a key area for optimization.
[0005] Existing fast reduction techniques have two main drawbacks: first, they have high computational complexity; second, they rely on a while loop for the final carry-and-reduce, which exposes them to the risk of side-channel timing attacks.
[0006] Therefore, improving the computational efficiency of large integer reduction and avoiding the risk of side-channel timing attacks have become urgent technical problems to be solved.
[0007] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0008] This disclosure provides a data processing method, apparatus, electronic device, and storage medium based on high and low carry instructions, which at least to some extent overcomes the problems of low computational efficiency and security risks associated with large integer subtraction due to limitations in related technologies.
[0009] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part from practice of this disclosure.
[0010] According to one aspect of this disclosure, a data processing method based on high and low carry instructions is provided, comprising: obtaining a large integer product result represented in binary; dividing the large integer product result into a high-order product result and a low-order product result; performing a modulo operation on the low-order product result to obtain a first modulo operation result; accumulating the most significant bit of the first modulo operation result into a carry flag, and performing a shift operation on the carry flag, wherein the most significant bit of the first modulo operation result is set to zero; performing a modulo operation on the high-order product result to obtain a second modulo operation result; and determining the modulo operation result of the large integer product result based on the result in the carry flag, the first modulo operation result, and the second modulo operation result.
[0011] In some embodiments, after obtaining the product result of large integers represented in binary, the method further includes: determining whether the product result of large integers satisfies a preset reduction condition; wherein, if the product result of large integers satisfies the preset reduction condition, the product result of large integers is divided into a high-order product result and a low-order product result.
[0012] In some embodiments, the large integer product result is the large integer product result of an elliptic curve over a finite field, and the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
[0013] In some embodiments, the Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
[0014] According to another aspect of this disclosure, a data processing apparatus based on high and low carry instructions is also provided, comprising: a data acquisition module for acquiring a large integer product result represented in binary; a first data processing module for dividing the large integer product result into a high-order product result and a low-order product result; a first arithmetic module for performing a modulo operation on the low-order product result to obtain a first modulo operation result; a second data processing module for accumulating the most significant bit of the first modulo operation result into a carry flag and performing a shift operation on the carry flag, wherein the most significant bit of the first modulo operation result is set to zero; a second arithmetic module for performing a modulo operation on the high-order product result to obtain a second modulo operation result; and an arithmetic result processing module for determining the modulo operation result of the large integer product result based on the result in the carry flag, the first modulo operation result, and the second modulo operation result.
[0015] In some embodiments, the above apparatus further includes: a condition verification module, configured to determine whether the large integer product result satisfies a preset reduction condition; wherein, the first data processing module is further configured to, if the large integer product result satisfies the preset reduction condition, divide the large integer product result into a high-order product result and a low-order product result.
[0016] In some embodiments, the large integer product result is the large integer product result of an elliptic curve over a finite field, and the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
[0017] In some embodiments, the Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
[0018] According to another aspect of this disclosure, an electronic device is also provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform the data processing method based on high-low carry instructions described above by executing the executable instructions.
[0019] According to another aspect of this disclosure, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the data processing method based on high and low carry instructions as described in any one of the preceding claims.
[0020] According to another aspect of this disclosure, a computer program product is also provided, including a computer program that, when executed by a processor, implements the data processing method based on high and low carry instructions as described above.
[0021] This disclosure provides a data processing method, apparatus, electronic device, and storage medium based on high and low carry instructions. The data processing method includes: obtaining a large integer product result represented in binary; dividing the large integer product result into a high-order product result and a low-order product result; performing a modulo operation on the low-order product result to obtain a first modulo operation result; accumulating the highest bit of the first modulo operation result into a carry flag, and shifting the carry flag, wherein the highest bit of the first modulo operation result is set to zero; performing a modulo operation on the high-order product result to obtain a second modulo operation result; and determining the modulo operation result of the large integer product result based on the result in the carry flag, the first modulo operation result, and the second modulo operation result. This disclosure optimizes the calculation process, reduces the number of instructions, and improves calculation efficiency while ensuring calculation accuracy. Furthermore, by optimizing the reduction of the carry flag cy, it avoids the while loop, improving security.
[0022] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0023] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0024] Figure 1 This diagram illustrates a communication system architecture according to an embodiment of the present disclosure;
[0025] Figure 2 This diagram illustrates a data processing method based on high and low carry instructions in an embodiment of this disclosure.
[0026] Figure 3 This diagram illustrates an elliptic curve algorithm according to an embodiment of the present disclosure.
[0027] Figure 4 This diagram illustrates a high / low carry instruction according to an embodiment of the present disclosure.
[0028] Figure 5 This diagram illustrates a modulo operation for a large integer product according to an embodiment of the present disclosure.
[0029] Figure 6 This diagram illustrates a data processing method based on high and low carry instructions in an embodiment of this disclosure.
[0030] Figure 7 This diagram illustrates another data processing method based on high and low carry instructions in an embodiment of this disclosure.
[0031] Figure 8 This diagram illustrates a data processing apparatus based on high and low carry instructions according to an embodiment of the present disclosure; and
[0032] Figure 9 A structural block diagram of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation
[0033] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
[0034] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0035] As mentioned in the background section, existing fast reduction techniques have two main drawbacks: firstly, they have high computational complexity, and secondly, they rely on a while loop for the final carry-and-reduce, which poses a risk of side-channel timing attacks.
[0036] Based on this, this disclosure provides a data processing method, apparatus, electronic device, and storage medium based on carry-in / carry instructions. Utilizing carry-in / carry calculation instructions and combining them with finite field fast reduction theory, a method for fast reduction of large integers is designed, which can effectively reduce the number of calculation instructions while ensuring a fixed calculation delay. This method not only improves the performance of elliptic curve cryptography but also effectively resists side-channel timing attacks.
[0037] This disclosure is used for elliptic curve cryptography with a modulus of Mersenne primes, wherein the modulus must satisfy the format 2. X -Y, the current mainstream new Curve25519 and FourQ elliptic curves both meet the above requirements. Curve25519 has been included in RFC (7748, 8032, 8446) standards and is the latest recommended cryptography for the TLS 1.3 protocol. It is also widely used in smart interconnected products from companies such as Huawei and Apple. The FourQ curve is the fastest known elliptic curve, with a performance 3-5 times that of NIST-P256, and has potential application value.
[0038] The specific implementation methods of the embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.
[0039] Figure 1 A schematic diagram of an exemplary application system architecture is shown, illustrating an application of the data processing method based on high / low carry instructions as described in this disclosure. For example... Figure 1 As shown, the system architecture may include terminal device 101, network 102 and server 103.
[0040] Network 102 is a medium used to provide a communication link between terminal device 101 and server 103, and can be a wired network or a wireless network.
[0041] Optionally, the aforementioned wireless or wired networks use standard communication technologies and / or protocols. The network is typically the Internet, but can also be any network, including but not limited to Local Area Networks (LANs), Metropolitan Area Networks (MANs), Wide Area Networks (WANs), mobile, wired or wireless networks, private networks, or any combination of virtual private networks. In some embodiments, technologies and / or formats including Hyper Text Markup Language (HTML), Extensible Markup Language (XML), etc., are used to represent data exchanged over the network. Furthermore, conventional encryption technologies such as Secure Socket Layer (SSL), Transport Layer Security (TLS), Virtual Private Networks (VPNs), and Internet Protocol Security (IPsec) can be used to encrypt all or some links. In other embodiments, custom and / or dedicated data communication technologies can be used to replace or supplement the aforementioned data communication technologies.
[0042] Terminal device 101 can be various electronic devices, including but not limited to smartphones, tablets, laptops, desktop computers, smart speakers, smartwatches, wearable devices, augmented reality devices, virtual reality devices, etc.
[0043] Optionally, the client of the application installed on different terminal devices 101 may be the same, or the client of the same type of application based on different operating systems. Depending on the terminal platform, the specific form of the application client may also be different; for example, the application client may be a mobile client, a PC client, etc.
[0044] Server 103 can be a server that provides various services, such as a backend management server that supports the device operated by the user using terminal device 101. The backend management server can analyze and process received requests and other data, and feed the processing results back to the terminal device.
[0045] Optionally, the server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. The terminal and server can be connected directly or indirectly via wired or wireless communication, and this disclosure does not impose any restrictions.
[0046] Those skilled in the art will know that Figure 1 The number of terminal devices, networks, and servers shown is merely illustrative; any number of terminal devices, networks, and servers can be included depending on actual needs. This disclosure does not limit the scope of the embodiments.
[0047] Under the above system architecture, this disclosure provides a data processing method based on high and low carry instructions, which can be executed by any electronic device with computing capabilities.
[0048] In some embodiments, the data processing method based on high and low carry instructions provided in this disclosure can be executed by a terminal device of the above-described system architecture; in other embodiments, the data processing method based on high and low carry instructions provided in this disclosure can be executed by a server in the above-described system architecture; in still other embodiments, the data processing method based on high and low carry instructions provided in this disclosure can be implemented by the terminal device and the server in the above-described system architecture through interaction.
[0049] Figure 2 This diagram illustrates a data processing method based on high and low carry instructions according to an embodiment of the present disclosure. Figure 2 As shown, the data processing method based on high / low carry instructions provided in this embodiment includes the following steps:
[0050] S202, obtain the product result of large integers in binary representation.
[0051] It should be noted that, in some embodiments, the large integer product result is the large integer product result of an elliptic curve over a finite field, where the elliptic curve is a smooth projective curve of genus 1 over the field. For a field whose eigenvalue is not equal to 2, its affine equation can be written as: y 2 =x 3 +ax 2+bx+c. In practical applications, because fields have operational closure, elliptic curves, which are unsuitable for encryption as continuous fields, can be transformed into discrete ones, thus facilitating the execution of encryption algorithms. Therefore, in elliptic curve cryptography, elliptic curves are usually defined over finite fields. To better match elliptic curves to finite fields, computations in elliptic curve cryptography are typically modulo p addition and modulo p multiplication (where p is a prime number).
[0052] In some embodiments, after obtaining the product result of large integers represented in binary, the method further includes: determining whether the product result of large integers satisfies a preset reduction condition; wherein, if the product result of large integers satisfies the preset reduction condition, the product result of large integers is divided into a high-order product result and a low-order product result.
[0053] In some embodiments, if the product of large integers does not meet the preset reduction conditions, other reduction schemes can be used to reduce the product of large integers to obtain the reduced result. Other reduction schemes include Barrett reduction scheme, Montgomery reduction scheme, etc., which are well-known reduction algorithms and have been widely used. When the modulus is a Mersenne prime, the scheme disclosed herein can make full use of its characteristics to achieve efficient reduction.
[0054] In some embodiments, the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
[0055] In some embodiments, the Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
[0056] S204, divide the large integer product result into a high-order product result and a low-order product result.
[0057] It should be noted that the result of multiplying large integers can be divided into two parts by its middle digits: the high-order product and the low-order product. For example, the result of multiplying large integers is 2. 252 It can be divided into two parts at the 127th bit of its binary representation, called the lower 127th bit part and the higher 127th bit part.
[0058] S206, perform a modulo operation on the lower-order product result to obtain the first modulo operation result.
[0059] S208, the most significant bit of the first modulo operation result is added to the carry flag, and the carry flag is shifted, wherein the most significant bit of the first modulo operation result is set to zero.
[0060] S210 performs a modulo operation on the high-order product result to obtain the second modulo operation result.
[0061] S212, based on the result in the carry flag, the result of the first modulo operation, and the result of the second modulo operation, determine the modulo operation result of the large integer product.
[0062] It should be noted that the result of the first modulo operation can be accumulated first, and the last word multiplication can be accumulated and added to the carry flag. The carry cy is processed by setting the highest bit of the carry flag to 0, processing the low bits cy, and accumulating the result of the second modulo operation to calculate the modulo operation result of the large integer product.
[0063] See Figure 3 The diagram illustrates an elliptic curve cryptography (ECC) algorithm. ECC primarily consists of four layers of operations: finite field operations, point arithmetic, scalar multiplication, and the protocol layer. Finite field operations are the lowest and most fundamental operations in ECC. Modular multiplication is the most time-consuming low-level operation in ECC; fast reduction performance directly impacts algorithm performance and security, and should be a key focus for optimization (see appendix). Figure 1 ).
[0064] See Figure 4 The diagram illustrates a carry-low instruction, a cryptographic algorithm implementation technique belonging to the field of cryptographic engineering. Optimal implementation results require a thorough integration of the algorithm's characteristics and the platform's instruction set. Carry-low instructions are fundamental instructions for multiplication calculations, and computing platforms, including GPUs, support these instructions.
[0065] For finite fields in elliptic curve cryptography, the modulo operation of large integer products has always been a computational bottleneck. Existing techniques are listed below. Figure 5 The diagram illustrates a modulo operation for large integer multiplication. The method uses a while loop to repeatedly add overflowing carry-overs until no more carry-overs are generated. However, this approach has significant design flaws. First, the number of instructions used is not sufficiently streamlined, leading to performance loss. Second, different inputs result in different output delays, increasing the risk of side-channel attacks using cache timing. Furthermore, when using GPUs for parallel computing acceleration, this method may experience warp divergence due to inconsistent instruction execution across threads (e.g., some threads may meet the exit condition for the while loop while others do not), causing a significant performance degradation. Therefore, existing technologies suffer from high computational complexity, inconsistent computational delays, and performance and security vulnerabilities.
[0066] The data processing method based on carry-in / carry instructions provided in this disclosure addresses the computational bottleneck of modulo operations on large integer products within finite fields in elliptic curve cryptography. Existing technologies suffer from high computational complexity, variable computational latency, and performance and security deficiencies. This disclosure proposes a fast reduction method for large integers based on carry-in / carry instructions. By utilizing carry-in / carry calculation instructions and combining them with finite field fast reduction theory, a fast reduction method for large integers is proposed, which effectively reduces the number of computational instructions while ensuring a fixed computational latency. This disclosure not only improves the performance of elliptic curve cryptography but also effectively resists side-channel timing attacks.
[0067] In some embodiments, with the Mersenne prime p = 2 127 Taking -1 as an example, GF(p) is defined as modulo 2. 127 -1. A finite field for addition and multiplication has 2. 127 -1 element: 0, 1, ..., 2 127 -1. An example each of modular addition and modular multiplication in finite fields is given below:
[0068] 2 126 +2 126 =2 127 (modp) = 1
[0069] 2 126 ×2 126 =2 252 (modp) = 2 125
[0070] For the example of modular multiplication above, 2 252 That is, the result of large integer multiplication, and 2 125 This refers to the result modulo the result of a large integer multiplication. A naive approach to taking the modulo of a large number with respect to n is to repeatedly subtract n from the number until it falls within the interval [0, n-1). However, for Mersenne primes p=2... 127 For -1, the following equation always holds true:
[0071] 2 127 ≡1(modp)
[0072] The result of the calculation for large integer multiplication is 2. 252 It can be divided into two parts at the 127th bit of its binary representation, called the lower 127th bit part and the higher 127th bit part, because 2 127 Since ≡1(mod p), simply adding the lower 127 bits and the higher 127 bits together satisfies the correctness of modulo operation, thus transforming a large number of calculation steps into a single addition, improving computational efficiency, which is the fast reduction scheme.
[0073] The above description is based on the Mersenne prime number p = 2. 127 The fast reduction theory is based on -1 as an example. However, in engineering practice, a large integer usually cannot be fully stored in a single register. Therefore, a common practice is to use a combination of several branches to represent a large integer. For example, on a 32-bit machine, an element in GF(p) can be represented by four 32-bit numbers. Then, for any A∈GF(p), we have... Here, a0 to a3 represent the four branches of A. Multiplying two n-bit numbers produces a result of 2n bits. That is, multiplying two 128-bit numbers A and B results in a length C = A × B of 256 bits, which must be represented by eight 32-bit numbers. It can be divided into a lower 128-bit part and a higher 128-bit part. (The last part appears to be incomplete and possibly refers to a 2-bit system.) 127 ≡1 (mod p) yields 2 128 If ≡2 (mod p), then the simplification of the 256-bit large integer C can be achieved by simply multiplying the higher 128 bits by 2 and adding it to the lower 128 bits.
[0074]
[0075] Similarly, see Figure 6 The diagram illustrates a data processing method based on carry-in / carry instructions. Multiplying two 32-bit numbers produces a 64-bit product, which is 2 × c in the above equation. i+4 The result will exceed 32 bits and cannot be stored in a single register. Similarly, it is split from the 32nd bit, called the low-order product result and the high-order product result. To reduce the number of instructions and optimize efficiency, the low-order product result is first added to the lower 128 bits of the large integer C. This results in a total result exceeding 128 bits, and the overflow portion is stored in the flag register. To improve computational efficiency, when retrieving the overflow bit from the flag register, the high-order bits of the product generated by 2×c7 are also accumulated in cy. That is, only one addition instruction is used to calculate the overflow bit and the accumulated high-order bits of the product generated by 2×c7. (This concludes the appendix.) Figure 6 Step (1) in the process ends.
[0076] At this point, we have obtained an intermediate result of approximately the lower 128 bits and a carry result cy starting from bit 129. As mentioned earlier, for Mersenne primes p = 2 127 -1, there are 2 128Since ≡2 (mod p), we can simply multiply cy by 2 and add it to the lowest 32 bits of the intermediate result. However, since the intermediate result stores a complete 128-bit number, directly adding another number to it might cause overflow again, triggering another round of reduction. It's important to note that cy also occupies a 32-bit register, but its actual value will not exceed 2 bits, resulting in a lot of redundant space. We can shift cy left by one bit, add the highest bit of the intermediate result to cy, and simultaneously set the highest bit of the intermediate result to zero. This effectively utilizes the redundant space of cy, transferring the highest bit of the intermediate result to cy. (This concludes the explanation.) Figure 6 Step (2) in the text is now complete.
[0077] Next, the product of cy and the high-order product that was not processed in Step (1) is added to the intermediate result. Since the intermediate result uses 128 bits of space to store 127 bits of numbers, the result of the addition is at most 128 bits, which will not cause overflow. This concludes the appendix. Figure 6 Step (3) is now complete.
[0078] In some embodiments of this disclosure, see Figure 7 The diagram shown illustrates a data processing method based on high and low carry instructions, which can utilize... Figure 7 The technical solution disclosed herein is implemented by the steps disclosed in the present invention.
[0079] This disclosure optimizes the calculation process, reduces the number of instructions, and improves computational performance while ensuring calculation accuracy. Furthermore, by optimizing carry reduction (cy), it avoids the use of while loops, thus enhancing safety.
[0080] Based on the same inventive concept, this disclosure also provides a data processing device based on high and low carry instructions, as described in the following embodiments. Since the principle by which this device embodiment solves the problem is similar to that of the above-described method embodiment, the implementation of this device embodiment can refer to the implementation of the above-described method embodiment, and repeated details will not be elaborated further.
[0081] Figure 8 This diagram illustrates a data processing apparatus based on high and low carry instructions according to an embodiment of the present disclosure, such as... Figure 8 As shown, the device includes:
[0082] Data acquisition module 810 is used to acquire the product results of large integers represented in binary.
[0083] The first data processing module 820 is used to divide the large integer product result into a high-order product result and a low-order product result;
[0084] The first arithmetic module 830 is used to perform modular arithmetic on the low-order product result to obtain the first modular arithmetic result;
[0085] The second data processing module 840 is used to accumulate the most significant bit of the first modulo operation result into the carry flag bit and perform shift processing on the carry flag bit, wherein the most significant bit of the first modulo operation result is set to zero.
[0086] The second operation module 850 is used to perform modular operation on the high-order product result to obtain the second modular operation result;
[0087] The calculation result processing module 860 is used to determine the modulo operation result of the large integer product result based on the result in the carry flag, the first modulo operation result, and the second modulo operation result.
[0088] In some embodiments, the above apparatus further includes: a condition verification module, configured to determine whether the large integer product result satisfies a preset reduction condition; wherein, the first data processing module is further configured to, if the large integer product result satisfies the preset reduction condition, divide the large integer product result into a high-order product result and a low-order product result.
[0089] In some embodiments, the large integer product result is the large integer product result of an elliptic curve over a finite field, and the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
[0090] In some embodiments, the Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
[0091] Those skilled in the art will understand that various aspects of this disclosure can be implemented as a system, method, or program product. Therefore, various aspects of this disclosure can be specifically implemented in the following forms: a completely hardware implementation, a completely software implementation (including firmware, microcode, etc.), or a combination of hardware and software aspects, collectively referred to herein as a "circuit," "module," or "system."
[0092] The following reference Figure 9 To describe an electronic device 900 according to such an embodiment of the present disclosure. Figure 9 The electronic device 900 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.
[0093] like Figure 9As shown, the electronic device 900 is manifested in the form of a general-purpose computing device. The components of the electronic device 900 may include, but are not limited to: at least one processing unit 910, at least one storage unit 920, and a bus 930 connecting different system components (including the storage unit 920 and the processing unit 910).
[0094] The storage unit stores program code that can be executed by the processing unit 910, causing the processing unit 910 to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of this disclosure. For example, the processing unit 910 can perform the following steps of the above method embodiment: obtaining a large integer product result represented in binary; dividing the large integer product result into a high-order product result and a low-order product result; performing a modulo operation on the low-order product result to obtain a first modulo operation result; accumulating the highest bit of the first modulo operation result into a carry flag and shifting the carry flag, wherein the highest bit of the first modulo operation result is set to zero; performing a modulo operation on the high-order product result to obtain a second modulo operation result; and determining the modulo operation result of the large integer product result based on the result in the carry flag, the first modulo operation result, and the second modulo operation result.
[0095] Storage unit 920 may include readable media in the form of volatile storage units, such as random access memory (RAM) 9201 and / or cache memory 9202, and may further include read-only memory (ROM) 9203.
[0096] Storage unit 920 may also include a program / utility 9204 having a set (at least one) program module 9205, such program module 9205 including but not limited to: operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.
[0097] Bus 930 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.
[0098] Electronic device 900 can also communicate with one or more external devices 940 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 900, and / or with any device that enables electronic device 900 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 950. Furthermore, electronic device 900 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 960. As shown, network adapter 960 communicates with other modules of electronic device 900 via bus 930. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 900, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.
[0099] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, terminal device, or network device, etc.) to execute the methods according to the embodiments of this disclosure.
[0100] In particular, according to embodiments of this disclosure, the process described above with reference to the flowchart can be implemented as a computer program product, which includes a computer program that, when executed by a processor, implements the above-described data processing method based on high and low carry instructions.
[0101] In exemplary embodiments of this disclosure, a computer-readable storage medium is also provided, which may be a readable signal medium or a readable storage medium. In some possible implementations, various aspects of this disclosure may also be implemented as a program product including program code that, when run on a terminal device, causes the terminal device to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of this disclosure.
[0102] More specific examples of computer-readable storage media in this disclosure may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0103] In this disclosure, a computer-readable storage medium may include a data signal propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting a program for use by or in connection with an instruction execution system, apparatus, or device.
[0104] Optionally, the program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.
[0105] In practical implementation, program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java and C++, and conventional procedural programming languages such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).
[0106] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.
[0107] Furthermore, although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.
[0108] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, mobile terminal, or network device, etc.) to execute the methods according to the embodiments of this disclosure.
[0109] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.
Claims
1. A data processing method based on high / low carry instructions, characterized in that, include: Get the product of large integers in binary representation; The product of the large integers is divided into a high-order product result and a low-order product result; Perform a modular operation on the low-order product result to obtain the first modular operation result; The most significant bit of the first modulo operation result is added to the carry flag, and the carry flag is shifted. The most significant bit of the first modulo operation result is set to zero. Perform a modulo operation on the high-order product result to obtain the second modulo operation result; Based on the result in the carry flag, the result of the first modulo operation, and the result of the second modulo operation, determine the modulo operation result of the large integer product.
2. The data processing method based on high and low carry instructions according to claim 1, characterized in that, After obtaining the product of large integers in binary representation, the method further includes: Determine whether the product of the large integers satisfies the preset reduction condition; Wherein, if the product result of the large integer satisfies the preset reduction condition, the product result of the large integer is divided into the high-order product result and the low-order product result.
3. The data processing method based on high and low carry instructions according to claim 2, characterized in that, The large integer product result is the large integer product result of the elliptic curve over a finite field, and the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
4. The data processing method based on high and low carry instructions according to claim 3, characterized in that, The Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
5. A data processing device based on high / low carry instructions, characterized in that, include: The data acquisition module is used to obtain the product results of large integers represented in binary. The first data processing module is used to divide the large integer product result into a high-order product result and a low-order product result; The first arithmetic module is used to perform modular arithmetic on the low-order product result to obtain the first modular arithmetic result; The second data processing module is used to accumulate the most significant bit of the first modulo operation result into the carry flag and perform a shift operation on the carry flag, wherein the most significant bit of the first modulo operation result is set to zero. The second operation module is used to perform modular operation on the high-order product result to obtain the second modular operation result; The calculation result processing module is used to determine the modulo operation result of the large integer product result based on the result in the carry flag, the result of the first modulo operation, and the result of the second modulo operation.
6. The data processing apparatus based on high and low carry instructions according to claim 5, the apparatus further comprising: The condition verification module is used to determine whether the product of the large integers satisfies the preset reduction condition; The first data processing module is further configured to divide the large integer product result into a high-order product result and a low-order product result when the large integer product result meets a preset reduction condition.
7. The data processing device based on high and low carry instructions according to claim 6, characterized in that, The large integer product result is the large integer product result of the elliptic curve over a finite field, and the preset reduction condition is that the modulus of the elliptic curve is a Mersenne prime.
8. The data processing device based on high and low carry instructions according to claim 7, characterized in that, The Mersenne prime number is 2. 127 -1, the modular operation includes: modular multiplication and / or modular addition.
9. An electronic device, characterized in that, include: processor; as well as Memory for storing the executable instructions of the processor; The processor is configured to execute the data processing method based on high-low carry instructions according to any one of claims 1 to 4 by executing the executable instructions.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the data processing method based on high and low carry instructions as described in any one of claims 1 to 4.