A high-repetition-rate fast-pulse generation circuit and method based on a pre-stage pre-trigger

Abstract

This invention discloses a high repetition rate (PRR) fast pulse generation circuit and method based on a pre-triggered front-stage. The pulse generation circuit includes a Marx circuit composed of several stages of charging capacitors. Power switches are provided between each stage of charging capacitors. Each stage of charging capacitor has two sets of isolation resistors and isolation ferrite beads in its circuit. The first stage is an external triggering stage. The power switches are controlled by an external input pulse that is steepened by the triggering circuit. The front-stage circuit is a pre-triggered stage, the intermediate stage is a collector overvoltage conduction stage, and the final stage is a load unit. This pulse generation circuit can effectively reduce the heating phenomenon of the front-stage avalanche transistor and increase the upper limit of the pulse source repetition rate.

Description

Technical Field

[0001] This invention belongs to the field of pulse generation circuits, specifically relating to a high repetition rate fast pulse generation circuit and method based on pre-triggered pre-stage. Background Technology

[0002] Ultra-wideband (UWB) electromagnetic environments are characterized by wide spectral range, short pulse rise time, and short duration. In intentional electromagnetic interference (EMI) research, UWB electromagnetic pulses are easily coupled to electronic devices. Under high repetition rate (RF) conditions, not only does the probability of interference increase, but energy accumulation can also cause more significant interference or even damage effects. UWB electromagnetic radiation sources mainly consist of sub-nanosecond pulse sources, UWB radiating antennas, and related supporting equipment. They can radiate UWB electromagnetic pulses into free space and are used to simulate UWB electromagnetic radiation environments. The high RF sub-nanosecond pulse source is one of its core components. It compresses energy through power switching devices to generate fast-rising-edge, short-width, high-amplitude, and high-RF pulses, which are then radiated by the UWB antenna after power combining.

[0003] Currently, pulsed power sources used in ultra-wideband radiation systems primarily employ avalanche bipolar junction transistors (ABJTs) as power switching devices. Avalanche bipolar transistors are characterized by fast switching speed, high breakdown voltage, strong current carrying capacity, and low on-resistance. When used as switching devices in the pulsed power field, their avalanche effect can generate high-voltage short pulses with pulse leading edges reaching the picosecond level.

[0004] Marx circuits, also known as Marx generators, are commonly used pulse generation circuits in pulsed power technology to generate fast-rising-edge, high-amplitude electrical pulses. Their basic principle is as follows: Before an external trigger signal arrives, the avalanche diode remains off, charging the parallel capacitors of each stage through an isolation circuit composed of resistors and inductors. Once charging is complete, an external trigger signal is applied to the first-stage avalanche diode. After the first-stage avalanche diode turns on, the first-stage charging capacitor begins to discharge, forming an overvoltage. The second-stage avalanche diode then turns on under this overvoltage, causing the second-stage charging capacitor to discharge, thus forming an even higher-amplitude overvoltage. This process continues until the last avalanche diode turns on, generating a high-amplitude sub-nanosecond pulse across the load. For pulsed power sources in ultra-wideband radiation systems, a pulse width of approximately 1 ns is typically required, which is achieved using an undercharge charging method. Its characteristic is that by significantly reducing the value of the interstage capacitance, the charge stored in the interstage capacitance can only be maintained until the next stage or a few stages of avalanche transistor conduction. Therefore, it is a self-cutoff and weak reflection working mode. However, due to the reduced charge stored in the interstage capacitance, the overvoltage amplitude and steepness caused by the conduction of the previous avalanche transistor are insufficient. The conduction speed of the previous avalanche transistor is also reduced, and it exhibits a slow conduction state during pulse formation. Its dynamic resistance increases, leading to increased heat generation, especially in the high repetition rate output mode. This is an important factor limiting the increase of pulse source repetition rate. Summary of the Invention

[0005] To address the problems existing in the prior art, this invention provides a high-amplitude, high-repetition-rate sub-nanosecond pulse generation circuit and method based on pre-triggered pre-stage. This pulse generation circuit can effectively reduce the heating phenomenon of the pre-stage avalanche transistor and increase the upper limit of the pulse source repetition rate.

[0006] The specific technical solution of the present invention is as follows:

[0007] A high repetition rate fast pulse generation circuit based on pre-triggering includes a Marx circuit composed of several stages of charging capacitors. A power switch is provided between each stage of charging capacitors. Two sets of isolation resistors and isolation ferrite beads are provided on the circuit of each stage of charging capacitors. The first stage is an external triggering stage. The power switch is controlled by the external input pulse after being steepened by the triggering circuit. The front stage circuit is a pre-triggering stage, the intermediate stage is a collector overvoltage conduction stage, and the final stage is a load unit.

[0008] As a further improvement of the present invention, the Marx circuit is provided with a resistor of the same value as the load unit at the beginning and a peaking capacitor at the end.

[0009] The power switch uses an avalanche transistor of model FMMT417.

[0010] As a further improvement of the present invention, the external trigger stage includes a DC power supply U. C , protection resistor R c Isolation resistor R gIsolation magnetic beads Z bead An avalanche transistor T and an anti-reflection resistor R fl External trigger capacitor C t External trigger resistor R t Charging capacitor C; DC power supply U C First, a protective resistor is connected in series with R. c Afterwards, with isolation resistor R g And isolation magnetic beads Z bead The transistor is connected in series with the collector (c) of the avalanche transistor, and then through the emitter (e) of the avalanche transistor to the isolation resistor (R). g And isolation magnetic beads Z bead The circuit is connected in series to ground; the external trigger stage includes an external trigger circuit, and the external trigger signal input terminal is connected to the external trigger capacitor C. t External trigger resistor R t Series connection, where the external trigger resistor R t The base (b) and emitter (e) of the avalanche transistor are connected across it; the external trigger stage is connected to the next stage through the collector (c) of the avalanche transistor.

[0011] As a further improvement of the present invention, the pre-trigger stage includes an avalanche transistor T and a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead A single avalanche transistor T, a charging capacitor C, and a pre-trigger capacitor C2. d Pre-trigger resistor R d In the pre-trigger stage, the DC power supply first passes through a protection resistor in series with R. c Afterwards, with isolation resistor R g And isolation magnetic beads Z bead The transistor is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor R. g And isolation magnetic beads Z bead The circuit is connected in series back to ground, and the pre-trigger stage includes an external trigger circuit with a pre-trigger resistor R. d The pre-trigger capacitor C is connected in parallel between the base (b) and emitter (e) of the avalanche transistor. d It is connected in series between the base (b) of the avalanche transistor and ground; the pre-trigger stage is connected to the previous stage through the charging capacitor (C), and to the next stage through the collector (c) of the avalanche transistor.

[0012] As a further improvement of the present invention, the collector overvoltage conduction stage includes a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead Two avalanche transistors T and a charging capacitor C are connected in series with a protection resistor R in the collector overvoltage conduction stage.c Afterwards, with isolation resistor R g And isolation magnetic beads Z bead The transistor is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor R. g And isolation magnetic beads Z bead The two avalanche transistors are connected in series back to ground. Their bases (b) and emitters (e) are shorted and then connected to the charging capacitor. The collectors (c) of the two avalanche transistors are shorted. The collector overvoltage conduction stage is connected to the previous stage through the charging capacitor C and to the next stage through the collector (c) of the avalanche transistor.

[0013] As a further improvement of the present invention, the load unit includes a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load equivalent resistance R l In the load unit, the DC power supply first passes through a protection resistor in series with R. c Afterwards, with isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load R l The circuit is connected in series and eventually returns to ground; the load unit is connected to the previous stage through a peaking capacitor.

[0014] As a further improvement of the present invention, the isolation magnetic bead Z bead The selected model is 963-FBMH4516HM851NT, with a maximum DC equivalent resistance of 100mΩ.

[0015] As a further improvement of the present invention, the second to sixth stages of the Marx circuit adopt a pre-trigger stage, with the pre-trigger capacitor values ​​of the second to sixth stages being 36pF, 27pF, 20pF, 15pF, and 10pF, respectively; and the pre-trigger resistor values ​​being 50Ω, 40Ω, 40Ω, 30Ω, and 30Ω, respectively; the seventh to 30th stages adopt a collector overvoltage conduction stage, which is formed by two avalanche transistors connected in parallel.

[0016] A pulse generation method based on a pre-triggered high repetition rate fast pulse generation circuit, characterized in that it includes:

[0017] During charging, each charging capacitor C is isolated by an avalanche transistor to prevent it from supplying power to the load R. l Discharge; Isolation resistor R g Used for carrying charging current and for use with isolation ferrite bead Z bead Both are used together to isolate the charging capacitor from discharging to ground during pulse formation;

[0018] During pulse formation, the external trigger stage receives an externally input pulse signal, which is further steepened by the trigger circuit and injected into the base (b) of the avalanche transistor to control its conduction. The charging capacitor C, connected to the collector (c) in the external trigger stage, then begins to discharge, forming an overvoltage wave. The pre-trigger stage extracts the relatively gentle overvoltage generated after the previous stage's conduction, differentiates and steepens it, then injects it into the base (b) of the avalanche transistor, causing pre-conduction. Subsequently, the remaining overvoltage is injected into the base (c) of the avalanche transistor, causing collector overvoltage conduction, allowing the avalanche transistor to quickly enter a low-impedance fast conduction state. The charging capacitor C, connected to the collector (c) in the pre-trigger stage, then begins to discharge, further accumulating the overvoltage. The collector overvoltage conduction stage, being located at the end of the circuit, utilizes the already relatively steep accumulated overvoltage from the previous stage to directly induce collector overvoltage conduction, allowing the avalanche transistor to enter a low-impedance fast conduction state, further accumulating the overvoltage. Finally, after the last collector overvoltage conduction stage turns on, the accumulated overvoltage is peaked by the peaking capacitor C. p After adjustment, inject external load R l This generates sub-nanosecond high-amplitude pulses.

[0019] The beneficial technical effects of this invention are as follows:

[0020] This invention utilizes the low inductive reactance of an isolation bead at low frequencies and high inductive reactance at high frequencies. The charging process occurs at low frequencies, so it does not affect charging. The pulse formation process occurs at high frequencies, and the isolation bead isolates the pulse flow to the charging resistor, reducing Joule heating generated by the charging resistor during discharge and lowering the power consumption at high repetition rates. The first few stages employ a pre-triggered stage, which extracts and amplifies the relatively gentle overvoltage caused by the discharge of the charging capacitor after the power switch is turned on in the previous stage. This pre-triggered stage then injects the voltage into the base of the avalanche transistor, causing the avalanche transistor to pre-conduct. Combined with the remaining overvoltage, this causes the avalanche transistor to conduct rapidly, thereby reducing the dynamic impedance during the power switch's conduction process and reducing heat dissipation. This prevents damage to the power switch due to heat accumulation at high repetition rates and also increases the discharge speed of the inter-stage capacitors, reduces the residual voltage of the inter-stage capacitors, and achieves a higher pulse amplitude. For the collector overvoltage conduction stage in the later stages, two power switches are connected in parallel to address the problem of excessive current flowing through a single power switch in high repetition rate operation.

[0021] Furthermore, for the several pre-trigger stages in the preceding stage, this invention utilizes the progressively increasing voltage wave during pulse formation to reasonably reduce the values ​​of the pre-trigger capacitor and pre-trigger resistor in the pre-trigger circuit. This ensures sufficient pre-trigger current while reducing power loss in the pre-trigger circuit, and guarantees a high amplitude output pulse while increasing the operating repetition frequency of the pulse generation circuit. Attached Figure Description

[0022] The accompanying drawings described herein are for illustrative purposes only and are not intended to limit the scope of the invention in any way. Furthermore, the shapes and proportions of the components in the drawings are merely schematic to aid in understanding the invention and do not specifically limit the shapes and proportions of the components. In the drawings:

[0023] Figure 1 This is a traditional sub-nanosecond pulse source based on avalanche transistors;

[0024] Figure 2 The pre-triggered Marx circuit diagram designed for this invention;

[0025] Figure 3 The external trigger stage circuit diagram designed for this invention;

[0026] Figure 4 The pre-trigger stage circuit diagram designed for this invention;

[0027] Figure 5 The collector overvoltage conduction stage circuit diagram designed for this invention;

[0028] Figure 6 The load unit circuit diagram designed for this invention;

[0029] Figure 7 This is a schematic diagram of the charging process circuit of the present invention;

[0030] Figure 8 This is a schematic diagram of the pre-trigger circuit of the present invention.

[0031] Figure 9 This is an equivalent circuit diagram of the discharge circuit during the pulse formation process of the present invention;

[0032] Figure 10 The 30-stage Marx circuit diagram based on base pre-triggering used in the design of embodiments of the present invention;

[0033] Figure 11 The results show the PSPICE simulation comparison of the transient power of avalanche transistors using the present invention and the conventional method. Detailed Implementation

[0034] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0035] It should be noted that when an element is referred to as being "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0037] This invention provides a high-amplitude, high-repetition-rate sub-nanosecond pulse generation circuit based on pre-triggered pre-stage, which can effectively reduce the heating phenomenon of the pre-stage avalanche transistor and increase the upper limit of the pulse source repetition rate.

[0038] This invention includes a Marx circuit composed of several stages of charging capacitors. Power switches are installed between each stage of the charging capacitors. Each charging circuit has two sets of isolation resistors and isolation beads. The first stage is an external trigger stage. The power switch is controlled by an external input pulse, which is then steepened by the trigger circuit. The preceding stage is a pre-trigger stage, and the intermediate stage is a collector overvoltage conduction stage. A resistor of equal value to the load is installed at the beginning, and a peaking capacitor is installed at the end. The power switch uses an avalanche transistor.

[0039] This invention introduces an isolation bead into the Marx isolation circuit and then pre-triggers the power switch of the preceding stage through a pre-trigger circuit. This allows the invention to significantly reduce the heat generation power and increase the output pulse amplitude under high repetition rate conditions, thereby effectively increasing the upper limit of the pulse source output repetition rate.

[0040] The principle of this invention is as follows: Utilizing the low inductive reactance of an isolation bead at low frequencies and high inductive reactance at high frequencies, the charging process occurs at low frequencies, thus not affecting charging. The pulse formation process occurs at high frequencies, and the isolation bead isolates the pulse flow to the charging resistor, reducing Joule heating generated by the charging resistor during discharge and lowering the power consumption at high repetition rates. The first few stages employ a pre-triggered stage, where the relatively gentle overvoltage caused by the discharge of the charging capacitor after the power switch in the previous stage is partially extracted and amplified by the pre-triggered circuit before being injected into the base of the avalanche transistor, causing the avalanche transistor to pre-conduct. This, combined with the remaining overvoltage, causes the avalanche transistor to conduct rapidly, thereby reducing the dynamic impedance during the power switch's conduction process and reducing heat dissipation. This prevents damage to the power switch due to heat accumulation under high repetition rates and simultaneously increases the discharge speed of the inter-stage capacitors, reduces the residual voltage of the inter-stage capacitors, and achieves a higher pulse amplitude. For the collector overvoltage conduction stage in the later stages, two power switches are connected in parallel to improve the problem of excessive current flowing through a single power switch in high repetition rate operation mode.

[0041] For the several pre-trigger stages in the preceding stage, this invention utilizes the voltage wave that gradually increases during pulse formation to reasonably reduce the values ​​of the pre-trigger capacitor and pre-trigger resistor in the pre-trigger circuit. This ensures sufficient pre-trigger current while reducing power loss in the pre-trigger circuit, and guarantees a high amplitude output pulse while increasing the operating repetition frequency of the pulse generation circuit.

[0042] The invention will now be further described with reference to the accompanying drawings.

[0043] See Figure 1 Traditional sub-nanosecond pulse source circuits based on avalanche transistors generally consist of an external trigger stage, a collector overvoltage conduction stage, and a load unit.

[0044] See Figure 2 , Figure 3 , Figure 4 , Figure 5 This invention adds a pre-trigger stage circuit to the traditional avalanche transistor sub-nanosecond pulse source circuit, including a pre-trigger capacitor C. d and pre-trigger resistor R d This constitutes a base-pre-triggered collector overvoltage conduction stage (hereinafter referred to as the pre-triggered stage). Isolation beads Z are added to each stage. bead .

[0045] See Figure 3 The external trigger stage includes a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead An avalanche transistor T and an anti-reflection resistor R fl External trigger capacitor C t External trigger resistor Rt Charging capacitor C. In the external trigger stage, the DC power supply first passes through a protection resistor in series with R. c Afterwards, with isolation resistor R g And isolation magnetic beads Z bead It is connected in series to the collector (c) of the avalanche transistor, and then through the emitter (e) of the avalanche transistor and the isolation resistor R. g And isolation magnetic beads Z bead The circuit is connected in series to ground, and the external trigger stage includes an external trigger circuit. The external trigger signal input terminal is connected to the external trigger capacitor C. t External trigger resistor R t Series connection, where the external trigger resistor R t The base (b) and emitter (e) of the avalanche transistor are connected across it. The external trigger stage is connected to the next stage through the collector (c) of the avalanche transistor.

[0046] See Figure 4 The pre-triggered stage includes an avalanche transistor T and a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead A single avalanche transistor T, a charging capacitor C, and a pre-trigger capacitor C2. d Pre-trigger resistor R d In the pre-trigger stage, the DC power supply first passes through a protection resistor in series with R. c Afterwards, with isolation resistor R g And isolation magnetic beads Z bead The transistor is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor R. g And isolation magnetic beads Z bead The circuit is connected in series back to ground, and the pre-trigger stage includes an external trigger circuit with a pre-trigger resistor R. d The pre-trigger capacitor C is connected in parallel between the base (b) and emitter (e) of the avalanche transistor. d It is connected in series between the base (b) of the avalanche transistor and ground. The pre-trigger stage is connected to the previous stage through the charging capacitor (C), and to the next stage through the collector (c) of the avalanche transistor.

[0047] See Figure 5 The collector overvoltage conduction stage includes a DC power supply U. C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead Two avalanche transistors T and a charging capacitor C are connected in series with a protection resistor R in the collector overvoltage conduction stage. c Afterwards, with isolation resistor R g And isolation magnetic beads Z beadThe transistor is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor R. g And isolation magnetic beads Z bead Connected in series to ground, the bases (b) and emitters (e) of the two avalanche transistors are shorted and connected together to the charging capacitor. The collectors (c) of the two avalanche transistors are shorted. The collector overvoltage conduction stage is connected to the previous stage through the charging capacitor C, and to the next stage through the collector (c) of the avalanche transistor.

[0048] See Figure 6 The load unit includes a DC power supply U C , protection resistor R c Isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load equivalent resistance R l In the load unit, the DC power supply first passes through a protection resistor in series with R. c Afterwards, with isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load R l The circuit is connected in series and eventually returns to ground. The load unit is connected to the previous stage via a peaking capacitor.

[0049] See Figure 2 This invention includes a Marx circuit composed of several stages of charging capacitors, wherein the first stage is an external trigger stage, the preceding stages are pre-trigger stages, the middle stages are collector overvoltage conduction stages, and the final stage is a load unit. During charging, each charging capacitor C is isolated by an avalanche transistor to prevent it from conducting voltage to the load R. l Discharge; Isolation resistor R g Used for carrying charging current and for use with isolation ferrite bead Z beadTogether, they are used to isolate the charging capacitor from discharging to ground during pulse formation. During pulse formation, the external trigger stage receives an externally input pulse signal, which is further steepened by the trigger circuit and injected into the base (b) of the avalanche transistor to control its conduction. The charging capacitor (C) of this stage then begins to discharge, forming an overvoltage wave. The pre-trigger stage extracts a small portion of the relatively gentle overvoltage generated after the previous stage is turned on, differentiates and steepens it, and then injects it into the base (b) of the avalanche transistor to induce pre-conduction. Subsequently, most of the remaining overvoltage is injected into the base (c) of the avalanche transistor, causing collector overvoltage conduction, which allows the avalanche transistor to quickly enter a low-impedance fast conduction state. The charging capacitor (C) of this stage then begins to discharge, and the overvoltage accumulates further. The collector overvoltage conduction stage, being located at the end of the circuit, utilizes the relatively steep accumulated overvoltage generated by the previous stage to directly induce collector overvoltage conduction, allowing the avalanche transistor to enter a low-impedance fast conduction state, further accumulating the overvoltage. After the last collector overvoltage conduction stage is turned on, the accumulated overvoltage is peaked by the peaking capacitor (C). p After adjustment, inject external load R l This generates sub-nanosecond high-amplitude pulses; the pre-trigger stage is equipped with a resistor R having the same resistance value as the load at the output of the pulse source. fl It is used to reduce reflections during pulse formation to obtain a better pulse waveform.

[0050] See Figure 7 The working state and parameter settings of each unit during the charging process are analyzed. The charging process includes the interstage capacitor C and the isolation resistor R. g Isolation magnetic beads Z bead Pre-trigger capacitor C d Pre-trigger resistor R d The interstage capacitor, isolation resistor, isolation bead, and charging circuit are connected in series to form a loop between the power supply and ground.

[0051] This invention employs an undercharge charging method. The design considers an output pulse amplitude of 2kV, an external 50Ω load, and a maximum repetition rate of 800kHz. Therefore, the charging capacitor C is designed to have a capacitance of 51pF (assuming the stored charge only needs to sustain one stage of avalanche charging; considering a transistor conduction time of 400ps and a peak current of 40A, each stage of charging capacitor needs to store 16nC of charge; with a charging voltage of 320V, the theoretical value of the charging capacitor is 50pF). The isolation resistor has a resistance of 1kΩ (the charging circuit time constant is 0.1μs, much smaller than the repetition rate interval, and meets the recovery time requirement). The isolation resistor serves to allow the charging current to flow, controlling the charging current within a suitable range. The isolation bead Z... beadThis can be equivalent to an inductor and a DC resistor in series. During charging, due to the very low frequency, the inductive reactance of the isolation bead is very low, and it can be regarded as a very small DC resistor. The selected isolation bead model is 963-FBMH4516HM851NT, and its maximum equivalent DC resistance is 100mΩ, which is much smaller than the resistance of the isolation resistor. Therefore, the addition of the isolation bead has almost no effect on the charging circuit. For the collector overvoltage conduction stage, the circuit charging time constant is about 0.1μs. This value is much smaller than the repetition frequency interval of the pulse source output. Within the repetition frequency interval, it can be regarded as fully charged, and the voltage across the charging capacitor C is approximately the DC source voltage. For the pre-trigger stage, the operation of the charging capacitor C is exactly the same as that of the collector overvoltage conduction stage. d Due to the pre-trigger resistor R d and pre-trigger capacitor C d With isolation resistor R g The circuit is connected in parallel, with a time constant on the order of hundreds of picometers. The pre-trigger capacitor C is located within the repetition frequency interval. d The voltage across the terminals is considered to have decreased to 0.

[0052] See Figure 8 The working principle and parameter settings of the pre-trigger stage are analyzed. The pre-trigger circuit includes the pre-trigger capacitor C. d and pre-trigger resistor R d The trigger resistor and trigger capacitor are connected in series and then connected in parallel with the base and emitter of the avalanche transistor to form a differentiating circuit.

[0053] This circuit utilizes the approximately 400ps time interval between the conduction of the preceding avalanche transistor and the high-impedance cutoff state of the following avalanche transistor. During this period, the interstage capacitor discharges the pre-trigger capacitor, and the resulting overvoltage is steepened by the pre-trigger capacitor and extracted by the pre-trigger resistor before being injected into the base. For the FMMT417 avalanche transistor selected in this invention, if a pulse current greater than 2A can be injected into the base before the collector overvoltage turns on, the avalanche transistor can enter the conduction state more quickly. Setting the pre-trigger capacitor value to 36pF and the pre-trigger resistor value to 50Ω (at this time, the loop time constant is approximately 100ps, and the pulse current injection into the base has been completed during the period when the avalanche transistor maintains high resistance), it can work with the collector overvoltage to enable the avalanche transistor to conduct quickly, resulting in lower dynamic impedance and reduced heat generation during pulse formation.

[0054] See Figure 9 The changes in load unit and pre-trigger circuit parameters with the number of stages were analyzed.

[0055] For the load unit, the charging capacitors at each stage discharge in equivalent series during pulse formation, due to the external load R l The equivalent impedance is 50Ω, therefore an anti-reflection resistor R is set at the beginning of the circuit. fl Its size is related to the external load R lBoth are 50Ω, and with double-ended matching, they can effectively prevent reflection.

[0056] Regarding changes in the pre-trigger circuit parameters, on the one hand, the pre-trigger capacitor needs to be large enough to allow the current extracted by the pre-trigger capacitor to pre-conduct the base. On the other hand, during pulse formation, the pre-trigger capacitor and pre-trigger resistor can cause excessive overvoltage extraction, resulting in energy loss, a decrease in output amplitude, and waveform degradation. As the number of conduction stages increases during pulse formation, the number of charging capacitors C that initiate series discharge increases, leading to a gradual increase in the amplitude of the accumulated overvoltage. Simultaneously, the equivalent capacitance of the charging capacitor C decreases, reducing the discharge circuit time constant and causing an increase in pulse steepness. Therefore, a step-by-step reduction in the capacitance of the pre-trigger capacitor C and the pre-trigger resistor R is adopted. d The resistance value method reduces the energy loss of the trigger circuit while still allowing a steep, high-amplitude current to be injected into the avalanche transistor to induce pre-conduction.

[0057] See Figure 10 A design example based on the circuit design of this invention is given. This design considers that the pulse source output voltage amplitude reaches 2kV under a 50Ω external load. Therefore, based on the above unit design, a 30-stage Marx circuit is designed: the first stage is an external trigger stage, which conducts after an external trigger signal is applied. Stages 2 to 6 use pre-trigger stages to improve the relatively smooth overvoltage generated after the previous stage is turned on during pulse formation, and to prevent severe heating of the avalanche tube caused by the high impedance and slow conduction stage. The pre-trigger capacitor value C is gradually reduced according to the progressively increasing overvoltage wave. d and the value of the pre-trigger resistor R d To reduce energy loss in the trigger circuit, the pre-trigger capacitors for stages 2-6 have capacitance values ​​of 36pF, 27pF, 20pF, 15pF, and 10pF, respectively, and the pre-trigger resistor values ​​are 50Ω, 40Ω, 40Ω, 30Ω, and 30Ω, respectively. Stages 7-30 employ collector overvoltage conduction stages, increasing their current-carrying capacity by connecting two avalanche transistors in parallel.

[0058] See Figure 11 To evaluate the improvement of the heat dissipation of the front-stage avalanche transistor by the designed high-amplitude, high-repetition-rate sub-nanosecond pulse generation circuit based on base pre-triggered circuit, PSPICE simulation analysis was performed. The design scheme was compared with the design scheme without adding pre-triggered circuit. The simulation results show that using base pre-triggered circuit can reduce the power dissipation on the avalanche transistor and alleviate the phenomenon of excessive transient peak power. For the front-stage avalanche transistor using pre-triggered circuit, the total heat generation decreased by 28.2%, 18.5%, 14.2%, 21.6%, and 21.3%, respectively.

[0059] Many embodiments and applications beyond the examples provided will be apparent to those skilled in the art upon reading the foregoing description. Therefore, the scope of this teaching should not be determined by reference to the foregoing description, but rather by reference to the foregoing claims and the full scope of their equivalents. For purposes of completeness, all articles and references, including patent applications and publications, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not intended as a waiver of that subject matter, nor should it be construed as an indication that the applicant has not considered that subject matter as part of the disclosed inventive subject matter.

[0060] The above content provides a further detailed description of the present invention. It should not be construed that the specific embodiments of the present invention are limited to this. For those skilled in the art, several simple deductions or substitutions can be made without departing from the concept of the present invention, and all such deductions or substitutions should be considered to fall within the scope of protection of the present invention as defined by the submitted claims.

Claims

1. A high-repetition-rate fast pulse generation circuit based on pre-triggered pre-stage, characterized in that, The Marx circuit consists of several stages of charging capacitors. Power switches are provided between each stage of charging capacitors. Two sets of isolation resistors and isolation ferrite beads are provided on the circuit of each stage of charging capacitors. The first stage is an external trigger stage. The power switch is controlled by an external input pulse after being steepened by the trigger circuit. The front stage circuit is a pre-trigger stage. The middle stage is a collector overvoltage conduction stage. The last stage is a load unit. The pre-trigger stage includes an avalanche transistor. T DC power supply U C , protective resistor R c Isolation resistor R g Isolation magnetic beads Z bead An avalanche transistor T、 Charging capacitor C Pre-trigger capacitor C d Pre-trigger resistor R d In the pre-trigger stage, the DC power supply is first connected in series with a protection resistor. R c After isolation resistor R g and isolation magnetic beads Z bead It is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor. R g and isolation magnetic beads Z bead The circuit is connected back to ground, and the pre-trigger stage includes an external trigger circuit and a pre-trigger resistor. R d The pre-trigger capacitor is connected in parallel between the base (b) and emitter (e) of the avalanche transistor. C d The pre-trigger stage is connected in series between the base (b) of the avalanche transistor and ground; the pre-trigger stage is connected through a charging capacitor. C It is connected to the previous stage and to the next stage through the collector (c) of the avalanche transistor.

2. The high repetition rate fast pulse generation circuit based on pre-triggered pre-stage as described in claim 1, characterized in that, The Marx circuit has a resistor of the same value as the load unit at the beginning and a peaking capacitor at the end.

3. The high repetition rate fast pulse generation circuit based on pre-triggered stage according to claim 1, characterized in that, The power switch uses an avalanche transistor of model FMMT417.

4. The high repetition rate fast pulse generation circuit based on pre-triggered pre-stage as described in claim 1, characterized in that, The external trigger stage includes a DC power supply. U C , protective resistor R c Isolation resistor R g Isolation magnetic beads Z bead An avalanche transistor T、 Anti-reflection resistor R fl External trigger capacitor C t External trigger resistor R t Charging capacitors C DC power supply U C First, a protective resistor is connected in series. R c After isolation resistor R g and isolation magnetic beads Z bead The transistor is connected in series to the collector (c) of the avalanche transistor, and then through the emitter (e) of the avalanche transistor to the isolation resistor. R g and isolation magnetic beads Z bead Connect back to Earth; The external trigger stage includes an external trigger circuit, an external trigger signal input terminal, and an external trigger capacitor. C t External trigger resistor R t Series connection, with external trigger resistor R t The base (b) and emitter (e) of the avalanche transistor are connected across it; the external trigger stage is connected to the next stage through the collector (c) of the avalanche transistor.

5. The high repetition rate fast pulse generation circuit based on pre-triggered pre-stage according to claim 1, characterized in that, The collector overvoltage conduction stage includes a DC power supply. U C , protective resistor R c Isolation resistor R g Isolation magnetic beads Z bead Two avalanche transistors T Charging capacitors C In the collector overvoltage conduction stage, the DC power supply is first connected in series through a protection resistor. R c After isolation resistor R g and isolation magnetic beads Z bead It is connected in series to the collector (c) of the avalanche transistor, and then through the transmitter (e) of the avalanche transistor and the isolation resistor. R g and isolation magnetic beads Z bead Connected in series to ground, the bases (b) and emitters (e) of the two avalanche transistors are shorted and connected together to the charging capacitor. The collectors (c) of the two avalanche transistors are shorted; the collector overvoltage conduction stage is connected through the charging capacitor. C It is connected to the previous stage and to the next stage through the collector (c) of the avalanche transistor.

6. The high repetition rate fast pulse generation circuit based on pre-triggered pre-stage according to claim 1, characterized in that, The load unit includes a DC power supply. U C , protective resistor R c Isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load equivalent resistor R l In the load unit, the DC power supply is first connected in series through a protection resistor. R c After isolation resistor R g Isolation magnetic beads Z bead Peaking capacitor C p External load R l The circuit is connected in series and eventually returns to ground; the load unit is connected to the previous stage through a peaking capacitor.

7. The high repetition rate fast pulse generation circuit based on pre-triggered pre-stage according to claim 1, characterized in that, The isolation magnetic beads Z bead The selected model is 963-FBMH4516HM851NT, with a maximum DC equivalent resistance of 100. .

8. The high repetition rate fast pulse generation circuit based on pre-triggered stage according to claim 1, characterized in that, The Marx circuit uses pre-trigger stages for stages 2 to 6, with pre-trigger capacitor values ​​of 36pF, 27pF, 20pF, 15pF, and 10pF respectively; and pre-trigger resistor values ​​of 50Ω, 40Ω, 40Ω, 30Ω, and 30Ω respectively. Stages 7 to 30 use collector overvoltage conduction stages, which are connected in parallel with two avalanche transistors.

9. A pulse generation method based on a pre-triggered high repetition rate fast pulse generation circuit according to any one of claims 1 to 8, characterized in that, include: During charging, each stage of the charging capacitor C Isolation is achieved through an avalanche transistor to prevent it from affecting the load. R l Discharge; Isolation resistor R g Used for carrying charging current and for use with isolation ferrite beads Z bead Both are used together to isolate the charging capacitor from discharging to ground during pulse formation; During pulse formation, the external trigger stage receives an externally input pulse signal, which is further steepened by the trigger circuit and injected into the base (b) of the avalanche transistor to control its conduction. The charging capacitor is connected to the collector (c) of the external trigger stage. C Then discharge begins, forming an overvoltage wave; The pre-trigger stage extracts the relatively gentle overvoltage generated after the preceding stage is turned on, differentiates and steepens it, then injects it into the base (b) of the avalanche transistor, causing pre-conduction. Subsequently, the remaining overvoltage is injected into the base (c) of the avalanche transistor, causing collector overvoltage conduction, enabling the avalanche transistor to quickly enter a low-impedance, fast-conduction state. The charging capacitor connected to the collector (c) in the pre-trigger stage... C Discharge then begins, and the overvoltage accumulates further. Since the collector overvoltage conduction stage is located in the later stages of the circuit, and the accumulated overvoltage from the previous stages is already relatively steep, the avalanche transistor directly utilizes the overvoltage to initiate collector overvoltage conduction, causing the avalanche transistor to enter a low-impedance, fast-conduction state, further accumulating the overvoltage. As the final collector overvoltage conduction stage turns on, the accumulated overvoltage passes through the peaking capacitor... C p After adjustment, inject external load. R l This generates sub-nanosecond high-amplitude pulses.

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