Electronic device and method of manufacturing the same

Abstract

The present disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a connector, an electronic component, and a heat sink. The connector has at least one conductive structure and at least one first heat dissipation structure. The at least one conductive structure and the at least one first heat dissipation structure are physically separated and electrically insulated from each other. The electronic component is electrically connected to the at least one conductive structure. The heat sink is connected to the at least one first heat dissipation structure. The heat sink and the electronic component are disposed on opposite sides of the connector. The electronic device and the manufacturing method thereof of the embodiments of the present disclosure can improve the heat dissipation effect or can reduce the size.

Description

Technical Field

[0001] This disclosure relates to an electronic device and a method for manufacturing the same, and more particularly to an electronic device and a method for manufacturing the same that can improve heat dissipation or reduce size. Background Technology

[0002] Electronic devices, or spliced ​​electronic devices, are widely used in various fields such as communications, displays, automotive, and aerospace. With the rapid development of electronic devices, they are trending towards thinner and lighter designs, thus placing higher demands on their reliability and quality. Summary of the Invention

[0003] This disclosure provides an electronic device and a method for manufacturing the same, which can improve heat dissipation or reduce size.

[0004] According to embodiments disclosed herein, an electronic device includes a connector, electronic components, and a heat sink. The connector has at least one conductive structure and at least one first heat dissipation structure. The at least one conductive structure and the at least one first heat dissipation structure are physically separated from each other and electrically insulated. The electronic components are electrically connected to the at least one conductive structure. The heat sink is connected to the at least one first heat dissipation structure. The heat sink and the electronic components are disposed on opposite sides of the connector.

[0005] According to embodiments disclosed herein, a method for manufacturing an electronic device includes the following steps. First, a connector is formed. The connector has at least one conductive structure and at least one first heat dissipation structure. The at least one conductive structure and the at least one first heat dissipation structure are physically separated from each other and electrically insulated. Next, electronic components are disposed to be electrically connected to the at least one conductive structure. Next, a heat sink is formed to connect to the at least one first heat dissipation structure. The heat sink and the electronic components are disposed on opposite sides of the connector. Attached Figure Description

[0006] The accompanying drawings are included to further illustrate the present disclosure, and are incorporated in and form a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure.

[0007] Figure 1 This is a partial cross-sectional schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0008] Figure 2 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0009] Figure 3 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0010] Figure 4 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0011] Figure 5 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0012] Figure 6A This is a partial top view schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0013] Figure 6B for Figure 6A A cross-sectional schematic diagram of the electronic device along section line I-I';

[0014] Figure 6C for Figure 6A A cross-sectional schematic diagram of the electronic device along section line Ⅱ-Ⅱ';

[0015] Figure 7A This is a partial top view schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0016] Figure 7B for Figure 7A A cross-sectional schematic diagram of the electronic device along section line Ⅲ-Ⅲ';

[0017] Figure 7C for Figure 7A A cross-sectional schematic diagram of the electronic device along section line Ⅳ-Ⅳ'.

[0018] Explanation of icon numbers

[0019] 10, 10a, 10b, 10c, 10d, 10e, 10f: Electronic devices;

[0020] 100: Connector;

[0021] 100a: First surface;

[0022] 100b: Second surface;

[0023] 110: Conductive structure;

[0024] 120: First heat dissipation structure;

[0025] 131, 132, 133, 134: Insulation layer;

[0026] 141, 142, 143, 144, 145: Line layer;

[0027] 1411, 1411a, 1411b, 1411c, 1411d, 1411e, 1411f, 1411g, 1412: First metal pad;

[0028] 1413, 1414, 1415, 1416, 1417, 1418a, 1418b, 1419a, 1419b: First test pad;

[0029] 1421, 1422: Second metal pads;

[0030] 1423, 1424, 1425, 1426, 1427, 1428, 1429a, 1429b: Second test pad;

[0031] 1431, 1432: Third metal pad;

[0032] 1433, 1434, 1435, 1436: Third test pad;

[0033] 1441, 1442: Fourth metal pad;

[0034] 1443, 1444, 1445, 1446, 1447, 1448, 1449: Fourth test pad;

[0035] 1451, 1452: Fifth metal pad;

[0036] 1453, 1454, 1455, 1456, 1457, 1458: Fifth test pad;

[0037] 150: First opening;

[0038] 160, 162: Second heat dissipation structure;

[0039] 160a, 162a: Top surface;

[0040] 160b, 162b: Bottom surface;

[0041] 171, 172, 173, 174, 175: Seed layers;

[0042] 181, 182, 183, 184, 185: First test structure;

[0043] 191, 192, 193, 194: Second test structure;

[0044] 200: Electronic components;

[0045] 200a: Third surface;

[0046] 200b: Fourth surface;

[0047] 200c: Surrounding surface;

[0048] 210: Pad;

[0049] 300: Heatsink;

[0050] 400: Package structure;

[0051] 410: Second opening;

[0052] 500: Carrier board;

[0053] 510: Release layer;

[0054] CT: Conductive terminal;

[0055] GT: Ground trace;

[0056] ST: Signal trace;

[0057] Z: Normal direction. Detailed Implementation

[0058] This disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of brevity, many of the drawings in this disclosure depict only a portion of the electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0059] In the following description and claims, the words “containing” and “including” are open-ended terms, and therefore should be interpreted as “containing but not limited to…”.

[0060] It should be understood that when an element or membrane is referred to as being "on" or "connected" to another element or membrane, it can be directly on or directly connected to that other element or membrane, or there may be an inserted element or membrane between them (indirect cases). Conversely, when an element is referred to as being "directly" on or "directly connected" to another element or membrane, there may be no inserted element or membrane between them.

[0061] Although the terms "first," "second," "third," etc., can be used to describe multiple components, the components are not limited to these terms. These terms are used only to distinguish a single component from other components in the specification. The same terms may not be used in the claims, but rather replaced by "first," "second," "third," etc., according to the order in which the elements are declared in the claims. Therefore, in the following description, a first component may be a second component in the claims.

[0062] In this text, the terms "about," "approximately," "substantially," and "roughly" typically indicate that a given value or range is within 10%, 5%, 3%, 2%, 1%, or 0.5%. The given quantity is an approximate quantity; that is, even without specific mention of "about," "approximately," "substantially," or "roughly," the meaning of "about," "approximately," "substantially," or "roughly" can still be implied.

[0063] In some embodiments disclosed herein, terms such as "connection" and "interconnection," unless specifically defined, may refer to two structures being in direct contact, or to two structures not being in direct contact, with other structures disposed between them. Furthermore, these terms regarding engagement and connection may also include situations where both structures are movable or both structures are fixed. Additionally, the term "coupled" encompasses any direct and indirect electrical connection means.

[0064] In some embodiments disclosed herein, the area, width, thickness, or height of each element, or the distance or spacing between elements, can be measured using an optical microscopy (OM), a scanning electron microscope (SEM), an alpha-step thickness gauge, an ellipsometry, or other suitable methods. More specifically, according to some embodiments, a scanning electron microscope can be used to obtain a cross-sectional image containing the elements to be measured, and to measure the area, width, thickness, or height of each element, or the distance or spacing between elements.

[0065] The electronic devices disclosed herein may include, but are not limited to, display devices, packaging devices, semiconductor packaging devices, backlight devices, antenna devices, sensing devices, or splicing devices. The electronic devices may be bendable or flexible. Display devices may be non-emissive or emissive. Antenna devices may be liquid crystal type or non-liquid crystal type antenna devices. Sensing devices may be sensing devices for capacitance, light, heat, or ultrasound, but are not limited to these. Electronic components may include passive and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. Diodes may include light-emitting diodes (LEDs) or photodiodes. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs, but are not limited to these. Splicing devices may be, for example, display splicing devices or antenna splicing devices, but are not limited to these. It should be noted that the electronic devices may be any combination of the foregoing, but are not limited to these. The following explanation of this disclosure will be conducted using an electronic device.

[0066] It should be understood that the features in the following embodiments can be replaced, recombined, or mixed to complete other embodiments without departing from the spirit of this disclosure. Features between embodiments can be arbitrarily mixed and combined as long as they do not violate the spirit of the invention or conflict with it.

[0067] Reference will now be made in detail to the exemplary embodiments disclosed herein, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.

[0068] Figure 1 This is a partial cross-sectional schematic diagram of an electronic device according to an embodiment of this disclosure. Please refer to... Figure 1 The electronic device 10 of this embodiment includes a connector 100, electronic components 200, a heat sink 300, and a molding compound 400. The connector 100 can be a redistribution layer (RDL), which is used, for example, to achieve redistribution circuitry in high-density integrated circuits (ICs), but is not limited thereto. The connector 100 may include seed layers, metal layers, or insulating layers stacked alternately. The connector 100 has a first surface 100a, a second surface 100b opposite to the first surface 100a, at least one conductive structure 110, and at least one first heat dissipation structure 120. The conductive structure and the first heat dissipation structure may be, for example, formed by stacking a portion of the seed layer and a portion of the metal layer, but are not limited thereto.

[0069] Specifically, the connector 100 includes multiple insulating layers 131, 132, 133, 134 (…). Figure 1 (This example uses a 4-layer configuration, but is not limited to this), multiple line layers 141, 142, 143, 144, 145 (…). Figure 1 (Illustratively, using 5 layers as an example, but not limited to this) and multiple first openings 150. Multiple circuit layers 141, 142, 143, 144, 145 and multiple insulating layers 131, 132, 133, 134 are stacked sequentially, and from the first surface 100a to the second surface 100b, they are sequentially circuit layer 141, insulating layer 131, circuit layer 142, insulating layer 132, circuit layer 143, insulating layer 133, circuit layer 144, insulating layer 134, and circuit layer 145. The multiple first openings 150 respectively penetrate insulating layers 131, 132, 133, and 134. Circuit layers 141 and 142, circuit layers 142 and 143, circuit layers 143 and 144, and circuit layers 144 and 145 can be interconnected through the multiple first openings 150, but are not limited to this. The materials of circuit layers 141, 142, 143, 144, and 145 may be, for example, titanium, copper, aluminum, molybdenum, silver, other suitable metals, or alloys or combinations of the above materials, but are not limited thereto.

[0070] More specifically, in this embodiment, the first surface 100a can be considered as the surface of the insulating layer 131 away from the insulating layer 134. The second surface 100b can be considered as the surface of the insulating layer 134 away from the insulating layer 131. The circuit layer 141 is disposed on the first surface 100a and located outside the insulating layer 131. The circuit layer 142 is embedded in the insulating layer 131, the circuit layer 143 is embedded in the insulating layer 132, the circuit layer 144 is embedded in the insulating layer 133, and the circuit layer 145 is embedded in the insulating layer 134 and exposed outside the second surface 100b. In other words, the circuit layers can be disposed in the openings of the insulating layer or the circuit layers can be interconnected through the openings of the insulating layer. The circuit layer 141 may include a plurality of first metal pads 1411 and a plurality of first metal pads 1412, and the first metal pads 1411 and the first metal pads 1412 are physically separated from each other and electrically insulated. Line layer 142 may include a plurality of second metal pads 1421 and a plurality of second metal pads 1422, wherein the second metal pads 1421 and 1422 are physically separated from each other and electrically insulated from each other. Line layer 143 may include a plurality of third metal pads 1431 and a plurality of third metal pads 1432, wherein the third metal pads 1431 and 1432 are physically separated from each other and electrically insulated from each other. Line layer 144 may include a plurality of fourth metal pads 1441 and a plurality of fourth metal pads 1442, wherein the fourth metal pads 1441 and 1442 are physically separated from each other and electrically insulated from each other. Line layer 145 may include a plurality of fifth metal pads 1451 and a plurality of fifth metal pads 1452, wherein the fifth metal pads 1451 and 1452 are physically separated from each other and electrically insulated from each other.

[0071] In this embodiment, at least one conductive structure 110 may include a first metal pad 1411, a second metal pad 1421, a third metal pad 1431, a fourth metal pad 1441, a fifth metal pad 1451, and a portion of a first opening 150. At least one first heat dissipation structure 120 may include a first metal pad 1412, a second metal pad 1422, a third metal pad 1432, a fourth metal pad 1442, and a portion of a first opening 150. Furthermore, the at least one conductive structure 110 and the at least one first heat dissipation structure 120 are physically separated from each other, and are electrically insulated from each other.

[0072] In this embodiment, the electronic component 200 has a third surface 200a, a fourth surface 200b, a peripheral surface 200c, and a pad 210. The third surface 200a and the fourth surface 200b are opposite to each other. The peripheral surface 200c connects the third surface 200a and the fourth surface 200b. The pad 210 is disposed on the third surface 200a. The electronic component 200 can be bonded to the first metal pad 1411 of the connector 100 via the pad 210, so that the electronic component 200 can be disposed on the first surface 100a and electrically connected to at least one conductive structure 110. According to some embodiments, the pad 210 does not contact the first metal pad 1412 of the first heat dissipation structure 120. In this embodiment, the first metal pad 1412 of the first heat dissipation structure 120 does not contact the third surface 200a, but this is not a limitation. According to some embodiments, the first metal pad 1412 of the first heat dissipation structure 120 may contact the third surface 200a. Furthermore, in this embodiment, the electronic component 200 may overlap with at least one of the first heat dissipation structures 120 in the normal direction Z of the package structure 400, but this is not a limitation.

[0073] In this embodiment, the surface of the fifth metal pad 1452 furthest from the first surface 100a is laser-cut into a fin-like structure to form a heat sink 300. The heat sink 300 (fifth metal pad 1452) is disposed on and exposed outside the second surface 100b. According to some embodiments, the surface of the heat sink 300 may be approximately flush with the second surface 100b; that is, the absolute value of the height difference between the surface of the heat sink 300 and the second surface 100b in the Z-direction normal of the package structure 400 is less than or equal to 3 millimeters (mm), but is not limited thereto. The heat sink 300 (fifth metal pad 1452) and the electronic component 200 are located on opposite sides of the connector 100. The following example illustrates the heat dissipation path of the electronic device 10 in this embodiment, but is not limited thereto: First, the heat in the electronic component 200 and the heat in the conductive structure 110 can be transferred to the first heat dissipation structure 120, for example, by thermal radiation or thermal conduction. Next, since the heat sink 300 can contact the circuit layer of the first heat dissipation structure 120, the heat can continue to be transferred to the heat sink 300, for example, by thermal conduction. Then, since the heat sink 300 is exposed outside the second surface 100b or the heat sink 300 and the second surface 100b are coplanar, the heat of the electronic device 10 can be transferred from the heat sink 300 to the outside, for example, by thermal convection or thermal radiation, to achieve the heat dissipation effect. That is to say, in this embodiment, by setting the first heat dissipation structure 120 and the heat sink 300, and by setting the heat sink 300 and the electronic component 200 on opposite sides of the connector 100, the heat dissipation path can be increased and the heat generated by the electronic component 200 can be dissipated to improve the overall heat dissipation efficiency, but is not limited thereto.

[0074] Furthermore, in this embodiment, since the surface of the heat sink 300 away from the first surface 100a can be designed as a fin structure, the heat sink 300 can be a heat dissipation fin, thereby increasing the heat dissipation area of ​​the heat sink 300 and improving the overall heat dissipation efficiency. In addition, since the fifth metal pad 1452 of the circuit layer 145 in the connector 100 can be designed as a heat sink 300 in this embodiment, the configuration of the heat sink 300 can be integrated into the connector 100, and there is no need to configure a large heat sink or heat dissipation plate in other locations. This can reduce the overall size of the electronic device 10, for example, the thickness of the electronic device 10 can be reduced, but it is not limited thereto.

[0075] In this embodiment, the encapsulation structure 400 is disposed on the first surface 100a and surrounds the electronic component 200. The encapsulation structure 400 may be disposed in the gap between the third surface 200a and the first surface 100a. The encapsulation structure 400 may contact the third surface 200a, the fourth surface 200b, and the surrounding surface 200c of the electronic component 200. The material of the encapsulation structure 400 may be resin, epoxy resin, silicone compound, or other suitable encapsulation material, but is not limited thereto.

[0076] In this embodiment, the electronic device 10 may further include a conductive terminal CT. The conductive terminal CT is disposed on the surface of the fifth metal pad 1451 away from the first surface 100a, and the conductive terminal CT can be used to bond to other electronic components in subsequent processes, such as integrated circuit wafers (not shown), printed circuit boards (not shown), or capacitors (not shown) and other suitable components. In this embodiment, the conductive terminal CT can be a solder ball, but is not limited thereto.

[0077] In this embodiment, the fabrication method of the electronic device 10 can be a redistribution layer first (RDL first) fabrication method, and includes, but is not limited to, the following steps: First, a release layer is formed on a carrier board (not shown), wherein the material of the release layer can be thermal tape, and the material of the carrier board can include glass, quartz, sapphire, ceramic, stainless steel, silicon wafer, encapsulation structure (e.g., resin, epoxy resin, silicone compound), other suitable substrate materials, or combinations thereof, but is not limited thereto; Next, a connector 100 is formed on the release layer; Then, for example, a laser lift-off process is used. The release layer and carrier are removed by lift-off (LLO), heating, or other suitable methods to expose the second surface 100b of the connector 100 and the fifth metal pad 1452. Then, after flipping, for example by laser cutting, the surface of the fifth metal pad 1452 away from the first surface 100a is etched into a fin-like structure to form a heat sink 300 on the second surface 100b of the connector 100 and exposed outside the second surface 100b. Next, an electronic component 200 is disposed on the first surface 100a of the connector 100 so that the electronic component 200 can be electrically connected to at least one conductive structure 110. Next, an encapsulation structure 400 is formed on the first surface 100a so that the encapsulation structure 400 can surround the electronic component 200. Next, conductive terminals CT are formed on the fifth metal pad 1451 of the circuit layer 145 so that the electronic device 10 of this embodiment can be bonded to other electronic components, such as integrated circuit chips and / or printed circuit boards, in subsequent processes. At this point, the electronic device 10 of this embodiment has been largely completed.

[0078] Other embodiments will be listed below for illustration. It must be noted that the following embodiments use the component reference numerals and some content from the foregoing embodiments, where the same reference numerals are used to represent the same or similar components, and descriptions of the same technical content are omitted. For explanations of the omitted parts, please refer to the foregoing embodiments; these will not be repeated in the following embodiments.

[0079] Figure 2 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of this disclosure. Please also refer to... Figure 1 and Figure 2 The electronic device 10a in this embodiment and Figure 1 The electronic device 10 in this embodiment is similar to that in the previous embodiment, except that the electronic device 10a in this embodiment also includes a second opening 410. The first opening and the second opening referred to in this disclosure can be formed by means of laser drilling or mechanical drilling, but are not limited thereto.

[0080] Specifically, please refer to Figure 2 In the connector 100, the circuit layer 141 is embedded in the insulating layer 131 and exposed outside the first surface 100a; the circuit layer 142 is embedded in the insulating layer 132; the circuit layer 143 is embedded in the insulating layer 133; the circuit layer 144 is embedded in the insulating layer 134; and the circuit layer 145 is disposed on the second surface 100b and located outside the insulating layer 134. Since the fifth metal pad 1452 of the circuit layer 145 is located outside the insulating layer 134, for example, the surface of the fifth metal pad 1452 away from the first surface 100a can be etched into a fin-like structure using photolithography to fabricate the fifth metal pad 1452 as a heat sink 300.

[0081] The second opening 410 is disposed between the connector 100 and the electronic component 200. The second opening 410 can be disposed within the encapsulation structure 400 between the connector 100 and the electronic component 200, meaning that the second opening 410 can expose a portion of the electronic component 200. In this embodiment, the conductive material in the first heat dissipation structure 120 can extend through the second opening 410 and contact the electronic component 200, thus allowing the first heat dissipation structure 120 to contact the electronic component 200. Furthermore, the heat sink 300 can be connected to the electronic component 200 through multiple circuit layers of the first heat dissipation structure 120 and the second opening 410. In this way, heat from the electronic component 200 can be transferred to the first heat dissipation structure 120 not only through thermal radiation but also through thermal conduction, thereby significantly improving the heat dissipation efficiency of the electronic component 200. The conductive material disposed in the second opening 410 can be, for example, titanium, copper, aluminum, molybdenum, silver, other suitable metals, or alloys or combinations of the above materials, but is not limited thereto.

[0082] Furthermore, in this embodiment, the fabrication method of the electronic device 10a can be a chip-first / face-down fabrication method, and includes, but is not limited to, the following steps: First, a carrier board (not shown) is provided, wherein the material of the carrier board may include silicon wafers, other suitable substrate materials, or combinations thereof, but is not limited thereto; Next, a release layer (not shown) is optionally formed on the carrier board, wherein the material of the release layer may be a thermosetting adhesive tape; Next, an electronic component 200 is disposed on the release layer such that the third surface 200a of the electronic component 200 faces the release layer and the pads 210 of the electronic component 200 contact the release layer; Next, an encapsulation structure 400 is formed on the release layer such that the encapsulation structure 400 can surround the electronic component 200; Next, after flipping over, the release layer and the carrier board are removed, for example by laser lift-off, heating, or other suitable methods, to expose the pads 210. Next, a second opening 410 is formed so that the second opening 410 can be disposed on the package structure 400 on the third surface 200a, and the second opening 410 can contact and connect to the electronic component 200. Next, a connector 100 is formed on the package structure 400 so that at least one conductive structure 110 can be electrically connected to the electronic component 200 through the pad 210, and at least one first heat dissipation structure 120 can contact and connect to the electronic component 200 through the second opening 410. Next, a heat sink 300 is formed on the second surface 100b of the connector 100. Next, a conductive terminal CT is formed on the fifth metal pad 1451 of the circuit layer 145 so that the electronic device 10a of this embodiment can be bonded to components such as integrated circuit chips and / or printed circuit boards in subsequent processes. At this point, the electronic device 10a of this embodiment has been substantially completed.

[0083] Figure 3 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of this disclosure. Please also refer to... Figure 2 and Figure 3 The electronic device 10b in this embodiment and Figure 2 The electronic device 10b in this embodiment is similar to the electronic device 10a, except that the electronic device 10b in this embodiment also includes a carrier plate 500 and a release layer 510.

[0084] Specifically, please refer to Figure 3 In this embodiment, the release layer 510 is disposed on the carrier plate 500, the encapsulation structure 400 and the electronic component 200 are disposed on the release layer 510, and the connector 100 is disposed on the encapsulation structure 400. The connector 100 and the release layer 510 are respectively located on opposite sides of the encapsulation structure 400. The release layer 510 is located between the encapsulation structure 400 and the carrier plate 500. In some embodiments, the release layer may be omitted if necessary.

[0085] In this embodiment, since the encapsulation structure 400 does not completely surround the electronic component 200, and the encapsulation structure 400 can expose the fourth surface 200b of the electronic component 200, the release layer 510 can contact the fourth surface 200b of the electronic component 200.

[0086] Furthermore, in this embodiment, the fabrication method of the electronic device 10b can be a chip-first / face-up fabrication method, and includes, but is not limited to, the following steps: First, a carrier board 500 is provided, wherein the material of the carrier board 500 may include silicon wafers, other suitable substrate materials, or combinations thereof, but is not limited thereto; Next, a release layer 510 is optionally formed on the carrier board 500, wherein the material of the release layer 510 may be a thermosetting adhesive tape; Next, an electronic component 200 is disposed on the release layer 510 such that the third surface 200a of the electronic component 200 is aligned with the release layer 510, and the fourth surface 200b of the electronic component 200 contacts the release layer 510; Next, a package structure 400 is formed on the release layer 510 such that the package structure 400 can surround the electronic component 200; Next, the package structure 400 is subjected to a polishing process such that the package structure 400 exposes the electronic component 200. Next, a second opening 410 is formed on the package structure 400, allowing the second opening 410 to be disposed on the third surface 200a of the package structure 400 and exposing a portion of the electronic component 200. Next, a connector 100 is formed on the package structure 400, allowing at least one conductive structure 110 to be electrically connected to the electronic component 200 via the connector 210, and allowing the first heat dissipation structure 120 to contact and connect to the electronic component 200 via the second opening 410. Next, a heat sink 300 is formed on the second surface 100b of the connector 100. Next, a conductive terminal CT is formed on the fifth metal pad 1451 of the circuit layer 145, enabling the electronic device 10a of this embodiment to be bonded to components such as integrated circuit chips and / or printed circuit boards in subsequent processes. At this point, the electronic device 10b of this embodiment is substantially completed.

[0087] Figure 4 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of this disclosure. Please also refer to... Figure 1 and Figure 4 The electronic device 10c in this embodiment and Figure 1 The electronic device 10 is similar to that in the previous embodiment, except that in the electronic device 10c of this embodiment, the connector 100 further includes at least one second heat dissipation structure 160.

[0088] Specifically, please refer to Figure 4At least one of the second heat dissipation structures 160 may overlap with the electronic component 200 in the normal direction Z of the package structure 400. The at least one second heat dissipation structure 160 is physically separated from and electrically insulated from the at least one conductive structure 110. The at least one second heat dissipation structure 160 may penetrate the insulating layers 131, 132, 133, and 134, as well as a portion of the package structure 400 located between the first surface 100a and the electronic component 200.

[0089] In this embodiment, at least one second heat dissipation structure 160 has a top surface 160a and a bottom surface 160b opposite to each other. The top surface 160a may be substantially flush with the second surface 100b of the connector 100. The top surface 160a may be exposed to the outside. The bottom surface 160b may be closer to the electronic component 200 than the top surface 160a. The bottom surface 160b may have a distance from the electronic component 200 in the normal direction Z of the packaging structure 400. That is, the second heat dissipation structure 160 does not contact the electronic component 200, but this is not a limitation.

[0090] Furthermore, in this embodiment, the heat in the electronic component 200 and the conductive structure 110 can be transferred to the outside through the first heat dissipation structure 120 and the heat sink 300, or, for example, through thermal radiation to the second heat dissipation structure 160, and then, for example, through thermal convection from the top surface 160a to the outside, but this is not a limitation. In other words, in this embodiment, the provision of the second heat dissipation structure 160 further increases the heat dissipation path, thereby improving the overall heat dissipation efficiency. In this embodiment, the material of the second heat dissipation structure 160 may include polymeric organic heat dissipation materials, other suitable heat dissipation materials, or combinations of the above materials, but this is not a limitation.

[0091] Figure 5 This is a partial cross-sectional schematic diagram of an electronic device according to another embodiment of this disclosure. For further illustration, Figure 5 The seed layer is further shown. Please also refer to [reference needed]. Figure 4 and Figure 5 The electronic device 10d in this embodiment and Figure 4 Similar to the electronic device 10c in this embodiment, except that in the electronic device 10d of this embodiment, the seed layers 171, 172, 173, 174, and 175 of the connector 100 extend to the second heat dissipation structure 162, wherein the second heat dissipation structure 162 does not have conductive properties.

[0092] Specifically, please refer to Figure 5Seed layer 171 can be disposed at the interface between the first metal pad 1411 and the insulating layer 131 and extend to the second heat dissipation structure 162. Seed layer 172 can be disposed at the interface between the second metal pad 1421 and the insulating layer 132 and extend to the second heat dissipation structure 162. Seed layer 173 can be disposed at the interface between the third metal pad 1431 and the insulating layer 133 and extend to the second heat dissipation structure 162. Seed layer 174 can be disposed at the interface between the fourth metal pad 1441 and the insulating layer 134 and extend to the second heat dissipation structure 162. Seed layer 175 can be disposed at the interface between the fifth metal pad 1451 and the second surface 100b and extend to the second heat dissipation structure 162. That is, seed layers 171, 172, 173, 174, and 175 can connect at least one conductive structure 110 and at least one second heat dissipation structure 162. In this way, the heat in the conductive structure 110 can be transferred to the outside through the first heat dissipation structure 120 and the heat sink 300, and can also be transferred to the second heat dissipation structure 162 through the seed layers 171, 172, 173, 174, and 175, for example, by thermal conduction. Then, it can be transferred to the outside from the top surface 162a of the second heat dissipation structure 162, for example, by thermal convection. In other words, in this embodiment, the provision of the second heat dissipation structure 162 increases the heat dissipation path, thereby improving the overall heat dissipation efficiency.

[0093] In this embodiment, the bottom surface 162b of the second heat dissipation structure 162 may have a distance between it and the electronic component 200 in the normal direction Z of the packaging structure 400. That is, the second heat dissipation structure 162 does not contact the electronic component 200, but this is not a limitation.

[0094] In this embodiment, the materials of the seed layers 171, 172, 173, 174, and 175 may include titanium, copper, other suitable materials, or combinations thereof, but are not limited thereto. The material of the second heat dissipation structure 162 may include a polymeric organic heat dissipation material, other suitable heat dissipation insulating materials, or combinations thereof, but is not limited thereto. Since the second heat dissipation structure 162 is a heat dissipation insulating material, it does not have conductive properties, and it remains electrically insulated from the conductive structure 110.

[0095] Figure 6A This is a partial top view schematic diagram of an electronic device according to another embodiment of the present disclosure. Figure 6B for Figure 6A A cross-sectional schematic diagram of the electronic device along section line I-I'. Figure 6C for Figure 6A A cross-sectional view of the electronic device along section line II-II'. For clarity and ease of explanation, the accompanying drawings are provided. Figure 6A Several components of the electronic device 10e are omitted from the diagram. Please also refer to... Figure 1 and Figures 6A to 6C The electronic device 10e in this embodiment and Figure 1 The electronic device 10e in this embodiment is similar to that in the previous one, except that the electronic device 10e in this embodiment is similar to that in the previous one. Figure 1 The electronic device 10 is in its structure before the electronic components 200 are configured. That is, the electronic device 10e in this embodiment also includes a carrier plate 500 and a release layer 510. In addition, the connector 100 in this embodiment also includes at least one first test structure 181, 182, 183, 184, 185.

[0096] Specifically, please refer to Figures 6A to 6C A release layer 510 is disposed on a carrier plate 500, and a connector 100 is disposed on the release layer 510. A first surface 100a of the connector 100 may be further away from the carrier plate 500 than a second surface 100b. A wiring layer 145 in the connector 100 may contact the release layer 510. A wiring layer 141 in the connector 100 may be exposed.

[0097] In this embodiment, the first metal pad 1411 may include a first metal pad 1411a, a first metal pad 1411b, and a first metal pad 1411c. The first metal pads 1411a, 1411b, and 1411c are electrically insulated from each other. The first metal pads 1411a, 1411b, and 1411c can be used to bond with electronic components in subsequent manufacturing processes.

[0098] In this embodiment, the circuit layer 141 may further include first test pads 1413, 1414, 1415, 1416, and 1417, which are physically separated from each other. Wherein, as... Figure 6A As shown, first test pads 1413, 1414, 1415, 1416, and 1417 may surround the first metal pad 1411a (or the first metal pad 1411b, or the first metal pad 1411c). Circuit layer 142 may also include second test pads 1423, 1424, 1425, and 1426, which are physically separated from each other. Circuit layer 143 may also include third test pads 1433, 1434, and 1435, which are physically separated from each other. Circuit layer 144 may also include fourth test pads 1443 and 1444, which are physically separated from each other. Circuit layer 145 may also include a fifth test pad 1453.

[0099] In this embodiment, the first test structure 181 may include a first test pad 1413, a second test pad 1423, a third test pad 1433, a fourth test pad 1443, a fifth test pad 1453, and a portion of a first opening 150. The fifth test pad 1453 may contact the fifth metal pad 1451, allowing the first test structure 181 to be electrically connected to the conductive structure 110.

[0100] The first test structure 182 may include a first test pad 1414, a second test pad 1424, a third test pad 1434, a fourth test pad 1444, and a portion of a first opening 150. The fourth test pad 1444 may contact a fourth metal pad 1441, thereby enabling the first test structure 182 to be electrically connected to the conductive structure 110.

[0101] The first test structure 183 may include a first test pad 1415, a second test pad 1425, a third test pad 1435, and a portion of a first opening 150. The third test pad 1435 may contact a third metal pad 1431, thereby enabling the first test structure 183 to be electrically connected to the conductive structure 110.

[0102] The first test structure 184 may include a first test pad 1416, a second test pad 1426, and a portion of a first opening 150. The second test pad 1426 may contact a second metal pad 1421, thereby enabling the first test structure 184 to be electrically connected to the conductive structure 110.

[0103] The first test structure 185 may include a first test pad 1417. The first test pad 1417 may contact a first metal pad 1411 so that the first test structure 185 can be electrically connected to the conductive structure 110.

[0104] In this embodiment, the first test structures 181, 182, 183, 184, and 185 may surround the conductive structure 110 to perform electrical testing on the conductive structure 110, thereby ensuring the quality of the conductive structure 110 before bonding electronic components to the connector 100. The electrical testing may include, for example, open circuit testing and short circuit testing.

[0105] For example, since the fourth test pad 1444 in the first test structure 182 can contact the fourth metal pad 1441 of the conductive structure 110, and the second test pad 1426 in the first test structure 184 can contact the second metal pad 1421 of the conductive structure 110, when the two probes on the sensor contact the first test pad 1414 in the first test structure 182 and the first test pad 1416 in the first test structure 184 respectively, the signal sensed by the sensor can indicate whether there is an open circuit between the second metal pad 1421 and the fourth metal pad 1441 in the conductive structure 110. In some embodiments, any two of the first test pads 1413, 1414, 1415, 1416, and 1417 can be selected to detect whether there is an open circuit in the conductive structure 110.

[0106] For example, since the conductive structure 110 containing the first metal pad 1411a and the conductive structure 110 containing the first metal pad 1411b should be electrically insulated from each other, when the two probes on the sensor contact the first test pad 1414 around the first metal pad 1411a and the first test pad 1416 around the first metal pad 1411b respectively, the sensor can detect whether there is a short circuit between the first metal pad 1411a and the first metal pad 1411b through the signal sensed by the sensor. In some embodiments, other first test pads around the first metal pad 1411a and other first test pads around the first metal pad 1411b can also be arbitrarily selected to detect whether there is a short circuit between the first metal pad 1411a and the first metal pad 1411b.

[0107] Furthermore, in this embodiment, after completing the electrical testing to ensure that the conductive structure 110 has no open or short circuits, the surfaces of the first test pads (including first test pads 1413, 1414, 1415, 1416, and 1417) away from the second surface 100b can be etched into fin-like structures using photolithography or laser cutting. This allows the first test pads (including first test pads 1413, 1414, 1415, 1416, and 1417) to be fabricated as heat sinks, thereby improving overall heat dissipation efficiency. In other words, in this embodiment, the arrangement of the first test structures 181, 182, 183, 184, and 185 not only allows for electrical testing but also increases the heat dissipation path, thus improving overall heat dissipation efficiency.

[0108] Figure 7A This is a partial top view schematic diagram of an electronic device according to another embodiment of the present disclosure. Figure 7B for Figure 7AA schematic cross-sectional view of the electronic device along section line Ⅲ-Ⅲ'. Figure 7C for Figure 7A A cross-sectional view of the electronic device along section line IV-IV'. For clarity and ease of explanation, the accompanying drawings are provided. Figure 7A Several components of the electronic device 10f are omitted from the diagram. Please also refer to... Figure 1 and Figures 7A to 7C The electronic device 10f in this embodiment and Figure 1 The electronic device 10f in this embodiment is similar to the electronic device 10f in the previous embodiment, except that the electronic device 10f in this embodiment is similar to the electronic device 10f in the previous embodiment. Figure 1 The electronic device 10 is in its structure before the electronic components 200 are configured. That is, the electronic device 10f in this embodiment also includes a carrier board 500 and a release layer 510. In addition, the connector 100 in this embodiment also includes at least one second test structure 191, 192, 193, 194, a signal trace ST, and a ground trace GT.

[0109] Specifically, please refer to Figures 7A to 7C A release layer 510 is disposed on a carrier plate 500, and a connector 100 is disposed on the release layer 510. A first surface 100a of the connector 100 may be further away from the carrier plate 500 than a second surface 100b. A wiring layer 145 in the connector 100 may contact the release layer 510. A wiring layer 141 in the connector 100 may be exposed.

[0110] In this embodiment, the first metal pad 1411 may include first metal pad 1411d, first metal pad 1411e, first metal pad 1411f, and first metal pad 1411g. The first metal pads 1411d, 1411e, 1411f, and 1411g are electrically insulated from each other. The first metal pads 1411d, 1411e, 1411f, and 1411g can be used to bond with electronic components in subsequent manufacturing processes.

[0111] In this embodiment, circuit layer 141 may further include first test pads 1418a, 1418b, 1419a, and 1419b, which are physically separated from each other. Circuit layer 142 may further include second test pads 1427, 1428, 1429a, and 1429b, which are physically separated from each other. Circuit layer 143 may further include a third test pad 1436. Circuit layer 144 may further include fourth test pads 1445, 1446, 1447, 1448, and 1449, which are physically separated from each other. Circuit layer 145 may further include fifth test pads 1454, 1455, 1456, 1457, and 1458.

[0112] In this embodiment, the second test structure 191 may include a first test pad 1418a, a second test pad 1427, a portion of an insulating layer 132, a portion of an insulating layer 133, a fourth test pad 1445, a fourth test pad 1446, a fourth test pad 1447, a fifth test pad 1454, a fifth test pad 1455, a fifth test pad 1456, and a portion of a first opening 150. The second test structure 191 is a capacitor element. The first test pad 1418a and the second test pad 1427 together form the upper electrode of the capacitor element. The fourth test pads 1445, 1446, 1447, 1454, 1455, and 1456 together form the lower electrode of the capacitor element. The portion of the insulating layer 132 and the portion of the insulating layer 133 together form the insulating layer disposed between the upper and lower electrodes in the capacitor element.

[0113] The second test structure 192 may include a first test pad 1418a, a portion of an insulating layer 131, and a second test pad 1428. The second test structure 192 is a capacitor element, the first test pad 1418a is the upper electrode of the capacitor element, the second test pad 1428 is the lower electrode of the capacitor element, and the portion of the insulating layer 131 is an insulating layer disposed between the upper and lower electrodes in the capacitor element.

[0114] The second test structure 193 may include a fourth test pad 1448, a portion of an insulating layer 134, and a fifth test pad 1457. The second test structure 193 is a capacitor element, the fourth test pad 1448 is the upper electrode of the capacitor element, the fifth test pad 1457 is the lower electrode of the capacitor element, and the portion of the insulating layer 134 is an insulating layer disposed between the upper and lower electrodes in the capacitor element.

[0115] The second test structure 194 may include a first test pad 1419a, a first test pad 1419b, a second test pad 1429a, a second test pad 1429b, a portion of an insulating layer 132, a third test pad 1436, a portion of an insulating layer 133, a fourth test pad 1449, a portion of an insulating layer 134, a fifth test pad 1458, and a portion of a first opening 150. The second test structure 194 is a capacitor element. The first test pads 1419a, 1429a, and 1449 together form the upper or lower electrode of the capacitor element. The first test pads 1419b, 1429b, 1436, and 1458 together form the upper or lower electrode of the capacitor element. The portions of the insulating layers 132, 133, and 134 may be insulating layers disposed between the upper and lower electrodes of the capacitor element.

[0116] In this embodiment, since the second test structure 191, the second test structure 192, the second test structure 193 and the second test structure 194 are capacitor elements, an insulation test can be performed by detecting the capacitance value of the capacitor elements before the electronic components are connected to the connector 100, so as to determine whether there are problems such as peeling, inappropriate thickness or warping of the insulation layer in the connector 100.

[0117] Furthermore, in this embodiment, the signal trace ST and the ground trace GT are electrically insulated from each other. The ground trace GT can be electrically connected to the fourth test pad 1445, the fourth test pad 1446, the fourth test pad 1447, the fifth test pad 1454, the fifth test pad 1455, the fifth test pad 1456, the second test pad 1428, the fifth test pad 1457, the first test pad 1418a, the second test pad 1429a, and the fourth test pad 1449. The signal trace ST can be electrically connected to the first test pad 1418a, the second test pad 1427, the first test pad 1419a, the fourth test pad 1448, the first test pad 1419b, the second test pad 1429b, the third test pad 1436, and the fifth test pad 1458. In other words, the signal trace ST and the ground trace GT can connect at least one capacitive element (i.e., the second test structure 191, the second test structure 192, the second test structure 193, and the second test structure 194) in parallel to generate an equivalent capacitance with a large capacitance value. Therefore, in this embodiment, insulation testing is also performed by detecting the equivalent capacitance of these capacitive elements to determine whether there are problems such as peeling, inappropriate thickness, or warping of the insulation layer in the connector 100.

[0118] In addition, in this embodiment, after completing the insulation test to ensure that the insulation layer in the connector 100 has no problems such as peeling, inappropriate thickness, or warping, the surface of the first test pad (including first test pad 1418a, first test pad 1418b, first test pad 1419a, and first test pad 1419b) away from the first surface 100a can be etched into a fin-like structure using photolithography or laser cutting. This allows the first test pad (including first test pad 1418a, first test pad 1418b, first test pad 1419a, and first test pad 1419b) to be made into a heat sink, thereby improving the overall heat dissipation efficiency. That is to say, in this embodiment, the second test structures 191, 192, 193, and 194 can not only be used for insulation testing but also increase the heat dissipation path to improve the overall heat dissipation efficiency.

[0119] In summary, in the electronic device and manufacturing method disclosed in this embodiment, the arrangement of the first heat dissipation structure and the heat sink increases the heat dissipation path, thereby improving the overall heat dissipation efficiency. Since the heat sink is integrated into the connector, it eliminates the need for additional large heat sinks or heat plates in other locations, thus reducing the overall size (e.g., thickness) of the electronic device. Furthermore, the arrangement of the second heat dissipation structure further increases the heat dissipation path, further enhancing the overall heat dissipation efficiency. Additionally, the arrangement of the first and second test structures, besides being used for electrical testing and insulation testing respectively, also increases the heat dissipation path, further improving the overall heat dissipation efficiency.

[0120] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions disclosed herein, and are not intended to limit them. Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments disclosed herein.

Claims

1. An electronic device, characterized in that, include: A connector has at least one conductive structure, at least one first heat dissipation structure, at least one second heat dissipation structure, a seed layer, an insulating layer, and a circuit layer, wherein the at least one conductive structure and the at least one first heat dissipation structure are physically separated from each other and electrically insulated from each other, the at least one second heat dissipation structure and the at least one conductive structure are physically separated from each other, and the seed layer extends at the interface between the insulating layer and the circuit layer of the connector and connects the at least one conductive structure and the at least one second heat dissipation structure. An electronic component is electrically connected to the at least one conductive structure; as well as A heat sink is connected to the at least one first heat dissipation structure, wherein the heat sink and the electronic component are disposed on opposite sides of the connector.

2. The electronic device according to claim 1, characterized in that, The heat sink is connected to the electronic component via the at least one first heat dissipation structure.

3. The electronic device according to claim 1, characterized in that, The At least one second heat dissipation structure is electrically insulated from the at least one conductive structure.

4. The electronic device according to claim 1, characterized in that, Also includes: An encapsulating colloid is disposed on the connector and surrounds the electronic component.

5. The electronic device according to claim 1, characterized in that, The connector is a rewiring layer.

6. The electronic device according to claim 1, characterized in that, The heat sink is a heat dissipation fin.

7. The electronic device according to claim 1, characterized in that, The connector also includes: At least one first test structure is electrically connected to the at least one conductive structure.

8. A method for manufacturing an electronic device, characterized in that, include: A connector is formed, wherein the connector has at least one conductive structure, at least one first heat dissipation structure, at least one second heat dissipation structure, a seed layer, an insulating layer, and a circuit layer, wherein the at least one conductive structure and the at least one first heat dissipation structure are physically separated from each other and electrically insulated from each other, the at least one second heat dissipation structure and the at least one conductive structure are physically separated from each other, and the seed layer extends at the interface between the insulating layer and the circuit layer of the connector and connects the at least one conductive structure and the at least one second heat dissipation structure. Configure electronic components to be electrically connected to the at least one conductive structure; A heat sink is formed to connect the at least one first heat dissipation structure, wherein the heat sink and the electronic component are disposed on opposite sides of the connector.

9. The method for manufacturing an electronic device according to claim 8, characterized in that, Also includes: An encapsulating colloid is formed on the connector to surround the electronic component.

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