A multi-channel full-duplex LoRaWAN gateway based on MCU and a communication method thereof
By using an MCU-based multi-channel full-duplex LoRaWAN gateway, the problems of high cost, high power consumption, and large size of existing gateways are solved, realizing a high-performance, low-cost, and low-power LoRaWAN gateway suitable for medium-volume terminal device access and outdoor application scenarios, improving network throughput and stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-16
- Publication Date
- 2026-03-31
AI Technical Summary
Existing full-duplex LoRaWAN gateways are costly, power-hungry, have high latency, and are bulky. Furthermore, their performance degrades in scenarios with concentrated bidirectional communication. Current implementations increase system cost and power consumption, making it difficult to meet the requirements of high-performance LoRaWAN networks.
The system employs a multi-channel full-duplex LoRaWAN gateway based on an MCU, including a main control MCU, a LoRa RF front-end, and a backhaul network. It connects the LoRa transceiver module and the LoRa gateway chip via an SPI interface to achieve multi-rate full-duplex communication, support standard LoRaWAN networks, and reduce hardware costs and power consumption.
It achieves a high-performance, low-cost, low-power, and compact LoRaWAN gateway that supports standard LoRaWAN networks and is suitable for medium-volume terminal device access and outdoor application scenarios, improving network throughput and stability.
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Figure CN116234075B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data transmission technology, specifically to a multi-channel full-duplex LoRaWAN gateway based on an MCU and its communication method. Background Technology
[0002] Currently, LoRa technology is on the rise, and the LoRaWAN gateway is the core of the LoRa network, serving as a bridge between terminal nodes and servers, and also as a multi-channel transceiver. LoRaWAN gateways in commercially available LoRaWAN systems are primarily implemented using hardware platforms based on high-performance CPUs such as Cortex-A cores and ARM9, and software platforms based on the Linux operating system. The RF hardware uses 1 to n LoRa gateway chips (SX130x) and their matching RF front-end chips (SX125x, etc.) to achieve an 8*n channel half-duplex LoRaWAN gateway. Since the SX130x chip only supports half-duplex communication by default, a full-duplex LoRaWAN gateway requires the SX130x in conjunction with an additional RF duplexer. However, since it uses the Linux operating system, it requires a high-performance CPU processor, resulting in higher hardware costs and power consumption for the gateway processor. In scenarios with concentrated bidirectional communication, the downlink communication performance of a half-duplex LoRaWAN gateway will be significantly reduced, leading to a noticeable decrease in the overall performance of the LoRaWAN network. While a full-duplex LoRaWAN gateway using a Sub-1GHz RF duplexer can solve the downlink problem, the Sub-1GHz RF duplexer is expensive and bulky, requiring more space to be reserved in the gateway casing, which poses challenges for later gateway deployment and installation.
[0003] In addition to the above, existing full-duplex LoRaWAN gateway implementations include: 1) A software platform based on the Linux operating system, using a single SX127x module as the downlink channel, with soft time synchronization implemented in Linux user space. In this implementation, there is a certain delay in communication between the Linux user space and kernel space. If there are too many Linux applications, the delay will be large, leading to transmission failures and ultimately a low system success rate; 2) A software platform based on the Linux operating system, using an SX1301 + MCU + a single SX127x module as the downlink channel, with the MCU used for time synchronization and downlink transmission. In this implementation, using the MCU for time synchronization and controlling the SX127X for downlink communication increases system cost and power consumption. Expanding to multiple downlink channels will further increase the MCU cost. Summary of the Invention
[0004] This invention primarily addresses the problems of high cost, high power consumption, high latency, and large size in existing full-duplex LoRaWAN gateway implementations. It provides a multi-channel full-duplex LoRaWAN gateway based on an MCU and its communication method. The gateway includes a main control MCU, a LoRa RF front-end connected to the MCU, and a backhaul network. The LoRa RF front-end includes a LoRa transceiver module and a LoRa gateway chip module. After power-on initialization, it controls the backhaul network to connect to the public network; it initiates an uplink data processing thread, where the gateway receives and processes data from LoRaWAN terminal devices in real time and forwards it to the LoRaWAN server; it also initiates a downlink data processing thread, where the gateway receives and processes data from the LoRaWAN server in real time and forwards it to the LoRaWAN terminal devices. This invention implements a high-performance LoRaWAN gateway communication mechanism based on an MCU, with multiple channels and multiple rates, fully supporting standard LoRaWAN networks and offering advantages such as simplified design, small size, low cost, low power consumption, and high reliability.
[0005] To achieve the above objectives, the present invention adopts the following technical solution.
[0006] A multi-channel full-duplex LoRaWAN gateway based on an MCU, comprising:
[0007] Main control MCU: The main control MCU is connected to a power management module, SD circuit, Jlink SWD debugging interface, LED and KEY; low power MCUs such as STM32H, STM32L4 or STM32WL can be used, depending on the overall power consumption requirements of the system;
[0008] LoRa RF front-end: The LoRa RF front-end includes a LoRa transceiver module (SX126x) and a LoRa gateway chip module (SX130x). The LoRa RF front-end is connected to the main control MCU. The LoRa gateway chip module is responsible for receiving uplink data from the LoRaWAN terminal device. The LoRa transceiver module is responsible for sending downlink data to the LoRaWAN terminal device. The LoRa transceiver module notifies the main control MCU that data transmission is complete through a DIO signal.
[0009] Backhaul network: The backhaul network uses a WIFI module or a CAT1 module and is connected to the main control MCU; it can use an AP6212 WiFi module, an ESP32 WiFi module, or an L610 CAT1 module, depending on the on-site network conditions;
[0010] This invention implements a high-performance LoRaWAN gateway communication mechanism based on MCU with multi-channel, multi-rate, full-duplex operation. It fully supports standard LoRaWAN networks and has advantages such as simplified design, small size, low cost, low power consumption, and high reliability.
[0011] Preferably, the communication interface between the LoRa transceiver module and the main control MCU is SPI4; the communication interface between the LoRa gateway chip module and the main control MCU is SPI2.
[0012] Preferably, the communication interface between the backhaul network and the main control MCU is SPI, SDIO, or UART. The backhaul network uses a low-cost WiFi module (AP6212 / ESP32) or CAT1 module (L610) to access the public network and interacts with the LoRaWAN server via the GWMP-UDP protocol. When the backhaul network uses an AP6212 WiFi module, it communicates with the MCU through the SDIO interface to provide WiFi communication services; when the backhaul network uses an ESP32 WiFi module or an L610 CAT1 module, it communicates with the MCU through a serial port interface to provide WiFi communication services or cellular network communication services.
[0013] A communication method for a multi-channel full-duplex LoRaWAN gateway based on an MCU, applicable to the aforementioned multi-channel full-duplex LoRaWAN gateway based on an MCU, includes the following steps:
[0014] Step S1: System initialization, control the return network connection to the public network;
[0015] Step S2: Start the gateway uplink data processing lgw_thread_up thread. The gateway receives and processes LoRaWAN terminal device data in real time and forwards it to the LoRaWAN server. After receiving LoRaWAN terminal device data, the gateway converts it into JSON data packets according to the GWMP protocol and forwards it to the LoRaWAN server through the backhaul network.
[0016] Step S3: Start the gateway downlink data processing lgw_thread_dn thread. The gateway receives and processes data from the LoRaWAN server in real time and forwards it to the LoRaWAN terminal device. After receiving the data from the LoRaWAN server, the gateway extracts valid downlink data and other information according to the GWMP protocol and sends it to the LoRaWAN terminal device through the LoRa transceiver module SX126x.
[0017] Preferably, the specific process of step S1 includes the following steps:
[0018] Step S11: After power-on, initialize the LoRa transceiver module, LoRa gateway chip module, and backhaul network;
[0019] Step S12: Control the LoRa gateway chip module to operate in multi-rate multi-channel mode, receiving over-the-air LoRa data packets in real time for LoRaWAN uplink data reception. Multi-rate multi-channel mode refers to support for SF7, SF8, SF9, SF10, SF11, and SF12BW125 chipsets, providing eight communication channels.
[0020] Preferably, step S2 includes the following steps:
[0021] Step S21: Start the MCU 32-bit timer, set tick = 1us, and operate in 32-bit continuous mode;
[0022] Step S22: The lgw_thread_up thread periodically polls to check if there are LoRa data packets in the data rxq queue received by the LoRa gateway chip module;
[0023] Step S23: If yes, extract the LoRa data packet from the rxq queue and delete the data from the rxq queue;
[0024] Step S24: The gateway further parses the LoRa data packets and converts them into JOSN data packets according to the GWMP protocol;
[0025] Step S25: Send the JOSN data packet to the LoRaWAN server via the backhaul network and sock_send;
[0026] According to Class A communication requirements, the LoRaWAN server will add the RX1DELAY time (default value is 1s, maximum is 15s) to the uplink timestamp t1 of each uplink JOSN data packet to obtain the downlink timestamp value t2, that is, t2 = t1 + 1000000.
[0027] Preferably, the header information of the LoRa data packet in step S23 includes the uplink communication frequency freq, rate dr, bw, data packet length, rssi, snr and uplink timestamp t1.
[0028] Preferably, step S3 includes the following steps:
[0029] Step A1: The lgw_thread_dn thread periodically polls through sock_recv. If it receives a JOSN data packet sent by the LoRaWAN server, it parses it according to the GWMP protocol and verifies the validity of the JOSN data packet.
[0030] Step A2: If the JOSN data packet is valid, determine in sequence whether the downlink timestamp t2 of the JOSN data packet is too late, too early, or overlaps with the time of the data packet to be sent down.
[0031] Step A3: If all are no, convert the JOSN data packet into local downlink data (downlink data packet) according to the GWMP protocol and store it in the txq queue.
[0032] Preferably, the specific process of step S3 further includes the following steps:
[0033] Step B1: Check if there are downlink data packets in the txq queue;
[0034] Step B2: If so, sort all downlink data packets in ascending order according to downlink timestamp t2;
[0035] Step B3: If the difference between the current system time and the t2 of the downlink data packet with the smallest downlink timestamp t2 is less than the downlink delay value, extract the downlink data packet from the txq queue and then start the sending operation.
[0036] Preferably, step B3 includes the following steps:
[0037] Step B301: Extract the valid downlink data packet from the txq queue and delete the data from the txq queue;
[0038] Step B302: Obtain the header information of the downlink data packet, including the downlink timestamp t2 and radio frequency communication parameters (including frequency freq, rate dr, encoding cr, bandwidth bw, data packet content, and data packet length size);
[0039] Step B303: Write the radio frequency communication parameters and the downlink data packets to be sent into the registers of the LoRa transceiver module in advance;
[0040] Step B304: Read the current timer value t_now of the LoRa gateway chip module and calculate the time overhead t_calib for reading the register of the LoRa gateway chip module;
[0041] Step B305: Calculate the time difference from this moment until the start of sending downlink data packets, diff = t2 - (t_now + t_calib);
[0042] Step B306: Set diff to signed int32_t, and use the automatic wrap-around of the signed number to determine whether the LoRa gateway chip module timer wraps around;
[0043] Step B307: If not, read the current timer value t_cnt_now of the MCU;
[0044] Step B308: Calculate the new downlink timestamp t3 = t_cnt_now + diff;
[0045] Step B309: Write the new downlink timestamp t3 into the MCU 32-bit timer's compare register CCM and start the compare timer interrupt;
[0046] Step B310: After the timer's compare register CCM interrupt is triggered, execute the send command and immediately send downlink LoRa data packets to the LoRaWAN terminal device;
[0047] This method replaces the common practice of using SX130x to send data, and solves the limitation that SX130x cannot receive data when sending without using a duplexer.
[0048] Therefore, the advantages of the present invention are:
[0049] (1) Implement a multi-channel, multi-rate, high-performance, full-duplex LoRaWAN gateway based on MCU, support standard LoRaWAN network communication, and can be used to connect standard LoRaWAN terminal devices to LoRaWAN servers. It has the advantages of simplified design, small size, low cost, low power consumption, and stable reliability.
[0050] (2) Compared with half-duplex gateways based on Linux, full-duplex communication supports greater network throughput and lower system power consumption.
[0051] (3) Compared with high-performance multi-channel duplex gateways based on Linux and duplexers, it has a significant cost advantage while meeting the full-duplex communication requirements of LoRaWAN, due to its lower overall BOM cost.
[0052] (4) Compared with the high-performance multi-channel duplex gateway based on Linux and MCU+SX127x module, it has a more streamlined design and higher stability. Only one main control MCU is needed to realize all the functions of standard LoRaWAN Class A\Class B\Class C.
[0053] (5) Compared with Linux-based high-performance multi-channel gateways, it is particularly suitable for application scenarios such as medium terminal device access volume, sparse device distribution, LoRaWAN network coverage gap filling, and outdoor solar power supply, while meeting full-duplex communication requirements, and has a higher return on investment.
[0054] (6) The resulting gateway products are smaller in size, making them easier to carry and install on-site; they facilitate the early development and debugging of LoRaWAN standard terminal products and help end users access the standard LoRaWAN server platform. Attached Figure Description
[0055] Figure 1This is a schematic diagram of the structure of a multi-channel full-duplex LoRaWAN gateway based on an MCU in Embodiment 1 of the present invention.
[0056] Figure 2 This is a flowchart of a communication method for a multi-channel full-duplex LoRaWAN gateway based on an MCU, according to Embodiment 1 of the present invention.
[0057] Figure 3 This is a flowchart of the uplink data processing thread in Embodiment 1 of the present invention.
[0058] Figure 4 This is a flowchart of the downlink data processing thread in Embodiment 1 of the present invention.
[0059] Figure 5 This is a schematic diagram of the structure of a multi-channel full-duplex LoRaWAN gateway based on an MCU in Embodiment 2 of the present invention.
[0060] 1. Main control MCU 2. LoRa RF front end 3. LoRa transceiver module 4. LoRa gateway chip module 5. Backhaul network 6. Power management module 7. SD circuit 8. Jlink SWD debugging interface 9. LED 10. KEY. Detailed Implementation
[0061] The present invention will now be further described with reference to the accompanying drawings and specific embodiments.
[0062] Example 1:
[0063] A multi-channel full-duplex LoRaWAN gateway based on an MCU, such as Figure 1 As shown, it includes:
[0064] Main control MCU1: The main control MCU1 is connected to the power management module 6, SD circuit 7, Jlink SWD debugging interface 8, LED 9 and KEY 10; low power MCUs such as STM32H, STM32L4 or STM32WL can be used, depending on the overall power consumption requirements of the system.
[0065] LoRa RF Front-End 2: LoRa RF Front-End 2 includes LoRa transceiver module 3 (SX126x) and LoRa gateway chip module 4 (SX130x). LoRa RF Front-End 2 is connected to the main control MCU1. LoRa gateway chip module 4 is responsible for receiving uplink data from LoRaWAN terminal devices. LoRa transceiver module 3 is responsible for sending downlink data to LoRaWAN terminal devices. LoRa transceiver module 3 notifies the main control MCU1 that data transmission is complete through DIO signal.
[0066] Backhaul Network 5: Backhaul Network 5 uses a WIFI module or a CAT1 module and is connected to the main control MCU1; it can use an AP6212 WiFi module, an ESP32 WiFi module or an L610 CAT1 module, depending on the on-site network conditions;
[0067] This embodiment implements a high-performance LoRaWAN gateway communication mechanism based on MCU with multi-channel, multi-rate, full-duplex operation. It fully supports standard LoRaWAN networks and has advantages such as simplified design, small size, low cost, low power consumption, and high reliability.
[0068] The communication interface between LoRa transceiver module 3 and main control MCU1 is SPI4; the communication interface between LoRa gateway chip module 4 and main control MCU1 is SPI2.
[0069] The communication interface between the backhaul network 5 and the main control MCU 1 is SPI, SDIO, or UART. The backhaul network 1 uses a low-cost WiFi module (AP6212 / ESP32) or CAT1 module (L610) to access the public network and interacts with the LoRaWAN server via the GWMP-UDP protocol. When the backhaul network 5 uses an AP6212 WiFi module, it communicates with the MCU through the SDIO interface to provide WiFi communication services; when the backhaul network 5 uses an ESP32 WiFi module or an L610 CAT1 module, it communicates with the MCU through a serial port interface to provide WiFi communication services or cellular network communication services.
[0070] A communication method for a multi-channel full-duplex LoRaWAN gateway based on an MCU, applicable to the aforementioned multi-channel full-duplex LoRaWAN gateway based on an MCU, such as... Figure 2 As shown, it includes the following steps:
[0071] Step S1: System initialization, control the return network connection to the public network;
[0072] Step S2: Start the gateway uplink data processing lgw_thread_up thread. The gateway receives and processes LoRaWAN terminal device data in real time and forwards it to the LoRaWAN server. After receiving LoRaWAN terminal device data, the gateway converts it into JSON data packets according to the GWMP protocol and forwards it to the LoRaWAN server through the backhaul network.
[0073] Step S3: Start the gateway downlink data processing lgw_thread_dn thread. The gateway receives and processes data from the LoRaWAN server in real time and forwards it to the LoRaWAN terminal device. After receiving the data from the LoRaWAN server, the gateway extracts valid downlink data and other information according to the GWMP protocol and sends it to the LoRaWAN terminal device through the LoRa transceiver module SX126x.
[0074] The specific process of step S1 includes the following steps:
[0075] Step S11: After power-on, initialize the LoRa transceiver module, LoRa gateway chip module, and backhaul network;
[0076] Step S12: Control the LoRa gateway chip module to operate in multi-rate multi-channel mode, receiving over-the-air LoRa data packets in real time for LoRaWAN uplink data reception. Multi-rate multi-channel mode refers to support for SF7, SF8, SF9, SF10, SF11, and SF12BW125 chipsets, providing eight communication channels.
[0077] The specific process of step S2 is as follows: Figure 3 As shown, it includes the following steps:
[0078] Step S21: Start the MCU 32-bit timer, set tick = 1us, and operate in 32-bit continuous mode;
[0079] Step S22: The lgw_thread_up thread periodically polls to check if there are LoRa data packets in the data rxq queue received by the LoRa gateway chip module;
[0080] Step S23: If yes, extract the LoRa data packet from the rxq queue and delete the data from the rxq queue;
[0081] Step S24: The gateway further parses the LoRa data packets and converts them into JOSN data packets according to the GWMP protocol;
[0082] Step S25: Send the JOSN data packet to the LoRaWAN server via the backhaul network and sock_send.
[0083] According to Class A communication requirements, the LoRaWAN server will add the RX1DELAY time (default value is 1s, maximum is 15s) to the uplink timestamp t1 of each uplink JOSN data packet to obtain the downlink timestamp value t2, that is, t2 = t1 + 1000000.
[0084] In step S23, the header information of the LoRa data packet includes the uplink communication frequency freq, rate dr, bw, data packet length, rssi, snr, and uplink timestamp t1.
[0085] The specific process of step S3 is as follows: Figure 4 As shown in (a), the steps include:
[0086] Step A1: The lgw_thread_dn thread periodically polls through sock_recv. If it receives a JOSN data packet from the LoRaWAN server, it parses it according to the GWMP protocol and verifies the validity of the JOSN data packet.
[0087] Step A2: If the JOSN data packet is valid, determine in turn whether the downlink timestamp t2 of the JOSN data packet is too late, too early, or overlaps with the time of the data packet to be sent down.
[0088] Step A3: If all are no, convert the JOSN data packet into local downlink data (downlink data packet) according to the GWMP protocol and store it in the txq queue.
[0089] The specific process of step S3 is as follows: Figure 4 As shown in (b), the following steps are also included:
[0090] Step B1: Check if there are downlink data packets in the txq queue;
[0091] Step B2: If so, sort all downlink data packets in ascending order according to downlink timestamp t2;
[0092] Step B3: If the difference between the current system time and the t2 of the downlink data packet with the smallest downlink timestamp t2 is less than the downlink delay value, extract the downlink data packet from the txq queue and then start the sending operation.
[0093] The specific process of step B3 includes the following steps:
[0094] Step B301: Extract the valid downlink data packet from the txq queue and delete the data from the txq queue;
[0095] Step B302: Obtain the header information of the downlink data packet, including the downlink timestamp t2 and radio frequency communication parameters (including frequency freq, rate dr, encoding cr, bandwidth bw, data packet content, and data packet length size);
[0096] Step B303: Write the radio frequency communication parameters and the downlink data packets to be sent into the registers of the LoRa transceiver module in advance;
[0097] Step B304: Read the current timer value t_now of the LoRa gateway chip module and calculate the time overhead t_calib for reading the register of the LoRa gateway chip module;
[0098] Step B305: Calculate the time difference from this moment until the start of sending downlink data packets, diff = t2 - (t_now + t_calib);
[0099] Step B306: Set diff to signed int32_t, and use the automatic wrap-around of the signed number to determine whether the LoRa gateway chip module timer wraps around;
[0100] Step B307: If not, read the current timer value t_cnt_now of the MCU;
[0101] Step B308: Calculate the new downlink timestamp t3 = t_cnt_now + diff;
[0102] Step B309: Write the new downlink timestamp t3 into the MCU 32-bit timer's compare register CCM and start the compare timer interrupt;
[0103] Step B310: After the timer's compare register CCM interrupt is triggered, execute the send command to immediately send downlink LoRa data packets to the LoRaWAN terminal device.
[0104] Example 2:
[0105] like Figure 5 As shown, this application can also use a LoRa SoC as the main control MCU, which can save the need for a LoRa transceiver module SX126x.
[0106] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A communication method of an MCU-based multi-channel full-duplex LoRaWAN gateway, characterized in that, The method comprises the following steps: Step S1: system initialization, control backhaul network connection public network; Step S2: start gateway uplink data processing lgw_thread_up thread, gateway real-time receiving and processing LoRaWAN terminal device data, forwarding to LoRaWAN server; Step S3: start gateway downlink data processing lgw_thread_dn thread, gateway real-time receiving and processing LoRaWAN server data, forwarding to LoRaWAN terminal device; comprising: If a JOSN data packet issued by the LoRaWAN server is received, the JOSN data packet is converted into a local downlink data packet, and stored in the txq queue; All downlink data packets are arranged in ascending order according to downlink timestamp t2; If the difference between the t2 of the downlink data packet with the smallest t2 and the current system time is less than the downlink delay value, the downlink data packet is extracted from the txq queue, and the sending operation is started. 2.The communication method of the MCU-based multi-channel full-duplex LoRaWAN gateway according to claim 1, wherein, The specific process of the step S1 comprises the following steps: Step S11: after power-on, initialize the LoRa transceiver module, the LoRa gateway chip module and the backhaul network; Step S12: control the LoRa gateway chip module to work in a multi-rate multi-channel mode, and real-time receive air interface LoRa data packet for LoRaWAN uplink data reception.
3. The communication method of claim 1 or 2, wherein, The specific process of the step S2 comprises the following steps: Step S21: start the MCU 32-bit timer, set tick=1us, and work in 32-bit continuous mode; Step S22: lgw_thread_up thread timing polling, query whether the data rxq queue received by the LoRa gateway chip module has a LoRa data packet; Step S23: if yes, extract the LoRa data packet of the rxq queue, and delete the data from the rxq queue; Step S24: the gateway further analyzes the LoRa data packet and converts the LoRa data packet into a JOSN data packet according to the GWMP protocol; Step S25: send the JOSN data packet to the LoRaWAN server through the backhaul network and sock_send.
4. The communication method of claim 3, wherein, The header information of the LoRa data packet in step S23 comprises uplink communication frequency point freq, rate dr, bw, data packet length, rssi, snr and uplink timestamp t1.
5. The communication method of claim 1 or 2, wherein, The specific process of the step S3 comprises the following steps: Step A1: lgw_thread_dn thread periodic polling, if a JOSN data packet issued by the LoRaWAN server is received, the JOSN data packet is parsed according to the GWMP protocol, and the validity of the JOSN data packet is verified; Step A2: if the JOSN data packet is valid, whether the downlink timestamp t2 of the JOSN data packet is too late, too early or overlaps with the to-be-downlink data packet time is judged in turn; Step A3: if all are no, the JOSN data packet is converted into a local downlink data according to the GWMP protocol, and stored in the txq queue.
6. The communication method of claim 5, wherein, The specific process of the step S3 further comprises the following steps: Step B1: detect whether there is a downlink data packet in the txq queue; Step B2: If yes, arrange all downlink data packets in ascending order of downlink timestamp t2; Step B3: If the difference between the t2 of the downlink data packet with the smallest t2 and the current system time is less than the downlink delay value, extract the downlink data packet from the txq queue, and then start the sending operation.
7. The communication method of claim 6, wherein, The specific process of step B3 includes the following steps: Step B301: Extract the valid downlink data packet from the txq queue, and delete the data from the txq queue; Step B302: Obtain the packet header information of the downlink data packet, including the downlink timestamp t2 and the radio frequency communication parameters; Step B303: Write the radio frequency communication parameters and the to-be-downlink data packet into the register of the LoRa transceiver module in advance; Step B304: Read the current timer value t_now of the LoRa gateway chip module, and calculate the time overhead t_calib of reading the register of the LoRa gateway chip module; Step B305: Calculate the time difference diff = t2 - (t_now+t_calib) from this moment to the start of sending the downlink data packet; Step B306: Set diff as signed int32_t, and judge whether the timer of the LoRa gateway chip module is wrapped around through the automatic wrap-around of signed numbers; Step B307: If no, read the current timer value t_cnt_now of the MCU; Step B308: Calculate the new downlink timestamp t3 = t_cnt_now + diff; Step B309: Write the new downlink timestamp t3 into the comparison register CCM of the 32-bit timer of the MCU, and start the comparison timer interrupt; Step B310: After the comparison register CCM interrupt of the timer is triggered, execute the sending command, and immediately send the downlink LoRa data packet to the LoRaWAN terminal device.
8. A MCU-based multi-channel full-duplex LoRaWAN gateway, adapted to a communication method of a MCU-based multi-channel full-duplex LoRaWAN gateway according to any one of claims 1-7, characterized in that, It includes: The main control MCU is connected with a power management module, an SD circuit and a Jlink SWD debugging interface; The LoRa radio frequency front end includes a LoRa transceiver module and a LoRa gateway chip module, and the LoRa radio frequency front end is connected with the main control MCU; The backhaul network adopts a WIFI module or a CAT1 module, and the backhaul network is connected with the main control MCU.
9. The MCU-based multi-channel full-duplex LoRaWAN gateway of claim 8, wherein, The communication interface between the LoRa transceiver module and the main control MCU is SPI4, and the communication interface between the LoRa gateway chip module and the main control MCU is SPI2.
10. The MCU-based multi-channel full-duplex LoRaWAN gateway of claim 8 or 9, wherein, The communication interface between the backhaul network and the main control MCU is SPI, SDIO or UART.
Citation Information
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