Power supply device, power supply unit, test device

Abstract

The present application provides a power supply device, a power supply unit, and a test device. The power supply device (100) includes a plurality of power supply units (200) connected in series. Each of the power supply units (200) includes an output stage (210) that generates an output voltage (Vi) corresponding to a control signal (Vctrl) between a positive output (OUTP) and a negative output (OUTN). A current detector (250) of a main channel generates a current detection signal (Is) representing an output current of the output stage (210). A feedback controller (240) generates the control signal (Vctrl) so that the current detection signal (Is) approaches a target value (Iref).

Description

Technical Field

[0001] This disclosure relates to a power supply device for supplying power supply voltage or power supply current to a device. Background Technology

[0002] In recent years, research and development of power devices such as SiC (silicon carbide) FETs (Field-Effect Transistors) and GaN (gallium nitride) HEMTs (High Electron Mobility Transistors), which achieve high-efficiency power conversion through high-speed switching of high voltages with the aim of energy saving, has been booming. Along with this, the need for high-voltage device testing has increased, and the requirement for shorter testing times has become stronger. These device tests require the application of high voltages of 1000V, and sometimes 2000V depending on the device, and also require high-precision DC voltages.

[0003] When the maximum output voltage of the power supply unit used in the test setup is insufficient to supply the high voltage to the load, it is necessary to connect multiple power supply units (hereinafter referred to as power supply units) in series (hereinafter referred to as stacked connection).

[0004] Prior art literature

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2013-138557

[0007] Patent Document 2: Japanese Patent Publication No. 2013-535949 Summary of the Invention

[0008] The problem that the invention aims to solve

[0009] Figure 1 This is a block diagram of a 100R high-voltage power supply. (Refer to...) Figure 1 The high-voltage power supply 100R comprises multiple power supply units 110_1 to 110_N with stacked channels CH1 to CHN. Each channel's power supply unit 110 has a primary side P and a secondary side S, which are insulated from each other by an isolation barrier 112, such as a transformer or capacitor. The grounding terminal GND of the primary side P of the multiple power supply units 110_1 to 110_N is connected to each other.

[0010] A positive output OUTP and a negative output OUTN are provided on the secondary side S of the power supply unit 110, and an output stage 120 is provided between the positive output OUTP and the negative output OUTN.

[0011] Typically, a power supply device can switch between a constant voltage application mode (constant voltage mode) that supplies a constant voltage to the load and a constant current application mode (constant current mode) that supplies a constant current to the load. For example... Figure 1 Therefore, consider the case where a high-voltage power supply 100R, which has multiple stacked power supply units 110, operates in current application mode. Here, for ease of explanation, assume that the power supply units 110_1 and 110_2 are stacked in N=2 stages.

[0012] (Comparative Technique 1)

[0013] In Comparative Technique 1, all stacked power supply units 110_1 and 110_2 are operated in a current application mode where the target value (set value) Iref is equal. In this case, the same current Iref flows to all channels, and ideally, the same current amount is detected in all channels. However, in reality, due to detection errors, currents Iref+ΔI1 and Iref+ΔI2 deviating from the target value Iref may be detected in each power supply unit 110_1 and 110_2. In this case, the current I supplied from the high-voltage power supply 100R to the load... OUT become

[0014] I OUT =Iref-(ΔI1+ΔI2) / 2.

[0015] That is, the output current I OUT The current is obtained by subtracting the average of the detection errors ΔI1 and ΔI2 of each channel from the target value Iref.

[0016] Figure 2 (a) is a graph showing the voltage waveform of the high-voltage power supply during startup of Comparison Technique 1. Under the influence of current detection errors ΔI1 and ΔI2, the state of the power supply unit of each channel converges to any of the following states.

[0017] (1) The output voltage drops to the lower limit of the usable voltage (called the lower limit voltage).

[0018] (2) The output voltage rises to the upper limit of the usable voltage (called the upper limit voltage).

[0019] exist Figure 2 In (a), the voltage V1 of the first channel drops to the lower limit voltage, and the voltage V2 of the second channel rises to the upper limit voltage.

[0020] That is, although two power supply units are stacked to generate high voltage, a channel that operates using the lower limit voltage is also created, resulting in the inability to generate the desired high voltage. In other words, comparison technique 1 cannot be used in reality.

[0021] (Comparative Technique 2)

[0022] In Comparative Technique 2, one power supply unit of the plurality of power supply units 110 is operated in current application mode, while the remaining power supply units are operated in voltage application mode. Here, power supply unit 110_1 is operated in current application mode, and power supply unit 110_2 is operated in voltage application mode. Regarding the voltage setpoint (target value) Vref of power supply unit 110_2 in voltage application mode, a pre-conceived load voltage V is considered. OUTH And to stipulate appropriately.

[0023] Figure 2 (b) is a diagram showing the voltage waveform of the high-voltage power supply of Comparison Technology 2 during startup. First, the power supply unit 110_2 in voltage application mode starts up. After the output voltage V2 reaches the voltage set value Vref, the power supply unit 110_1 in current application mode starts to apply current.

[0024] In Comparative Technique 2, the voltage setting value Vref of the channel operating in voltage application mode needs to be set according to the load. For example, a higher voltage setting value Vref is required for high-voltage loads, but when changing to other low-voltage loads, it may cause problems such as applying overvoltage to the load. That is, the method of Comparative Technique 2 lacks versatility.

[0025] In addition, the voltage and current application channels need to operate sequentially, thus resulting in a two-stage settling process. This makes it impossible to obtain the same startup waveform as in the case of a single channel, and the settling time becomes longer.

[0026] One aspect of this disclosure is achieved under the aforementioned conditions, and one of its exemplary purposes is to provide a high-voltage power supply with improved stable operation.

[0027] Solution for solving the problem

[0028] One aspect of this disclosure is a power supply device. This power supply device comprises multiple channels of power supply units stacked together. Each channel of power supply unit has a positive output and a negative output; and an output stage that generates an output voltage corresponding to a control signal between the positive and negative outputs. The power supply unit of the main channel, one of the multiple channels, further comprises a current detector that generates a current detection signal representing the output current of the output stage; and a feedback controller that generates a control signal that causes the current detection signal to approach a target value. The output stages of all channels operate based on the control signal generated by the feedback controller of the main channel.

[0029] Another aspect of this disclosure is a power supply unit. Multiple power supply units can be stacked to form a power supply device. The power supply unit includes: a positive output and a negative output; an output stage that generates an output voltage corresponding to a control signal between the positive and negative outputs; a current detector that becomes active when set as a master channel and generates a current detection signal representing the output current of the output stage; a feedback controller that becomes active when set as a master channel and generates a control signal that makes the current detection signal approach a target value; and an interface circuit that sends control signals to other channels when set as a master channel and receives control signals from the master channel when set as a slave channel.

[0030] It should be noted that any combination of the above-mentioned constituent elements, the constituent elements of this disclosure, and the descriptions that are interchanged among methods, apparatuses, systems, etc., are also valid solutions of this invention.

[0031] Invention Effects

[0032] According to one of the solutions disclosed herein, stable operation can be improved when there are many stacking levels. Attached Figure Description

[0033] Figure 1 This is a block diagram of a high-voltage power supply.

[0034] Figure 2 (a) is a graph showing the voltage waveform of the high-voltage power supply of Comparison Technique 1 during startup. Figure 2 (b) is a diagram showing the voltage waveform of the high-voltage power supply of Comparison Technique 2 during startup.

[0035] Figure 3 This is a block diagram showing a test apparatus with a power supply device having an embodiment.

[0036] Figure 4 It is shown Figure 3 The diagram shows the voltage and current waveforms of the power supply device during startup.

[0037] Figure 5 This is a block diagram of the power supply device of Embodiment 1.

[0038] Figure 6 This is a block diagram of the power supply device in Embodiment 2.

[0039] Figure 7 This is a block diagram of the power supply unit in Embodiment 3.

[0040] Figure 8 (a) and (b) illustrate the master and slave modes. Figure 7 A diagram showing the state of the power supply unit.

[0041] Figure 9This is a block diagram showing a specific structural example of a power supply unit. Detailed Implementation

[0042] (Summary of the implementation method)

[0043] A summary of several exemplary embodiments of this disclosure is provided. This summary serves as a prelude to the detailed description that follows, and aims to provide a basic understanding of the embodiments, simplifying the explanation of several concepts of one or more embodiments without limiting the breadth of the invention or disclosure. Furthermore, this summary is not a comprehensive overview of all embodiments considered, nor does it limit the essential components of the embodiments. For convenience, "an embodiment" is sometimes used to refer to one or more embodiments (examples, variations) disclosed in this specification.

[0044] One embodiment of the power supply device includes multiple channels of power supply units stacked together. Each of the multiple channel power supply units has a positive output and a negative output, and an output stage that generates an output voltage corresponding to a control signal between the positive and negative outputs. The power supply unit of the main channel, one of the multiple channels, further includes: a current detector that generates a current detection signal representing the output current of the output stage; and a feedback controller that generates a control signal to make the current detection signal approach a target value. The output stages of all channels operate based on the control signal generated by the feedback controller of the main channel.

[0045] According to this structure, current measurement is performed only in the master channel, which is one of multiple channels, for feedback control of current application. Furthermore, by sending the control signal obtained in the master channel to the other slave channels, the same operation as a single-channel power supply can be achieved, thus improving stable operation.

[0046] In one embodiment, each of the multiple channel power supply units may further include a voltage detector that generates a voltage detection signal representing the output voltage of the output stage. Alternatively, the main channel power supply unit may further include a voltage feedback signal generation unit that receives voltage detection signals from the power supply units of the remaining channels (which are also multiple channels) and generates a voltage feedback signal based on the voltage detection signals of all channels. Alternatively, the main channel feedback controller may generate a control signal when the voltage feedback signal exceeds a predetermined limit value, causing the voltage feedback signal to approach the limit value. This enables voltage clamping, ensuring that the total voltage of all channels does not exceed a predetermined upper limit.

[0047] The voltage feedback signal can also be the average value of the voltage detection signals of all channels.

[0048] In one embodiment, the power supply unit of the main channel may also include a voltage detector that generates a voltage detection signal representing the output voltage of the output stage. Alternatively, the feedback controller may generate a control signal to bring the voltage detection signal closer to the limit value when the voltage detection signal exceeds a predetermined limit value. In this case, voltage clamping operations for all channels can be implemented based on the state of the main channel.

[0049] In one embodiment, the power supply units of multiple channels may each have a feedback controller and a current detector, and may be configured identically. Alternatively, each power supply unit may be able to select a master mode and a slave mode; when set to master mode, the feedback controller is enabled, and when set to slave mode, the feedback controller is disabled. It should be noted that "disabling a circuit component" includes not only preventing the component from operating, but also including situations where, even if the component is operational, it is not used by cutting off or shielding its output.

[0050] By preparing multiple identical power supply units, rearranging their connections, and appropriately setting their modes, the number of loads can be varied. For example, with N power supply units, if N are stacked and one is set to master mode while the rest are set to slave mode, power can be supplied to one load. Alternatively, if all N are set to master mode and used independently, power can be supplied to N loads.

[0051] The main channel can also be located at the top of multiple channels.

[0052] One embodiment of the power supply unit can be stacked in multiples to form a power supply device. The power supply unit includes: a positive output and a negative output; an output stage that generates an output voltage corresponding to a control signal between the positive output and the negative output; a current detector that becomes active when set as a master channel and generates a current detection signal representing the output current of the output stage; a feedback controller that becomes active when set as a master channel and generates a control signal to make the current detection signal approach a target value; and an interface circuit that sends control signals to other channels when set as a master channel and receives control signals from the master channel when set as a slave channel.

[0053] According to this structure, even when multiple channels are stacked, current measurement is performed only in the main channel for feedback control of current application. Furthermore, by sending the control signal obtained in the main channel to the other slave channels, the same operation as a single-channel power supply can be achieved, improving stable operation. Additionally, by preparing multiple identical power supply units, reconfiguring the connections, and appropriately setting the mode, the number of loads can be varied.

[0054] In one embodiment, a voltage detector may also be included, which generates a voltage detection signal representing the output voltage of the output stage. Alternatively, when the main channel is set, the feedback controller generates a control signal to bring the voltage detection signal closer to the limit value when the voltage detection signal exceeds a predetermined limit value.

[0055] In one embodiment, multiple power supply units can be stacked and connected to form a power supply device.

[0056] (Implementation Method)

[0057] The present disclosure will now be described with reference to the accompanying drawings and based on embodiments. Identical or equivalent constituent elements, components, and processes shown in the figures are labeled with the same reference numerals, and repeated descriptions are omitted where appropriate. Furthermore, the embodiments are not limiting of the invention, but merely illustrative; all features and combinations thereof described in the embodiments are not necessarily essential features of the invention.

[0058] In this specification, "the state of connection between component A and component B" includes not only the case where component A and component B are physically directly connected, but also the case where component A and component B are indirectly connected through other components that do not substantially affect their electrical connection state or impair the function or effect achieved by their combination.

[0059] Similarly, "the state in which component C is positioned between component A and component B" includes not only the case where component A and component C or component B and component C are directly connected, but also the case where they are indirectly connected via other components that do not substantially affect their electrical connection state or impair the function or effect achieved through their combination.

[0060] Figure 3 This is a block diagram showing the test apparatus 2 of the power supply device 100 according to the embodiment. The test apparatus 2 applies test signals such as voltage signals and current signals to the DUT (Device Under Test) 1 and measures the response of the DUT 1. There is no particular limitation on the type of DUT 1, but devices that require voltage application of high voltages exceeding 1000V, such as high-voltage power transistors and power modules, or circuits or circuit systems including such devices are suitable as test objects of this test apparatus 2.

[0061] The test apparatus 2 includes a power supply device 100 that supplies a power signal to the DUT1. In this embodiment, the power signal is a current signal I that has been stabilized to a specified current quantity (target quantity). OUT It should be noted that, in Figure 3 In the middle, a current signal I is directly supplied to DUT1. OUT However, it is not limited to this; the current signal I OUTIt can also be supplied to the peripheral circuits of DUT1, the circuits that drive DUT1, or the circuits that interface with DUT1.

[0062] In addition to the power supply unit 100, the test apparatus 2 may also include voltage sensors, current sensors, signal generators, drivers, comparators, A / D converters, D / A converters, etc., but these will correspond to the type and test items of the DUT1. Figure 3 Omitted in .

[0063] The power supply unit 100 includes multiple N-channel (CH1 to CHN) power supply units 200_1 to 200_N that are stacked and connected together. Each power supply unit 200 has a positive output OUTP and a negative output OUTN. The power supply units 200 and... Figure 1 The power supply unit 110 also has an insulated primary side and a secondary side, but Figure 3 Only the secondary side structure is shown. The negative output OUTN becomes the reference potential (ground) of the secondary side.

[0064] The negative output OUTN of the power supply unit 110_i of the i-th (1≦i≦N-1) channel is connected to the positive output OUTP of the power supply unit 110_(i+1) of the (i+1)-th channel. The positive output OUTP of the power supply unit 110_1 of the first channel is connected to load 1, and the negative output OUTN of the power supply unit 110 of the N-th channel is grounded.

[0065] Each of the multiple channel power supply units 200 has an output stage 210. The output stage 210 of the i-th (i = 1 to N) power supply unit 200 generates an output voltage V between the positive output OUTP and the negative output OUTN according to the control signal Vctrl. i .

[0066] In this embodiment, one of the multiple N channels CH1 to CHN is designated as the master channel, and the remaining channels are designated as slave channels. However, this is not the only embodiment. Figure 3 In the diagram, the first channel CH1 is the main channel, and the second to Nth channels CH2 to CHN are the slave channels.

[0067] In addition to the output stage 210, the main channel power supply unit 200-1 also has a current detector 250 and a feedback controller 240.

[0068] Current detector 250 generates an output current I representing output stage 210. OUT The current detection signal Is1 is used as a feedback signal Ifb and is input to the feedback controller 240.

[0069] Input output current I to feedback controller 240 OUTThe target value is Iref. The feedback controller 240 performs feedback control on the signal level (magnitude) of the control signal Vctrl, so that the feedback signal Ifb approaches the target value Iref. The control signal Vctrl generated by the feedback controller 240 is supplied to the output stage 210 of the main channel.

[0070] The master channel and the slave channel can transmit and receive signals. Specifically, the master channel power supply unit 200_1 can send control signal Vctrl to the slave channel power supply units 200_2 to 200_N.

[0071] The output stage 210 from channels CH2 to CHN operates based on the control signal Vctrl generated by the feedback controller 240 of the main channel CH1.

[0072] The above describes the structure of the power supply unit 100.

[0073] Figure 4 It is shown Figure 3 The diagram shows the voltage and current waveforms of the power supply device 100 during startup. Here, the structure of the N=2 channel is explained. For comparison, the waveforms of comparison technique 2 are represented by a single-dotted line.

[0074] As shown by the solid line, according to this embodiment, current measurement is performed only in the main channel, which is one of multiple channels, and feedback control for current application is performed. Furthermore, by sending the control signal Vctrl obtained in the main channel to the other slave channels, the same operation as a single-channel power supply device can be achieved, thus improving stable operation compared to comparative technology 2.

[0075] This disclosure serves as Figure 3 The block diagrams and circuit diagrams are understood, or relate to various devices and methods derived from the above description, and are not limited to a specific structure. Hereinafter, more specific structural examples and embodiments are described to aid in understanding the nature and operation of the invention and to make them clear, rather than to narrow the scope of the invention.

[0076] (Example 1)

[0077] Figure 5 This is a block diagram of the power supply device 100 of Embodiment 1. The power supply device 100 has a voltage clamping function. The power supply units 200_1 to 200_N with multiple channels each also include a voltage detector 220. The voltage detector 220 of a certain channel CHi generates an output voltage V representing the output stage 210 of the same channel CHi. i Voltage detection signal Vs i The voltage detection signals Vs2 to Vs generated from channels CH2 to CHN. N It is sent to the main channel.

[0078] The power supply unit 200_1 of the main channel CH1 includes a voltage feedback signal generation unit 230. The voltage feedback signal generation unit 230 receives voltage detection signals Vs2 to Vs from the power supply units 200_2 to 200_N of the slave channels. N Generate voltage detection signals Vs1 to Vs based on all channels CH1 to CHN. N The voltage feedback signal Vfb is supplied to the feedback controller 240. For example, the voltage feedback signal Vfb is a simple average of the voltage detection signals of all channels, and is expressed by the following formula.

[0079] Vfb=Σ i＝1～N V i / N…(1)

[0080] When the voltage feedback signal Vfb is lower than the predetermined limit value Vlim, the feedback controller 240 of the main channel CH1 generates a control signal Vctrl, as described above, to make the current feedback signal Ifb approach the target value Iref (constant current control). On the other hand, when the voltage feedback signal Vfb exceeds the limit value Vlim, the constant current control becomes ineffective, and the control signal Vctrl is generated to make the voltage feedback signal Vfb approach the limit value Vlim (voltage clamping control).

[0081] In equation (1), Σ i＝1～N V i The generation voltages V1 to V of all channels CH1 to CHN N The total voltage, i.e., the high voltage V supplied to the load. OUTH Therefore, the voltage feedback signal Vfb in equation (1) represents Vfb = V OUTH / N. When the voltage clamp becomes active, the voltage feedback signal Vfb is equal to the limit value Vlim.

[0082] Vfb=V OUTH / N=Vlim

[0083] Therefore, it is possible to use the output voltage V of the power supply device 100 OUTH Clamping is performed in a manner not exceeding Vlim×N.

[0084] It should be noted that when there are deviations in the power supply units 200_1 to 200_N of multiple channels, a weighted average can be taken by using a coefficient that takes into account the deviation.

[0085] (Example 2)

[0086] Figure 6This is a block diagram of the power supply device 100 of Embodiment 2. This power supply device 100, like that of Embodiment 1, has a voltage clamping function. A voltage detector 220 is provided in the power supply unit 200_1 of the main channel. When the voltage detection signal Vs1 generated by the voltage detector 220 is lower than a predetermined limit value Vlim, the feedback controller 240 generates a control signal Vctrl, as described above, causing the current feedback signal Ifb to approach the target value Iref (constant current control). On the other hand, when the voltage detection signal Vs1 exceeds the limit value Vlim, constant current control becomes ineffective, and the control signal Vctrl is generated, causing the voltage detection signal Vs1 to approach the limit value Vlim (voltage clamping control).

[0087] If the gain deviation of the output stage 210 of all channels can be ignored, the output voltage V1~V of the output stage 210 of all channels is... N They are equal, therefore, the output voltage V OUTH It can be approximated as V1×N. When the voltage clamp becomes effective, the voltage V1 is equal to the limit value Vlim, therefore, the output voltage V can be... OUTH Clamping is performed in a manner not exceeding Vlim×N. Example 2 can also be used when the required accuracy is not currently demanded in voltage clamping control.

[0088] (Example 3)

[0089] The power supply unit 200_1 of the main channel and the power supply units 200_2 to 200_N of the slave channel can be designed with different structures from the beginning, but as explained below, they can also be configured with the same structure to switch between the mode of operating as the main channel and the mode of operating as the slave channel.

[0090] Figure 7 This is a block diagram of the power supply unit 200 of Embodiment 3. The power supply unit 200 can be used as both a main channel and a slave channel. In addition to an output stage 210, a voltage detector 220, a voltage feedback signal generator 230, a feedback controller 240, and a current detector 250, the power supply unit 200 also includes a mode selector 260 and a multiplexer (switch) 270.

[0091] The mode selector 260 generates a mode control signal MODE, which indicates the master mode when used as the master channel and the slave mode when used as the slave channel. The mode control signal MODE is input to the enable terminals of the voltage feedback signal generator 230, the feedback controller 240, and the current detector 250. These components are enabled when the mode control signal MODE indicates the master mode and disabled when it indicates the slave mode.

[0092] The output of the feedback controller 240 within the same power supply unit 200 is connected to one input node of the multiplexer 270. Additionally, a control signal Vctrl generated in another power supply unit 200 can be input to another input node of the multiplexer 270. When the mode control signal MODE indicates master mode, the multiplexer 270 selects the control signal (internal control signal) Vctrl_int from the same power supply unit 200; when indicating slave mode, it selects the external control signal Vctrl_ext generated by another power supply unit 200.

[0093] In addition, the power supply unit 200 can process the control signal Vctrl_int and the voltage detection signal Vs generated internally. i Output to the outside. Additionally, the power supply unit 200 can receive externally generated control signal Vctrl_ext and voltage detection signal Vs. i .

[0094] Figure 8 (a) and (b) illustrate the master and slave modes. Figure 7 A diagram showing the state of the power supply unit 200. Figure 8 In (a) and (b), components and signal lines that are disabled are indicated by a single-dot dash.

[0095] Figure 9 This is a block diagram illustrating a specific structural example of the power supply unit 200. The control system of this power supply unit 200 is installed with a digital circuit architecture, and the detection signals and control signals are digital signals.

[0096] Output stage 210 includes a D / A converter 212 and a power amplifier 214. Output stage 210 converts the input digital control signal Vctrl into an analog control signal. Power amplifier 214 amplifies the analog control signal and outputs it to the positive output OUTP.

[0097] The voltage detector 220 includes a voltage sensing amplifier 222 and an A / D converter 224. The voltage sensing amplifier 222 converts the voltage V between the two outputs OUTPT and OUTN into voltage. i Amplification. The A / D converter 224 converts the output of the sensing amplifier 222 into a digital voltage detection signal Vs. i It can share the voltage detection signal Vs with other channels via interface circuit 280. i .

[0098] The voltage feedback signal generation unit 230 includes an adder / subtractor 232 and a divider 234. The adder / subtractor 232 converts the voltage detection signals Vs of the same channel and other channels. iThe divider 234 divides the output of the adder / subtractor 232 by the number of channels N to generate a voltage feedback signal Vfb based on the average value. The divider 234 can also be understood as a coefficient circuit that multiplies the output of the adder / subtractor 232 by a coefficient of 1 / N.

[0099] The current detector 250 includes a sensing resistor 252, a sensing amplifier 254, and an A / D converter 256. The sensing resistor 252 is set to the output current I of the output stage 210. OUT On the path. In the sensing resistor 252, the output current I is generated. OUT A proportional voltage drop. Sensing amplifier 254 amplifies the voltage drop across sensing resistor 252. A / D converter 256 converts the output of sensing amplifier 254 into a digital current detection signal Is. i The target current value Iref and the limit voltage value Vlim are input to the feedback controller 240.

[0100] Adder / subtractor 242 generates the difference (voltage error Verr) between the limit value Vlim and the voltage feedback signal Vfb. Adder / subtractor 246 generates the target value Iref and the current detection signal Is. i The difference (current error Ierr) of (Ifb).

[0101] When Vfb < Vlim, selector 248 selects the current error Ierr (constant current control) and when Vfb > Vlim, selects the voltage error Verr (voltage clamping control).

[0102] Filter 244 generates a control signal Vctrl based on the output of selector 248. However, filter 244 can be constructed from a PI (proportional-integral) controller, a PID (proportional-integral-derivative) controller, or similar components. In constant current control, the level of the control signal Vctrl is adjusted through feedback to bring the current error Ierr close to zero. In voltage clamping control, the level of the control signal Vctrl is adjusted through feedback to bring the voltage error Verr close to zero. The parameters of filter 244 can also be switched between constant voltage control and current clamping control.

[0103] The feedback controller 240 and the voltage feedback signal generation unit 230 can be composed of a CPU (Central Processing Unit), a DSP (Digital Signal Processor), or an FPGA (Field Programmable Gate Array).

[0104] The interface circuit 280 is capable of sending and receiving voltage detection signals and control signals Vctrl between the interface circuits 280 of other channels.

[0105] The present disclosure has been described above based on embodiments. These embodiments are illustrative, and various modifications can exist in their constituent elements, processing procedures, and combinations thereof. Such modifications will be described below.

[0106] exist Figure 9 The description focuses on the power supply unit 200, which is installed with a digital circuit architecture for its control system. However, it is not limited to this and the control system can also be constructed with analog circuits.

[0107] This disclosure has been described based on embodiments, but the embodiments merely illustrate the principles and applications of the invention. Many modifications and configuration changes to the embodiments are permitted without departing from the spirit of the invention as defined in the claims.

[0108] Industrial utilization

[0109] This disclosure relates to power supply devices.

[0110] Explanation of reference numerals in the attached figures

[0111] 1…DUT, 2…Test apparatus, 100…Power supply unit, 200…Power supply unit, 210…Output stage, 220…Voltage detector, 230…Voltage feedback signal generator, 240…Feedback controller, 250…Current detector, 260…Mode selector, 270…Multiplexer, 280…Interface circuit.

Claims

1. A power supply device, characterized in that, The power supply device has multiple channels of power supply units that are stacked and connected together. The power supply units of the multiple channels each have: Positive and negative outputs; and The output stage generates an output voltage corresponding to the control signal between the positive output and the negative output. The power supply unit for the main channel, which is one of the multiple channels, also includes: A current detector that generates a current detection signal representing the output current of the output stage; as well as A feedback controller generates the control signal, causing the current detection signal to approach the target value. The output stages of the multiple channels operate solely based on the control signals generated by the feedback controller of the main channel.

2. The power supply device according to claim 1, characterized in that, Each of the multiple channel power supply units also includes a voltage detector, which generates a voltage detection signal representing the output voltage of the output stage. The power supply unit of the main channel also includes a voltage feedback signal generation unit, which receives the voltage detection signal from the power supply unit of the slave channel, which is the remaining channel of the plurality of channels, and generates a voltage feedback signal based on the voltage detection signals of all channels. When the voltage feedback signal exceeds a predetermined limit value, the feedback controller of the main channel generates the control signal so that the voltage feedback signal approaches the limit value.

3. The power supply device according to claim 1, characterized in that, The power supply unit of the main channel also includes a voltage detector that generates a voltage detection signal representing the output voltage of the output stage. When the voltage detection signal exceeds a predetermined limit value, the feedback controller generates the control signal so that the voltage detection signal approaches the limit value.

4. The power supply device according to any one of claims 1 to 3, characterized in that, The power supply units of the multiple channels include the feedback controller and the current detector, and are configured similarly. Each power supply unit can select a master mode and a slave mode. When set to the master mode, the feedback controller is enabled, and when set to the slave mode, the feedback controller is disabled.

5. The power supply device according to any one of claims 1 to 3, characterized in that, The main channel is located at the top level among the multiple channels.

6. A power supply unit, multiple of which can be stacked to form a power supply device, characterized in that, The power supply unit includes: Positive and negative outputs; The output stage generates an output voltage corresponding to the control signal between the positive output and the negative output; A current detector, which becomes active when set as the master channel, generates a current detection signal representing the output current of the output stage, and becomes inactive when set as the slave channel; The feedback controller is active when set as the master channel, generating the control signal to make the current detection signal approach the target value, and is inactive when set as the slave channel; as well as The interface circuit, when set as the master channel, sends the control signal to other channels, and when set as a slave channel, receives the control signal from the master channel. When the output stage is set as the master channel, it generates the output voltage based solely on the control signal generated by the feedback controller of the same master channel. When the output stage is set as the slave channel, it generates the output voltage based solely on the control signal received by the interface circuit.

7. The power supply unit according to claim 6, characterized in that, The power supply unit also includes a voltage detector that generates a voltage detection signal representing the output voltage of the output stage. When set as the main channel, the feedback controller generates the control signal when the voltage feedback signal based on the voltage detection signals of all channels exceeds a predetermined limit value, so that the voltage feedback signal approaches the limit value.

8. The power supply unit according to claim 6, characterized in that, The power supply unit also includes a voltage detector that generates a voltage detection signal representing the output voltage of the output stage. When the main channel is set, the feedback controller generates the control signal when the voltage detection signal exceeds the specified limit value, so that the voltage detection signal approaches the limit value.

9. A power supply device, characterized in that, The power supply device is constructed by stacking and connecting multiple power supply units as described in any one of claims 6 to 8.

10. A testing apparatus, characterized in that, The test apparatus includes a power supply device according to any one of claims 1 to 3, 6 to 8, which supplies power to the device under test.

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