Data storage system, data storage method and electronic device

Abstract

This specification discloses a data storage system, a data storage method, and an electronic device. The data storage system includes: a data cache module, a data processing module, and a persistent memory, wherein the persistent memory includes a first storage area and a second storage area, the data cache module includes: a mapping data cache and a counter cache, the mapping data cache is used to temporarily store at least part of the mapping data, and when the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written to the persistent memory, the data processing module is used to obtain target counter data and target mapping data, encrypt or decrypt memory data according to the target counter data, and obtain data ciphertext required for a persistent memory read request from the persistent memory according to the mapping data, or store the data ciphertext included in the persistent memory write request in a specified location in the persistent memory.

Description

Technical Field

[0001] This specification relates to the field of computer technology, and in particular to a data storage system, a data storage method, and an electronic device. Background Art

[0002] With the explosive growth of data computing scale, the demand for memory capacity during data computing is also increasing. Especially in the process of computing graph data, there is usually a large amount of graph data that needs to be updated, which increases the overhead of graph data persistence.

[0003] Existing studies have used checkpoint strategies to maintain crash consistency of persistent data. The system periodically publishes a checkpoint, which contains the modified data (dirty data) in the current memory, the modified cache data, and the processor status data. The system writes the checkpoint to the persistent device and sets a known normal point for the system, so that the system can recover the changes to the data and the processor status from this point during the recovery process after an unexpected shutdown or crash, thereby ensuring the consistency of persistent data.

[0004] However, in the process of reading and writing data, each time a read or write request is received, a mapping data indicating the data location needs to be generated in the cache. As the amount of mapping data increases, a large amount of cache space is occupied, so the checkpoint data needs to be written to the target memory in advance before the checkpoint cycle ends. These redundant checkpoint submission operations will further increase the time required for the data calculation process.

[0005] Therefore, how to reduce the limitation of system cache space on mapping data is an urgent problem to be solved. Summary of the Invention

[0006] This specification provides a data storage system, a data storage method, and an electronic device to partially solve the above-mentioned problems existing in the prior art.

[0007] This manual adopts the following technical solutions:

[0008] This specification provides a data storage system, including: a data cache module, a data processing module and a persistent memory;

[0009] The persistent memory includes: a first storage area and a second storage area, wherein the first storage area and the second storage area are respectively used to store checkpoint data submitted at the end of the previous checkpoint cycle and working data modified in the current checkpoint cycle, wherein the checkpoint data is used for data recovery after the system is restarted;

[0010] The data cache module includes: a mapping data cache and a counter cache, wherein the mapping data cache is used to temporarily store at least part of the mapping data, and when the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written into the persistent memory, wherein the mapping data is used to determine the storage area of the checkpoint data and the working data in the persistent memory;

[0011] The counter buffer is used to temporarily store at least part of the counter data, and the value of the counter data increases as the target data is updated;

[0012] The data processing module is used to obtain target counter data corresponding to the write request of the persistent memory from the counter cache, and obtain target mapping data corresponding to the write request from the mapping data cache, encrypt the target data according to the target counter data to obtain encrypted data, and store the encrypted data in the storage area corresponding to the working data according to the mapping data, wherein each write request for target data corresponds to one target mapping data.

[0013] Optionally, the processing module is further configured to, if the target mapping data is not stored in the mapping data cache, obtain the target mapping data from the persistent memory;

[0014] After obtaining the write request, determine whether the checkpoint cycle number corresponding to the target mapping data obtained from the persistent memory is less than the current checkpoint cycle number; if so, store the encrypted data in the storage area corresponding to the checkpoint data pointed to by the target mapping data, and use the working data as the checkpoint data; otherwise, when the checkpoint data and the working data pointed to by the mapping data are in the same storage area, store the encrypted data in another storage area; when the checkpoint data and the working data pointed to by the mapping data are in different storage areas, store the encrypted data in the storage area corresponding to the working data pointed to by the mapping data.

[0015] Optionally, the persistent memory further includes: a log storage area, a checkpoint metadata storage area, a counter data storage area, and a mapping data storage area, and the log storage area is used to store a rollback log of the counter.

[0016] Optionally, the processing module is configured to, for each checkpoint cycle, suspend execution of the application program when the checkpoint cycle ends, update the working data in the processor cache and write it back to the persistent memory according to the processing flow of the memory data write request, and write the mapping data in the mapping data cache that has changed in the checkpoint cycle, the counter data in the counter cache that has changed in the checkpoint cycle, and the processor state data as checkpoint data to the persistent memory;

[0017] The current checkpoint cycle number is increased, and the persistent memory space occupied by the rollback log is reclaimed.

[0018] Optionally, the data processing module is configured to, after receiving the write request, obtain counter data, and determine whether the counter data has been changed in a current checkpoint cycle according to a cache line flag corresponding to the counter data;

[0019] If not, write the counter data into the rollback log, write the rollback log into the log storage area in the persistent memory, and update the counter data and the cache line flag;

[0020] If so, only update the counter data;

[0021] The target data is encrypted according to the updated counter data to obtain encrypted data.

[0022] Optionally, the data cache module further includes: a log metadata register and a checkpoint metadata register;

[0023] The log metadata register is used to temporarily store the storage addresses of no more than a specified number of counter data in the persistent memory, and when the stored counter storage addresses reach the specified number, send the storage addresses of each counter data in the persistent memory to the persistent memory through the same memory write request, and

[0024] A storage address in the persistent memory of a storage space for temporarily storing the next allowed rollback log;

[0025] The checkpoint metadata register is used to store the starting address of the mapping data in the persistent memory and a specified portion of the memory space allocation bitmap, and

[0026] The flag bits stored in the checkpoint commit phase are used to mark whether the modified data in the processor cache, the counter cache, and the mapping data cache, and the processor state data are refreshed to the persistent memory.

[0027] Optionally, the mapping data includes a first flag bit and a second flag bit, the first flag bit is used to indicate whether the checkpoint data is stored in the first storage area or the second storage area, and the second flag bit is used to indicate whether the working data is stored in the first storage area or the second storage area.

[0028] Optionally, the processing module is configured to, after receiving the write request, determine whether the checkpoint cycle number corresponding to the mapping data is less than the current checkpoint cycle number, and if so, set the storage area pointed to by the second flag bit in the mapping data to the storage area pointed to by the first flag bit;

[0029] Updating the checkpoint cycle number corresponding to the mapping data to the current checkpoint cycle number;

[0030] Determine whether the first flag bit corresponding to the write request in the mapping data is the same as the storage area pointed to by the second flag bit; if not, store the encrypted data in the storage area pointed to by the second flag bit; if so, flip the second flag bit and store the encrypted data in the storage area pointed to by the flipped second flag bit.

[0031] Optionally, the processing module is further configured to obtain a read request of the persistent memory, and obtain counter data and mapping data corresponding to the read request according to a target memory address corresponding to the read request;

[0032] Determine, according to the mapping data, a storage area in the persistent memory pointed to by the second flag bit as a target storage area, and read the encrypted data from the target storage area;

[0033] The encrypted data is decrypted according to the counter data to obtain decrypted data corresponding to the read request.

[0034] Optionally, the processing module is further configured to, after the system is restarted, read from the log storage area in the persistent memory a rollback log of the counter generated within the target checkpoint period before the system is restarted;

[0035] Determine, according to the rollback log, an address of a first storage area of the working data within the target checkpoint period in the persistent memory;

[0036] According to the first storage area address, obtaining specified mapping data, and determining whether the checkpoint cycle number corresponding to the specified mapping data is the same as the system checkpoint cycle number in the checkpoint metadata storage area of the persistent memory; if so, updating the value of a second flag bit in the specified mapping data that is different from the first flag bit to the value of the first flag bit;

[0037] Reading the checkpoint cycle number before the system restart from the persistent memory and sending it to the checkpoint metadata register, and increasing the checkpoint cycle number to start data recovery;

[0038] Decrypting the checkpoint data pointed to by the first flag bit of the designated mapping data using the counter data value in the rollback log, and encrypting the decrypted data again before sending the encrypted data to the persistent memory;

[0039] The modified counters and modified mapping data in the counter cache and mapping data cache are refreshed back to the persistent memory, the processor state data in the checkpoint metadata storage area is restored to the processor registers, the checkpoint cycle number is increased to complete the data recovery, and the application execution is continued.

[0040] Optionally, the processing module is configured to obtain the target counter data and the target mapping data from the persistent memory if the target counter data is not stored in the counter cache and the target mapping data is not stored in the mapping data cache.

[0041] Optionally, the target data includes: graph data, and the data storage system is used to read and write the graph data involved in the graph calculation process.

[0042] This specification provides a data storage method, which is applied to a data storage system. The data storage system includes: a data cache module, a data processing module and a persistent memory. The data cache module includes: a counter cache and a mapping data cache;

[0043] The data processing module obtains the target mapping data corresponding to the write request of the persistent memory from the mapping data cache, and obtains the target counter data corresponding to the write request from the counter cache, wherein the mapping data is used to determine the storage area of the checkpoint data submitted at the end of the previous checkpoint cycle and the working data modified in the current checkpoint cycle in the persistent memory, and the storage area includes a first storage area and a second storage area. For each mapping data stored in the mapping data cache, if the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written to the persistent memory, and the value of the counter data increases as the target data is updated. The checkpoint data is used to perform data recovery after the system is restarted, wherein each write request for target data corresponds to one target mapping data;

[0044] The target data is encrypted according to the target counter data to obtain encrypted data, and the encrypted data is stored in a storage area corresponding to the working data according to the mapping data.

[0045] Optionally, the method further includes:

[0046] If the target mapping data is not stored in the mapping data cache, obtaining the target mapping data from the persistent memory;

[0047] After obtaining the write request, determine whether the checkpoint cycle number corresponding to the target mapping data obtained from the persistent memory is less than the current checkpoint cycle number; if so, store the encrypted data in the storage area corresponding to the checkpoint data pointed to by the target mapping data, and use the working data as the checkpoint data; otherwise, when the checkpoint data and the working data pointed to by the mapping data are in the same storage area, store the encrypted data in another storage area; when the checkpoint data and the working data pointed to by the mapping data are in different storage areas, store the encrypted data in the storage area corresponding to the working data pointed to by the mapping data.

[0048] Optionally, the persistent memory further includes: a log storage area, a checkpoint metadata storage area, a counter data storage area, and a mapping data storage area, wherein the log storage area is used to store a rollback log corresponding to the counter data.

[0049] Optionally, the method further includes:

[0050] For each checkpoint cycle, when the checkpoint cycle ends, the execution of the application is suspended, the working data in the processor cache is updated and written back to the persistent memory according to the processing flow of the memory data write request, and the mapping data in the mapping data cache that has changed in the checkpoint cycle, the counter data in the counter cache that has changed in the checkpoint cycle, and the processor state data are written to the persistent memory as checkpoint data;

[0051] The current checkpoint cycle number is increased, and the persistent memory space occupied by the rollback log is reclaimed.

[0052] Optionally, encrypting the target data according to the target counter data to obtain encrypted data specifically includes:

[0053] After receiving the write request, obtaining counter data, and determining whether the counter data has been changed in a current checkpoint cycle according to a cache line flag corresponding to the counter data;

[0054] If not, write the counter data into the rollback log, write the rollback log into the log storage area in the persistent memory, and update the counter data and the cache line flag;

[0055] If so, only update the counter data;

[0056] The target data is encrypted according to the updated counter data to obtain encrypted data.

[0057] Optionally, the data cache module further includes: a log metadata register and a checkpoint metadata register;

[0058] The log metadata register temporarily stores the storage addresses of no more than a specified number of counter data in the persistent memory, and when the stored counter storage addresses reach the specified number, sends the storage addresses of each counter data in the persistent memory to the persistent memory through the same memory write request, and temporarily stores the storage address of the next allowed rollback log storage space in the persistent memory;

[0059] The checkpoint metadata register stores the starting address of the mapping data in the persistent memory and the specified part of the memory space allocation bitmap, as well as temporarily stores a flag bit used to mark the modified data in the processor cache, counter cache and mapping data cache and whether the processor status data is refreshed to the persistent memory during the checkpoint commit phase.

[0060] Optionally, the mapping data includes a first flag bit and a second flag bit, the first flag bit is used to indicate whether the checkpoint data is stored in the first storage area or the second storage area, and the second flag bit is used to indicate whether the working data is stored in the first storage area or the second storage area.

[0061] Optionally, the method further includes: after receiving the write request, determining whether the checkpoint cycle number corresponding to the mapping data is less than the current checkpoint cycle number, and if so, setting the storage area pointed to by the second flag bit in the mapping data to the storage area pointed to by the first flag bit;

[0062] Updating the checkpoint cycle number corresponding to the mapping data to the current checkpoint cycle number;

[0063] Determine whether the first flag bit corresponding to the write request in the mapping data is the same as the storage area pointed to by the second flag bit; if not, store the encrypted data in the storage area pointed to by the second flag bit; if so, flip the second flag bit and store the encrypted data in the storage area pointed to by the flipped second flag bit.

[0064] Optionally, the method further includes:

[0065] Obtaining a read request for the persistent memory, and obtaining counter data and mapping data corresponding to the read request according to a target memory address corresponding to the read request;

[0066] Determine, according to the mapping data, a storage area in the persistent memory pointed to by the second flag bit as a target storage area, and read the encrypted data from the target storage area;

[0067] The encrypted data is decrypted according to the counter data to obtain decrypted data corresponding to the read request.

[0068] Optionally, the method further includes:

[0069] After the system is restarted, the rollback log of the counter generated within the target checkpoint period before the system restart is read from the log storage area in the persistent memory;

[0070] Determine, according to the rollback log, an address of a first storage area of the working data within the target checkpoint period in the persistent memory;

[0071] According to the first storage area address, obtaining specified mapping data, and determining whether the checkpoint cycle number corresponding to the specified mapping data is the same as the system checkpoint cycle number in the checkpoint metadata storage area of the persistent memory; if so, updating the value of a second flag bit in the specified mapping data that is different from the first flag bit to the value of the first flag bit;

[0072] Reading the checkpoint cycle number before the system restart from the persistent memory and sending it to the checkpoint metadata register, and increasing the checkpoint cycle number to start data recovery;

[0073] Decrypting the checkpoint data pointed to by the first flag bit of the designated mapping data using the counter data value in the rollback log, and encrypting the decrypted data again before sending the encrypted data to the persistent memory;

[0074] The modified counters and modified mapping data in the counter cache and mapping data cache are refreshed back to the persistent memory, the processor state data in the checkpoint metadata storage area is restored to the processor registers, the checkpoint cycle number is increased to complete the data recovery, and the application execution is continued.

[0075] Optionally, encrypting the target data according to the target counter data to obtain encrypted data, and storing the encrypted data in a storage area corresponding to the working data according to the mapping data, specifically includes:

[0076] If the target counter data is not stored in the counter cache and the target mapping data is not stored in the mapping data cache, access the persistent memory and obtain the target counter data and the target mapping data from the persistent memory.

[0077] Optionally, the target data includes: graph data, and the data storage system is used to read and write the graph data involved in the graph calculation process.

[0078] This specification provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned data storage method when executing the program.

[0079] At least one of the above technical solutions adopted in this specification can achieve the following beneficial effects:

[0080] The data storage system provided in this specification includes a data cache module, a data processing module and a persistent memory, the persistent memory includes a first storage area and a second storage area, the data cache module includes: a mapping data cache and a counter cache, the mapping data cache is used to temporarily store at least part of the mapping data, and, when there is no available mapping data cache space for newly arrived mapping data, the mapping data that has not been accessed for the longest time in the mapping data cache is evicted from the mapping data cache and written to the persistent memory, the data processing module is used to obtain target counter data and target mapping data, encrypt the target data according to the target counter data to obtain encrypted data, and store the encrypted data at a specified location in the persistent encrypted memory according to the mapping data.

[0081] It can be seen from the above-mentioned data storage system and data storage method that the mapping data cache module in the data storage system in this specification can evict the mapping data that has not been accessed for the longest time during the access process of the memory. In this way, it can ensure that there is sufficient storage space in the mapping data cache, thereby effectively avoiding easy checkpoint commit operations.

[0082] In addition, the data storage system in this specification can encrypt data through a counter and store working data and checkpoint data through two storage areas. In this way, data consistency can be guaranteed while protecting data privacy. BRIEF DESCRIPTION OF THE DRAWINGS

[0083] The drawings described herein are used to provide a further understanding of this specification and constitute a part of this specification. The exemplary embodiments and descriptions of this specification are used to explain this specification and do not constitute an improper limitation of this specification. In the drawings:

[0084] Figure 1 A schematic diagram of a data storage system provided in this specification;

[0085] Figure 2 A schematic diagram of the structure of mapping data provided in this specification;

[0086] Figure 3 A flowchart of the data storage method provided in this specification;

[0087] Figure 4 A schematic diagram of the execution process of a persistent memory read request provided in this specification;

[0088] Figure 5 A schematic diagram of the execution process of a persistent memory write request provided in this specification;

[0089] Figure 6 This manual provides a corresponding Figure 1 Schematic diagram of electronic equipment. DETAILED DESCRIPTION

[0090] To make the objectives, technical solutions, and advantages of this specification more clear, the following will clearly and completely describe the technical solutions of this specification in conjunction with the specific embodiments of this specification and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this specification.

[0091] In practical applications, one way to implement checkpoints is to set up shadow memory corresponding to the target memory in persistent memory. The two rotate to store the checkpoint data submitted after reaching the checkpoint and the working data updates generated during the calculation process to avoid invalidation caused by modification of valid checkpoint data. At the same time, mapping data is used to indicate the location of working data and checkpoint data.

[0092] However, existing research has only used shadow memory checkpoints to implement persistent memory systems. Designing an efficient, encrypted persistent memory system based on shadow memory checkpoints for graph computing still faces the following challenges:

[0093] First, maintain the consistency of counter data. The currently commonly used memory data encryption method is a counter-based data encryption strategy. When the memory data changes, the counter will also be incremented. When the data is decrypted, the same counter as when it was encrypted needs to be used. In addition, to speed up the encryption and decryption of memory data, the counter is cached in the volatile cache of the memory controller. If the system is powered off, the cached data will be lost. Therefore, the encrypted persistent memory system for graph computing needs to maintain not only the data consistency between the graph data, but also the consistency between the graph data and its counter data. The data consistency maintenance is more difficult.

[0094] Second, it avoids redundant downtime checkpoint commit operations. Traditional shadow memory checkpoint systems require storing mapped data in the mapped data cache. When on-chip cache space is insufficient, a checkpoint commit operation must be performed in advance, pausing program execution and merging data from the first and second regions to reclaim the mapped data cache space. These additional checkpoint commit operations, located on the system's critical execution path, increase the amount of data accessed by persistent memory and the system's memory access overhead. In encrypted memory, these additional memory access operations also increase the system's encryption overhead, further reducing system performance.

[0095] The technical solutions provided by the embodiments of this specification are described in detail below with reference to the accompanying drawings.

[0096] Figure 1 This is a schematic diagram of a data storage system provided in this specification, which includes: a memory controller and persistent memory. The memory controller contains a data cache module and a data processing module. The data cache module is responsible for temporarily storing metadata required for setting memory checkpoints, setting rollback logs, responding to memory access requests and encrypting memory data. The data processing module is responsible for executing data read and write requests, and implementing the operational logic required for maintaining data crash consistency and data recovery. This operational logic corresponds to the memory data crash consistency maintenance method.

[0097] The data storage system in this specification is composed of a data cache module, a persistent memory, and a data processing module.

[0098] In this specification, the data storage system can be applied to graph data computing scenarios to read and write graph data involved in the graph data computing process. Of course, the data storage system can also be applied to computing scenarios of other types of data, and this specification does not specifically limit this.

[0099] In actual applications, the processor executing the application (such as the data application) can send data read and write requests to the memory controller, which reads data from the persistent memory or writes data to the persistent memory, and then feeds the results back to the processor cache of the processor.

[0100] Furthermore, the data cache module may include: a mapping data cache, a counter cache, a log metadata register, and a checkpoint metadata register.

[0101] The mapping data cache stores mapping data, which is used to determine the storage area of checkpoint data and working data in persistent memory, that is, to determine whether the working data or checkpoint data is in the original memory page of the first storage area (the page where the destination address in the memory read and write request is located) or the shadow memory page of the second storage area. The mapping data corresponding to two adjacent original memory pages (size is 4KB) are stored in a cache line of size 64B in the mapping data cache.

[0102] In practical applications, checkpoints are typically set to enable data recovery after a power outage. When a checkpoint cycle ends, the system writes the modified working data, data stored in the data cache module, and processor state data at the end of the checkpoint cycle as checkpoint data to persistent memory, thereby committing the checkpoint. This allows the system to recover the data processing state at the end of the checkpoint based on the previously submitted checkpoint data, even if a power outage occurs and the system restarts, ensuring data consistency during recovery. The checkpoint data commit operation is described in detail below and is not detailed here.

[0103] The mapping data cache loses data when power is off. The mapping data cache can use the mapping data memory address corresponding to the original memory page in the first storage area as an index to temporarily store the hot mapping data in the persistent memory.

[0104] In this specification, each mapping data can be sorted according to how long ago the mapping data was accessed, and the mapping data sorted after the preset position can be regarded as the colder mapping data, and the mapping data sorted before the preset position can be regarded as the hotter mapping data. The above preset positions can be set according to actual conditions, and this specification does not make any specific restrictions on this.

[0105] In addition, each cache line in the mapping data cache is set with a flag bit to determine whether the mapping data in each cache line has been modified. The modified mapping data will be written back to the persistent memory after being evicted from the cache. There is no need to save all mapping data in the mapping data cache. The mapping data cache capacity can be set according to the capacity of the persistent memory.

[0106] Specifically, during the execution of the application, when the mapping data cache space is less than a preset threshold, it means that the current mapping data cache space is insufficient to store the next mapping data. At this time, the mapping data cache can evict the mapping data that has not been accessed for the longest time from the cache and write it to the persistent memory. The above-mentioned preset threshold can be set according to actual conditions, and this specification does not make any specific restrictions on this.

[0107] The structure of the above mapping data is as follows Figure 2 shown.

[0108] Figure 2 This is a structural diagram of mapping data provided in this specification.

[0109] Among them, the checkpoint cycle number is 64 bits, which represents the checkpoint cycle number when the mapping data is modified. In this specification, the memory page corresponding to the second storage area can be used as a shadow memory page. The shadow memory page address is 64 bits, and the page size is 4KB, containing 64 64B data blocks. The data block size is the same as the data amount of a single memory access request (read and write request). The original memory page that has not been modified in the first storage area is not allocated a shadow memory page, and the corresponding shadow memory page address is 0.

[0110] The first flag bitmap is 64 bits, which represents the storage location of the checkpoint data. Each flag bit in the bitmap corresponds to a 64B data block in the logical page. If the flag bit is 0, it means that the checkpoint data corresponding to the data block is stored in the original memory page of the first storage area. If the flag bit is 1, it means that the checkpoint data corresponding to the data block is stored in the shadow memory page of the second storage area.

[0111] The second flag bitmap is 64 bits, which represents the storage location of the working data. Each flag bit in the bitmap corresponds to a 64B data block in the logical page. If the flag bit is 0, it means that the working data corresponding to the data block is stored in the original memory page of the first storage area. If it is 1, it means that it is stored in the shadow memory page of the second storage area.

[0112] Of course, in this specification, the memory page corresponding to the first storage area may be used as a shadow memory page, and the memory page corresponding to the second storage area may be used as an original memory page.

[0113] The counter data corresponding to the target data is temporarily stored in the cache line of the counter cache.

[0114] The counter cache uses the counter data storage address corresponding to the original memory page as an index and caches the counter data located in the counter data storage area in persistent memory. The counter data value increases as the target data is updated. The counter cache capacity can be set based on the mapping data cache capacity, ensuring that the amount of mapping data stored in the mapping data cache is no less than the amount of counter data stored in the counter cache. This ensures that in most cases, a hit in the counter cache also results in a hit in the mapping data cache.

[0115] It should be noted that each 64B data block in the original memory page is a target data. For each data block, the data block and the corresponding data block in the shadow memory page share the same counter. Regardless of whether the data block stored in the original memory page or the shadow memory page is updated, the value of the counter will be incremented.

[0116] The log metadata register can temporarily store the storage addresses of no more than a specified number of counter data in the persistent memory. When the stored counter storage addresses reach the specified number, the storage addresses of each counter data in the persistent memory are sent to the persistent memory through the same memory write request.

[0117] In this specification, the log metadata register can temporarily store the log header corresponding to the rollback log of the counter. The rollback log of the counter consists of a log header and log items. Each log item stores the 64B counter data block before modification. The memory address of the counter data block is sent to the 64B log header. The corresponding log header is after every 8 consecutive log items.

[0118] Therefore, the specified number can be set to 8. That is, when the log header register is filled with 8 counter data block addresses or no new log entries arrive, the log header will be written back to the persistent memory. When a power outage occurs, the log header register will be written back to the persistent memory with the help of the asynchronous DRAM refresh component (ADR).

[0119] In addition, the log metadata register also temporarily stores the allowed storage address of the next rollback log in the log storage area of the persistent memory. This storage address is updated as the log data is written. When a power outage occurs, the log memory address register will be written back to the persistent memory with the help of ADR to define the range of the counter rollback log.

[0120] The checkpoint metadata register temporarily stores the starting address of the mapped data in persistent memory. The system can calculate the storage address of the mapped data corresponding to the read / write request based on the target memory address corresponding to the memory read / write request and the starting address of the mapped data.

[0121] The checkpoint metadata register caches the starting address of the mapping data in the persistent memory and a specified portion of the memory space allocation bitmap, wherein the specified portion can be a hotter portion of the shadow memory space allocation bitmap. Each bit in the bitmap represents whether the corresponding shadow memory page has been allocated. The modified bitmap data will be written back to the checkpoint metadata area in the persistent memory. When a power outage occurs, the shadow memory page allocation bitmap will be written back to the persistent memory with the help of ADR.

[0122] The checkpoint metadata register also caches four flag bits, which are used to mark whether the dirty data (modified data) in the processor cache, counter cache, and mapping data cache, as well as the processor state data, have been refreshed to the persistent memory during the checkpoint commit phase. The location where the processor state data should be refreshed in the persistent memory is the checkpoint metadata storage area.

[0123] The persistent memory includes multiple storage areas, including a first storage area, a second storage area, a log storage area, a checkpoint metadata storage area, a counter data storage area, and a mapping data storage area. The first storage area and the second storage area are respectively used to store the checkpoint data submitted at the end of the checkpoint cycle and the working data modified in the current checkpoint cycle. The checkpoint metadata storage area is used to store the processor state data submitted at the end of the checkpoint cycle and the metadata required for checkpoint management. The counter data storage area is used to store counter data evicted from the counter cache, and the mapping data storage area is used to store mapping data evicted from the mapping data cache.

[0124] In addition, the first storage area and the second storage area may also be respectively provided with an application data storage area, and the storage area is used to store application data required in the data reading and writing process.

[0125] The data processing module includes a data read and write request processing module, a checkpoint submission module and a data recovery module, which respectively execute the memory read and write request processing method, the checkpoint submission method and the system data recovery method in the memory controller.

[0126] When the memory controller receives a write request to the memory sent by the processor, the read / write request processing module system can access the counter cache and the mapping data cache at the same time. If both caches miss, the read / write request processing module can obtain the target counter data and target mapping data corresponding to the write request by accessing the persistent memory.

[0127] When the read / write request processing module of the persistent memory obtains the target counter data, if the dirty data flag of the corresponding counter cache line is not set (that is, the counter data corresponding to the cache has not been modified and the flag value is 0), the read / write request processing module can write the target counter data cache line into the rollback log before modifying the counter value. The system determines the available log storage area address based on the log metadata register, writes the counter data in the original counter cache line back to the log storage area in the persistent memory as a log item, and sends the counter cache line memory address to the log header in the log metadata register. The read / write request processing module then updates the counter value and the counter cache line flag. If the 16th bit of the updated counter value jumps, the target counter cache line of the entire counter cache is written back to the persistent memory.

[0128] When the counter value is updated, the read-write request processing module can calculate the one-time encryption block (OTP) required for encryption based on the updated counter data, and then compare it with the plaintext of the target data currently being written or obtain the ciphertext, thereby completing the encryption of the target data and obtaining the encrypted data.

[0129] Since the colder mapping data will be evicted from the mapping data cache to the persistent memory during the data access process, when the target mapping data can be directly obtained from the mapping data cache, the read and write request processing module can directly determine the storage area of the working data based on the target mapping data. If the target mapping data needs to be obtained from the persistent memory, it means that the target mapping data has been evicted from the mapping data cache and may not have been updated for a long time. At this time, the checkpoint data in the checkpoint data storage area pointed to by the target mapping data may have expired.

[0130] Therefore, in order to ensure that valid checkpoint data is not overwritten by written working data, the read-write request processing module can compare the system's current checkpoint cycle number in the checkpoint metadata register with the checkpoint cycle number in the target mapping data corresponding to the write request, and update the target mapping data.

[0131] Specifically, if the current checkpoint cycle number of the system is larger, it means that the most recent update of the graph data corresponding to the target mapping data occurred within the previously successfully submitted checkpoint cycle. At this time, the read-write request processing module can set the value of the first flag bit in the target mapping data to the value of the second flag bit, and at the same time set the checkpoint cycle number of the target mapping data to the current checkpoint cycle number of the system.

[0132] If the checkpoint cycle number in the target mapping data is equal to the current checkpoint cycle number of the system, the uncommitted modifications to the target working data pointed to by the second flag of the target mapping data will only occur within the current checkpoint cycle, and there is no need to update the target mapping data at this time.

[0133] After obtaining the encrypted data and completing the update of the target mapping data, the read-write request processing module can read the first flag and the second flag corresponding to the write request memory address from the target mapping data. If the two flags have the same value, it means that the checkpoint data stored in the storage area pointed to by the target mapping data is valid. Therefore, the read-write request processing module can flip the value of the second flag and send the encrypted data to the storage area pointed to by the flipped second flag, that is, use the storage area pointed to by the flipped second flag as the storage area corresponding to the new working data and store the encrypted data. In this way, the encrypted data can be stored in another storage area outside the same storage area pointed to by the first flag and the second flag before the flip, thereby avoiding the checkpoint data in the storage area pointed to by the first flag and the second flag before the flip from being overwritten to ensure data consistency.

[0134] If the two flags are different, the read / write request processing module can directly send the encrypted data to the storage area pointed to by the second flag (i.e., the storage area corresponding to the working data pointed to by the mapping data), thereby ensuring that the valid checkpoint data is not overwritten. It should be noted that when the two flags are different, there is no need to flip the second flag.

[0135] When the memory controller receives a read request for persistent memory sent by the processor, the read and write request processing module can calculate the corresponding storage address of the mapping data and the storage address of the counter data based on the memory address corresponding to the read request, and access the mapping data cache and the counter cache respectively using these two storage addresses as indexes.

[0136] When the counter cache hits, the read-write request processing module can send the counter corresponding to the read request to the encryption engine to calculate the OTP required for decryption. When the counter cache misses (that is, the counter data corresponding to the read request is not stored in the counter cache), the system reads the corresponding counter data from the persistent memory and then calculates the OTP.

[0137] When the mapping data cache hits, the read / write request processing module can read the second flag bit corresponding to the current read request in the second flag bitmap of the mapping data, and send the read request to the memory page pointed to by the second flag bit to read the encrypted data.

[0138] When the mapping data cache misses (i.e., the mapping data corresponding to the current read request is not stored in the mapping data cache), the read and write request processing module can first obtain the mapping data from the persistent memory, then read the encrypted data from the persistent memory according to the mapping data, and send the mapping data to the mapping data cache.

[0139] When the OTP calculation is completed and the encrypted data is obtained, the read and write request processing module can perform an XOR operation on the two to decrypt the encrypted data, obtain the plaintext data corresponding to the read request, and then send the plaintext data to the processor to complete the read request to the memory.

[0140] During the checkpoint data submission process, for each checkpoint cycle, when the checkpoint cycle ends, the processor will stop executing the application and write the modified cache lines in the processor cache back to the persistent memory. The data write-back process is the same as the persistent memory write request process.

[0141] After all dirty data (modified data) in the processor cache is written back to the persistent memory, the checkpoint submission module can write the counter data in the counter cache, the mapping data in the mapping data cache, and the processor status data back to the counter data storage area, the mapping data storage area, and the checkpoint metadata storage area in the persistent memory, respectively.

[0142] In addition, the checkpoint submission module can increase the current system checkpoint cycle number in the checkpoint metadata register to enter the next checkpoint cycle. At the same time, the rollback log of the current counter in the log storage area can be discarded to reclaim the memory it occupies, so that the memory it occupies can be reused in the next cycle.

[0143] When the system crashes or the endpoint is restarted, the data recovery module can read the rollback log of the counter generated during the checkpoint period when the system crashed from the log area of the persistent memory, and determine the target storage address of the original data page modified during the checkpoint period based on the correspondence between the counter cache line and the original data page.

[0144] The system accesses the specified mapping data based on the target storage address where the modification occurs. The system compares the checkpoint cycle number in the specified mapping data with the system checkpoint cycle number in the checkpoint metadata in the persistent memory. When the checkpoint number in the specified mapping data is equal to the system checkpoint number, the data recovery module can update the second flag bit in the specified mapping data, which is different from the value of the first flag bit, to the value of the first flag bit.

[0145] The system reads the checkpoint cycle number when the crash occurred from the checkpoint metadata area in persistent memory and sends it to the checkpoint metadata register. It then increases the checkpoint number and continues to perform data recovery operations within the checkpoint cycle.

[0146] To prevent the counter value from being reused, the data recovery module accesses the corresponding encrypted data for each counter in the counter's rollback log, and uses the counter value in the rollback log to decrypt the encrypted data pointed to by the first flag bit of the mapping data. The system then reads the value of the counter in the original memory area, increases its value to the 16th bit and causes a jump, and then uses the new value to re-encrypt the data plaintext, and updates the counter value in the counter cache. At the same time, the mapping data is updated according to the memory write request processing method, and the re-encrypted data is written back to the persistent memory.

[0147] The data recovery module then flushes the dirty data in the counter and mapping data cache back to the persistent memory, and at the same time restores the processor state data in the checkpoint metadata area in the persistent memory to the processor's registers, increases the checkpoint cycle number, completes the data recovery and continues to execute the application in the processor, reclaiming the memory space occupied by the counter's rollback log for use in subsequent checkpoint cycles.

[0148] It should be noted that if the system crashes again during data recovery, since the recovery operation is performed in a new checkpoint cycle and the submitted checkpoint data is not modified, the recovery module only needs to re-execute the recovery operation.

[0149] In addition, the data read and write requests in this specification can be read and write requests generated by the processor when executing a graph application for read and write operations on graph data. Of course, they can also be read and write requests corresponding to other types of data. This specification does not make specific restrictions on this.

[0150] The above is an explanation of a data storage system provided in this specification. Accordingly, this specification also provides a data storage method applied to the above data storage system, such as Figure 3 shown.

[0151] Figure 3 This is a flow chart of a data storage method provided in this specification, which includes the following steps:

[0152] S301: The data processing module obtains the target mapping data corresponding to the write request of the persistent memory from the mapping data cache, and obtains the target counter data corresponding to the write request from the counter cache, wherein the mapping data is used to determine the storage area in the persistent memory of the checkpoint data submitted at the end of the previous checkpoint cycle and the working data modified in the current checkpoint cycle, and the storage area includes a first storage area and a second storage area. For each mapping data stored in the mapping data cache, if the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written to the persistent memory, and the value of the counter data increases as the target data is updated. The checkpoint data is used to recover data after the system is restarted, wherein each write request for target data corresponds to one target mapping data.

[0153] S302: Encrypt the target data according to the target counter data to obtain encrypted data, and store the encrypted data in a storage area corresponding to the working data according to the mapping data.

[0154] In this specification, the execution subject used to implement the data storage method can be a processor, of course, it can also be a data processing module of the data storage system. For ease of understanding, this specification only takes the data processing module as an example of the execution subject to illustrate a data storage method provided in this specification.

[0155] The process of processor processing data usually involves read requests and write requests to the memory. Taking reading data from persistent memory or writing data to persistent memory as an example, during the data writing process, in order to ensure data privacy, the data processing module can encrypt the data according to a counter that increments as the data is updated. In this way, when the data is read, the data can be decrypted using the corresponding counter data, thereby ensuring data privacy.

[0156] In addition, in order to ensure data consistency after the system restarts, this manual stores valid checkpoint data in another storage area different from the storage area of the modified working data during the data writing process, so that data recovery can be performed based on the checkpoint data submitted to the persistent memory after power failure and restart.

[0157] After receiving a read request from the memory, the data processing module can obtain the counter data and mapping data corresponding to the read request based on the target memory address corresponding to the read request, determine the target storage area corresponding to the data corresponding to the read request in the persistent memory based on the mapping data, read the encrypted data from the target storage area, decrypt the encrypted data based on the counter data, and obtain the decrypted data corresponding to the read request. For ease of understanding, this specification provides a schematic diagram of the execution process of a read request from persistent memory, such as Figure 4 shown.

[0158] Figure 4 This is a schematic diagram of the execution process of a persistent memory read request provided in this specification.

[0159] Among them, after obtaining a read request from the persistent memory, the data processing module can calculate the corresponding storage address of the mapping data and the storage address of the counter data based on the memory address corresponding to the read request, and access the mapping data cache and the counter cache respectively using these two storage addresses as indexes.

[0160] When the counter cache hits, the processing module can send the counter corresponding to the read request to the encryption engine to calculate the OTP required for decryption. When the counter cache misses, the data processing module reads the corresponding counter data from the persistent memory and then calculates the OTP.

[0161] When the mapping data cache hits, the data processing module can read the second flag bit corresponding to the current read request in the second flag bitmap of the mapping data, and send the read request to the memory page pointed to by the second flag bit to read the encrypted data.

[0162] When the mapping data cache misses, the processing module may first obtain the mapping data from the persistent memory, then read the encrypted data from the persistent memory according to the mapping data, and send the mapping data to the mapping data cache.

[0163] When the OTP calculation is completed and the encrypted data is obtained, the processing module can perform an XOR operation on the two to decrypt the encrypted data, obtain the plaintext data corresponding to the read request, and then send the plaintext data to the processor to complete the read request to the memory.

[0164] After obtaining a write request to the persistent memory, the data processing module can obtain the target counter data corresponding to the write request from the counter cache and the target mapping data corresponding to the write request from the mapping data cache, encrypt the target data according to the target counter data to obtain encrypted data, and store the encrypted data in the storage area corresponding to the working data.

[0165] During this process, if the target mapping data is not stored in the counter cache, it is necessary to obtain the target mapping data from the persistent memory. The data processing module can determine whether the checkpoint cycle number corresponding to the target mapping data obtained from the persistent memory is less than the current checkpoint cycle number. If so, the encrypted data is stored in the storage area corresponding to the checkpoint data, and the working data is used as the checkpoint data. Otherwise, the encrypted data is stored in the storage area corresponding to the working data. For ease of understanding, this specification also provides a schematic diagram of the execution process of a write request, such as Figure 5 shown.

[0166] Figure 5 This is a schematic diagram of the execution process of a persistent memory write request provided in this specification.

[0167] Among them, when obtaining a write request to the persistent memory, the data processing module can access the counter cache and the mapping data cache at the same time. If both caches miss, the data processing module can obtain the target counter data and target mapping data corresponding to the write request by accessing the persistent memory.

[0168] After the data processing module obtains the target counter data, if the dirty data flag of the corresponding counter cache line is not set (the flag value is 0), the data processing module can write the target counter data line to the rollback log before modifying the counter value. The system determines the address of the available log storage area based on the log metadata register, writes the target counter data in the original counter cache line back to the log storage area in persistent memory as a log entry, and sends the counter cache line memory address to the log header in the log metadata register. The data processing module then updates the counter value and cache line flag to obtain the updated counter data. If the 16th bit of the updated counter value jumps, the counter cache line is written back to persistent memory.

[0169] The data processing module can compare the current system checkpoint cycle number in the memory controller register with the checkpoint cycle number in the target mapping data corresponding to the write request. If the current system checkpoint cycle number is larger, the data processing module can set the value of the first flag bit in the target mapping data to the value of the second flag bit, and simultaneously set the checkpoint cycle number of the target mapping data to the current system checkpoint cycle number. If the checkpoint number in the target mapping data is equal to the current system checkpoint cycle number, there is no need to update the mapping data.

[0170] After encrypting the target data using the updated counter data to obtain encrypted data and completing the update of the mapping data, the data processing module can read the first flag and the second flag corresponding to the memory address of the memory write request from the target mapping data. If the two flags are the same, the data processing module can flip the second flag and send the encrypted data to the storage area pointed to by the flipped second flag. If the two flags are different, the data processing module can directly send the encrypted data to the storage area pointed to by the second flag.

[0171] The checkpoint submission process and data recovery process have been described in the above description of the data storage system, and will not be elaborated in detail in this specification.

[0172] It can be seen from the above method that the data storage system in this specification can enable the mapping data cache to evict colder mapping data during program execution while ensuring the consistency and confidentiality of the graph data. Therefore, checkpoint submission operations will not be performed in advance due to insufficient mapping data cache space, reducing the additional memory read and write requests on the critical path of system execution caused by redundant checkpoint submission operations, thereby reducing the system's data persistence and encryption overhead, as well as system downtime.

[0173] In addition, the data storage system in this specification maintains the consistency of counter data by using a rollback log instead of shadow memory, ensuring that the latest value of the counter data is located in the original memory area and can be accessed without redirection of the mapped data, thereby overlapping the process of accessing the counter memory and the mapped data memory, shortening the processing flow of memory requests.

[0174] This manual also provides Figure 6 The one shown corresponds to Figure 3 Schematic diagram of the electronic equipment. Figure 6 As shown, at the hardware level, the electronic device includes a processor, an internal bus, a network interface, and a persistent memory (non-volatile memory), and may also include hardware required for other services. The processor reads the corresponding computer program from the non-volatile memory and then runs it to achieve the above Figure 3 Of course, in addition to software implementation, this specification does not exclude other implementation methods, such as logic devices or a combination of software and hardware, etc., that is, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.

[0175] Improvements to a technology can be clearly distinguished as either hardware improvements (for example, improvements to circuit structures such as diodes, transistors, and switches) or software improvements (improvements to process flows). However, with technological advancements, many process flow improvements today can now be considered direct improvements to hardware circuit structures. Designers almost always program the improved process flow into the hardware circuit to obtain the corresponding hardware circuit structure. Therefore, it cannot be said that a process flow improvement cannot be implemented using a hardware module. For example, a programmable logic device (PLD), such as a field programmable gate array (FPGA), is an integrated circuit whose logical function is determined by user programming. Designers can "integrate" a digital system on a PLD by programming it themselves, without having to hire a chip manufacturer to design and manufacture a dedicated integrated circuit chip. Moreover, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly done using "logic compiler" software. This is similar to the software compiler used when developing programs. Before compilation, the original code must also be written in a specific programming language, called a hardware description language (HDL). There is not just one HDL, but many, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. The most commonly used ones are VHDL (Very-High-Speed Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art will also understand that by simply programming the method flow in one of these hardware description languages and then programming it into an integrated circuit, a hardware circuit that implements the logic method flow can be easily obtained.

[0176] The controller can be implemented in any suitable manner. For example, the controller can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also know that in addition to implementing the controller in a purely computer-readable program code format, the controller can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, such a controller can be considered a hardware component, and the devices included therein for implementing various functions can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software modules that implement the method and structures within the hardware component.

[0177] The systems, devices, modules, or units described in the above embodiments may be implemented by computer chips or entities, or by products having certain functions. A typical implementation device is a computer. Specifically, the computer may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0178] For the convenience of description, the above devices are described as being divided into various units according to their functions. Of course, when implementing this specification, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0179] Those skilled in the art will appreciate that the embodiments of this specification may be provided as methods, systems, or computer program products. Therefore, this specification may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, this specification may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0180] This specification is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of this specification. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data storage device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data storage device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0181] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data storage device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0182] These computer program instructions can also be loaded onto a computer or other programmable data storage device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0183] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.

[0184] Computer-readable media includes permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0185] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0186] Those skilled in the art will appreciate that the embodiments of this specification may be provided as methods, systems, or computer program products. Thus, this specification may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, this specification may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0187] This specification may be described in the general context of computer-executable instructions, such as program modules, executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, and the like that perform specific tasks or implement specific abstract data types. This specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media, including storage devices.

[0188] The various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences between the other embodiments. In particular, the system embodiments are generally similar to the method embodiments, so the description is relatively simple. For relevant parts, refer to the description of the method embodiments.

[0189] The foregoing is merely an example of the present invention and is not intended to limit the present invention. Various modifications and variations are possible within the scope of the present invention. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be included within the scope of the claims of the present invention.

Claims

1. A data storage system, characterized in that: The data storage system includes: a data cache module, a data processing module and a persistent memory; The persistent memory includes: a first storage area and a second storage area, wherein the first storage area and the second storage area are respectively used to store checkpoint data submitted at the end of the previous checkpoint cycle and working data modified in the current checkpoint cycle, wherein the checkpoint data is used for data recovery after the system is restarted; The data cache module includes: a mapping data cache and a counter cache, wherein the mapping data cache is used to temporarily store at least part of the mapping data, and when the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written into the persistent memory, wherein the mapping data is used to determine the storage area of the checkpoint data and the working data in the persistent memory; The counter buffer is used to temporarily store at least part of the counter data, and the value of the counter data increases as the target data is updated; The data processing module is used to obtain target counter data corresponding to the write request of the persistent memory from the counter cache, and obtain target mapping data corresponding to the write request from the mapping data cache, encrypt the target data according to the target counter data to obtain encrypted data, and store the encrypted data in the storage area corresponding to the working data according to the mapping data, wherein each write request for target data corresponds to one target mapping data.

2. The data storage system according to claim 1, wherein: The processing module is further configured to obtain the target mapping data from the persistent memory if the target mapping data is not stored in the mapping data cache; After obtaining the write request, determine whether the checkpoint cycle number corresponding to the target mapping data obtained from the persistent memory is less than the current checkpoint cycle number; if so, store the encrypted data in the storage area corresponding to the checkpoint data pointed to by the target mapping data, and use the working data as the checkpoint data; otherwise, when the checkpoint data and the working data pointed to by the mapping data are in the same storage area, store the encrypted data in another storage area; when the checkpoint data and the working data pointed to by the mapping data are in different storage areas, store the encrypted data in the storage area corresponding to the working data pointed to by the mapping data.

3. The data storage system according to claim 1, wherein: The persistent memory further includes: a log storage area, a checkpoint metadata storage area, a counter data storage area, and a mapping data storage area. The log storage area is used to store the rollback log of the counter.

4. The data storage system according to claim 3, wherein: The processing module is configured to, for each checkpoint cycle, suspend the execution of the application program when the checkpoint cycle ends, update the working data in the processor cache and write it back to the persistent memory according to the processing flow of the memory data write request, and write the mapping data in the mapping data cache that has changed in the checkpoint cycle, the counter data in the counter cache that has changed in the checkpoint cycle, and the processor state data as checkpoint data to the persistent memory; The current checkpoint cycle number is increased, and the persistent memory space occupied by the rollback log is reclaimed.

5. The data storage system according to claim 3, wherein: The data processing module is configured to, after receiving the write request, obtain counter data and determine, based on a cache line flag corresponding to the counter data, whether the counter data has been changed in a current checkpoint period; If not, write the counter data into the rollback log, write the rollback log into the log storage area in the persistent memory, and update the counter data and the cache line flag; If so, only update the counter data; The target data is encrypted according to the updated counter data to obtain encrypted data.

6. The data storage system according to claim 1, wherein: The data cache module also includes: a log metadata register and a checkpoint metadata register; The log metadata register is used to temporarily store the storage addresses of no more than a specified number of counter data in the persistent memory, and when the stored counter storage addresses reach the specified number, send the storage addresses of each counter data in the persistent memory to the persistent memory through the same memory write request, and A storage address in the persistent memory of a storage space for temporarily storing the next allowed rollback log; The checkpoint metadata register is used to store the starting address of the mapping data in the persistent memory and a specified portion of the memory space allocation bitmap, and The flag bits stored in the checkpoint commit phase are used to mark whether the modified data in the processor cache, the counter cache, and the mapping data cache, and the processor state data are refreshed to the persistent memory.

7. The data storage system according to claim 6, wherein: The mapping data includes a first flag bit and a second flag bit, the first flag bit is used to indicate whether the checkpoint data is stored in the first storage area or the second storage area, and the second flag bit is used to indicate whether the working data is stored in the first storage area or the second storage area.

8. The data storage system according to claim 7, wherein: The processing module is configured to, after receiving the write request, determine whether the checkpoint cycle number corresponding to the mapping data is less than the current checkpoint cycle number, and if so, set the storage area pointed to by the second flag bit in the mapping data to the storage area pointed to by the first flag bit; Updating the checkpoint cycle number corresponding to the mapping data to the current checkpoint cycle number; Determine whether the first flag bit corresponding to the write request in the mapping data is the same as the storage area pointed to by the second flag bit; if not, store the encrypted data in the storage area pointed to by the second flag bit; if so, flip the second flag bit and store the encrypted data in the storage area pointed to by the flipped second flag bit.

9. The data storage system according to claim 7, wherein: The processing module is further configured to obtain a read request of the persistent memory, and obtain counter data and mapping data corresponding to the read request according to a target memory address corresponding to the read request; Determine, according to the mapping data, a storage area in the persistent memory pointed to by the second flag bit as a target storage area, and read the encrypted data from the target storage area; The encrypted data is decrypted according to the counter data to obtain decrypted data corresponding to the read request.

10. The data storage system according to claim 7, wherein: The processing module is further configured to, after the system is restarted, read the rollback log of the counter generated within the target checkpoint period before the system is restarted from the log storage area in the persistent memory; Determine, according to the rollback log, an address of a first storage area of the working data within the target checkpoint period in the persistent memory; According to the first storage area address, obtaining specified mapping data, and determining whether the checkpoint cycle number corresponding to the specified mapping data is the same as the system checkpoint cycle number in the checkpoint metadata storage area of the persistent memory; if so, updating the value of a second flag bit in the specified mapping data that is different from the first flag bit to the value of the first flag bit; Reading the checkpoint cycle number before the system restart from the persistent memory and sending it to the checkpoint metadata register, and increasing the checkpoint cycle number to start data recovery; Decrypting the checkpoint data pointed to by the first flag bit of the designated mapping data using the counter data value in the rollback log, and encrypting the decrypted data again before sending the encrypted data to the persistent memory; Refresh the modified counters and modified mapping data in the counter cache and mapping data cache back to the persistent memory, restore the processor state data in the checkpoint metadata storage area to the processor registers, increase the checkpoint cycle number to complete data recovery, and continue application execution.

11. The data storage system according to claim 1, wherein: The processing module is configured to obtain the target counter data and the target mapping data from the persistent memory if the target counter data is not stored in the counter cache and the target mapping data is not stored in the mapping data cache.

12. The data storage system according to claim 1, wherein: The target data includes: graph data, and the data storage system is used to read and write the graph data involved in the graph calculation process.

13. A data storage method, characterized in that: The data storage method is applied to a data storage system, which includes a data cache module, a data processing module and a persistent memory, wherein the data cache module includes a counter cache and a mapping data cache; The data processing module obtains the target mapping data corresponding to the write request of the persistent memory from the mapping data cache, and obtains the target counter data corresponding to the write request from the counter cache, wherein the mapping data is used to determine the storage area of the checkpoint data submitted at the end of the previous checkpoint cycle and the working data modified in the current checkpoint cycle in the persistent memory, and the storage area includes a first storage area and a second storage area. For each mapping data stored in the mapping data cache, if the mapping data cache space is less than a preset threshold, the mapping data that has not been accessed for the longest time is evicted from the cache and written to the persistent memory, and the value of the counter data increases as the target data is updated. The checkpoint data is used to perform data recovery after the system is restarted, wherein each write request for target data corresponds to one target mapping data; The target data is encrypted according to the target counter data to obtain encrypted data, and the encrypted data is stored in a storage area corresponding to the working data according to the mapping data.

14. The method according to claim 13, wherein The method further comprises: If the target mapping data is not stored in the mapping data cache, obtaining the target mapping data from the persistent memory; After obtaining the write request, determine whether the checkpoint cycle number corresponding to the target mapping data obtained from the persistent memory is less than the current checkpoint cycle number; if so, store the encrypted data in the storage area corresponding to the checkpoint data pointed to by the target mapping data, and use the working data as the checkpoint data; otherwise, when the checkpoint data and the working data pointed to by the mapping data are in the same storage area, store the encrypted data in another storage area; when the checkpoint data and the working data pointed to by the mapping data are in different storage areas, store the encrypted data in the storage area corresponding to the working data pointed to by the mapping data.

15. The method according to claim 13, wherein The persistent memory further includes: a log storage area, a checkpoint metadata storage area, a counter data storage area, and a mapping data storage area. The log storage area is used to store a rollback log corresponding to the counter data.

16. The method according to claim 15, wherein The method further comprises: For each checkpoint cycle, when the checkpoint cycle ends, the execution of the application is suspended, the working data in the processor cache is updated and written back to the persistent memory according to the processing flow of the memory data write request, and the mapping data in the mapping data cache that has changed in the checkpoint cycle, the counter data in the counter cache that has changed in the checkpoint cycle, and the processor state data are written to the persistent memory as checkpoint data; The current checkpoint cycle number is increased, and the persistent memory space occupied by the rollback log is reclaimed.

17. The method according to claim 15, wherein Encrypting the target data according to the target counter data to obtain encrypted data specifically includes: After receiving the write request, obtaining counter data, and determining whether the counter data has been changed in a current checkpoint cycle according to a cache line flag corresponding to the counter data; If not, write the counter data into the rollback log, write the rollback log into the log storage area in the persistent memory, and update the counter data and the cache line flag; If so, only update the counter data; The target data is encrypted according to the updated counter data to obtain encrypted data.

18. The method according to claim 13, wherein The data cache module also includes: a log metadata register and a checkpoint metadata register; The log metadata register temporarily stores the storage addresses of no more than a specified number of counter data in the persistent memory, and when the stored counter storage addresses reach the specified number, sends the storage addresses of each counter data in the persistent memory to the persistent memory through the same memory write request, and temporarily stores the storage address of the next allowed rollback log storage space in the persistent memory; The checkpoint metadata register stores the starting address of the mapping data in the persistent memory and the specified part of the memory space allocation bitmap, as well as temporarily stores a flag bit used to mark the modified data in the processor cache, counter cache and mapping data cache and whether the processor status data is refreshed to the persistent memory during the checkpoint commit phase.

19. The method according to claim 18, wherein The mapping data includes a first flag bit and a second flag bit, the first flag bit is used to indicate whether the checkpoint data is stored in the first storage area or the second storage area, and the second flag bit is used to indicate whether the working data is stored in the first storage area or the second storage area.

20. The method according to claim 19, wherein The method further includes: after receiving the write request, determining whether the checkpoint cycle number corresponding to the mapping data is less than the current checkpoint cycle number, and if so, setting the storage area pointed to by the second flag bit in the mapping data to the storage area pointed to by the first flag bit; Updating the checkpoint cycle number corresponding to the mapping data to the current checkpoint cycle number; Determine whether the first flag bit corresponding to the write request in the mapping data is the same as the storage area pointed to by the second flag bit; if not, store the encrypted data in the storage area pointed to by the second flag bit; if so, flip the second flag bit and store the encrypted data in the storage area pointed to by the flipped second flag bit.

21. The method according to claim 19, wherein The method further comprises: Obtaining a read request for the persistent memory, and obtaining counter data and mapping data corresponding to the read request according to a target memory address corresponding to the read request; Determine, according to the mapping data, a storage area in the persistent memory pointed to by the second flag bit as a target storage area, and read the encrypted data from the target storage area; The encrypted data is decrypted according to the counter data to obtain decrypted data corresponding to the read request.

22. The method of claim 19, wherein: The method further comprises: After the system is restarted, the rollback log of the counter generated within the target checkpoint period before the system restart is read from the log storage area in the persistent memory; Determine, according to the rollback log, an address of a first storage area of the working data within the target checkpoint period in the persistent memory; According to the first storage area address, obtaining specified mapping data, and determining whether the checkpoint cycle number corresponding to the specified mapping data is the same as the system checkpoint cycle number in the checkpoint metadata storage area of the persistent memory; if so, updating the value of a second flag bit in the specified mapping data that is different from the first flag bit to the value of the first flag bit; Reading the checkpoint cycle number before the system restart from the persistent memory and sending it to the checkpoint metadata register, and increasing the checkpoint cycle number to start data recovery; Decrypting the checkpoint data pointed to by the first flag bit of the designated mapping data using the counter data value in the rollback log, and encrypting the decrypted data again before sending the encrypted data to the persistent memory; Refresh the modified counters and modified mapping data in the counter cache and mapping data cache back to the persistent memory, restore the processor state data in the checkpoint metadata storage area to the processor registers, increase the checkpoint cycle number to complete data recovery, and continue application execution.

23. The method according to claim 13, wherein Encrypting the target data according to the target counter data to obtain encrypted data, and storing the encrypted data in a storage area corresponding to the working data according to the mapping data, specifically includes: If the target counter data is not stored in the counter cache and the target mapping data is not stored in the mapping data cache, access the persistent memory and obtain the target counter data and the target mapping data from the persistent memory.

24. The method of claim 13, wherein: The target data includes: graph data, and the data storage system is used to read and write the graph data involved in the graph calculation process.

25. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the method according to any one of claims 13 to 24 is implemented.

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