A highly integrated high out-of-band rejection acoustic wave filter and method of making the same

CN116248063BActive Publication Date: 2026-08-18UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Patent Information

Application Number
CN202310239883.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-14
Publication Date
2026-08-18
Estimated Expiration
2043-03-14

AI Technical Summary

Technical Problem

但是,这类滤波器在较低阶时由于品质因素(Q)等的限制,存在带外抑制较弱的问题

Benefits of technology

[0029] This invention provides a highly integrated high out-of-band suppression acoustic wave filter and its fabrication method. It leverages the characteristic that both traditional Lamb wave resonators and on-chip spiral inductors contain a silicon substrate and an insulating layer. Based on the traditional Lamb wave resonator, an on-chip spiral inductor is integrated through a process to reduce the impact of high-frequency parasitic capacitance, resistance, and inductance parameters introduced by the off-chip passive inductor, achieving better out-of-band suppression under the same filter order. During integration, the first oxide layer on the substrate is divided into regions, serving simultaneously as a sacrificial layer for the resonator and an insulating layer for the spiral inductor, simplifying the fabrication process and saving fabrication time. Furthermore, in terms of material selection, the temperature compensation layer, the insulating region, and the sacrificial region are all made of oxide materials, enabling the multi-functional use of the same material on the same chip, reducing processing difficulty and cost.

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Abstract

The application relates to the technical field of acoustic wave filters, in particular to a highly-integrated high-band-out-suppression acoustic wave filter and a preparation method thereof. On the basis of a traditional Lamb wave resonator, a spiral inductor is integrated on a chip through a process to reduce the influence of high-frequency parasitic capacitance, resistance and inductance and the like parameters caused by a passive inductor outside the chip on the device, and better band-out suppression under the condition of the same order filter is realized. In the integration process, the first oxide layer on the substrate is divided into regions, so that the first oxide layer simultaneously serves as a resonator sacrifice layer and an insulating layer of the spiral inductor, the manufacturing process is simplified, and the manufacturing time is saved. In addition, in the material selection aspect, the temperature compensation layer, the insulating region and the sacrifice region are all oxide materials, the same material on the same chip is used in multiple functions, and the processing difficulty and cost are reduced.
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Description

Technical Field

[0001] This invention relates to the field of acoustic filter technology, specifically to a highly integrated high out-of-band suppression acoustic filter and its fabrication method. Background Technology

[0002] As a crucial component of radio frequency (RF) wireless communication front-end circuits, RF filters possess frequency selection and interference suppression capabilities. Piezoelectric-based acoustic filters, with their advantages in performance, size, and manufacturing processes, have become the mainstream choice for mobile RF front-ends. Currently, the rapid development of 5G communication technology places even more stringent demands on the performance of RF filters, such as higher operating frequencies and greater out-of-band rejection. Traditional piezoelectric-based acoustic filters mainly include thin-film cavity acoustic resonator (FBAR) filters and surface acoustic wave (SAW) resonators. FBAR devices mostly use aluminum nitride as the piezoelectric material. Due to the relatively low electromechanical coupling coefficient of aluminum nitride, the resulting FBAR filter has a relatively small bandwidth. SAW resonators, on the other hand, have narrow electrode widths, leading to higher ohmic losses and making them unsuitable for high-frequency communication applications.

[0003] In recent years, researchers have proposed Lamb wave resonators based on lithium niobate (LN) or lithium tantalate (LT) piezoelectric materials. These resonators typically operate in the first-order antisymmetric Lamb wave vibration mode (A1). Compared to FBAR and SAW resonators, they have a larger electromechanical coupling coefficient and a higher operating frequency, making them ideal as resonant units for high-frequency, wide-bandwidth filters. However, these filters suffer from weak out-of-band rejection at lower orders due to limitations such as the quality factor (Q). Traditional solutions for achieving higher out-of-band rejection include increasing the filter order, which leads to increased device area and insertion loss, and introducing passive inductors. However, passive inductors require jumpers, which, at high frequencies, can couple between jumper-introduced transmission lines and connection points, or between these jumpers and existing metal leads, resulting in parasitic capacitance, resistance, and inductance, thus degrading filter performance. Therefore, it is necessary to improve existing Lamb wave resonators to enhance their out-of-band rejection capability. Summary of the Invention

[0004] In view of this, this invention proposes a highly integrated high out-of-band rejection acoustic wave filter and its fabrication method. This filter can achieve better out-of-band rejection without increasing the filter order, and reduce the impact of high-frequency parasitic capacitance, resistance, and inductance parameters caused by off-chip lead inductance on the device. During the fabrication process, multiple oxide deposition processes are used, with the same oxide material serving as the sacrificial layer, temperature compensation layer, and insulating layer for the on-chip spiral inductor, respectively. This optimizes the frequency-temperature characteristics and electrical isolation of the acoustic wave filter, reduces the difficulty of the fabrication process, saves fabrication time, and strongly suppresses parasitic parameters of the acoustic wave filter, thus improving the filter's out-of-band rejection capability.

[0005] The specific technical solution of the present invention is as follows:

[0006] A highly integrated high out-of-band suppression acoustic filter includes a substrate, the substrate including a substrate and a first oxide layer deposited on the substrate;

[0007] The first oxide layer is divided into sacrificial regions and insulating regions and is made of an oxide material;

[0008] A resonator is formed on the sacrificial region, and a spiral inductor is formed on the insulating region. The spiral inductor and the resonator are connected by metal leads.

[0009] The resonator consists of a piezoelectric thin film and a top interdigital electrode. The top interdigital electrode is deposited on the piezoelectric thin film, and the piezoelectric thin film around the top interdigital electrode has etched holes.

[0010] The spiral inductor consists of a bottom metal wire and a spiral metal wire. The spiral metal wire is located on the upper surface of the first oxide layer, and the bottom metal wire is fabricated in the first oxide layer. One end of the bottom metal wire passes through the first oxide layer and connects to the spiral metal wire, and the other end passes through the first oxide layer and connects to the metal lead. The piezoelectric film in the area not covered by the top interdigital electrode and the gaps between the spiral metal wires are filled with oxide material.

[0011] There are two air cavities, both formed in the substrate; one air cavity expands into the piezoelectric thin film layer and connects with the pre-reserved etching hole in the piezoelectric thin film to form the air cavity, so that the piezoelectric thin film in the area where the top interdigital electrode is located is suspended above the supporting substrate, and the other air cavity is located in the substrate below the on-chip spiral inductor.

[0012] Furthermore, a second oxide layer is deposited on the insulating area of ​​the first oxide layer. One end of the bottom metal wire passes through the first oxide layer and the second oxide layer in sequence to connect to the spiral metal wire, and the other end passes through the first oxide layer and the second oxide layer in sequence to connect to the metal lead.

[0013] Furthermore, the aforementioned high out-of-band suppression acoustic filter is also equipped with perforated electrodes, and the top interdigitated electrodes and the spiral metal wires are both connected to the external circuit through the perforated electrodes.

[0014] Furthermore, the oxide material is silicon dioxide, the substrate material is silicon or silicon nitride, and the piezoelectric thin film material is lithium niobate or lithium tantalate.

[0015] Furthermore, the upper surface of the top interdigitated electrode and the upper surface of the spiral metal wire are preferably located at the same horizontal position to prevent the connecting metal lead from breaking; during manufacturing, the absolute error between the two shall not exceed 200nm.

[0016] Furthermore, the air trough can be circular, rectangular, trapezoidal, or elliptical.

[0017] Furthermore, the materials of the top interdigitated electrode, bottom metal wire, spiral metal wire, and lead wire are aluminum, copper, molybdenum, nickel, etc.

[0018] Furthermore, the bottom metal line is a double-layer or multi-layer structure composed of a seed layer and a target metal layer.

[0019] A method for fabricating a highly integrated high out-of-band suppression acoustic filter includes the following steps:

[0020] Step 1: Provide a substrate and polish the upper surface of the substrate using chemical mechanical polishing. The substrate consists of a substrate and a first oxide layer made of an oxide material. The first oxide layer is disposed on the substrate and divided into a sacrificial layer region and an insulating region.

[0021] Step 2: Prepare the bottom metal trace. On the upper surface of the first insulating region of the first oxide layer, prepare the bottom metal trace by electron beam deposition physical evaporation or electrochemical method.

[0022] Step 3: Prepare the second layer of the first oxide layer. The second layer of the first oxide layer is prepared on the surface and around the bottom metal line using deposition and photolithography. This layer, together with the first layer of the first oxide layer, constitutes the first oxide layer so that the bottom metal line is wrapped in it. A metal lead hole is left at each end of the bottom metal line.

[0023] Step 4: Prepare a piezoelectric thin film. Deposit a piezoelectric thin film in the sacrificial layer region using deposition and photolithography, and leave etched holes to release the device.

[0024] Step 5: Prepare the second oxide layer. Use deposition and photolithography techniques to deposit an oxide material as the second oxide layer on the insulating surface, and retain the lead hole of the bottom metal lead to make its upper surface consistent with the upper surface of the piezoelectric film.

[0025] Step 6: Prepare interdigitated electrodes, spiral metal lines and metal leads. Prepare top interdigitated electrodes, spiral metal lines and metal leads on the top of the piezoelectric film and the top of the second oxide layer using electron beam deposition physical evaporation or electrochemical methods, and fill the lead holes of the bottom metal lines so that one end is connected to the spiral metal line through one lead hole and the other end is connected to the metal lead through the other lead hole.

[0026] Step 7: Use deep silicon etching to etch a groove on the substrate at the position corresponding to the top interdigitated electrode to form an air cavity, which expands to the bottom of the sacrificial region; etch another groove on the substrate at the position corresponding to the spiral inductor to form another air cavity;

[0027] Step 8: Use wet etching to remove the oxide material in the sacrificial layer area below the piezoelectric film, so that the piezoelectric film and etched holes in the area where the top interdigitated electrode is located are connected to the air cavity to release the device. Then, remove the residual liquid by critical point drying to prevent the stress generated by liquid evaporation from damaging the device.

[0028] Step 9: Prepare the third oxide layer. Silica is deposited in the areas not covered by the top interdigitated electrodes and the areas not covered by the spiral metal wires using a deposition method to form a temperature compensation layer for temperature compensation and a third oxide layer for isolating electrical influences.

[0029] This invention provides a highly integrated high out-of-band suppression acoustic wave filter and its fabrication method. It leverages the characteristic that both traditional Lamb wave resonators and on-chip spiral inductors contain a silicon substrate and an insulating layer. Based on the traditional Lamb wave resonator, an on-chip spiral inductor is integrated through a process to reduce the impact of high-frequency parasitic capacitance, resistance, and inductance parameters introduced by the off-chip passive inductor, achieving better out-of-band suppression under the same filter order. During integration, the first oxide layer on the substrate is divided into regions, serving simultaneously as a sacrificial layer for the resonator and an insulating layer for the spiral inductor, simplifying the fabrication process and saving fabrication time. Furthermore, in terms of material selection, the temperature compensation layer, the insulating region, and the sacrificial region are all made of oxide materials, enabling the multi-functional use of the same material on the same chip, reducing processing difficulty and cost. Attached Figure Description

[0030] Figure 1 A top view of a highly integrated high out-of-band suppression acoustic filter in an embodiment;

[0031] Figure 2 for Figure 1 Schematic diagram of the J-section;

[0032] Figure 3 The process flow diagram for a highly integrated high out-of-band suppression acoustic filter is shown in the embodiment.

[0033] Figure 4 The simulation admittance curve of the parallel resonator provided in the embodiment of the present invention;

[0034] Figure 5 The simulated admittance curve of the series resonator provided in the embodiment of the present invention;

[0035] Figure 6 The circuit diagram of a sixth-order filter provided in the embodiment of the present invention, wherein Xn represents the nth resonator;

[0036] Figure 7 The circuit diagram of the sixth-order filter with inductance provided in the embodiment of the present invention is shown, wherein L1, L3 and L2, L4 represent parallel on-chip spiral inductors and series on-chip spiral inductors, respectively.

[0037] Figure 8 The equivalent circuit diagram of the on-chip spiral inductor provided in the embodiment of the present invention;

[0038] Figure 9 A comparison diagram of the transmission curves of two sixth-order filters provided in an embodiment of the present invention;

[0039] Marked in the attached diagram:

[0040] Substrate 10, air cavity 20, first oxide layer 30, temperature compensation layer 31, piezoelectric thin film 40, top interdigital electrode 51, input interdigital electrode set 511, output interdigital electrode set 512, perforated electrode 513, spiral metal wire 52, bottom metal wire 53, metal lead 54. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described below in conjunction with the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0042] Example 1

[0043] According to the above technical solution, this embodiment provides a specific structure for a highly integrated high out-of-band suppression acoustic filter, such as... Figure 1 , Figure 2 As shown, the substrate includes a base 10 and a first oxide layer 30. The first oxide layer 30 is divided into sacrificial regions and insulating regions. The first oxide layer is made of silicon dioxide.

[0044] A resonator and a perforated electrode 513 are formed on the sacrificial region, and a spiral inductor and a perforated electrode are formed on the insulating region. The spiral inductor and the resonator are both connected to an external circuit through the perforated electrode 513, and they are connected to each other by a metal lead 54.

[0045] The resonator consists of a piezoelectric thin film 40 and a top interdigital electrode 51. The top interdigital electrode 51 is deposited on the piezoelectric thin film 40, and the piezoelectric thin film around the top interdigital electrode 51 has etched holes.

[0046] The spiral inductor consists of a bottom metal wire 53 and a spiral metal wire 52. The spiral metal wire 52 is located on the upper surface of the first oxide layer 30, and the bottom metal wire 53 is formed within the first oxide layer 30. One end of the bottom metal wire 53 passes through the first oxide layer 30 and connects to the spiral metal wire, while the other end passes through the first oxide layer 30 and connects to the metal lead 54. An oxide material is filled on the piezoelectric film 40 in the area not covered by the top interdigital electrode 51 to form a temperature compensation layer 31. The third oxide layer is made of the same material as the first oxide layer, also silicon dioxide, and serves to compensate for temperature, thus forming the temperature compensation layer 31. The spaces between the spiral metal wires 52 are also filled with an oxide material to isolate electrical interference between them. The oxide material filling the spaces between the temperature compensation layer 31 and the spiral metal wires 52 is the same as that of the first oxide layer, namely silicon dioxide.

[0047] There are two air cavities 20. The shape of the metal cavity is not limited and can be circular, rectangular, trapezoidal, or elliptical. Both are formed in the substrate 10. One air cavity expands into the piezoelectric thin film layer 40 and connects with the pre-etched hole in the piezoelectric thin film 40 to form the air cavity, so that the piezoelectric thin film 40 in the area where the top interdigital electrode 51 is located is suspended above the substrate 10. The other air cavity 20 is located in the substrate 10 below the on-chip spiral inductor. In this embodiment, in order to make the upper surface of the top interdigital electrode 51 and the upper surface of the spiral metal wire 52 at the same level to prevent the connection metal lead from breaking, a second oxide layer is also deposited on the insulating area of ​​the first oxide layer 30. One end of the bottom metal wire 53 passes through the first oxide layer 30 and the second oxide layer 30 in sequence to connect to the spiral metal wire 52, and the other end passes through the first oxide layer 30 and the second oxide layer in sequence to connect to the metal lead 54.

[0048] In implementation, the number of resonators and spiral inductors is set according to requirements. This embodiment provides a schematic diagram and flowchart of the overall filter device with two resonators and two spiral inductors to represent the device arrangement and fabrication process of any number of resonators and spiral inductors. The two resonators have the same structure, consisting of a series resonator and a parallel resonator; the two spiral inductors are a series spiral inductor and a parallel spiral inductor, respectively. The top interdigital electrode structures in the series resonator and the parallel resonator are the same, both consisting of an input interdigital electrode set 511 and an output interdigital electrode set 512. The input interdigital electrode of the series resonator is connected to a metal busbar through an anchor point, and then connected to a through-hole electrode and a parallel spiral metal wire, respectively. The output interdigital electrode of the parallel resonator is connected to another metal busbar through an anchor point, and then connected to the series spiral metal wire, and connected to the through-hole electrode through the series spiral metal wire.

[0049] like Figure 3 As shown, this embodiment also provides a method for fabricating the above-mentioned highly integrated high out-of-band suppression acoustic filter, including the following steps:

[0050] Step 1: Provide a substrate and polish its upper surface using chemical mechanical polishing (CMP). The substrate consists of a substrate 10 and a first oxide layer 30 made of an oxide material, with the first oxide layer 30 integrally disposed on the substrate. It is divided into a sacrificial layer region and an insulating region. The substrate material is single-crystal silicon with a crystal orientation of [insert crystal orientation here]. <100> The silicon wafer has a diameter of 100 mm and a silicon substrate thickness of 525 μm. The first oxide layer 30 is made of silicon dioxide with a thickness of 3 μm and is prepared on the silicon substrate by thermal oxidation.

[0051] Step 2: On the upper surface of the first insulating region of the first oxide layer 30, a bottom metal trace 53 is prepared by electron beam deposition physical evaporation or electrochemical method; the material is aluminum, with a thickness of 2μm and a width of 6μm.

[0052] Step 3: A second layer of the first oxide layer 10 is prepared on the upper surface and around the bottom metal line 53 using deposition and photolithography. This layer, together with the first layer of the first oxide layer 30, constitutes the first oxide layer 30 so that the bottom metal line 53 is wrapped in it. A metal lead hole is left at each end of the bottom metal line 53. Its material is silicon dioxide and its thickness is 5μm.

[0053] Step 4: Deposit a piezoelectric thin film layer 40 in the sacrificial region using deposition and photolithography, and leave etched holes to release the device; the piezoelectric thin film material is lithium niobate with a thickness of 550 nm.

[0054] Step 5: Deposit an oxide material as a second oxide layer in the insulating area using deposition and photolithography, and retain the lead hole of the bottom metal 53 lead. The thickness of the second oxide layer is 550nm, and the height error between it and the upper surface of the piezoelectric thin film layer 40 does not exceed 200nm.

[0055] Step 6: Prepare a top interdigitated electrode 51, a spiral metal wire 52, and a metal lead 54 on the top of the piezoelectric thin film layer 40 and the top of the second oxide layer using an electron beam deposition physical evaporation method or an electrochemical method, and fill the lead hole of the bottom metal wire 53 so that one end is connected to the spiral metal wire 52 through one lead hole and the other end is connected to the metal lead 54 through the other lead hole; the top interdigitated electrode 51, the spiral metal wire 52, and the metal lead 54 are all made of aluminum. The thickness of the top interdigitated electrode 51 is 100 nm and the width is 2 μm. The thickness of the spiral metal wire 52 is 2 μm and the width is 4 μm.

[0056] Step 7: Use deep silicon etching to etch a groove on the substrate at the position corresponding to the top interdigital electrode 51 to form an air cavity 20, which expands to the bottom of the sacrificial region; etch another groove on the substrate at the position corresponding to the spiral inductor to form another air cavity 20; the thickness from the bottom of the air cavity to the lower surface of the insulating layer is 100 μm.

[0057] Step 8: Wet etching is used to remove the oxide material in the sacrificial region below the piezoelectric film 40, so that the piezoelectric film 40 and the etched hole in the region where the top interdigital electrode 51 is located are connected to the air cavity 20 to release the device, and the residual liquid is removed by critical point drying to prevent the stress generated by liquid evaporation from damaging the device.

[0058] Step 9: Prepare the third oxide layer. Silicon dioxide is deposited in the uncovered areas of the top interdigitated electrode 51 and the uncovered areas of the spiral metal wire 52 using a deposition method to form a temperature compensation layer 31 for temperature compensation and a third oxide layer for isolating electrical influences.

[0059] Simulations were performed on the high out-of-band suppression acoustic filter prepared by the above method:

[0060] like Figure 4 , Figure 5 As shown, in the high out-of-band suppression acoustic filter of this embodiment, the resonant frequency of the parallel resonator is 3.69 GHz; the resonant frequency of the series resonator is 3.14 GHz, and the resonant frequency offset between the series resonator and the parallel resonator is 550 MHz.

[0061] like Figure 6 The diagram shown is an equivalent circuit diagram of the sixth-order filter in this embodiment.

[0062] like Figure 7The diagram shown is an equivalent circuit diagram of a sixth-order filter with two series inductors and two parallel inductors in this embodiment.

[0063] like Figure 8 The diagram shown is an equivalent electrical schematic of the on-chip spiral inductor in this embodiment.

[0064] like Figure 9 As shown, this is an embodiment. Figure 7 and Figure 8 The transmission curves of the filters shown are compared. The curve corresponding to the new sixth-order filter is obtained after adding an on-chip spiral inductor. Compared with the traditional sixth-order filter, its out-of-band rejection is improved by 18dB, while its insertion loss is almost unaffected.

Claims

1. A highly integrated high out-of-band suppression acoustic filter, comprising a substrate, said substrate including a substrate and a first oxide layer deposited on the substrate, characterized in that: The first oxide layer is divided into sacrificial regions and insulating regions and is made of an oxide material; A resonator is formed on the sacrificial region, and a spiral inductor is formed on the insulating region. The spiral inductor and the resonator are connected by metal leads. The resonator consists of a piezoelectric thin film and a top interdigital electrode. The top interdigital electrode is deposited on the piezoelectric thin film, and the piezoelectric thin film around the top interdigital electrode has etched holes. The spiral inductor consists of a bottom metal wire and a spiral metal wire. The spiral metal wire is located on the upper surface of the first oxide layer, and the bottom metal wire is fabricated in the first oxide layer. One end of the bottom metal wire passes through the first oxide layer and connects to the spiral metal wire, and the other end passes through the first oxide layer and connects to the metal lead. The piezoelectric film in the area not covered by the top interdigital electrode and the gaps between the spiral metal wires are filled with oxide material. Two air cavities are formed in the substrate. One air cavity expands into the piezoelectric thin film layer and is connected to the pre-etched holes in the piezoelectric thin film to form the air cavity together, so that the piezoelectric thin film in the area where the top interdigital electrode is located is suspended above the supporting substrate. The other air cavity is located in the substrate below the on-chip spiral inductor.

2. The highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: A second oxide layer is also deposited on the insulating area of ​​the first oxide layer. One end of the bottom metal wire passes through the first oxide layer and the second oxide layer in sequence to connect to the spiral metal wire, and the other end passes through the first oxide layer and the second oxide layer in sequence to connect to the metal lead.

3. The highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: The high out-of-band suppression acoustic filter is also equipped with perforated electrodes, and the top interdigitated electrodes and the spiral metal wires are connected to the external circuit through the perforated electrodes.

4. The highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: The oxidizing material is silicon dioxide, the substrate material is silicon or silicon nitride, and the piezoelectric thin film material is lithium niobate or lithium tantalate.

5. A highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: The air cavity can be circular, rectangular, trapezoidal, or elliptical.

6. The highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: The materials of the top interdigitated electrode, bottom metal wire, spiral metal wire, and lead wire are aluminum, copper, molybdenum, or nickel.

7. A highly integrated high out-of-band suppression acoustic filter according to claim 1, characterized in that: The bottom metal line has a two- or multi-layer structure consisting of a seed layer and a target metal layer.

8. A method for fabricating a highly integrated high out-of-band suppression acoustic filter, characterized in that: Includes the following steps: Step 1: Provide a substrate and polish the upper surface of the substrate using chemical mechanical polishing. The substrate consists of a substrate and a first oxide layer made of an oxide material. The first oxide layer is disposed on the substrate and divided into a sacrificial layer region and an insulating region. Step 2: Prepare the bottom metal trace. On the upper surface of the first insulating region of the first oxide layer, prepare the bottom metal trace by electron beam deposition physical evaporation or electrochemical method. Step 3: Prepare the second layer of the first oxide layer. The second layer of the first oxide layer is prepared on the surface and around the bottom metal line using deposition and photolithography. The second layer and the first layer of the first oxide layer together constitute the first oxide layer so that the bottom metal line is wrapped in it. A metal lead hole is left at each end of the bottom metal wire; Step 4: Prepare a piezoelectric thin film. Deposit a piezoelectric thin film in the sacrificial layer region using deposition and photolithography, and leave etched holes to release the device. Step 5: Prepare the second oxide layer. Deposit oxide material as the second oxide layer in the insulating area using deposition and photolithography techniques, and retain the lead hole of the bottom metal lead to make its upper surface consistent with the upper surface of the piezoelectric film. Step 6: Prepare interdigitated electrodes, spiral metal lines and metal leads. Prepare top interdigitated electrodes, spiral metal lines and metal leads on the top of the piezoelectric film and the top of the second oxide layer using electron beam deposition physical evaporation or electrochemical methods, and fill the lead holes of the bottom metal lines so that one end is connected to the spiral metal line through one lead hole and the other end is connected to the metal lead through the other lead hole. Step 7: Use deep silicon etching to etch a groove on the substrate at the position corresponding to the top interdigitated electrode to form an air cavity, which expands to the bottom of the sacrificial region; etch another groove on the substrate at the position corresponding to the spiral inductor to form another air cavity; Step 8: Use wet etching to remove the oxide material in the sacrificial layer area below the piezoelectric film, so that the piezoelectric film and etched holes in the area where the top interdigitated electrode is located are connected to the air cavity to release the device. Then, remove the residual liquid by critical point drying to prevent the stress generated by liquid evaporation from damaging the device. Step 9: Prepare the third oxide layer. Silica is deposited in the areas not covered by the top interdigitated electrodes and the areas not covered by the spiral metal wires using a deposition method to form a temperature compensation layer for temperature compensation and a third oxide layer for isolating electrical influences.

Citation Information

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