Bit mapping design method and apparatus, electronic device, and storage medium

Abstract

This application relates to the field of digital information transmission technology, and in particular to a bit mapping design method, apparatus, electronic device, and storage medium. The method includes: obtaining a set of candidate bit mapping parameters based on channel parameters of a given channel model and a bit mapping scheme; classifying these parameters using preset equivalence classification conditions; filtering the set of equivalent bit mapping parameters that satisfies preset performance conditions to generate a candidate bit mapping parameter set; if the candidate bit mapping parameter set satisfies a preset size condition, obtaining the final candidate bit mapping parameter set; otherwise, re-classifying and filtering the candidate bit mapping parameter set until the conditions are met; and performing performance evaluation on all bit mapping parameters in the final candidate bit mapping parameter set to obtain the bit mapping parameters that satisfy the preset performance conditions, which are then used as the final design result. This solves the problems of poor signal-to-noise ratio threshold and poor performance in high-order mapping systems in related technologies.

Description

Technical Field

[0001] This application relates to the field of digital information transmission technology, and in particular to a bit mapping design method, apparatus, electronic device and storage medium. Background Technology

[0002] Regarding LDPC (Low-Density Parity Check) code performance analysis tools, for a class of near-single-edge type QC-LDPC (Quasi-Cyslic Low-Density Parity-Check Codes) codes (where the row weights of the parity-check matrix or basis matrix are quasi-regular, such as Type-B LDPC codes in the ATSC 3.0 specification), either the SET-DE (Single-Edge Type) tool or the MET-DE (Multi-Edge Type-DE) tool can be used for analysis. For a class of multi-edge type QC-LDPC codes (where both the row and column weights of the parity-check matrix or basis matrix are irregular, and there are special variable nodes with a column weight of 1 or punctured variable nodes, such as 5G-NR LDPC codes), MET-DE must be used for analysis.

[0003] When the coding and modulation method in BICM-ID (Bit-Interleaved Coded Modulation with Iterative Decoding) technology adopts QC-LDPC codes and high-order constellation mapping (referred to as high-order mapping), i.e., the high-order mapping QC-LDPC-BICMID system, the following problems exist:

[0004] 1. The signal-to-noise ratio (SNR) threshold performance of typical BICM and BICMID systems needs improvement: In the traditional BICMID technology, the bit interleaving module of the high-order mapping QC-LDPC-BICMID system adopts typical bit interleaving and has random interleaving characteristics, randomly mapping the coded bits to different constellation bits. MET-DE analysis results show that the SNR threshold of the high-order mapping LDPC-BICMID system based on typical bit interleaving still has room for improvement compared to the BICMID capacity limit.

[0005] 2. Both the encoded bits and constellation bits have UEP (Unequal Error Protection) characteristics: Bit interleaving (the mapping / connection relationship from encoded bits to mapped bits) will affect the initialization conditions of the BP (belief propagation) decoding algorithm, thereby affecting the asymptotic performance and actual simulation performance of the system.

[0006] Therefore, it is necessary to optimize bit interleaving and to use reliable density evolution analysis tools to predict asymptotic performance, especially for LDPC-coded BICMID systems.

[0007] MET-DE asymptotic analysis shows that atypical bit interleaving can optimize the signal-to-noise ratio threshold of a high-order mapped QC-LDPC-BICMID system, that is, structurally mapping coded bits to constellation bits. Considering factors such as demodulation and decoding, system design, a simplified atypical bit interleaving technique is usually adopted, which includes two parts: "structured bit interleaving" and "bit mapping".

[0008] In related technologies, the bit mapping technology used in standards such as DVB-T2, ATSC3.0, DTMBA, and 5G-NR mainly adopts two schemes: the base matrix column ordering bit mapping scheme and the constellation bit ordering bit mapping scheme. The high-order mapping QC-LDPC-BICMID system based on bit mapping technology has the following problems:

[0009] Existing asymptotic performance analyses of LDPC code iterative BP decoding mainly rely on SET-DE and its Gaussian approximation analysis tools (such as the external information transfer graph analysis tool, i.e., the EXIT analysis tool). These tools have analysis errors for the aforementioned type of approximate one-sided LDPC codes, affecting the optimization of bit mapping parameters, and cannot correctly analyze the aforementioned type of typical multi-sided QC-LDPC codes. Summary of the Invention

[0010] This application provides a bit mapping design method, apparatus, electronic device, and storage medium to solve the problems in related technologies, such as poor signal-to-noise ratio threshold, poor performance, low analysis efficiency, and large analysis error, which affect the optimization of bit mapping parameters.

[0011] The first aspect of this application provides a bit mapping design method, comprising the following steps: initializing channel parameters according to a given channel model, and further combining them with a bit mapping scheme to obtain a candidate bit mapping parameter set; performing equivalence classification on the candidate bit mapping parameter set using preset equivalence classification conditions to obtain one or more equivalent bit mapping parameter sets; filtering the one or more equivalent bit mapping parameter sets that satisfy preset performance conditions, and generating a candidate bit mapping parameter set based on the filtered equivalent bit mapping parameter sets; if the candidate bit mapping parameter set satisfies a preset size condition, then obtaining a final candidate bit mapping parameter set; otherwise, re-classifying and filtering the candidate bit mapping parameter set until the candidate bit mapping parameter set satisfies the preset size condition, and ending the iterative filtering; performing performance judgment on all bit mapping parameters in the final candidate bit mapping parameter set to obtain one or more bit mapping parameters that satisfy the preset performance conditions, as the final design result.

[0012] Optionally, the step of classifying the candidate bit mapping parameter set using preset equivalence classification conditions includes: classifying the candidate bit mapping parameter set using equivalence criteria for coded bit groups and / or equivalence criteria for constellation bit groups. Specifically, if the redistribution of coded bit columns within a coded bit group is the same, the two coded bit groups are considered equivalent, and the corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters. If any two constellation bits in a constellation symbol satisfy symmetry, the two constellation bit groups are considered equivalent, and the corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters.

[0013] Optionally, the step of filtering the set of equivalent bit mapping parameters that satisfies the preset performance conditions includes: selecting a bit mapping parameter from each set of equivalent bit mapping parameters; performing performance judgment and filtering on the selected set of one or more bit mapping parameters to obtain the bit mapping parameters that satisfy the preset performance conditions; and using the set of equivalent bit mapping parameters corresponding to the bit mapping parameters that satisfy the preset performance conditions as the filtering result.

[0014] Optionally, the preset performance conditions include: given channel parameters, for a higher-order mapping system based on the bit mapping parameters, using a simplified analysis method based on local Gaussian approximation to obtain the accurate SNR-BER (Signal to Noise ratio-Bit Error Ratio) performance results of the higher-order mapping system, and selecting the bit mapping parameters according to performance evaluation criteria.

[0015] A second aspect of this application provides a bit mapping design apparatus, comprising: a first processing module, configured to initialize channel parameters according to a given channel model, and further combine them with a bit mapping scheme to obtain a candidate bit mapping parameter set; a classification module, configured to perform equivalence classification on the candidate bit mapping parameter set using preset equivalence classification conditions to obtain one or more equivalent bit mapping parameter sets; a filtering module, configured to filter the one or more equivalent bit mapping parameter sets that satisfy preset performance conditions, and generate a candidate bit mapping parameter set based on the filtered equivalent bit mapping parameter sets; and a second processing module, configured to obtain a final candidate bit mapping parameter set if the candidate bit mapping parameter set satisfies a preset size condition, otherwise re-classify and filter the candidate bit mapping parameter set until the candidate bit mapping parameter set satisfies the preset size condition, end the iterative filtering, and perform performance judgment on all bit mapping parameters in the final candidate bit mapping parameter set to obtain one or more bit mapping parameters that satisfy the preset performance conditions as the final design result.

[0016] Optionally, the classification module is further configured to: classify the candidate bit mapping parameter set into equivalent categories using the equivalence criteria of coded bit groups and / or constellation bit groups, wherein if the redistribution of coded bit columns within a group of coded bit groups is the same, then the two coded bit groups are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent; if any two constellation bits in the constellation bits contained in the constellation symbol satisfy symmetry, then the two constellation bits are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent.

[0017] Optionally, the filtering module is further configured to: select one bit mapping parameter from each set of equivalent bit mapping parameters; perform performance judgment and filtering on the selected one or more bit mapping parameters to obtain bit mapping parameters that meet preset performance conditions, and use the set of equivalent bit mapping parameters corresponding to the bit mapping parameters that meet the preset performance conditions as the filtering result.

[0018] Optionally, the preset performance conditions include: given channel parameters, using a simplified analysis method based on local Gaussian approximation for the higher-order mapping system based on the bit mapping parameters to obtain the accurate SNR-BER performance results of the higher-order mapping system, and selecting the bit mapping parameters according to the performance evaluation criteria.

[0019] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the bit mapping design method as described in the above embodiments.

[0020] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to implement the bit mapping design method as described in the above embodiments.

[0021] Therefore, this application has at least the following beneficial effects:

[0022] (1) The embodiments of this application are based on a simplified MET-DE analysis method with local Gaussian approximation, which takes into account both the efficiency and complexity of MET-DE analysis, and obtains the accurate SNR-BER performance results of the high-order mapping QC-LDPC-BICMID system based on bit mapping technology.

[0023] (2) The embodiments of this application are based on a multi-level search method of equivalent bit mapping, which is aimed at bit mapping schemes based on constellation bit sorting. When the constellation mapping order is high, the search efficiency of bit mapping can be greatly improved, and a bit mapping scheme with better signal-to-noise ratio threshold performance can be obtained.

[0024] (3) This application proposes a bit mapping parameter performance evaluation criterion that takes into account both AWGN (Additive White Gaussian Noise) and iid-Rayleigh channel conditions and BICM and BICMID receiver architectures.

[0025] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0026] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0027] Figure 1 This is a flowchart of a bit mapping design method provided according to an embodiment of this application;

[0028] Figure 2 This is a block diagram of the original MET-DE analysis of the receiver of the bit-mapping-based QC-LDPC-BICMID system according to an embodiment of this application;

[0029] Figure 3 A simplified MET-DE analysis block diagram for the receiver of the bit-mapped QC-LDPC-BICMID system according to embodiments of this application;

[0030] Figure 4For an AWGN channel according to an embodiment of this application, under the BICMID receiver architecture, the signal-to-noise ratio threshold difference diagram of the system corresponding to the bit mapping parameters in the equivalent bit mapping set;

[0031] Figure 5 This is a flowchart of a multi-level search method based on different equivalence conditions of equivalent bit mapping according to an embodiment of this application;

[0032] Figure 6 This is an example diagram of a bit mapping design apparatus according to an embodiment of this application;

[0033] Figure 7 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0034] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0035] In terms of coding and modulation techniques, coding and modulation, as a joint optimization technique for channel coding and digital modulation, has seen the emergence of various coding and modulation techniques. Typical techniques include MLC (multi-level coding), TCM (trellis coded modulation), and BICM (bit-interleaved coded modulation). The receiver-side iterative demapping BICMID technique is an improved version of BICM.

[0036] In channel coding, LDPC codes have received widespread attention in the industry due to their excellent performance, which closely approximates theoretical performance. Regular LDPC codes have regular row and column weights in their parity-check matrix. However, because regular LDPC codes exhibit poor signal-to-noise ratio (SNR) threshold performance under the BP iterative decoding algorithm, and considering factors such as the degree distribution and ring length of LDPC codes, irregular LDPC codes have emerged.

[0037] Density evolution (DE) analysis and construction methods for irregular LDPC codes have also emerged, characterized by the irregular column weights of the parity-check matrix. These methods have been extended to binary input BI-AWGN (Binary Input-Additive White Gaussian Noise) channels, among others. Irregular LDPC codes, with their ability to approximate channel capacity and lower decoding complexity compared to Turbo codes, have gained widespread application. QC-LDPC codes, in particular, have been successfully used in broadcast and communication standards such as DTMB-A, DVB-T2, ATSC 3.0, 5G New Radio (5G-NR), and Wi-Fi 5.

[0038] Regarding LDPC code performance analysis tools, for a class of approximately one-sided QC-LDPC codes (with quasi-regular row weights in the parity-check matrix or basis matrix, such as Type-B LDPC codes in the ATSC 3.0 specification), both one-sided and multi-sided density evolution tools can be used for analysis. For a class of multi-sided QC-LDPC codes (with irregular row and column weights in the parity-check matrix or basis matrix, and the presence of special variable nodes with column weights of 1 or punctured variable nodes, such as 5G-NR LDPC codes), MET-DE must be used for analysis.

[0039] When the coding and modulation method in BICMID technology adopts QC-LDPC codes and high-order constellation mapping, i.e., a high-order mapped QC-LDPC-BICMID system, the following problems exist:

[0040] 1. The signal-to-noise ratio (SNR) threshold performance of typical BICM and BICMID systems needs improvement: In the traditional BICMID technology, the bit interleaving module of the high-order mapping QC-LDPC-BICMID system adopts typical bit interleaving and has random interleaving characteristics, randomly mapping the coded bits to different constellation bits. MET-DE analysis results show that the SNR threshold of the high-order mapping LDPC-BICMID system based on typical bit interleaving still has room for improvement compared to the BICMID capacity limit.

[0041] 2. Both encoded bits and constellation bits have UEP characteristics: bit interleaving (the mapping / connection relationship from encoded bits to mapped bits) will affect the initialization conditions of the BP decoding algorithm, and thus affect the asymptotic performance and actual simulation performance of the system.

[0042] Therefore, it is necessary to optimize bit interleaving and to use reliable density evolution analysis tools to predict asymptotic performance, especially for LDPC-coded BICMID systems.

[0043] MET-DE asymptotic analysis shows that atypical bit interleaving can optimize the signal-to-noise ratio threshold of a high-order mapped QC-LDPC-BICMID system, that is, structurally mapping coded bits to constellation bits. Considering factors such as demodulation and decoding, system design, a simplified atypical bit interleaving technique is usually adopted, which includes two parts: "structured bit interleaving" and "bit mapping".

[0044] Based on literature review and technical analysis, the bit mapping technology currently used in standards such as DVB-T2, ATSC3.0, DTMBA, and 5G-NR mainly adopts the following two schemes: the bit mapping scheme based on the column order of the base matrix and the bit mapping scheme based on the constellation bit order.

[0045] The high-order mapping QC-LDPC-BICMID system based on bit mapping technology has the following problems:

[0046] 1. No publicly available literature presents a bit mapping design method based on constellation bit ordering for BICMID;

[0047] 2. Existing asymptotic performance analysis of LDPC code iterative BP decoding mainly relies on SET-DE and its Gaussian approximation analysis tools (such as external information transfer graph analysis tools, i.e., EXIT analysis tools). These tools have analysis errors for the aforementioned type of approximate one-sided LDPC codes, affecting the optimization of bit mapping parameters, and cannot correctly analyze the aforementioned type of typical multi-sided QC-LDPC codes.

[0048] 3. No literature has been published on the precise performance analysis of the BICMID system based on bit mapping technology, nor on low-complexity analysis methods, nor on high-performance design results.

[0049] The bit mapping design method, apparatus, electronic device, and storage medium of this application are described below with reference to the accompanying drawings. Specifically, Figure 1 This is a flowchart illustrating a bit mapping design method provided in an embodiment of this application.

[0050] like Figure 1 As shown, this bit mapping design method includes the following steps:

[0051] In step S101, channel parameters are initialized based on a given channel model, and then combined with a bit mapping scheme to obtain a set of candidate bit mapping parameters.

[0052] The bit mapping parameter represents the mapping from a certain coded bit group to the corresponding bit group. The mapping relationship between the constellation and the constellation bit group at a certain position.

[0053] The channel model can be AWGN or iid-Rayleigh, and can be set according to user needs; no specific limitations are made here.

[0054] It is understood that, in the embodiments of this application, the channel parameters are initialized by the channel parameters of the given channel model, and then combined with the bit mapping scheme to obtain a set of candidate bit mapping parameters, so as to facilitate subsequent equivalence classification.

[0055] Specifically, bit mapping parameters Represents the relationship between a certain coded bit group and its corresponding... The mapping relationship between a constellation and a constellation bit group at a certain position is as follows: Indicates the first Encoded bit groups mapped to The first of the constellation mapping Constellation Bit Group , .

[0056] In this embodiment of the application, before initializing the channel parameters according to the given channel model and further combining them with the bit mapping scheme to obtain the candidate bit mapping parameter set, the method further includes: initializing the given channel model based on the bit mapping scheme of constellation bit order to obtain the channel parameters.

[0057] It is understood that the embodiments of this application initialize a given channel model based on a constellation bit ordering bit mapping scheme to obtain channel parameters, so that the channel parameters of the given channel model can subsequently obtain a set of candidate bit mapping parameters.

[0058] Specifically, the bit mapping scheme based on constellation bit ordering: each column of the QC-LDPC code base matrix corresponds to... Each encoded bit, mapped in the same way, will be a base matrix of... Column encoding bits are divided into +1 coded bit groups, from the 1st to the... Bit groups of the same encoding size are respectively mapped to the first to second bits of the M-order constellation mapping. A bit permutation of the constellation bit group, the first +1 group of coded bits are continuously mapped to the first to second digits of the M-order constellation mapping. There are constellation bits, among which... , from the 1st to the The size of each encoded bit group is the same, the... +1 coded bit group size can be zero.

[0059] In step S102, the candidate bit mapping parameter set is classified into one or more equivalent bit mapping parameter sets by using preset equivalence classification conditions.

[0060] The preset equivalence classification conditions can be that the redistribution of the coded bit columns within a group is the same or that the constellation bits contained in the constellation symbol satisfy symmetry, i.e., the equivalence criteria for coded bit groups and / or the equivalence criteria for constellation bit groups, which are not specifically limited here.

[0061] It is understood that the embodiments of this application use equivalence classification conditions to perform equivalence classification on the candidate bit mapping parameter set to obtain one or more equivalence bit mapping parameter sets, so as to facilitate further screening of the equivalence bit mapping parameter set.

[0062] In this embodiment of the application, the candidate bit mapping parameter set is classified into equivalent categories using preset equivalence classification conditions, including: classifying the candidate bit mapping parameter set into equivalent categories using coded bit group equivalence criteria and / or constellation bit group equivalence criteria. If the redistribution of coded bit columns within a coded bit group is the same, the two coded bit groups are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent. If any two constellation bits in the constellation bits contained in the constellation symbol satisfy symmetry, the two constellation bits are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent.

[0063] It is understood that the embodiments of this application use the equivalence criteria of encoded bit groups and / or constellation bit groups to perform equivalence classification of the candidate bit mapping parameter set, so as to facilitate the subsequent selection of bit mapping parameters.

[0064] Specifically, the candidate bit mapping parameter set is classified into equivalent categories according to bit mapping equivalence criteria (i.e., the specific conditions for bit mapping equivalence classification). These criteria include, but are not limited to, the equivalence of coded bit groups and constellation bit groups. Wherein, if the... and When the redistribution of coded bit columns within a group is the same, the two coded bit groups can be considered equivalent and are called equivalent coded bit groups, i.e., swapping the first and second bits... and For constellation bit groups, the corresponding bit mapping parameters are equivalent; for an M-order constellation mapping, if the constellation symbol contains... The first of the constellations in the 1st zodiac bit and Constellation bits satisfy symmetry, meaning two constellation bits can be considered equivalent; these are called equivalent constellation bits, i.e., swapping the first bit... and Constellation bit groups have equivalent bit mapping parameters.

[0065] In step S103, one or more sets of equivalent bit mapping parameters that meet preset performance conditions are selected, and a candidate set of bit mapping parameters is generated based on the selected sets of equivalent bit mapping parameters.

[0066] It is understood that the embodiments of this application screen the equivalent bit mapping parameter set that meets the preset performance conditions, and generate a candidate bit mapping parameter set based on the screened equivalent bit mapping parameter set, so as to facilitate the subsequent screening of the candidate bit mapping parameter set that meets the corresponding conditions.

[0067] In this embodiment of the application, selecting one or more equivalent bit mapping parameter sets that satisfy preset performance conditions includes: selecting a bit mapping parameter from each equivalent bit mapping parameter set; performing performance judgment and filtering on the selected one or more bit mapping parameters to obtain bit mapping parameters that satisfy preset performance conditions; and using the equivalent bit mapping parameter set corresponding to the bit mapping parameter that satisfies the preset performance conditions as the filtering result.

[0068] It is understood that in this application embodiment, a bit mapping parameter is selected from each set of equivalent bit mapping parameters, and the selected bit mapping parameter is judged and filtered for performance to obtain a bit mapping parameter that meets the preset performance conditions. The set of equivalent bit mapping parameters corresponding to the selected bit mapping parameter is used as the filtering result, thereby obtaining a bit mapping parameter with better performance.

[0069] In step S104, if the candidate bit mapping parameter set meets the preset size condition, the final candidate bit mapping parameter set is obtained; otherwise, the candidate bit mapping parameter set is reclassified and filtered for equivalent bit mapping parameter sets until the candidate bit mapping parameter set meets the preset size condition, and the iterative filtering ends. The performance of all bit mapping parameters in the final candidate bit mapping parameter set is judged to obtain one or more bit mapping parameters that meet the preset performance conditions, which are taken as the final design result.

[0070] The preset size condition can be a size set by the user, which can be set according to the actual situation and needs, and no specific limitation is made here.

[0071] The preset performance conditions include: given channel parameters, for a high-order mapping system based on bit mapping parameters, using a simplified analysis method based on local Gaussian approximation, to obtain the accurate SNR-BER performance results of the high-order mapping system, and selecting bit mapping parameters according to performance evaluation criteria.

[0072] It is understood that in this embodiment of the application, if the candidate bit mapping parameter set meets the preset size condition, the final candidate bit mapping parameter set is determined; otherwise, the candidate bit mapping parameter set is re-classified and the equivalent bit mapping parameter set is screened again until the condition is met, then the iterative screening ends. The performance of all bit mapping parameters in the final candidate bit mapping parameter set is judged to obtain one or more bit mapping parameters that meet the preset performance conditions, which are taken as the final design result. By taking into account the channel conditions and the optimal bit mapping parameters, and based on the simplified MET-DE analysis method of local Gaussian approximation, the analysis efficiency of polygonal type density evolution is improved and the analysis complexity is reduced, resulting in high-precision high-order mapping system performance, and the signal-to-noise ratio threshold performance of the bit mapping system is improved.

[0073] Specifically, in the simplified MET-DE analysis method based on local Gaussian approximation, the iterative demapping analysis unit is implemented using a pre-established off-line table using the Monte Carlo method. Its inputs come from the channel parameter SNR on one hand, and from the mutual information calculation unit on the other. The average mutual information IA of the prior information of each constellation bit is output. The probability density function pdf0 is used to construct the off-line table in Monte Carlo. The iterative demapping analysis unit includes a channel transmission simulation unit, a Gaussian approximation unit, and an iterative demapping unit. The channel transmission simulation unit takes SNR as input, simulates the channel transmission and detransmission process, and outputs prior information of the transmitted symbols, which is then sent to the iterative demapping unit. The Gaussian approximation unit takes IA as input and outputs... The constellation bits of prior information are sent to the iterative demapping unit. The iterative demapping unit receives the transmitted symbol prior information from the channel transmission simulation unit and the prior information from the Gaussian approximation unit. Using the prior information of each constellation bit, perform iterative demapping operations to output... The extra-satellite information of each constellation, obtained from Monte Carlo simulations. By fitting the probability distribution of the dataset containing extra-satellite information from each constellation, we obtain... The probability density function pdf0 is the extrinsic information of each constellation bit. The local Gaussian approximation is reflected in two aspects: firstly, the LDPC code MET-DE analysis unit and the iterative demapping analysis unit are connected by a mutual information calculation unit (…). Figure 2 The input to the mutual information calculation unit is The probability density function of the prior information of each constellation bit is calculated as follows: On the one hand, the average mutual information IA of the constellation bits prior information is obtained by the iterative demapping analysis unit through an off-line table, which yields a non-Gaussian approximation of the channel parameter SNR given the average mutual information IA. The probability density function pdf0 of the extra-satellite information of each constellation ( Figure 3 ).

[0074] Secondly, bit mapping parameters are selected according to performance evaluation criteria. Specifically, when considering two channel conditions (AWGN and iid-Rayleigh) and two receiver architectures (BICM and BICMID), MET-DE analysis is performed on the bit mapping system to obtain the SNR-BER results of the system under the two channel conditions and the two receiver architectures. Given an SNR, the bit mapping parameters corresponding to the bit mapping system with the smaller joint BER (product of the BER of the system under the two channel conditions and the two receiver architectures) are selected.

[0075] According to the bit mapping design method proposed in this application, channel parameters are initialized based on a given channel model. Further, a candidate bit mapping parameter set is obtained by combining the bit mapping scheme. The candidate bit mapping parameter set is then equivalently classified to obtain an equivalent bit mapping parameter set. The set that meets the performance conditions is then selected to generate the final bit mapping parameter set. Next, it is determined whether the candidate bit mapping parameter set meets a preset size condition. If it does, the final candidate bit mapping parameter set is generated; otherwise, the equivalence classification and selection are repeated until the condition is met. Finally, the performance of all bit mapping parameters in the final candidate bit mapping parameter set is evaluated to obtain the final design result. By considering both channel conditions and optimal bit mapping parameters, and using a simplified MET-DE analysis method based on local Gaussian approximation, the analysis efficiency of polygonal type density evolution is improved and the analysis complexity is reduced, resulting in a high-precision, high-order mapping system. The multi-level search method based on equivalent bit mapping can significantly improve the search efficiency of bit mapping, and the signal-to-noise ratio threshold performance of the bit mapping system is superior.

[0076] The following will combine Figure 4 The bit mapping design method is explained in detail below:

[0077] like Figure 4 As shown, this embodiment is a high-order mapped QC-LDPC-BICMID system based on bit mapping technology. The channel coding adopts the QC-LDPC code specified by the DTMBA standard, and the constellation mapping adopts the 256APSK mapping specified by the DTMBA standard. For the bit mapping system, oriented towards the bit mapping scheme based on constellation bit ordering, this embodiment adopts a multi-level search method based on equivalent bit mapping, which includes the following steps:

[0078] S0: The bit mapping system uses a QC-LDPC code with a base matrix size of 40 rows and 120 columns and an elevation parameter of 512, as specified by the DTMBA standard. Each column of the QC-LDPC code base matrix corresponds to 512 coded bits. The mapping method is the same, dividing the 120 columns of coded bits of the base matrix into 9 coded bit groups. The first to eighth coded bit groups of the same size are mapped to a bit permutation of the first to eighth constellation bit groups of the 256APSK mapping. The first to eighth coded bit groups are of the same size, and the ninth coded bit group has a size of zero.

[0079] S1: Given two channel models, AWGN and iid-Rayleigh, and using a bit mapping scheme based on constellation bit ordering, initialize the channel parameters and obtain a set of 40,320 candidate bit mapping parameters.

[0080] S2: According to the dual equivalence criterion of the encoded bit group and the constellation bit group, the candidate bit mapping parameter set of size 40320 is classified into equivalences to obtain a set of 1920 equivalent bit mapping parameters, and then proceed to step S3.

[0081] The number C of the equivalent bit mapping parameter set varies with different equivalence criteria. When constellation bit group equivalence criteria, coded bit group equivalence criteria, and dual equivalence criteria of coded bit group and constellation bit group are used respectively, the corresponding C is as follows:

[0082] Table 1. Number of equivalent bit mapping parameter sets C under different equivalence criteria

[0083]

[0084] S3: Select one bit mapping parameter from the set of 1920 equivalent bit mapping parameters to obtain 1920 bit mapping parameters. Perform performance judgment and screening on the 1920 bit mapping parameters to obtain 102 bit mapping parameters. All bit mapping parameters in the set of equivalent bit mapping parameters corresponding to the selected 102 bit mapping parameters form a new candidate bit mapping parameter set of size 1980. Proceed to step 4.

[0085] Among these, different bit mapping parameters in the equivalent bit mapping parameter set are not strictly equivalent, but the corresponding system signal-to-noise ratio threshold performances are similar. See details... Figure 5 This also shows that the optimal bit mapping parameters obtained from 1920 bit mapping parameters are basically the same as those obtained from 40320 bit mapping parameters.

[0086] S4: Perform performance evaluation on all bit mapping parameters in the bit mapping parameter set to obtain a bit mapping parameter as the final design result.

[0087] Steps S3 and S4 perform performance evaluation on the bit mapping parameters. The key feature is that, given the channel parameters, for the high-order mapping QC-LDPC-BICMID system based on bit mapping technology, a simplified MET-DE analysis method based on local Gaussian approximation is used to obtain the accurate SNR-BER performance results of the system, and the bit mapping parameters are selected according to the performance evaluation criteria.

[0088] Original bit mapping parameters of the DTMB-A standard specification The optimal bit mapping parameters are obtained through a multi-level search method based on equivalent bit mapping. ,in Indicates the first The encoded bit group is mapped to the i-th constellation bit group of the 256APSK mapping. , Under two channel conditions (AWGN and iid-Rayleigh) and two receiver architectures (BICM and BICMID), the performance of receivers based on... , The bit mapping system was simulated and analyzed using MET-DE to obtain the system's signal-to-noise ratio threshold performance, as follows:

[0089] Table 2. Signal-to-noise ratio threshold performance of the bit-mapping system in simulation and MET-DE analysis.

[0090]

[0091] The MET-DE analysis yielded a BER of The signal-to-noise ratio threshold at that time.

[0092] As shown in the table above, under the two channel conditions of AWGN and iid-Rayleigh and the two receiver architectures of BICM and BICMID, there is a certain gap between the asymptotic signal-to-noise ratio (SNR) threshold of the uniform mapping system and the theoretical limit of the SNR threshold of the bit mapping system. The actual simulated SNR threshold is consistent with the MET-DE analysis results, indicating that the SNR threshold performance of the uniform mapping system needs to be improved.

[0093] In the BICM and BICMID receiver architecture, based on The asymptotic SNR thresholds of the bit-mapped system are superior to those of the uniform mapping system, improving them by approximately 0.1 dB and 0.2 dB, respectively. In the BICM receiver architecture, based on... The bit mapping system has an asymptotic signal-to-noise ratio threshold that is better than that based on The bit-mapped system asymptotically approaches the signal-to-noise ratio threshold, improving it by approximately 0.16 dB. Simultaneously, in the BICMID receiver architecture, based on... Bit mapping system asymptotic signal-to-noise ratio threshold and based The asymptotic signal-to-noise ratio threshold of the bit mapping system is close, and the actual simulated signal-to-noise ratio threshold is consistent with the MET-DE analysis results.

[0094] Therefore, the multi-level search method based on equivalent bit mapping proposed in this application is used to improve the high-order mapping QC-LDPC-BICMID system of the DTMBA standard. Under the conditions of 256APSK constellation mapping, QC-LDPC code, and 2 / 3 code rate, and for the bit mapping scheme based on constellation bit ordering, the bit mapping design method of this invention obtains the optimal bit mapping parameters that take into account both AWGN and iid-Rayleigh channel conditions and both BICM and BICMID receiver architectures. Under the BICM architecture, the system applying the optimal bit mapping parameters improves the average asymptotic signal-to-noise ratio threshold by about 0.16dB compared to the original bit mapping system. Under the BICMID architecture, the asymptotic signal-to-noise ratio threshold of the system applying the optimal bit mapping parameters is similar to that of the original bit mapping system. Actual simulation results verify the implementation effect of this invention.

[0095] Next, the bit mapping design apparatus proposed according to the embodiments of this application is described with reference to the accompanying drawings.

[0096] Figure 6 This is a block diagram of a bit mapping design device according to an embodiment of this application.

[0097] like Figure 6 As shown, the bit mapping design device 10 includes: a first processing module 100, a classification module 200, a filtering module 300, and a second processing module 400.

[0098] The first processing module 100 initializes channel parameters based on a given channel model and further combines them with a bit mapping scheme to obtain a set of candidate bit mapping parameters. The classification module 200 performs equivalence classification on the candidate bit mapping parameter set using preset equivalence classification conditions to obtain one or more sets of equivalent bit mapping parameters. The filtering module 300 filters one or more sets of equivalent bit mapping parameters that meet preset performance conditions and generates a set of candidate bit mapping parameters based on the filtered sets. The second processing module 400 obtains the final set of candidate bit mapping parameters if the set of candidate bit mapping parameters meets a preset size condition; otherwise, it performs equivalence classification and filtering on the set of candidate bit mapping parameters again until the set of candidate bit mapping parameters meets the preset size condition, then ends the iterative filtering, performs performance judgment on all bit mapping parameters in the final set of candidate bit mapping parameters, and obtains one or more bit mapping parameters that meet the preset performance conditions as the final design result.

[0099] In this embodiment, the classification module 200 is further configured to: classify the candidate bit mapping parameter set by using the equivalence criteria of coded bit groups and / or constellation bit groups, wherein if the redistribution of coded bit columns within a group of coded bit groups is the same, then the two coded bit groups are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent; if any two constellation bits in the constellation bits contained in the constellation symbol satisfy symmetry, then the two constellation bits are determined to be equivalent, and the corresponding constellation bit groups are swapped, and the corresponding bit mapping parameters are equivalent.

[0100] In this embodiment of the application, the filtering module 300 is further configured to: select one bit mapping parameter from each set of equivalent bit mapping parameters; perform performance judgment and filtering on the selected one or more bit mapping parameters to obtain bit mapping parameters that meet preset performance conditions, and use the set of equivalent bit mapping parameters corresponding to the bit mapping parameters that meet the preset performance conditions as the filtering result.

[0101] In this embodiment of the application, the preset performance conditions include: given channel parameters, for a high-order mapping system based on bit mapping parameters, a simplified analysis method based on local Gaussian approximation is used to obtain the accurate SNR-BER performance results of the high-order mapping system, and bit mapping parameters are selected according to performance evaluation criteria.

[0102] It should be noted that the foregoing explanation of the bit mapping design method embodiment also applies to the bit mapping design device of this embodiment, and will not be repeated here.

[0103] According to the bit mapping design apparatus proposed in this application, a set of candidate bit mapping parameters is obtained based on the channel parameters of a given channel model and the bit mapping scheme. The set of candidate bit mapping parameters is then equivalently classified to obtain an equivalent bit mapping parameter set. The set that meets the performance conditions is then selected to generate a final bit mapping parameter set. It is then determined whether the set of candidate bit mapping parameters meets the preset size condition. If it does, the final candidate bit mapping parameter set is generated. If it does not, the equivalence classification and selection are repeated until the condition is met. The performance of all bit mapping parameters in the final candidate bit mapping parameter set is then judged to obtain the final design result. By taking into account both channel conditions and optimal bit mapping parameters, and using a simplified MET-DE analysis method based on local Gaussian approximation, the analysis efficiency of polygonal type density evolution is improved and the analysis complexity is reduced, resulting in high-precision high-order mapping system performance. The multi-level search method based on equivalent bit mapping can significantly improve the search efficiency of bit mapping, and the signal-to-noise ratio threshold performance of the bit mapping system is better.

[0104] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include:

[0105] The memory 701, the processor 702, and the computer program stored on the memory 701 and executable on the processor 702.

[0106] When the processor 702 executes the program, it implements the bit mapping design method provided in the above embodiments.

[0107] Furthermore, electronic devices also include:

[0108] Communication interface 703 is used for communication between memory 701 and processor 702.

[0109] The memory 701 is used to store computer programs that can run on the processor 702.

[0110] The memory 701 may include high-speed RAM (Random Access Memory) memory, and may also include non-volatile memory, such as at least one disk storage.

[0111] If the memory 701, processor 702, and communication interface 703 are implemented independently, then the communication interface 703, memory 701, and processor 702 can be interconnected via a bus to complete communication between them. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 7 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0112] Optionally, in a specific implementation, if the memory 701, processor 702, and communication interface 703 are integrated on a single chip, then the memory 701, processor 702, and communication interface 703 can communicate with each other through an internal interface.

[0113] The processor 702 may be a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of this application.

[0114] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the bit mapping design method described above.

[0115] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0116] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0117] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0118] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (FPGAs), field-programmable gate arrays (FPGAs), etc.

[0119] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0120] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A bit mapping design method, characterized in that, Includes the following steps: Based on a given channel model, the channel parameters are initialized, and then combined with a bit mapping scheme to obtain a set of candidate bit mapping parameters. The candidate bit mapping parameter set is classified using preset equivalence classification conditions to obtain one or more equivalent bit mapping parameter sets. This classification includes: using coded bit group equivalence criteria and / or constellation bit group equivalence criteria to classify the candidate bit mapping parameter sets. Specifically, if the redistribution of coded bit columns within a coded bit group is the same, the two coded bit groups are considered equivalent, and their corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters. Similarly, if any two constellation bits within a constellation symbol satisfy symmetry, the two constellation bit groups are considered equivalent, and their corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters. Select the equivalent bit mapping parameter sets that satisfy the preset performance conditions from the one or more equivalent bit mapping parameter sets, and generate a candidate bit mapping parameter set based on the selected equivalent bit mapping parameter sets; If the candidate bit mapping parameter set meets the preset size condition, the final candidate bit mapping parameter set is obtained; otherwise, the candidate bit mapping parameter set is reclassified and filtered for equivalent bit mapping parameter sets until the candidate bit mapping parameter set meets the preset size condition, and the iterative filtering ends. The performance of all bit mapping parameters in the final candidate bit mapping parameter set is evaluated to obtain one or more bit mapping parameters that meet the preset performance conditions, which are then used as the final design result.

2. The method according to claim 1, characterized in that, The process of selecting the set of equivalent bit mapping parameters that satisfies the preset performance conditions includes: Select one bit mapping parameter from each set of equivalent bit mapping parameters; The performance of one or more selected bit mapping parameters is judged and filtered to obtain bit mapping parameters that meet preset performance conditions. The set of equivalent bit mapping parameters corresponding to the bit mapping parameters that meet the preset performance conditions is used as the filtering result.

3. The method according to claim 1, characterized in that, The preset performance conditions include: Given channel parameters, for a higher-order mapping system based on the bit mapping parameters, a simplified analysis method based on local Gaussian approximation is used to obtain the accurate SNR-BER performance results of the higher-order mapping system, and the bit mapping parameters are selected according to the performance evaluation criteria.

4. A bit mapping design device, characterized in that, include: The first processing module is used to initialize the channel parameters according to the given channel model, and further combine them with the bit mapping scheme to obtain a set of candidate bit mapping parameters; The classification module is used to perform equivalence classification on the candidate bit mapping parameter set using preset equivalence classification conditions to obtain one or more equivalence bit mapping parameter sets. The equivalence classification of the candidate bit mapping parameter sets using preset equivalence classification conditions includes: using coded bit group equivalence criteria and / or constellation bit group equivalence criteria to perform equivalence classification on the candidate bit mapping parameter sets. Specifically, if the redistribution of coded bit columns within a coded bit group is the same, then the two coded bit groups are determined to be equivalent, and the corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters. If any two constellation bits in the constellation bits contained in the constellation symbol satisfy symmetry, then the two constellation bit groups are determined to be equivalent, and the corresponding constellation bit groups are swapped, resulting in equivalent bit mapping parameters. The filtering module is used to filter the set of equivalent bit mapping parameters that meets the preset performance conditions, and generate a set of candidate bit mapping parameters based on the filtered set of equivalent bit mapping parameters. The second processing module is used to obtain the final candidate bit mapping parameter set if the candidate bit mapping parameter set meets the preset size condition; otherwise, it re-classifies and filters the candidate bit mapping parameter set for equivalence until the candidate bit mapping parameter set meets the preset size condition, then ends the iterative filtering, performs performance judgment on all bit mapping parameters in the final candidate bit mapping parameter set, and obtains one or more bit mapping parameters that meet the preset performance conditions as the final design result.

5. The apparatus according to claim 4, characterized in that, The filtering module is further used for: Select one bit mapping parameter from each set of equivalent bit mapping parameters; The performance of one or more selected bit mapping parameters is judged and filtered to obtain bit mapping parameters that meet preset performance conditions. The set of equivalent bit mapping parameters corresponding to the bit mapping parameters that meet the preset performance conditions is used as the filtering result.

6. The apparatus according to claim 4, characterized in that, The preset performance conditions include: Given channel parameters, for a higher-order mapping system based on the bit mapping parameters, a simplified analysis method based on local Gaussian approximation is used to obtain the accurate SNR-BER performance results of the higher-order mapping system, and the bit mapping parameters are selected according to the performance evaluation criteria.

7. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the bit mapping design method as described in any one of claims 1-3.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the bit mapping design method as described in any one of claims 1-3.

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