Processing Method for Time-Triggered Network PCF Frames

The method optimizes PCF frame handling in time-triggered networks by configuring switches as CMs or SCs with specific algorithms, addressing inefficiencies and preventing network synchronization failures.

CN116260543BActive Publication Date: 2025-07-15XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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Patent Information

Application Number
CN202211617320.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-15
Publication Date
2025-07-15
Estimated Expiration
2042-12-15

AI Technical Summary

Technical Problem

In time-triggered networks, the handling of PCF frames is complex and inefficient due to the need for multiple control modules (CMs) that require different processing based on their synchronization roles and positions, leading to high time and communication costs.

Method used

A method for handling PCF frames in time-triggered networks that involves configuring switches as either CMs or SCs, using specific processing algorithms for different frame types, including centralized algorithms and transparent forwarding, to simplify and optimize frame handling.

Benefits of technology

This approach simplifies frame handling, enhances communication efficiency, and prevents network synchronization failures by adapting to different synchronization roles and positions of switches, thereby improving data interaction in static networks.

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Abstract

An embodiment of the present disclosure provides a method for processing PCF frames in a time-triggered network, belonging to the field of computer communication technology. It is a method for a time-triggered network switch to handle different types of PCF frames when there are multiple CMs and SCs. The method includes: the types corresponding to the PCF frames, including USE_PCF, RELAY_PCF, USE_RELAY_PCF, CM_PCF, and SM_PCF; the processing methods for different PCF frame types when the switch is configured as a CM and an SC.
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Description

Technical Field

[0001] The present invention belongs to the field of computer communication technologies, and particularly relates to a method for processing PCF frames in a time-triggered network. Background Art

[0002] In a time-triggered network, to prevent network asynchronization caused by a single CM failure, multiple CMs are generally configured in the network. Configuring multiple CMs can ensure the fault tolerance of time synchronization. In actual use, switches are generally configured as CMs, which is convenient and simplifies the design. In a single-redundancy network or a dual-redundancy network, each communication path can configure a switch as a CM. Since switches in a network exist as both CMs and SCs simultaneously, when a PCF frame is received, the processing of the PCF frame is not only related to the synchronization role of the switch but also related to the position of the switch.

[0003] In different synchronization roles and different positions, the processing methods of PCF frames are different, and a general processing method is required to support different situations. When there are multiple CMs, the processing method of PCF frames is cumbersome, the communication efficiency is low, and the time cost is high. Summary of the Invention

[0004] In view of this, embodiments of the present disclosure provide a method for processing PCF frames in a time-triggered network, which reasonably configures network CMs, improves the efficiency of data or signal interaction in the network, and avoids the situation of network asynchronization caused by CM failures.

[0005] A method for processing PCF frames in a time-triggered network, applicable to data interaction in a static network, is characterized in that the static network includes multiple switch CMs and multiple switch SCs. The switches are provided with synchronization modules. Some switch CMs and switch SCs are both connected to an end system SM and an end system SC. The end system SM sends PCF frames, and the SC end system only accepts messages sent by the corresponding connected switch CMs and switch SCs and performs synchronization calculations. The method includes:

[0006] USE_PCF is for the PCF message sent by the end system SM to be transmitted to the switch CM. When the switch CM receives the PCF frame, the PCF frame is used for a centralized algorithm or a timing maintenance algorithm;

[0007] RELAY_PCF is a frame sent by the end system SM or the switch CM. After receiving the PCF frame, the switch needs to transparently forward it without any processing;

[0008] USE_RELAY_PCF is a PCF frame sent by the switch CM or the end system SM;

[0009] CM_PCF is the PCF frame sent by the CM of the switch; SM_PCF is the PCF frame sent by the SM of the end system;

[0010] The processing methods of the switch for different PCF frame types when configured as CM and SC include:

[0011] a) After receiving the USE_PCF frame, the processing method of the switch is as follows:

[0012] a1. When the switch is set as CM, after receiving the PCF frame configured with USE_PCF, the switch sends it to the synchronization module for centralized algorithm processing and does not forward the frame;

[0013] a2. When the switch is set as SC, after receiving the PCF frame configured with USE_PCF, the switch sends it to the synchronization module to correct the synchronization clock and does not forward the frame;

[0014] b) After receiving the RELAY_PCF frame, the processing method of the switch is as follows:

[0015] b1) When the switch is set as CM or SC, after receiving the PCF frame configured with RELAY_PCF, the switch measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port;

[0016] c) After receiving the USE_RELAY_PCF frame, the processing method of the switch is as follows:

[0017] c1. When the switch is set as CM, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module for centralized algorithm and forwards the frame at the same time. When forwarding, the switch measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port;

[0018] c2. When the switch is set as SC, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module to correct the synchronization clock and forwards the frame at the same time. When forwarding, the switch measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port. At the same time, it avoids the situation of network out-of-step caused by the failure of CM.

[0019] Beneficial effects:

[0020] Based on the existing equipment, the method of data interaction is improved. According to different types of PCF frames and different processing methods configured for CM and SC in the switch, it can adapt to different synchronization roles and different location situations of the switch, simplifying the design. Brief Description of the Drawings

[0021] To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0022] Figure 1 is a single-redundancy network topology diagram;

[0023] Figure 2 is a dual-redundancy network topology diagram. Detailed Embodiments

[0024] The embodiments of the present disclosure will be described in detail below with reference to the drawings.

[0025] The following illustrates the implementation manners of the present disclosure through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present disclosure without creative efforts belong to the scope of protection of the present disclosure.

[0026] It should be noted that the following describes various aspects of the embodiments within the scope of the appended claims. It should be obvious that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on the present disclosure, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, this device can be implemented and this method can be practiced using other structures and / or functions in addition to one or more of the aspects described herein.

[0027] The method for processing the time-triggered network PCF frame of the present invention is applicable to data interaction in a static network. The static network includes multiple switch CMs and multiple switch SCs. The switches are provided with synchronization modules. Some switch CMs and switch SCs are both connected to end system SM and end system SC (determined according to the system used, such as a single-redundancy system or a dual-redundancy system). The end system SM sends PCF frames, and the SC end system only accepts messages sent by the corresponding connected switch CMs and switch SCs and performs synchronization calculations. The method includes:

[0028] S101: Define the names of different messages or data in different states and the processing methods of the receiving message devices as follows:

[0029] USE_PCF is the PCF message sent by the end system SM. When the switch CM receives this PCF frame, the PCF frame is used for the centralized algorithm or for the timing maintenance algorithm;

[0030] RELAY_PCF is the frame sent by the end system SM or the switch CM. After receiving this PCF frame, the switch needs to transparently forward it without processing;

[0031] USE_RELAY_PCF is the PCF frame sent by the switch CM or the end system SM;

[0032] CM_PCF is the PCF frame sent by the switch CM; SM_PCF is the PCF frame sent by the end system SM;

[0033] The processing methods of different PCF frame types when the switch is configured as CM and SC include:

[0034] S102: a) After receiving this USE_PCF frame, the processing method of the switch is as follows:

[0035] a1. When the switch is set as CM and receives the PCF frame configured with USE_PCF, the switch sends it to the synchronization module for centralized algorithm processing and does not forward this frame;

[0036] a2. When the switch is set as SC and receives the PCF frame configured with USE_PCF, the switch sends it to the synchronization module to correct the synchronization clock and does not forward this frame;

[0037] S103: b) After receiving this RELAY_PCF frame, the processing method of the switch is as follows:

[0038] b1) When the switch is set as CM or SC and receives the PCF frame configured with RELAY_PCF, the switch measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port;

[0039] S103: c) After receiving the USE_RELAY_PCF frame, the switch processes it as follows:

[0040] c1. When the switch is set to CM, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module for centralized algorithm and forwards the frame simultaneously. When forwarding, it measures the dynamic forwarding delay of the PCF frame, adds the static reception delay, static transmission delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port;

[0041] c2. When the switch is set to SC, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module to correct the synchronization clock and forwards the frame simultaneously. When forwarding, it measures the dynamic forwarding delay of the PCF frame, adds the static reception delay, static transmission delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port.

[0042] The system-side SM, system-side SC, switch SC, and switch SM mentioned above are all set with VL-ID virtual circuits to identify the configuration of the PCF frame and can mutually identify signals.

[0043] The following is introduced through two implementation manners:

[0044] First, the static network is set as a single-redundancy network system. It should be noted that for the static network, the operating parameters are pre-set and are different from those of Ethernet.

[0045] The single-redundancy network system includes 6 end systems and 4 switches. End systems 102, 103, 104, and 106 are configured as SM, end systems 101 and 105 are configured as SC, switches 202 and 204 are configured as switch CM, switches 201 and 203 are configured as switch SC. The end-system SM can be a network card and is the end that sends messages to switch CM. The configuration of the end-system PCF frame VL_ID is shown in Table 1:

[0046]

[0047] Table 1

[0048] The configuration of the switch PCF frame VL_ID is shown in Table 2:

[0049]

[0050] Table 2

[0051] The processing of switch SC201 is as follows:

[0052] a) The PCF frame received with VL_ID_102, configured as RELAY_PCF, is forwarded to switch 202 after updating the transparent clock value;

[0053] b) The PCF frames received with VL_ID_202 and VL_ID_204, configured as USE_RELAY_PCF, are sent to the synchronization module to correct the synchronization clock, and after updating the transparent clock value, they are forwarded to end system 102 and end system 101;

[0054] Switch CM202 processes as follows:

[0055] a) The PCF frames received with VL_ID_102 and VL_ID_103, configured as USE_RELAY_PCF, are sent to the synchronization module for the centralized algorithm, and after updating the transparent clock value, they are forwarded to switch 203;

[0056] b) The PCF frames received with VL_ID_104 and VL_ID_106, configured as USE__PCF, are sent to the synchronization module for the centralized algorithm;

[0057] c) After the switch completes the centralized algorithm, it sends the PCF frame of VL_ID_202 configured as CM _PCF to switch 201, switch 203, and end system 103;

[0058] d) The PCF frame received with VL_ID_204, configured as RELAY_PCF, is forwarded to end system 103 and switch 201 after updating the transparent clock value;

[0059] Switch SC203 processes as follows:

[0060] a) The PCF frames received with VL_ID_102 and VL_ID_103, configured as RELAY_PCF, are forwarded to switch 204 after updating the transparent clock value;

[0061] b) The PCF frames received with VL_ID_104 and VL_ID_106, configured as RELAY_PCF, are forwarded to switch 202 after updating the transparent clock value;

[0062] c) The PCF frame received with VL_ID_202, configured as USE_RELAY_PCF, is sent to the synchronization module to correct the synchronization clock, and after updating the transparent clock value, it is forwarded to end system 104 and switch 204;

[0063] d) The PCF frame received with VL_ID_204, configured as USE_RELAY_PCF, is sent to the synchronization module to correct the synchronization clock, and after updating the transparent clock value, it is forwarded to end system SM104 and switch CM202;

[0064] The switch CM204 processes as follows:

[0065] a) When receiving the PCF frame of VL_ID_106, it is configured as USE_RELAY_PCF, sent to the synchronization module for the centralized algorithm, and after updating the transparent clock value, it is forwarded to the switch SC203;

[0066] b) When receiving the PCF frames of VL_ID_102, VL_ID_103, and VL_ID_104, they are configured as USE__PCF and sent to the synchronization module for the centralized algorithm;

[0067] c) After the switch completes the centralized algorithm, it sends the PCF frame of VL_ID_204 configured as CM _PCF to the switch SC203, the end systems SM105, and the end system SM106;

[0068] d) When receiving the PCF frame of VL_ID_202, it is configured as RELAY_PCF, and after updating the transparent clock value, it is forwarded to the end systems SM105 and SM106.

[0069] The switch 203SC in the above forwards the PCF frame of the switch 204CM to the switch 202CM. Therefore, the switch 202CM does not need to calculate the messages of the end system 106SM anymore. It can directly use and forward them to the end systems connected to the switch 202CM and the switch 201SC. It only needs to synchronize and calculate the PCF frame messages of its own connected end systems, which improves the efficiency of data interaction in the network and avoids the situation of network interruption caused by a single CM failure.

[0070] Second, the static network is set as a dual-redundancy network system, including 6 end systems and 4 switches. Among them, the end systems 102, 103, 104, and 106 are configured as SM, 101 and 105 are configured as SC, the switches 202 and 211 are configured as CM, and 201 and 212 are configured as SC.

[0071] The configuration of the end system PCF frame VL_ID is shown in Table 3:

[0072]

[0073] Table 3

[0074] The configuration of the switch PCF frame VL_ID is shown in Table 4:

[0075]

[0076] Table 4

[0077] The switch 201 processes as follows:

[0078] a) Receive the PCF frames of VL_ID_102 and VL_ID_103, configured as RELAY_PCF, update the transparent clock value and then forward them to switch 202;

[0079] b) Receive the PCF frame of VL_ID_202, configured as USE_RELAY_PCF, send it to the synchronization module to correct the synchronization clock, update the transparent clock value and then forward it to end systems 101, 102, and 103;

[0080] Switch 202 processes as follows:

[0081] a) Receive the PCF frames of VL_ID_102, VL_ID_103, VL_ID_106, and VL_ID_106, configured as USE__PCF, send them to the synchronization module for centralized algorithm;

[0082] b) After the switch completes the centralized algorithm, send the PCF frame of VL_ID_202 configured as CM _PCF to switch 201, end systems 104, 105, and 106;

[0083] Switch 211 processes as follows:

[0084] a) Receive the PCF frames of VL_ID_102, VL_ID_103, VL_ID_104, and VL_ID_106, configured as USE__PCF, send them to the synchronization module for centralized algorithm;

[0085] b) After the switch completes the centralized algorithm, send the PCF frame of VL_ID_211 configured as CM _PCF to switch 212, end systems 101, 102, and 103;

[0086] Switch 212 processes as follows:

[0087] a) Receive the PCF frames of VL_ID_104 and VL_ID_106, configured as RELAY_PCF, update the transparent clock value and then forward them to switch 211;

[0088] b) Receive the PCF frame of VL_ID_211, configured as USE_RELAY_PCF, send it to the synchronization module to correct the synchronization clock, update the transparent clock value and then forward it to end systems 104, 105, and 106.

[0089] In the dual-redundancy system, end system SM receives the messages of switch 202 CM and switch 211 CM (the messages calculated through the centralized algorithm) to avoid the situation of network out-of-step caused by the failure of CM.

[0090] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed by the present disclosure should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A method for processing PCF frames of a time-triggered network, applicable to data interaction in a static network, characterized in that, The static network includes multiple switch CMs and multiple switch SCs. The switches are provided with synchronization modules. Some of the switch CMs and switch SCs are both connected to end system SM and end system SC. The end system SM sends PCF frames. The SC end system only accepts the messages sent by the corresponding connected switch CMs and switch SCs and performs synchronization calculations. The method includes: USE_PCF is for the PCF message sent by the end system SM to be transmitted to the switch CM. When the switch CM receives this PCF frame, the PCF frame is used for the centralized algorithm or for the timing maintenance algorithm. RELAY_PCF is a frame sent by the end system SM or the switch CM. After receiving this PCF frame, the switch needs to transparently forward it without processing. USE_RELAY_PCF is a PCF frame sent by the switch CM or the end system SM. CM_PCF is a PCF frame sent by the switch CM; SM_PCF is a PCF frame sent by the end system SM. The processing methods of different PCF frame types when the switch is configured as CM and SC include: a) After receiving this USE_PCF frame, the processing method of the switch is as follows: a1. When the switch is set as CM, after receiving the PCF frame configured with USE_PCF, the switch sends it to the synchronization module for centralized algorithm processing and does not forward this frame. a2. When the switch is set as SC, after receiving the PCF frame configured with USE_PCF, the switch sends it to the synchronization module to correct the synchronization clock and does not forward this frame. b) After receiving this RELAY_PCF frame, the processing method of the switch is as follows: b1) When the switch is set as CM or SC, after receiving the PCF frame configured with RELAY_PCF, the switch measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port. c) After receiving the USE_RELAY_PCF frame, the processing method of the switch is as follows: c1. When the switch is set as CM, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module for centralized algorithm and forwards this frame at the same time. When forwarding, it measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port. c2. When the switch is set as SC, after receiving the PCF frame configured with USE_RELAY_PCF, the switch sends it to the synchronization module to correct the synchronization clock and forwards this frame at the same time. When forwarding, it measures the dynamic forwarding delay of the PCF frame, adds the static receiving delay, static sending delay, and line delay, adds the sum to the original transparent clock value in the frame, and then forwards it to the specified port.

2. The method according to claim 1, wherein VL-ID virtual circuits are set in the system end SM, system end SC, switch SC, and switch SM to identify the configuration of the PCF frame.

3. The method according to claim 2, characterized in that, The static network is set as a single-redundancy network system.

4. The method according to claim 3, characterized in that It includes 6 end systems and 4 switches. End systems 102, 103, 104, and 106 are configured as SM, end systems 101 and 105 are configured as SC, switches 202 and 204 are configured as switch CM, and switches 201 and 203 are configured as switch SC, where: Switch SC201 processes as follows: a) Receives a PCF frame with VL_ID_102, configured as RELAY_PCF, updates the transparent clock value, and forwards it to switch 202; b) Receives PCF frames with VL_ID_202 and VL_ID_204, configured as USE_RELAY_PCF, sends them to the synchronization module to correct the synchronization clock, updates the transparent clock value, and forwards them to end system 102 and end system 101; Switch CM202 processes as follows: a) Receives PCF frames with VL_ID_102 and VL_ID_103, configured as USE_RELAY_PCF, sends them to the synchronization module for a centralized algorithm, updates the transparent clock value, and forwards them to switch 203; b) Receives PCF frames with VL_ID_104 and VL_ID_106, configured as USE__PCF, sends them to the synchronization module for a centralized algorithm; c) After the switch completes the centralized algorithm, it sends a PCF frame with VL_ID_202, configured as CM _PCF, to switch 201, switch 203, and end system 103; d) Receives a PCF frame with VL_ID_204, configured as RELAY_PCF, updates the transparent clock value, and forwards it to end system 103 and switch 201; Switch SC203 processes as follows: a) Receives PCF frames with VL_ID_102 and VL_ID_103, configured as RELAY_PCF, updates the transparent clock value, and forwards them to switch 204; b) Receives PCF frames with VL_ID_104 and VL_ID_106, configured as RELAY_PCF, updates the transparent clock value, and forwards them to switch 202; c) Receives a PCF frame with VL_ID_202, configured as USE_RELAY_PCF, sends it to the synchronization module to correct the synchronization clock, updates the transparent clock value, and forwards it to end system 104 and switch 204; d) Receives a PCF frame with VL_ID_204, configured as USE_RELAY_PCF, sends it to the synchronization module to correct the synchronization clock, updates the transparent clock value, and forwards it to end system SM104 and switch CM202; Switch CM204 processes as follows: a) Receives a PCF frame with VL_ID_106, configured as USE_RELAY_PCF, sends it to the synchronization module for a centralized algorithm, updates the transparent clock value, and forwards it to switch SC203; b) Receives PCF frames with VL_ID_102, VL_ID_103, and VL_ID_104, configured as USE__PCF, sends them to the synchronization module for a centralized algorithm; c) After the switch completes the centralized algorithm, it sends the PCF frame of VL_ID_204 configured as CM_PCF to switch SC203, end systems SM105 and SM106; d) Upon receiving the PCF frame of VL_ID_202 configured as RELAY_PCF, it updates the transparent clock value and forwards it to end systems SM105 and SM106.

5. The method according to claim 3, wherein The static network is set as a dual-redundancy network system, including 6 end systems and 4 switches. Among them, end systems 102, 103, 104, 106 are configured as SM, 101 and 105 are configured as SC, switches 202, 211 are configured as CM, and 201 and 212 are configured as SC, where: Switch 201 processes as follows: a) Upon receiving the PCF frames of VL_ID_102 and VL_ID_103 configured as RELAY_PCF, it updates the transparent clock value and forwards them to switch 202; b) Upon receiving the PCF frame of VL_ID_202 configured as USE_RELAY_PCF, it sends it to the synchronization module to correct the synchronization clock, updates the transparent clock value, and then forwards it to end systems 101, 102, and 103; Switch 202 processes as follows: a) Upon receiving the PCF frames of VL_ID_102, VL_ID_103, VL_ID_106, VL_ID_106 configured as USE__PCF, it sends them to the synchronization module for the centralized algorithm; b) After the switch completes the centralized algorithm, it sends the PCF frame of VL_ID_202 configured as CM_PCF to switch 201, end systems 104, 105, and 106; Switch 211 processes as follows: a) Upon receiving the PCF frames of VL_ID_102, VL_ID_103, VL_ID_104, VL_ID_106 configured as USE__PCF, it sends them to the synchronization module for the centralized algorithm; b) After the switch completes the centralized algorithm, it sends the PCF frame of VL_ID_211 configured as CM_PCF to switch 212, end systems 101, 102, and 103; Switch 212 processes as follows: a) Upon receiving the PCF frames of VL_ID_104 and VL_ID_106 configured as RELAY_PCF, it updates the transparent clock value and forwards them to switch 211; b) Upon receiving the PCF frame of VL_ID_211 configured as USE_RELAY_PCF, it sends it to the synchronization module to correct the synchronization clock, updates the transparent clock value, and then forwards it to end systems 104, 105, and 106.

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