Pixel circuit and display device

Abstract

Disclosed is a pixel circuit and a display device. The pixel circuit includes a light emitting element, a drive transistor for driving the light emitting element, a scan transistor controlled by a scan signal supplied from a gate line and controlling connection between a first node of the drive transistor and a data line, a storage capacitor connected between the first node of the drive transistor and a second node of the drive transistor, and a drive control diode connected between the second node of the drive transistor and a reference voltage line.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0177727, filed on December 13, 2021, which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of the present invention relate to a pixel circuit and a display device. Background Technology

[0004] With the development of the information society, the demand for display devices for displaying images is increasing in various forms. Various types of display devices, such as liquid crystal displays (LCDs) and organic light-emitting diode (OLEDs), have been used in recent years.

[0005] When displaying video, slow video response of the display device can cause afterimages or motion blur of the previous image, thus degrading the image quality.

[0006] As a result, the display suffers from afterimages or motion blur. Various methods have been proposed to prevent or mitigate motion blur. However, previously proposed methods require complex driving mechanisms or may lead to adverse effects. Summary of the Invention

[0007] Therefore, the present invention aims to provide a new method for preventing motion blur without the need for complex driving mechanisms or without causing negative effects.

[0008] The present invention aims to provide a novel pixel circuit that can effectively prevent motion blur without the need for complex driving, and a display device including the pixel circuit.

[0009] The present invention also aims to provide a novel pixel circuit capable of reducing the number of gate lines, and a display device including the pixel circuit.

[0010] The present invention also aims to provide a novel pixel circuit that simplifies driving and has a high aperture ratio, as well as a display device including the pixel circuit.

[0011] In one aspect of the invention, a display device includes a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels defined by the intersection of the gate lines and the data lines, wherein each of the plurality of sub-pixels includes: a light-emitting element; a driving transistor for driving the light-emitting element; a scanning transistor controlled by a scanning signal provided from the gate lines and controlling a connection between a first node of the driving transistor and the data lines; a storage capacitor connected between a first node of the driving transistor and a second node of the driving transistor; and a driving control diode connected between a second node of the driving transistor and a reference voltage line.

[0012] The reference voltage applied to the reference voltage line can be varied.

[0013] The reference voltage when the light-emitting element emits light can be higher than the reference voltage when the light-emitting element stops emitting light.

[0014] The reference voltage line may cross the data line.

[0015] The reference voltage line may be parallel to the gate line.

[0016] In another aspect of the invention, a pixel circuit includes: a light-emitting element; a driving transistor for driving the light-emitting element; a scanning transistor controlled by a scanning signal provided from a gate line and controlling the connection between a first node of the driving transistor and a data line; a storage capacitor connected between the first node of the driving transistor and a second node of the driving transistor; and a driving control diode connected between the second node of the driving transistor and a reference voltage line.

[0017] The reference voltage applied to the reference voltage line can be varied.

[0018] The reference voltage when the light-emitting element emits light can be higher than the reference voltage when the light-emitting element stops emitting light.

[0019] During one frame, the reference voltage may sequentially have a first reference voltage value, a second reference voltage value, and the first reference voltage value. The second reference voltage value may be higher than the first reference voltage value.

[0020] According to various aspects of the present invention, a novel pixel circuit and a display device including the pixel circuit can be provided that can effectively prevent motion blur without the need for complex driving.

[0021] According to various aspects of the present invention, a novel pixel circuit capable of reducing the number of gate lines and a display device including the pixel circuit can be provided.

[0022] According to various aspects of the present invention, a novel pixel circuit capable of simplifying driving and having a high aperture ratio, as well as a display device including the pixel circuit, can be provided.

[0023] It will be understood that the foregoing general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the claimed invention. Attached Figure Description

[0024] The above and other objects, features, and advantages of the invention will become more clearly understood from the following detailed description given in conjunction with the accompanying drawings. In the drawings:

[0025] Figure 1 This is a view illustrating the system configuration of a display device according to various aspects of the present invention;

[0026] Figure 2 This is a view illustrating a pixel circuit according to various aspects of the present invention;

[0027] Figure 3 This is a diagram illustrating the operation of a display device according to various aspects of the present invention;

[0028] Figure 4 This is a flowchart illustrating a sub-pixel driving method of a display device according to various aspects of the present invention;

[0029] Figure 5 This is a timing diagram illustrating the sub-pixel driving of a display device according to various aspects of the present invention;

[0030] Figure 6 This is a view illustrating the data writing step in a sub-pixel driving method of a display device according to various aspects of the present invention;

[0031] Figure 7 This is a view illustrating the light-emitting steps in a sub-pixel driving method of a display device according to various aspects of the present invention;

[0032] Figure 8 This is a view illustrating the display stop driving step in a sub-pixel driving method of a display device according to various aspects of the present invention;

[0033] Figure 9 These are views illustrating a sensorless compensation system according to various aspects of the present invention;

[0034] Figure 10 This is a graph illustrating the non-sensorless compensation method according to various aspects of the present invention. Detailed Implementation

[0035] In the following description of examples or aspects of the invention, reference will be made to the accompanying drawings, in which specific examples or aspects that may be implemented are shown by way of example, and the same reference numerals and symbols may be used to refer to the same or similar components, even if shown in different drawings. Furthermore, in the following description of examples or aspects of the invention, a detailed description of well-known functions and components involved herein will be omitted where it is determined that such a detailed description would obscure the subject matter of some of the various aspects of the invention. Terms such as “comprising,” “having,” “including,” and “constitute” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.”

[0036] The elements of the present invention may be described herein using terms such as “first,” “second,” “A,” “B,” “(A),” or “(B).” Each of these terms is not intended to define the nature, order, sequence, or number of the elements, but is merely used to distinguish the corresponding element from the others.

[0037] When the first element and the second element are referred to as "connected or coupled" or "overlapping," it should be interpreted that the first element can not only be "directly connected or coupled" or "directly contact or overlap" with the second element, but also that a third element can be inserted between the first element and the second element, or that the first element and the second element can be "connected or coupled" or "overlapping" with each other via a fourth element. Here, the second element may be included in at least one of two or more elements that are "connected or coupled," "in contact," or "overlapping" with each other.

[0038] When time-relative terms such as “after,” “follow,” “next,” “before,” etc. are used to describe the process or operation of an element or structure, or the flow or steps in an operation, process, or manufacturing method, these terms may be used to describe discontinuous or non-sequential processes or operations, unless these terms are used with the terms “directly” or “immediately after.”

[0039] Furthermore, when referring to any dimension, relative size, etc., it should be taken into account that the numerical values ​​or corresponding information of a component or feature (e.g., level, range, etc.) include tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external shocks, noise, etc.), even if no relevant specification is given. In addition, the term "may" fully encompasses the complete meaning of the term "able to".

[0040] The various aspects of the present invention will now be described in detail with reference to the accompanying drawings.

[0041] Figure 1 This is a view illustrating the system configuration of a display device 100 according to various aspects of the present invention.

[0042] Reference Figure 1According to various aspects of the present invention, the display device 100 includes a display driving system, which may include a display panel 110 and a driving circuit for driving the display panel 110.

[0043] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images. The display panel 110 may include a plurality of subpixels SP disposed on the substrate SUB for image display. For example, the plurality of subpixels SP may be disposed in the display area DA. In some cases, at least one subpixel SP may be disposed in the non-display area NDA. At least one subpixel SP disposed in the non-display area NDA is also referred to as a virtual subpixel.

[0044] The display panel 110 may include multiple signal lines disposed on the substrate SUB to drive multiple sub-pixels SP. For example, the multiple signal lines may include multiple data lines DL and multiple gate lines GL. Depending on the structure of the sub-pixel SP, the signal lines may also include other signal lines besides the multiple data lines DL and multiple gate lines GL. For example, other signal lines may include drive voltage lines and reference voltage lines.

[0045] Multiple data lines DL and multiple gate lines GL may intersect each other to define a sub-pixel SP at the intersection. Each of the multiple data lines DL may be configured to extend along a first direction. Each of the multiple gate lines GL may be configured to extend along a second direction. Here, the first direction may be a column direction, and the second direction may be a row direction. In this invention, the column direction and the row direction are relative. For example, the column direction may be a vertical direction, and the row direction may be a horizontal direction. As another example, the column direction may be a horizontal direction, and the row direction may be a vertical direction. For ease of explanation, it is assumed below that each data line DL is configured to extend along a vertical direction, and each gate line GL is configured to extend along a horizontal direction.

[0046] The driving circuit may include a data driving circuit 120 for driving multiple data lines DL and a gate driving circuit 130 for driving multiple gate lines GL. The driving circuit may further include a controller 140 for controlling the data driving circuit 120 and the gate driving circuit 130.

[0047] The data driving circuit 120 is a circuit for driving data lines DL and can output data signals (also called data voltages) corresponding to image signals to multiple data lines DL. The gate driving circuit 130 is a circuit for driving multiple gate lines GL and generates gate signals and outputs gate signals to multiple gate lines GL.

[0048] The controller 140 can begin scanning according to the timing implemented in each frame and control the data drive at appropriate times according to the scan. The controller 140 can convert input image data from external input to conform to the data signal format used in the data drive circuit 120 and provide the converted image data to the data drive circuit 120.

[0049] The controller 140 may receive display drive control signals from the external host system 150 along with the input image data. For example, the display drive control signals may include a vertical sync signal VSYNC, a horizontal sync signal HSYNC, an input data enable signal DE, and a clock signal.

[0050] The controller 140 can generate a data drive control signal DCS and a gate drive control signal GCS based on the display drive control signal input from the host system 150. The controller 140 can control the drive operation and drive timing of the data drive circuit 120 by providing the data drive control signal DCS to the data drive circuit 120. The controller 140 can control the drive operation and drive timing of the gate drive circuit 130 by providing the gate drive control signal GCS to the gate drive circuit 130.

[0051] The data driver circuit 120 may include one or more source driver integrated circuits (SDICs). Each source driver integrated circuit (SDIC) may include a shift register, latch circuitry, a digital-to-analog converter (DAC), and an output buffer. In some cases, each source driver integrated circuit (SDIC) may further include an analog-to-digital converter (ADC).

[0052] For example, each source driver integrated circuit (SDIC) can be connected to the display panel 110 via a tape auto-bonding (TAB) method, and can be connected to the bonding pads of the display panel 110 via a chip-on-glass (COG) or chip-on-panel (COP) method, or can be implemented and connected to the display panel 110 via a chip-on-film (COF) method.

[0053] The gate drive circuit 130 can output a gate signal with an on-level voltage or a gate signal with an off-level voltage according to the control of the controller 140. The gate drive circuit 130 can sequentially drive multiple gate lines GL by sequentially providing gate signals with on-level voltages to multiple gate lines GL.

[0054] The gate driving circuit 130 can be connected to the display panel 110 via the TAB method, or to the bonding pads of the display panel 110 via the COG or COP method, or to the display panel 110 via the COF method. Optionally, the gate driving circuit 130 can be formed as a gate in panel (GIP) type in the non-display area NDA of the display panel 110. The gate driving circuit 130 can be disposed on the substrate or connected to the substrate. In other words, the gate driving circuit 130 as a GIP type can be disposed in the non-display area NDA of the substrate. The gate driving circuit 130 as a chip on glass (COG) type or chip on film (COF) type can be connected to the substrate.

[0055] Meanwhile, at least one of the data driving circuit 120 and the gate driving circuit 130 may be disposed in the display area DA. For example, at least one of the data driving circuit 120 and the gate driving circuit 130 may be configured not to overlap with the sub-pixel SP, or to overlap with all or some of the sub-pixel SP.

[0056] The data driving circuit 120 may be connected to one side (e.g., the top or bottom) of the display panel 110. Depending on the driving mechanism or panel design mechanism, the data driving circuit 120 may be connected to both sides (e.g., the top and bottom) of the display panel 110, or two or more of the four sides of the display panel 110.

[0057] The gate drive circuit 130 may be connected to one side (e.g., the left or right side) of the display panel 110. Depending on the drive mechanism or panel design mechanism, the gate drive circuit 130 may be connected to both sides (e.g., the left and right sides) of the display panel 110, or two or more of the four sides of the display panel 110.

[0058] The controller 140 may be implemented as a separate component from the data drive circuitry 120, or the controller 140 and the data drive circuitry 120 may be integrated into a single integrated circuit (IC). The controller 140 may be a timing controller used in typical display technologies, a control device that performs other control functions besides those of a timing controller, or a control device other than a timing controller, or it may be a circuit within a control device. The controller 140 may be implemented as various circuits or electronic components, such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), or processors.

[0059] The controller 140 may be mounted on a printed circuit board or flexible printed circuit and may be electrically connected to the data drive circuit 120 and the gate drive circuit 130 via the printed circuit board or flexible printed circuit. The controller 140 may send / receive signals to / from the data drive circuit 120 according to one or more predetermined interfaces. The interfaces may include, for example, a low-voltage differential signaling (LVDS) interface, an EPI interface, and a serial peripheral interface (SP).

[0060] The display device 100 according to various aspects of the present invention can be a self-emissive display device in which the display panel 110 emits its own light. When the display device 100 according to various aspects of the present invention is a self-emissive display device, each of the plurality of sub-pixels SP may include a light-emitting element. For example, the display device 100 according to various aspects of the present invention can be an organic light-emitting diode display, wherein the light-emitting element is implemented as an organic light-emitting diode (OLED). As another example, the display device 100 according to various aspects of the present invention can be an inorganic light-emitting display device, wherein the light-emitting element is implemented as a light-emitting diode based on an inorganic material. As yet another example, the display device 100 according to various aspects of the present invention can be a quantum dot display device, wherein the light-emitting element is implemented as a quantum dot as a self-emissive semiconductor crystal.

[0061] Figure 2 This is a view illustrating a pixel circuit according to various aspects of the present invention.

[0062] Reference Figure 2 According to various aspects of the present invention, each sub-pixel of the display device 100 includes a pixel circuit that may include a light-emitting element ED, a driving transistor DRT for providing a driving current to the light-emitting element ED to drive the light-emitting element ED, a scanning transistor SCT for transmitting a data voltage Vdata corresponding to an image signal to the driving transistor DRT, a storage capacitor Cst for maintaining the voltage for a certain period of time, and a driving control diode DCD for controlling the driving state of the sub-pixel SP.

[0063] Reference Figure 2 The light-emitting element ED may include a pixel electrode PE, a light-emitting layer EL, and a common electrode CE.

[0064] The pixel electrode PE of the light-emitting element ED can be either an anode or a cathode. The common electrode CE can be either a cathode or an anode.

[0065] A base voltage EVSS, corresponding to the common voltage, can be applied to the common electrode CE of the light-emitting element ED. The base voltage EVSS can be, for example, ground voltage or a voltage approximately equal to ground voltage.

[0066] For example, the light-emitting element (ED) can be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), or a quantum dot light-emitting element.

[0067] Reference Figure 2 The driving transistor DRT is a transistor used to provide a driving current to the light-emitting element ED for driving the light-emitting element ED, and may include a first node N1, a second node N2 and a third node N3.

[0068] The first node N1 of the driving transistor DRT is the node corresponding to the gate node and can be electrically connected to the source node or drain node of the scanning transistor SCT. The second node N2 of the driving transistor DRT is a source node or drain node, which can be electrically connected to the anode A of the driving control diode DCD and can be electrically connected to the pixel electrode PE of the light-emitting element ED. The third node N3 of the driving transistor DRT can be a drain node or a source node and can be electrically connected to the driving voltage line DVL used to provide the driving voltage EVDD. In the following description, for ease of illustration, in the example described below, the second node N2 of the driving transistor DRT can be a source node and the third node N3 can be a drain node.

[0069] Reference Figure 2 The scanning transistor SCT is a transistor used to transmit the data voltage Vdata corresponding to the image signal to the driving transistor DRT. Its on / off state can be controlled by the scanning signal SCAN provided from the gate line GL, and the connection between the first node N1 of the driving transistor DRT and the data line DL can be controlled.

[0070] The drain or source node of the scan transistor SCT can be electrically connected to the corresponding data line DL. The source or drain node of the scan transistor SCT can be electrically connected to the first node N1 of the driving transistor DRT. The gate node of the scan transistor SCT can be electrically connected to the gate line GL to receive the scan signal SCAN.

[0071] The scanning transistor SCT can be turned on by a scan signal SCAN with a turn-on voltage, and transmits the data voltage Vdata supplied from the data line DL to the first node N1 of the driving transistor DRT. The scanning transistor SCT is turned on by a scan signal SCAN with a turn-on voltage and turned off by a scan signal SCAN with a turn-off voltage. When the scanning transistor SCT is n-type, the turn-on voltage can be high and the turn-off voltage can be low. When the scanning transistor SCT is p-type, the turn-on voltage can be low and the turn-off voltage can be high.

[0072] Reference Figure 2The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. The storage capacitor Cst can hold the data signal Vdata corresponding to the image signal voltage or its corresponding voltage for one frame.

[0073] The storage capacitor Cst can be an external capacitor that is intentionally designed to be outside the driving transistor DRT, rather than a parasitic capacitor (such as Cgs or Cgd) existing as an internal capacitor between the first node N1 and the second node N2 of the driving transistor DRT.

[0074] Each of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor or a p-type transistor. Both the driving transistor DRT and the scanning transistor SCT can be either n-type transistors or p-type transistors. At least one of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor (or a p-type transistor), and the other can be a p-type transistor (or an n-type transistor).

[0075] Reference Figure 2 The drive control diode DCD in the pixel circuit of the display device 100 according to various aspects of the present invention may be a critical element for controlling the drive state of the sub-pixel SP, and may be connected between the second node N2 of the drive transistor DRT and the reference voltage line RVL.

[0076] The drive control diode DCD can be connected between the second node N2 of the drive transistor DRT and the reference voltage line RVL so that current (forward current) can be guided from the second node N2 of the drive transistor DRT to the reference voltage line RVL.

[0077] The drive control diode DCD may include an anode A electrically connected to the second node N2 of the drive transistor DRT and a cathode C electrically connected to the reference voltage line RVL.

[0078] When the voltage at the second node N2 of the driving transistor DRT is higher than the reference voltage Vref applied to the reference voltage line RVL, the driving control diode DCD can be considered to be in the on state.

[0079] When the voltage at the second node N2 of the driving transistor DRT is higher than the reference voltage Vref applied to the reference voltage line RVL, current (forward current) can flow from the second node N2 of the driving transistor DRT to the reference voltage line RVL via the driving control diode DCD.

[0080] Thus, since current (forward current) flows from the second node N2 of the driving transistor DRT to the reference voltage line RVL, current will not be supplied from the driving transistor DRT to the light-emitting element ED. Therefore, the light-emitting element ED can be in a state where it cannot emit light.

[0081] When the reference voltage Vref applied to the reference voltage line RVL is higher than the voltage of the second node N2 of the driving transistor DRT, the driving control diode DCD can be considered to be in the off state.

[0082] When the reference voltage Vref applied to the reference voltage line RVL is higher than the voltage of the second node N2 of the driving transistor DRT, no current (forward current) will flow from the second node N2 of the driving transistor DRT to the reference voltage line RVL via the driving control diode DCD.

[0083] Therefore, the second node N2 of the driving transistor DRT can be in a floating state without being powered. In other words, the pixel electrode PE of the light-emitting element ED can be in an electrically floating state.

[0084] If the voltage of the second node N2 of the driving transistor DRT, i.e., the voltage of the pixel electrode ED of the light-emitting element ED, rises above the light-emitting start-up voltage, current can be supplied from the driving transistor DRT to the light-emitting element ED, thereby enabling the light-emitting element ED to emit light. The aforementioned light-emitting start-up voltage can be the sum of the base voltage EVSS and the threshold voltage of the light-emitting element ED.

[0085] Reference Figure 2 In the pixel circuit according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL can be changed.

[0086] In a pixel circuit according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED emits light may be higher than the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED stops emitting light.

[0087] Reference Figure 2 In the display device 100 according to various aspects of the present invention, the reference voltage line RVL may be a signal line configured to extend in the same direction as the extension direction of the gate line GL.

[0088] Reference Figure 2 In the display device 100 according to various aspects of the present invention, the reference voltage line RVL may intersect with the data line DL. The reference voltage line RVL may be parallel to the gate line GL.

[0089] Reference Figure 2According to various aspects of the present invention, the display device 100 may further include a power supply unit 200 for changing the reference voltage Vref according to display driving control information and providing the changed reference voltage to the reference voltage line RVL.

[0090] Figure 3 This is a diagram illustrating the operation of a display device 100 according to various aspects of the present invention.

[0091] exist Figure 3 In the diagram, the y-axis represents multiple sub-pixel rows SPL#1 to SPL#n in the display panel 110, and the x-axis represents time.

[0092] Reference Figure 3 According to various aspects of the present invention, the display device 100 can execute a drive for preventing motion blur. The anti-motion blur drive can be a drive that implements a screen state different from the actual image screen between actual images. For example, the anti-motion blur drive can be a drive that displays a black screen or a low grayscale screen between actual images.

[0093] Reference Figure 3 According to the anti-motion blur driver, a display stop driver period Toff can be performed between the display drive period Ton (during which the display drive for displaying the actual image is executed) to stop the display drive for displaying the actual image.

[0094] During a single frame of time for each of the multiple sub-pixels SP, a display drive period Ton and a display stop drive period Toff can be performed.

[0095] Scanning of each of the multiple subpixel rows SPL#1 to SPL#n can begin sequentially, thereby allowing the display driver for each of the multiple subpixel rows SPL#1 to SPL#n to be executed sequentially. Therefore, an actual image can be displayed in each region of the multiple subpixel rows SPL#1 to SPL#n.

[0096] The display stop driving period Toff for each of the multiple sub-pixel rows SPL#1 to SPL#n can start sequentially, so that the display stop driving for each of the multiple sub-pixel rows SPL#1 to SPL#n can be executed sequentially. Therefore, a fake image different from the actual image can be displayed in the area of ​​each of the multiple sub-pixel rows SPL#1 to SPL#n.

[0097] For example, since the actual image itself is not displayed on the screen, a black or low grayscale screen can be shown to the user. A screen displayed as black or low grayscale can be considered a pseudo-image.

[0098] As described above, when performing anti-motion blur driving, motion blur that makes moving objects appear blurry due to the persistence of afterimages or data in the preceding image can be prevented or reduced.

[0099] Figure 4 This is a flowchart illustrating a sub-pixel driving method of a display device 100 according to various aspects of the present invention.

[0100] Reference Figure 4 The sub-pixel driving method of the display device 100 according to various aspects of the present invention can be a motion blur prevention driving method, and may include a display driving step S10 and a display stop driving step S20.

[0101] The display driving step S10 may include a data writing step S11 and an illumination step S12.

[0102] The data writing step S11 can be a step of providing a data voltage Vdata corresponding to the image signal to the corresponding sub-pixel SP. In the data writing step S11, the data voltage Vdata for image display can be applied to the first node N1 of the driving transistor DRT.

[0103] The light emission step S12 can be the step of emitting light from the light-emitting element ED in the corresponding sub-pixel SP. When each of the plurality of sub-pixels SP is driven, each of the plurality of sub-pixels SP emits light to display an image as the light emission step S12 is executed.

[0104] The display stop driving step S20 can be a step that executes the drive to stop the image display. Therefore, the entirety or part of the actual image displayed on the screen may disappear, and a black or low grayscale screen may be displayed.

[0105] Figure 5 This is a timing diagram illustrating the sub-pixel driving of a display device 100 according to various aspects of the present invention.

[0106] Reference Figure 5 Based on the motion blur prevention driving method of the display device 100 according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL can be changed. Figure 5 Vgs in the figure represents the voltage between the gate node and the source node (second node N2) of the driving transistor DRT.

[0107] Reference Figure 5 In the display device 100 according to various aspects of the present invention, the voltage value Vref2 of the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED emits light (step S12) may be higher than the voltage value Vref1 of the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED stops emitting light (step S20).

[0108] Reference Figure 5 In the display device 100 according to various aspects of the present invention, a first reference voltage value Vref1 and a second reference voltage value Vref2 may be alternated as a reference voltage Vref applied to the reference voltage line RVL.

[0109] In the display device 100 according to various aspects of the present invention, while performing the data writing step S11, the data voltage Vdata corresponding to the image signal can be provided to the first node N1 of the driving transistor DRT via the data line DL. In this case, the reference voltage Vref applied to the reference voltage line RVL can have a first reference voltage value Vref1.

[0110] In the pixel circuit of the display device 100 according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL during one frame time may sequentially have a first reference voltage value Vref1, a second reference voltage value Vref2, and the first reference voltage value Vref1. The second reference voltage value Vref2 may be higher than the first reference voltage value Vref1.

[0111] As described above, each of the plurality of sub-pixels SP included in the display device 100 according to various aspects of the present invention may include a light-emitting element ED, a driving transistor DRT, a scanning transistor SCT, a storage capacitor Cst, and a driving control diode DCD.

[0112] The driving period for each of the multiple sub-pixels SP may include a data writing step S11, an emission step S12, and a display stop driving step S20, which are distinguished based on the change in the reference voltage Vref applied to the reference voltage line RVL. The data writing step S11, the emission step S12, and the display stop driving step S20 may be referred to as the first time period, the second time period, and the third time period, respectively.

[0113] Figure 6 The diagram illustrates the first time period of the data writing step S11 in the sub-pixel driving method of a display device 100 according to various aspects of the present invention. Figure 7 The diagram illustrates the second time period of the light-emitting step S12 in the sub-pixel driving method of a display device 100 according to various aspects of the present invention. Figure 8 The diagram illustrates the third time period of the display stop driving step S20 in the sub-pixel driving method of the display device 100 according to various aspects of the present invention.

[0114] Reference Figures 6 to 8The data writing step S11, the light emission step S12, and the display stop driving step S20 can be distinguished based on the reference voltage Vref applied to the reference voltage line RVL. In other words, the reference voltage Vref applied to the reference voltage line RVL can be changed when the driving step is changed.

[0115] Reference Figures 6 to 8 During the data writing step S11, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1. During the light emission step S12, the reference voltage Vref applied to the reference voltage line RVL may have a second reference voltage value Vref2 that is higher than the first reference voltage value Vref1. During the display stop driving step S20, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1 that is lower than the second reference voltage value Vref2.

[0116] Reference Figure 6 During the data writing step S11, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1.

[0117] During the data writing step S11, the scan signal SCAN may have a conduction level voltage. Therefore, the scan transistor SCT may be turned on.

[0118] During the data writing step S11, the data voltage Vdata corresponding to the image signal output from the data driving circuit 120 to the data line DL can be applied to the first node N1 of the driving transistor DRT via the conducting scan transistor SCT in the sub-pixel SP.

[0119] During the data writing step S11, the reference voltage Vref may have a relatively low first reference voltage value Vref1.

[0120] During the data writing step S11, the voltage of the second node N2 of the driving transistor DRT may have a first voltage value Vs1.

[0121] During the data writing step S11, the first voltage value Vs1 can be the sum of the first reference voltage value Vref1 and the threshold voltage value Vth of the drive control diode DCD.

[0122] During the data writing step S11, the first voltage value Vs1 of the second node N2 of the driving transistor DRT can be higher than the first reference voltage value Vref1 of the reference voltage Vref applied to the reference voltage line RVL. Therefore, during the data writing step S11, the driving control diode DCD can guide the current from the second node N2 of the driving transistor DRT to the reference voltage line RVL.

[0123] Reference Figure 7 During the light emission step S12, the scan signal SCAN can have a cutoff level voltage. Therefore, the scan transistor SCT can be turned off. Consequently, the first node N1 of the driving transistor DRT can be in a floating state, and a voltage rise can occur.

[0124] During the light emission step S12, the reference voltage Vref applied to the reference voltage line RVL may have a second reference voltage value Vref2 that is higher than the first reference voltage value Vref1.

[0125] During the light emission step S12, the second reference voltage value Vref2 may be higher than the first voltage value Vs1, which is the voltage of the second node N2 of the driving transistor DRT in the data writing step S11.

[0126] Therefore, since the second reference voltage value Vref2 of the reference voltage Vref applied to the reference voltage line RVL during the light emission step S12 is higher than the first voltage value Vs1, which is the voltage of the second node N2 of the driving transistor DRT, the driving control diode DCD can have a cut-off state, thereby the driving control diode DCD can cut off the current from the second node N2 of the driving transistor DRT to the reference voltage line RVL.

[0127] Therefore, during the light emission step S12, the second node N2 of the driving transistor DRT can be in an electrically floating state, and a voltage rise can occur at the second node of the driving transistor DRT.

[0128] During the light-emitting step S12, the voltage of the second node N2 of the driving transistor DRT can be increased from a first voltage value Vs1 to a second voltage value Vs2 and saturate at the second voltage value Vs2. During the light-emitting step S12, if the voltage of the second node N2 of the driving transistor DRT is saturated, the light-emitting element ED can emit light.

[0129] Reference Figure 8 During the display stop driving step S20 following the light emission step S12, the scan signal SCAN can be maintained at a cutoff level voltage. Therefore, the scan transistor SCT can remain in the cutoff state.

[0130] Reference Figure 8 At the start time of the display stop driving step S20 or during the display stop driving step S20, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1 that is lower than the second reference voltage value Vref2.

[0131] Therefore, at the start time of the display stop driving step S20 or during the display stop driving step S20, the drive control diode DCD can guide the voltage from the second node N2 to the reference voltage line RVL.

[0132] In this scenario, as charge discharges from the storage capacitor Cst, the voltage at the second node N2 of the driving transistor DRT can decrease from the second voltage value Vs2 to a predetermined level Vs3. Therefore, the light emission of the light-emitting element ED can be stopped.

[0133] Reference Figures 6 to 8 The scanning transistor SCT can be in the on state before the voltage of the reference voltage line RVL increases. After the light-emitting element ED stops emitting light, the scanning transistor SCT can be in the off state.

[0134] The light-emitting element (ED) and driving transistor (DRT), which are circuit elements included in each of the plurality of sub-pixels SP disposed on the display panel 110, may have their own unique characteristic values. For example, each of the plurality of light-emitting elements ED may have a threshold voltage as its own unique characteristic value, and each of the plurality of driving transistors DRT may have a threshold voltage and mobility as its own unique characteristic values.

[0135] The characteristics of the light-emitting element (ED) can be changed as the driving time of the light-emitting element increases. Similarly, the characteristics of the driving transistor (DRT) can be changed as the driving time of the driving transistor increases.

[0136] Multiple sub-pixels (SPs) can have different driving times. Therefore, the characteristic values ​​of the light-emitting elements (EDs) included in the multiple sub-pixels (SPs) can vary from one another. Consequently, characteristic value deviations can occur between the light-emitting elements (EDs).

[0137] Furthermore, the characteristic values ​​of the driving transistors (DRTs) included in multiple sub-pixels (SPs) can vary from one another. Therefore, characteristic value deviations can occur between the driving transistors (DRTs).

[0138] Deviations in characteristic values ​​between light-emitting elements (EDs) and between driving transistors (DRTs) can lead to brightness deviations between sub-pixels (SPs). Therefore, the brightness uniformity of the display panel 110 can deteriorate, resulting in a decrease in image quality.

[0139] Directly sensing the degree of degradation (characteristic value change) of circuit elements (such as driving transistor DRT and light-emitting element ED) in each sub-pixel SP via sensing drive of each sub-pixel SP is difficult to compensate for the deviation of the degree of degradation (deviation of characteristic value change).

[0140] Therefore, the display device 100 according to various aspects of the present invention can provide compensation functionality based on a sensingless-based compensation method rather than a sensing-based compensation method.

[0141] According to various aspects of the present invention, a sensorless compensation method is a method for understanding the state of accumulated data used when driving each sub-pixel SP without the need for sensor driving, sensing the degree of degradation of circuit elements in each sub-pixel SP in real time, and compensating for the degree of degradation deviation. The following will refer to... Figure 9 and 10 A sensorless compensation method based on various aspects of the present invention will be described in more detail.

[0142] Figure 9 The diagram illustrates a sensorless compensation system according to various aspects of the present invention. Figure 10 This is a graph illustrating a sensorless compensation method according to various aspects of the present invention.

[0143] Reference Figure 9 According to various aspects of the present invention, the non-sensory compensation system may include a non-sensory compensation module 900 and a storage unit 940.

[0144] The non-sensorless compensation module 900 can generate compensation data by accumulating data for each sub-pixel SP without performing sensor driving. The compensation data includes a compensation value corresponding to the degree of degradation of each sub-pixel SP.

[0145] The storage unit 940 can store compensation data generated by the non-sensorless compensation module 900. The storage unit 940 can store information (data) representing the degree of degradation of circuit elements (e.g., light-emitting elements or driving transistors) disposed in each of the plurality of sub-pixels SP, and can store compensation data including compensation values ​​corresponding to the degree of degradation of each sub-pixel SP.

[0146] After generating compensation data, the sensorless compensation module 900 can compress all or part of the generated compensation data and store the compressed data in the storage unit 940. Therefore, the storage space used for compensation data can be significantly reduced.

[0147] At least one of the sensorless compensation module 900 and the storage unit 940 may be included in the controller 140. At least one of the sensorless compensation module 900 and the storage unit 940 may be located outside the controller 140. In some cases, only a portion of the configuration included in the sensorless compensation module 900 and the configuration included in the storage unit 940 may be included in the controller 140.

[0148] The non-sensory compensation module 900 may include a data change unit 910, a compensation value determination unit 920, and a degradation monitoring unit 930.

[0149] The data modification unit 910 can receive image data from the outside. The data modification unit 910 can perform data modification processing based on compensation data to modify the image data, and output the modified image data (also known as the compensated image data) as a result of the data modification processing to the data drive circuit 120.

[0150] For example, the data modification unit 910 can perform data modification processing by adding, subtracting, or multiplying the image data of each sub-pixel SP and the corresponding compensation value based on the image data and compensation data input from the outside.

[0151] The data alteration unit 910 can identify the compensation data to be added to the image data via the compensation value determination unit 920 to generate altered image data.

[0152] The compensation value determination unit 920 can identify the degree of degradation of circuit elements set in each of the plurality of sub-pixels SP based on data stored in the storage unit 940. The compensation value determination unit 920 can identify a compensation value corresponding to the degree of degradation of the circuit elements and output the compensation value to the data change unit 910.

[0153] Storage cell 940 may be implemented as a single storage cell, or in some cases, as two or more storage cells 941 and 942. For example, storage cell 940 may include a first storage cell 941 and a second storage cell 942.

[0154] The first storage unit 941 can store information (data) about the degree of degradation of circuit elements that is accumulated in real time according to the driving of sub-pixels SP. The real-time information about the degree of degradation of each sub-pixel SP can be referred to as accumulated stress data.

[0155] The second storage unit 942 can store compensation data corresponding to the accumulated stress data. For example, the second storage unit 942 can store the compensation data corresponding to the accumulated stress data in the form of a lookup table.

[0156] The data change unit 910 can identify the compensation value Vcomp corresponding to the cumulative stress data Vstr of each sub-pixel SP from the compensation data stored in the second storage unit 942 via the compensation value determination unit 920, use the identified compensation value to perform data change processing, and output the resulting changed image data to the data drive circuit 120.

[0157] The data driving circuit 120 can generate an analog data voltage Vdata based on the changing image data received from the sensorless compensation module 900, and provide the generated data voltage Vdata to the sub-pixel SP. Therefore, the data voltage Vdata reflecting the degree of degradation based on the sub-pixel SP can be provided to the sub-pixel SP.

[0158] As an example, such as Figure 10 As shown, if the accumulated stress data is a first stress value Vstr1, then image data reflecting the change of the first compensation value Vcomp1 corresponding to the first stress value Vstr1 can be input to the data driving circuit 120. If the accumulated stress data is a second stress value Vstr2, then image data reflecting the change of the second compensation value Vcomp2 corresponding to the second stress value Vstr2 can be input to the data driving circuit 120.

[0159] The data driving circuit 120 provides a data voltage Vdata, which reflects compensation data based on the accumulated stress data of the sub-pixel SP in real time, to the sub-pixel SP. This allows for real-time compensation of the degradation of circuit elements within the sub-pixel SP while driving it.

[0160] The cumulative stress data of the sub-pixel SP can be updated in real time while driving the sub-pixel SP.

[0161] The degradation monitoring unit 930 can receive the changed image data output from the data change unit 910.

[0162] The data voltage Vdata based on the changing image data is provided to the sub-pixel SP, so that the sub-pixel SP can be further degraded as the driving time of the sub-pixel SP passes.

[0163] The degradation monitoring unit 930 can update the cumulative stress data of the sub-pixel SP stored in the first storage unit 941 based on the changed image data.

[0164] Since the cumulative stress data of the sub-pixel SP is updated by the degradation monitoring unit 930 while driving the sub-pixel SP, the degradation information about the circuit elements in the sub-pixel SP, which is stored in the first storage unit 941 as cumulative stress data, can be updated and managed in real time.

[0165] The degradation monitoring unit 930 can store the cumulative stress data of the sub-pixel SP in the first storage unit 941 as is.

[0166] Optionally, the degradation monitoring unit 930 can compress all or part of the cumulative stress data of the sub-pixel SP and store the compressed data in the first storage unit 941. In this case, the degradation monitoring unit 930 can perform a compression function (or function) and a decompression function on the cumulative stress data. The compression function can also be referred to as an encoding function, and the decompression function can also be referred to as a decoding function.

[0167] The compensation value determination unit 920 can identify the degree of degradation of circuit elements set in each of the plurality of sub-pixels SP based on the cumulative stress data stored in the first storage unit 941.

[0168] The compensation value determination unit 920 can calculate the compensation value of the corresponding sub-pixel SP corresponding to the degradation after the change of the sub-pixel SP based on the updated cumulative stress data, and update the compensation data stored in the second storage unit 942 using the calculated compensation value.

[0169] As described above, the data driving circuit 120 can provide the sub-pixel SP with a data voltage Vdata that reflects the compensation data based on the cumulative stress data of the sub-pixel SP in real time, so that in the display driving of the sub-pixel SP, the degradation of the circuit elements set in the sub-pixel SP can be compensated in real time without performing sensing driving on the sub-pixel SP.

[0170] The aforementioned aspects are briefly described below.

[0171] A display device 100 according to various aspects of the present invention may include: a display panel 110, the display panel including a plurality of gate lines GL, a plurality of data lines DL, and a plurality of sub-pixels SP defined by the intersection of the gate lines and the data lines, wherein each of the plurality of sub-pixels SP includes: a light-emitting element ED; a driving transistor DRT for driving the light-emitting element ED; a scanning transistor SCT controlled by a scanning signal SCAN provided from the gate lines GL and controlling the connection between a first node N1 of the driving transistor DRT and the data lines DL; a storage capacitor Cst connected between the first node N1 and a second node N2 of the driving transistor DRT; and a driving control diode DCD connected between the second node N2 of the driving transistor DRT and a reference voltage line RVL.

[0172] In the display device 100 according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL may be varied.

[0173] In a display device 100 according to various aspects of the present invention, the reference voltage Vref when the light-emitting element ED emits light may be higher than the reference voltage Vref when the light-emitting element ED stops emitting light.

[0174] In the display device 100 according to various aspects of the present invention, a first reference voltage value Vref1 and a second reference voltage value Vref2 higher than the first reference voltage value Vref1 can be alternated as the reference voltage Vref.

[0175] In a display device 100 according to various aspects of the present invention, when a data voltage is provided to the first node N1 of the driving transistor DRT via the data line DL, the reference voltage Vref may have the first reference voltage value Vref1.

[0176] In a display device 100 according to various aspects of the present invention, during a frame time, the reference voltage Vref may sequentially have a first reference voltage value Vref1, a second reference voltage value Vref2 and the first reference voltage value Vref1, wherein the second reference voltage value Vref2 may be higher than the first reference voltage value Vref1.

[0177] The display device 100 according to various aspects of the present invention may further include a power supply unit 100, the power supply unit being configured to change the reference voltage Vref according to display drive control information and to provide the changed reference voltage to the reference voltage line RVL.

[0178] In a display device 100 according to various aspects of the present invention, the drive control diode DCD may include an anode A electrically connected to a second node N2 of the drive transistor DRT and a cathode C electrically connected to the reference voltage line RVL.

[0179] In a display device 100 according to various aspects of the present invention, the reference voltage line RVL may be a signal line configured to extend in the same direction as the extension direction of the gate line GL.

[0180] In a display device 100 according to various aspects of the present invention, the reference voltage line RVL may intersect the data line DL. The reference voltage line RVL may be parallel to the gate line GL.

[0181] In a display device 100 according to various aspects of the present invention, the driving period of each of the plurality of sub-pixels may include a data writing step S11, a light emission step S12, and a display stop driving step S20, which are distinguished according to the change of the reference voltage Vref applied to the reference voltage line RVL. The data writing step S11, the light emission step S12, and the display stop driving step S20 may be referred to as a first period, a second period, and a third period, respectively.

[0182] During the first time period of the data writing step S11, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1.

[0183] During the second time period, which is the light emission step S12, the reference voltage Vref applied to the reference voltage line RVL may have a second reference voltage value Vref2 that is higher than the first reference voltage value Vref1.

[0184] During the third time period, which is the display stop driving step S20, the reference voltage Vref applied to the reference voltage line RVL may have a first reference voltage value Vref1 that is lower than the second reference voltage value Vref2.

[0185] During the data writing step S11, the scan signal SCAN may have an on-level voltage.

[0186] During the light emission step S12 and the display stop driving step S20, the scan signal SCAN may have a cutoff level voltage.

[0187] During the data writing step S11, the voltage of the second node N2 may have a first voltage value Vs1.

[0188] During the light-emitting step S12, the voltage of the second node N2 can be increased from the first voltage value Vs1 to the second voltage value Vs2 and the light-emitting element ED can emit light.

[0189] At the start time of the display stop driving step S20 (or the third time period) or during the display stop driving step S20, the voltage of the second node N2 may decrease from the second voltage value Vs2 and the light emission of the light-emitting element ED may stop.

[0190] During the data writing step S11, the reference voltage Vref may have a first reference voltage value Vref1. During the data writing step S11, the first voltage value Vref1 may be the sum of the first reference voltage value Vref1 and the threshold voltage value Vth of the drive control diode DCD.

[0191] During the data writing step S11, the drive control diode DCD can guide the current from the second node N2 to the reference voltage line RVL.

[0192] During the data writing step S11, the drive control diode DCD can cut off the current from the second node N2 to the reference voltage line RVL.

[0193] During the data writing step S11, the drive control diode DCD can guide the current from the second node N2 to the reference voltage line RVL.

[0194] The scanning transistor SCT may be in the on state before the voltage of the reference voltage line RVL is increased.

[0195] After the light-emitting element ED stops emitting light, the scanning transistor SCT can be in the off state.

[0196] A pixel circuit according to various aspects of the present invention may include: a light-emitting element ED; a driving transistor DRT for driving the light-emitting element ED; a scanning transistor SCT controlled by a scanning signal SCAN provided from the gate line GL and controlling the connection between a first node N1 of the driving transistor DRT and the data line DL; a storage capacitor Cst connected between the first node N1 and a second node N2 of the driving transistor DRT; and a driving control diode DCD connected between the second node N2 of the driving transistor DRT and a reference voltage line RVL.

[0197] In the pixel circuit according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL may be varied.

[0198] In a pixel circuit according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED emits light may be higher than the reference voltage Vref applied to the reference voltage line RVL when the light-emitting element ED stops emitting light.

[0199] In a pixel circuit according to various aspects of the present invention, the reference voltage Vref applied to the reference voltage line RVL during a frame time may sequentially have a first reference voltage value Vref1, a second reference voltage value Vref2, and the first reference voltage value Vref1. The second reference voltage value Vref2 may be higher than the first reference voltage value Vref1.

[0200] According to various aspects of the present invention, a novel pixel circuit capable of effectively preventing motion blur without the need for complex driving, and a display device 100 including the pixel circuit, can be provided.

[0201] According to various aspects of the present invention, a novel pixel circuit capable of reducing the number of gate lines and a display device 100 including the pixel circuit can be provided.

[0202] According to various aspects of the present invention, a novel pixel circuit capable of simplifying driving and having a high aperture ratio, and a display device 100 including the pixel circuit, can be provided.

[0203] The above description is provided to enable any person skilled in the art to access and use the technical concept of the invention, and the description is provided in the context of a specific application and its requirements. Various modifications, additions, and substitutions to the described aspects will be apparent to those skilled in the art, and the general principles defined herein can be applied to many other aspects and applications without departing from the spirit and scope of the invention. The above description and drawings are provided for illustrative purposes only, illustrating the technical concept of the invention. That is, the disclosed aspects are intended to illustrate the scope of the technical concept of the invention. Therefore, the scope of the invention is not limited to the aspects shown, but is the widest scope consistent with the claims. The scope of protection of the invention should be interpreted based on the appended claims, and all technical concepts within the equivalent scope should be interpreted as being included within the scope of the invention.

Claims

1. A display device comprising a display panel, the display panel including a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels defined by the intersections of the gate lines and the data lines. Each of the plurality of sub-pixels includes: Light-emitting elements; A driving transistor for driving the light-emitting element; A scanning transistor, which is controlled by a scanning signal provided from the gate line and controls the connection between the first node of the driving transistor and the data line; A storage capacitor is connected between a first node of the driving transistor and a second node of the driving transistor. as well as A drive control diode is connected between the second node of the drive transistor and the reference voltage line. During one frame, the reference voltage applied to the reference voltage line sequentially has a first reference voltage value, a second reference voltage value, and the first reference voltage value, and... The second reference voltage value is higher than the first reference voltage value.

2. The display device according to claim 1, wherein the second reference voltage is applied to the reference voltage line when the light-emitting element emits light, and the first reference voltage is applied to the reference voltage line when the light-emitting element stops emitting light.

3. The display device according to claim 1, wherein when a data voltage is provided to the first node of the driving transistor via the data line, the first reference voltage is applied to the reference voltage line.

4. The display device according to claim 1 further includes a power supply unit, the power supply unit being configured to change the reference voltage according to display drive control information and provide the changed reference voltage to the reference voltage line.

5. The display device according to claim 1, wherein the driving control diode includes an anode electrically connected to a second node of the driving transistor and a cathode electrically connected to the reference voltage line.

6. The display device according to claim 1, wherein the reference voltage line crosses the data line.

7. The display device according to claim 1, wherein the reference voltage line is parallel to the gate line.

8. The display device according to claim 1, The driving period of each of the plurality of sub-pixels includes a first period, a second period, and a third period, depending on the change in the reference voltage applied to the reference voltage line.

9. The display device according to claim 8, wherein during the first time period, the reference voltage has the first reference voltage value. During the second time period, the reference voltage has the second reference voltage value, and During the third time period, the reference voltage has the first reference voltage value.

10. The display device according to claim 8, wherein during the first time period, the scanning signal has a conduction level voltage. During the second and third time periods, the scanning signal has a cutoff level voltage.

11. The display device according to claim 8, wherein during the first time period, the voltage of the second node has a first voltage value. During the second time period, the voltage of the second node increases from the first voltage value to the second voltage value, and the light-emitting element emits light. During the third time period, at the beginning of the third time period or during the third time period, the voltage of the second node decreases from the second voltage value and the light-emitting element stops emitting light.

12. The display device of claim 11, wherein during the first time period, the reference voltage has the first reference voltage value. During the first time period, the first voltage value is the sum of the first reference voltage value and the threshold voltage value of the drive control diode.

13. The display device of claim 8, wherein during the first time period, the drive control diode directs current from the second node to the reference voltage line. During the second time period, the drive control diode cuts off the current from the second node to the reference voltage line. During the third time period, the drive control diode directs the current from the second node to the reference voltage line.

14. The display device according to claim 1, wherein the scanning transistor is in an on state before the voltage of the reference voltage line increases; and the scanning transistor is in an off state after the light-emitting element stops emitting light.

15. The display device according to claim 1, further comprising: A non-sensory compensation module is used to generate compensation data by accumulating data for each sub-pixel, the compensation data including a compensation value corresponding to the degree of degradation of each sub-pixel; as well as Storage unit used to store the compensation data.

16. The display device of claim 15, wherein the non-sensorless compensation module stores compressed data obtained by compressing all or part of the compensation data in the storage unit.

17. A pixel circuit, comprising: Light-emitting elements; A driving transistor for driving the light-emitting element; A scanning transistor, which is controlled by a scanning signal provided from the gate line and controls the connection between the first node of the driving transistor and the data line; A storage capacitor is connected between a first node of the driving transistor and a second node of the driving transistor. as well as A drive control diode is connected between the second node of the drive transistor and the reference voltage line. Wherein, as the reference voltage applied to the reference voltage line, a first reference voltage value and a second reference voltage value higher than the first reference voltage value alternate, and When a data voltage is supplied to the first node of the driving transistor via the data line, the reference voltage is the same as the first reference voltage value.

18. The pixel circuit of claim 17, wherein the second reference voltage is applied to the reference voltage line when the light-emitting element emits light, and the first reference voltage is applied to the reference voltage line when the light-emitting element stops emitting light.

19. The pixel circuit of claim 17, wherein during one frame time, the reference voltage sequentially has the first reference voltage value, the second reference voltage value, and the first reference voltage value. The second reference voltage value is higher than the first reference voltage value.

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