A non-cooled infrared focal plane dual-channel column-level readout circuit and method

Abstract

The application discloses a non-refrigeration infrared focal plane dual-channel column-level readout circuit and method, relates to the technical field of infrared focal plane array detector, and solves the problem of frame frequency reduction of a non-refrigeration infrared focal plane array detector under a large array. The technical scheme is as follows: the circuit comprises a mirror bridge circuit, a pixel array biasing circuit and a pixel array; the mirror bridge circuit is used for providing a bias voltage for the pixel array biasing circuit; the pixel array biasing circuit is used for providing a bias current for the pixel array; the pixel array biasing circuit comprises a first channel-level biasing circuit and a second channel-level biasing circuit; and a microbolometer gating switch is used for changing on-off timing, so that the microbolometer unit needing to be read out sequentially generates a detection output signal through the first channel-level biasing circuit or simultaneously generates a detection output signal through the first channel-level biasing circuit and the second channel-level biasing circuit, and adjustment of the readout frame frequency of the circuit is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of infrared focal plane array detector, more particularly, it relates to a non-cooled infrared focal plane dual-channel column-level readout circuit and method. BACKGROUND

[0002] The infrared focal plane detector is the core component of the thermal imaging system, and is the key to detect, identify and analyze the infrared information of the object, and has a wide application in the military, industry, transportation, security monitoring, meteorology, medicine and other industries. Frame frequency for the infrared focal plane imaging system is how many frames of images are output in one second, which determines the delay of the moving target image. For the frame frequency of 60Hz, it is required to output one frame of data in 0.0167s. The requirement of readout circuit for readout rate will change according to the different needs of infrared imaging system.

[0003] In order to improve the detection field of view and spatial resolution to adapt to the development of infrared application requirements, large array focal plane detector emerges as the times require. In order to improve the ability of real-time data acquisition under large array, high frame rate readout becomes an indispensable design. For the non-cooled infrared focal plane array detector of large array of rolling shutter readout, the number of array elements increases, the row period decreases, and the circuit frame rate decreases. At this time, it is required to improve the frame rate of the circuit. High frame rate infrared focal plane detector is the key to realize high-speed infrared imaging, and has very important application in high-speed infrared identification, multispectral imaging technology and high-speed temperature measurement field.

[0004] The traditional subarray technology scheme for improving frame rate under large array adopts array element splicing design, each array element is relatively independent, the circuit matching is poor, the image imaging difference is obvious, and the horizontal and vertical stripes are serious. Therefore, the imaging performance of the non-cooled infrared focal plane detector is greatly reduced. SUMMARY

[0005] The purpose of the present application is to provide a non-cooled infrared focal plane dual-channel column-level readout circuit and method, which improves the image performance of the non-cooled infrared focal plane readout circuit under large array, and increases the matching and isolation performance of the non-cooled infrared focal plane dual-channel column-level readout circuit.

[0006] The above technical purpose of the present application is realized by the following technical scheme: a detection bridge circuit is provided, the detection bridge circuit comprises: a mirror image bridge circuit and a pixel bridge circuit;

[0007] The pixel bridge circuit comprises a pixel array bias circuit and a pixel array;

[0008] The mirror image bridge circuit is used for providing bias voltage for the pixel array bias circuit, and the pixel array bias circuit is used for providing bias current for the pixel array;

[0009] The pixel array bias circuit comprises a first channel stage bias circuit and a second channel stage bias circuit.

[0010] The pixel array comprises a plurality of microbolometer gating units, each microbolometer gating unit comprising a plurality of microbolometer units and a plurality of microbolometer gating switches, and the plurality of microbolometer gating units are connected in sequence to form a periodic structure.

[0011] The pixel array bias circuit is connected to the pixel array, and the microbolometer gating switches change the conduction timing so that each microbolometer unit in the microbolometer gating unit that needs to be read out sequentially generates a detection output signal through the first channel stage bias circuit in the pixel array bias circuit or simultaneously generates a detection output signal through the first channel stage bias circuit and the second channel stage bias circuit, thereby adjusting the frame frequency of the readout circuit.

[0012] The above technical solution can adjust the frame frequency of the readout circuit by changing the conduction timing of the microbolometer gating switches. Through the cooperation of the dual-channel column-level readout mode and the pixel array gating circuit structure, the low frame frequency and high frame frequency readout modes are realized under the condition of increasing the detection pixel array, reducing the line synchronization time, and reducing the frame frequency, thereby improving the frame frequency characteristics of the readout circuit. Compared with the traditional subarray technology, the present application uses a non-splicing design, the circuit matching is enhanced, the image imaging difference is small, and the horizontal and vertical stripes in imaging can be effectively suppressed.

[0013] As a preferred embodiment, the readout mode of the circuit comprises a low frame frequency readout mode and a high frame frequency readout mode.

[0014] When the circuit is in the low frame frequency readout mode, the microbolometer units in the same microbolometer gating unit that need to be read out sequentially generate a detection output signal through the first channel stage bias circuit.

[0015] When the circuit is in the high frame frequency readout mode, each microbolometer unit in the microbolometer gating unit that needs to be read out simultaneously generates a detection output signal through the first channel stage bias circuit and the second channel stage bias circuit.

[0016] As a preferred embodiment, the microbolometer gating unit is gated by a first microbolometer gating switch.

[0017] As a preferred embodiment, the microbolometer gating unit comprises two microbolometer units.

[0018] The first microbolometer unit is connected to the first channel stage bias circuit through a second microbolometer gating switch.

[0019] The second microbolometer unit is connected to the second channel stage bias circuit through a third microbolometer gating switch.

[0020] As a preferred embodiment, the first microbolometer unit and the second microbolometer unit are controlled to reset through a fourth microbolometer gating switch and a fifth microbolometer gating switch respectively.

[0021] As a preferred embodiment, the first microbolometer unit and the second microbolometer unit are connected, and the joint point is grounded through the first microbolometer gating switch.

[0022] The first microbolometer unit is connected to the first channel stage bias circuit through the second microbolometer gating switch in parallel with the fourth microbolometer gating switch.

[0023] The second microbolometer unit is connected to the second channel stage bias circuit through the third microbolometer gating switch in parallel with the fifth microbolometer gating switch.

[0024] As a preferred embodiment, the first channel stage bias circuit and the second channel stage bias circuit are of the same structure.

[0025] The first channel bias circuit comprises a transistor PM2_e, a transistor PM4_e, a transistor NM4_e and a blind element resistance Rb_e.

[0026] One end of the blind element resistance Rb_e is connected to a working voltage VSK, and the other end is connected to the source of the transistor PM2_e. The drain of the transistor PM2_e is connected to the source of the transistor PM4_e. The drain of the transistor PM4_e is grounded. The source of the transistor PM4_e is connected to the drain of the transistor NM4_e. The source of the transistor NM4_e is connected to the microbolometer gating unit. The drain of the transistor NM4_e serves as the detection output signal of the first channel stage bias circuit.

[0027] The gates of the transistor PM2_e and the transistor PM4_e are both provided with a gate bias voltage Veb by a chip-level reference. The gate of the transistor NM4_e is provided with a bias voltage vfid by the mirror bridge circuit.

[0028] As a preferred embodiment, the mirror bridge circuit comprises a transistor PM1, a transistor PM3, a transistor NM3, a blind element mirror resistance Rbm and a pixel element mirror resistance Rsm.

[0029] One end of the blind cell mirror resistance Rbm is connected with the working voltage VSK, and the other end is connected with the source of the transistor PM1, the drain of the transistor PM1 is connected with the source of the transistor PM3, the drain of the transistor PM3 is grounded, the source of the transistor PM3 is connected with the drain of the transistor NM3, and the source of the transistor NM3 is grounded through the pixel mirror resistance Rsm;

[0030] The gate of the transistor PM1 and the gate of the transistor PM3 are connected, and the gate bias voltage Veb of the chip level reference is provided for the gates, the drain of the transistor NM3 is connected with the gate, and the bias voltage Vfid is provided for the pixel array bias circuit.

[0031] As a preferred embodiment, the bias voltage Veb is connected with the gates of the transistor PM2_e and the transistor PM4_e, and the bias voltage Vfid is connected with the gate of the transistor NM4_e.

[0032] In a second aspect, the application provides a non-cooled infrared focal plane dual-channel column-level readout method, which is applied to the non-cooled infrared focal plane dual-channel column-level readout circuit, and the method comprises the following steps:

[0033] According to the readout mode of the circuit and the microbolometer unit to be read, the on-off timing of the microbolometer selection switch is set;

[0034] The microbolometer selection switch is gated according to the on-off timing;

[0035] When the circuit is in a low frame frequency readout mode, the microbolometer unit to be read generates a detection output signal through the first channel level bias circuit;

[0036] When the circuit is in a high frame frequency readout mode, each microbolometer unit in the microbolometer selection unit to be read generates a detection output signal through the first channel level bias circuit and the second channel level bias circuit.

[0037] Compared with the prior art, the application has the following beneficial effects: by setting a dual-channel column-level readout mode and improving the pixel array, the low frame frequency and high frame frequency two readout modes are realized under the condition of increasing the detection pixel surface array, reducing the line synchronization time and reducing the frame frequency, and the frame frequency performance of the readout circuit is improved. BRIEF DESCRIPTION OF DRAWINGS

[0038] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the principles of the application. In the drawings:

[0039] Figure 1 The structural diagram of the readout circuit provided by an embodiment of the application is shown in the figure.

[0040] Figure 2 A timing chart of a pixel array microbolometer gate-on switch in a low frame rate mode of a readout circuit according to an embodiment of the present application is provided;

[0041] Figure 3 A timing chart of a pixel array microbolometer gate-on switch in a high frame rate mode of a readout circuit according to an embodiment of the present application is provided.

[0042] Markings in the drawings and corresponding names of parts:

[0043] 1, mirror bridge circuit; 2, pixel array bias circuit; 3, first channel stage bias circuit; 4, second channel stage bias circuit; 5, pixel array; 6, detection bridge circuit; 7, microbolometer gate-on unit. DETAILED DESCRIPTION

[0044] Hereinafter, the term "include" or "may include" used in various embodiments of the present application indicates the existence of the applied function, operation, or element, and does not limit one or more functions, operations, or elements to be added. Also, as used in various embodiments of the present application, the terms "include", "have", and their conjugates merely indicate the presence of the mentioned features, numbers, steps, operations, elements, components, or combinations thereof, and should not be construed as excluding the possibility of the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof.

[0045] In various embodiments of the present application, the expression "or" or "at least one of B or / and C" includes any combination of the listed terms or all combinations thereof. For example, the expression "B or C" or "at least one of B or / and C" can include B, can include C, or can include both B and C.

[0046] The expressions (such as "first", "second", etc.) used in various embodiments of the present application can modify various constituent elements in various embodiments, but can not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are used only for the purpose of distinguishing one element from another element. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, the first element can be called the second element, and likewise, the second element can be called the first element without departing from the scope of various embodiments of the present application.

[0047] It should be noted that if a description connects one component element to another component element or is connected to another component element, the first component element can be directly connected to the second component element, and a third component element can be connected between the first component element and the second component element. Conversely, when one component element is directly connected to another component element or is directly connected to another component element, it is understood that there is no third component element between the first component element and the second component element.

[0048] The terms used in various embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit various embodiments of the present application. As used herein, the singular form is intended to include the plural form, unless the context clearly indicates otherwise. Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those of ordinary skill in the art to which various embodiments of the present application belong. The terms (such as those defined in a commonly used dictionary) will be interpreted to have the same meaning as the contextual meaning in the relevant technical field and will not be interpreted to have an idealized meaning or an overly formal meaning, unless clearly defined in various embodiments of the present application.

[0049] In order to make the purpose, technical solutions and advantages of the present application more clear and obvious, the present application is further described in detail below in combination with embodiments and drawings. The illustrative embodiments of the present application and their descriptions are only used to explain the present application and do not limit the present application.

[0050] The uncooled infrared focal plane detector refers to an imaging sensor that can convert the incident infrared radiation of a target into an electrical signal under an uncooled environment. The uncooled infrared focal plane detector can be divided into pyroelectric, thermocouple, thermistor diode, and microbolometer types. Among them, the microbolometer type uncooled infrared focal plane detector is the research focus of the present application, and the microbolometer is a thermistor type sensor. After infrared radiation irradiates the sensor, the temperature of the sensor rises, and the resistance of the thermosensitive film changes.

[0051] With the continuous improvement of the technology level of uncooled infrared detectors, uncooled infrared focal plane detectors are developing towards larger arrays. For large-area uncooled infrared focal plane detectors, the number of arrays increases, the row period decreases, and the circuit frame frequency decreases, so it is urgent to improve the frame frequency performance of the circuit.

[0052] The traditional scheme for improving the frame frequency performance of a large array uses array pixel splicing design, and each array pixel part is relatively independent, the image imaging difference is obvious, and horizontal and vertical stripes are more serious. Therefore, the imaging performance of the uncooled infrared focal plane detector is greatly compromised.

[0053] Therefore, the inventors propose a non-cooled infrared focal plane dual-channel column-level readout circuit and method. By setting a dual-channel column-level readout mode and a pixel array gating circuit, the circuit can realize two readout modes of low frame frequency and high frame frequency under the conditions of increased detection pixel array, reduced line synchronization time and reduced frame frequency, and improve the frame frequency performance of the readout circuit. Figures 1-3 The non-cooled infrared focal plane dual-channel column-level readout circuit and method will be described in detail below.

[0054] Embodiment 1

[0055] The embodiment provides a non-cooled infrared focal plane dual-channel column-level readout circuit. By improving the detection bridge circuit in the readout circuit, the circuit can realize two readout modes of low frame frequency and high frame frequency under the conditions of increased detection pixel array, reduced line synchronization time and reduced frame frequency, and improve the frame frequency performance of the readout circuit.

[0056] It should be noted that the detection bridge circuit is used to detect the signal generated by the microbolometer unit in response to the incident infrared radiation to generate a detection output signal.

[0057] Referring to Figure 1 As shown in the figure, the detection bridge circuit 6 in the readout circuit includes a mirror bridge circuit 1 and a pixel bridge circuit. The pixel bridge circuit includes a pixel array biasing circuit 2 and a pixel array 5. The mirror bridge circuit 1 is used to provide a bias voltage for the pixel array biasing circuit 2, and the pixel array biasing circuit 2 is used to provide a bias current for the pixel array 5. The pixel array biasing circuit 2 includes a first channel-level biasing circuit 3 and a second channel-level biasing circuit 4. The pixel array 5 includes a plurality of microbolometer gating units 7, each of which includes a plurality of microbolometer units and a plurality of microbolometer gating switches. The plurality of microbolometer gating units 7 are connected in sequence to form a periodic structure. The pixel array biasing circuit 2 is connected to the pixel array 5, and the microbolometer gating switches change the conduction timing so that each microbolometer unit in the microbolometer gating unit that needs to be read out generates a detection output signal through the first channel-level biasing circuit 3 in the pixel array biasing circuit 2 or generates a detection output signal through the first channel-level biasing circuit 3 and the second channel-level biasing circuit 4 at the same time, thereby adjusting the readout frame frequency of the circuit.

[0058] The principle of the circuit of the embodiment is that the mirror bridge circuit 1 and the pixel array biasing circuit 2 in the detection bridge circuit 6 connect the microbolometer unit currently required to be read out to the first channel stage biasing circuit 3 and the second channel stage biasing circuit 4 in the pixel array biasing circuit 2 through the microbolometer gating switch in the pixel array 5, detect the signal generated by the microbolometer unit in response to the incident infrared radiation, and thus generate the detection output signals Vout_e and Vout_o, so as to realize the detection of the infrared radiation signal incident to the microbolometer unit.

[0059] The readout circuit of the embodiment has two readout modes, including a low frame frequency readout mode and a high frame frequency readout mode; when the circuit is in the low frame frequency readout mode, the microbolometer unit required to be read out in the same microbolometer gating unit sequentially generates the detection output signal through the first channel stage biasing circuit 3; when the circuit is in the high frame frequency readout mode, each microbolometer unit in the microbolometer gating unit required to be read out simultaneously generates the detection output signal through the first channel stage biasing circuit 3 and the second channel stage biasing circuit 4.

[0060] In the embodiment, the inventor designs the readout mode of the double channels (the first channel stage biasing circuit 3 and the second channel stage biasing circuit 4) to cooperate with the pixel array 5, to realize the low frame frequency and high frame frequency two readout modes of the circuit by selecting the single channel to generate the detection output signal or the double channels to generate the detection output signal. When applied to the uncooled infrared focal plane detector of a large array, the frame frequency performance of the detector can be improved. Specifically, for the low frame frequency mode, in the adjacent row period, the first channel stage biasing circuit channel_a_e connects the microbolometer unit required to be read out to the detection bridge circuit 6 through the microbolometer gating switch, realizes the detection of the signal generated by the microbolometer unit currently required to be read out in response to the incident infrared radiation, and generates the detection output signals Vout_e and Vout_o. For the high frame frequency mode, in the same row period, the first channel stage biasing circuit Channel_a_e and the second channel stage biasing circuit Channel_a_o simultaneously connect each microbolometer unit in the microbolometer gating unit currently required to be read out to the detection bridge circuit 6 through the microbolometer gating switch, realize the simultaneous detection of the signal generated by each microbolometer unit in the microbolometer gating unit currently required to be read out in response to the incident infrared radiation, and generate the detection output signals Vout_e and Vout_o.

[0061] The following explains each part of the detection bridge circuit 6. The mirror bridge circuit 1 and the pixel array biasing circuit 2 in the detection bridge circuit 6 can adopt the common structure for detecting the signal generated by the microbolometer unit in response to the incident infrared radiation.

[0062] Referring to Figure 1 As shown in the figure, the mirror bridge circuit 1 comprises a transistor PM1, a transistor PM3, a transistor NM3, a blind cell mirror resistance Rbm and a pixel cell mirror resistance Rsm; one end of the blind cell mirror resistance Rbm is connected to a working voltage VSK, and the other end is connected to the source of the transistor PM1; the drain of the transistor PM1 is connected to the source of the transistor PM3; the drain of the transistor PM3 is grounded; the source of the transistor PM3 is connected to the drain of the transistor NM3; the source of the transistor NM3 is grounded through the pixel cell mirror resistance Rsm; the gates of the transistor PM1 and the transistor PM3 are connected and provided with a gate bias voltage Veb by a commonly used chip-level reference (not shown in the figure); and the drain and the gate of the transistor NM3 are connected and provide a bias voltage Vfid for the pixel array bias circuit.

[0063] The pixel array bias circuit 2 comprises a first channel level bias circuit 3 and a second channel level bias circuit 4 which have the same structure; taking the first channel level bias circuit 3 as an example for description, the first channel bias circuit 3 comprises a transistor PM2_e, a transistor PM4_e, a transistor NM4_e and a blind cell resistance Rb_e; one end of the blind cell resistance Rb_e is connected to a working voltage VSK, and the other end is connected to the source of the transistor PM2_e; the drain of the transistor PM2_e is connected to the source of the transistor PM4_e; the drain of the transistor PM4_e is grounded; the source of the transistor PM4_e is connected to the drain of the transistor NM4_e; the source of the transistor NM4_e is connected to the microbolometer selection unit; and the drain of the transistor NM4_e serves as the output of the first channel level bias circuit; the gates of the transistor PM2_e and the transistor PM4_e are provided with a gate bias voltage Veb by a commonly used chip-level reference; and the gate of the transistor NM4_e is provided with a bias voltage Vfid by the mirror bridge circuit.

[0064] The gate of the transistor PM1 in the mirror bridge circuit 1 is connected to the gates of the transistors PM2_e, PM4_e, PM2_o and PM4_o in the pixel array bias circuit 2, and is provided with a gate bias voltage Veb by a commonly used chip-level reference. The gates of the transistors NM4_e and NM4_o in the pixel array bias circuit 2 are connected, and are provided with a gate bias voltage Vfid by the transistor NM3 in the mirror bridge circuit 1.

[0065] It should be noted that the specific structure of the mirror bridge circuit 1 and the pixel array bias circuit 2 given above is only an exemplary structure, and does not constitute a limitation on the protection scope of the present embodiment. Those skilled in the art can also use other known structures to form the mirror bridge circuit 1 and the pixel array bias circuit 2.

[0066] Next, the pixel array 5 in the detection bridge circuit 6 will be described. In this embodiment, the pixel array 5 includes a plurality of microbolometer gating units 7, which are connected in sequence to form a periodic structure. Each of the microbolometer gating units 7 includes a plurality of microbolometer units and a plurality of microbolometer gating switches. The structure of the microbolometer gating unit 7 will be described in detail below.

[0067] The microbolometer gating unit 7 is gated by the first microbolometer gating switch;

[0068] The microbolometer gating unit includes two microbolometer units, the first microbolometer unit is connected to the first channel stage bias circuit through the second microbolometer gating switch, and the second microbolometer unit is connected to the second channel stage bias circuit through the third microbolometer gating switch;

[0069] The first microbolometer unit and the second microbolometer unit are controlled to reset through the fourth microbolometer gating switch and the fifth microbolometer gating switch, respectively.

[0070] As a possible implementation, in the microbolometer gating unit 7, the specific connection mode of the two microbolometer units and the five microbolometer gating switches is as follows: the first microbolometer unit and the second microbolometer unit are connected, and the junction point is connected to ground through the first microbolometer gating switch; the first microbolometer unit and the fourth microbolometer gating switch are connected in parallel, and then connected to the first channel stage bias circuit through the second microbolometer gating switch; the second microbolometer unit and the fifth microbolometer gating switch are connected in parallel, and then connected to the second channel stage bias circuit through the third microbolometer gating switch.

[0071] The periodic structure of the plurality of microbolometer gating units 7 in this embodiment will be described below, Figure 1 The periodic structure of the plurality of microbolometer gating units 7 in this embodiment will be described below, Figure 1 The nth and (n+1)th microbolometer gating units 7 are shown in FIG. 6, where n is a positive integer. The microbolometer gating unit 7 includes microbolometer units Rs_4n, Rs_4n+1, Rs_4n+2, Rs_4n+3; microbolometer gating switches row_selup_4n, row_selup_4n+1, row_selup_4n+2, row_selup_4n+3, row_seldown_4n, row_seldown_4n+2, row_rst_4n, row_rst_4n+1, row_rst_4n+2, row_rst_4n+3.

[0072] Wherein, the microbolometer unit Rs_4n is connected with channel_a_e, channel_a_o and gnd through microbolometer selection switch row_sel_up_4n, row_sel_up_4(n-1)+3 (not shown in the figure), row_sel_down_4n respectively at both ends, and the microbolometer selection switch row_rst_4n is connected in parallel at both ends as a reset switch.

[0073] The microbolometer unit Rs_4n+1 is connected with channel_a_e, channel_a_o and gnd through microbolometer selection switch row_sel_up_4n+2, row_sel_up_4n+1, row_sel_down_4n respectively at both ends, and the microbolometer selection switch row_rst_4n+1 is connected in parallel at both ends as a reset switch.

[0074] The microbolometer unit Rs_4n+2 is connected with channel_a_e, channel_a_o and gnd through microbolometer selection switch row_sel_up_4n+2, row_sel_up_4n+1, row_sel_down_4n+2 respectively at both ends, and the microbolometer selection switch row_rst_4n+2 is connected in parallel at both ends as a reset switch.

[0075] The microbolometer unit Rs_4n+3 is connected with channel_a_e, channel_a_o and gnd through microbolometer selection switch row_sel_up_4(n+1) (not shown in the figure), row_sel_up_4n+3, row_sel_down_4n+2 respectively at both ends, and the microbolometer selection switch row_rst_4n+3 is connected in parallel at both ends as a reset switch.

[0076] Figure 1The microbolometer gating switches row_seldown_4n and row_seldown_4n+2 in the embodiment are the first microbolometer gating switches in this embodiment, which are used to gating the nth and n+1th microbolometer gating units 7; the microbolometer gating switches row_selup_4n and row_selup4n+2 are the second microbolometer gating switches of the nth and n+1th microbolometer gating units 7, respectively, which are used to connect to the first channel-level bias circuit 3; the microbolometer gating switches row_selup_4n+1 and row_selup_4n+2 are the second microbolometer gating switches of the nth and n+1th microbolometer gating units 7, respectively. elup_4n+3 are the third microbolometer selection switches of the nth and n+1th microbolometer selection units 7, respectively, for connecting to the second channel-level bias circuit 4; the microbolometer selection switches row_rst_4n and row_rst_4n+1 are the fourth microbolometer selection switch and the fifth microbolometer selection switch of the nth microbolometer selection unit 7; row_rst_4n+2 and row_rst_4n+3 are the fourth microbolometer selection switch and the fifth microbolometer selection switch of the n+1th microbolometer selection unit 7.

[0077] Now combined Figures 2-3 The working principles of the low frame rate mode and the high frame rate mode of the readout circuit of this embodiment are described as follows:

[0078] A. For low frame rate mode

[0079] During adjacent row periods, the detection pixel bias circuit channel_a_e sequentially connects the microbolometer units to be read out to the detection bridge circuit 6 via the microbolometer selection switch, thereby detecting the signal generated by the microbolometer unit to be read out in response to the incident infrared radiation and generating detection output signals Vout_e and Vout_o.

[0080] like Figure 2 As shown, taking the start of the second row period reference data as an example, within the second row period reference data, row_selup_4n and row_seldown_4n are closed, and row_rst_4n is open at both ends of microbolometer unit Rs_4n. At this point, the signal generated by microbolometer unit Rs_4n in response to the incident infrared radiation is detected by channel_a_e, generating a detection output signal Vout_e. Channel_a_o does not generate a detection output signal Vout_o.

[0081] During the third row period of reference data, row_selup_4n+2 and row_seldown_4n are closed, while row_rst_4n+1 is open, across microbolometer cell Rs_4n+1. At this point, the signal generated by microbolometer cell Rs_4n+1 in response to the incident infrared radiation is detected by channel_a_e, generating a detection output signal (Vout_e). Channel_a_o does not generate a detection output signal (Vout_o).

[0082] Similarly for the microbolometer units Rs_4n+2, Rs_4n+3.

[0083] B. For high frame rate mode

[0084] During the same line period, the detection pixel bias circuits channel_a_e and channel_a_o connect the two microbolometer units in the microbolometer detection unit currently to be read to the detection bridge circuit 6 via the microbolometer selection switch, thereby achieving simultaneous detection of the signals generated by the two microbolometer units in the current microbolometer detection unit in response to the incident infrared radiation, and generating detection output signals Vout_e and Vout_o.

[0085] like Figure 3 As shown, starting with the second row period reference data, within the second row period reference data, row_selup_4n, row_seldown_4n, and row_selup_4n+1 are closed, while row_rst_4n and row_rst_4n+1 are disconnected. At this point, the signal generated by microbolometer unit Rs_4n in response to the incident infrared radiation is detected via channel_a_e, generating a detection output signal, detection signal Vout_e. The signal generated by microbolometer unit Rs_4n+1 in response to the incident infrared radiation is detected via channel_a_o, generating a detection output signal, detection signal Vout_o.

[0086] Similarly, for the third row period reference data, the dual channels channel_a_e and channel_a_o simultaneously connect the microbolometer units Rs_4n+2 and Rs_4n+3 to the detection bridge structure and generate detection output signals Vout_e and Vout_o.

[0087] It should be noted that in Figure 2 、 3The timing diagram of the microbolometer selection switch shows that the high selection state indicates that the microbolometer selection switch is in the on state, and the low selection state indicates that the circuit is in the off state.

[0088] In the embodiment, by setting the double-channel column-level readout mode and improving the pixel array, the low frame frequency and high frame frequency two readout modes are realized in the case of increasing the detection pixel array, reducing the line synchronization time and reducing the frame frequency, the frame frequency performance of the readout circuit is improved, and the circuit matching and isolation performance is also improved.

[0089] Embodiment 2

[0090] The embodiment is based on the non-cooled infrared focal plane double-channel column-level readout circuit provided in embodiment 1, and provides a non-cooled infrared focal plane double-channel column-level readout method. The method comprises:

[0091] According to the readout mode of the circuit and the microbolometer unit to be read, the conduction timing of the microbolometer selection switch is set;

[0092] The microbolometer selection switch is selected according to the conduction timing;

[0093] When the circuit is in the low frame frequency readout mode, the microbolometer unit to be read generates a detection output signal through the first channel-level bias circuit;

[0094] When the circuit is in the high frame frequency readout mode, each microbolometer unit in the microbolometer selection unit to be read generates a detection output signal through the first channel-level bias circuit and the second channel-level bias circuit.

[0095] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. An uncooled infrared focal plane dual-channel column-level readout circuit, including a detection bridge circuit, characterized by: The detection bridge circuit includes: a mirror bridge circuit and a pixel bridge circuit; The pixel bridge circuit includes a pixel array bias circuit and a pixel array; The mirror bridge circuit is used to provide a bias voltage for the pixel array bias circuit, and the pixel array bias circuit is used to provide a bias current for the pixel array; The pixel array bias circuit includes: a first channel level bias circuit and a second channel level bias circuit; The pixel array includes a plurality of microbolometer gating units, the microbolometer gating units including a plurality of microbolometer units and a plurality of microbolometer gating switches, and the plurality of microbolometer gating units are sequentially connected to form a periodic structure; The pixel array bias circuit is connected to the pixel array, and the microbolometer gating switch changes the conduction timing so that each microbolometer unit in the microbolometer gating unit to be read out sequentially generates a detection output signal through the first channel-level bias circuit in the pixel array bias circuit or generates a detection output signal through the first channel-level bias circuit and the second channel-level bias circuit simultaneously, thereby adjusting the circuit readout frame rate; When the circuit is in a low frame rate readout mode, the microbolometer unit to be read generates a detection output signal through the first channel-level bias circuit; when the circuit is in a high frame rate readout mode, each microbolometer unit in the microbolometer gating unit to be read generates a detection output signal through the first channel-level bias circuit and the second channel-level bias circuit.

2. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 1, characterized in that: The readout modes of the circuit include: low frame rate readout mode and high frame rate readout mode; When the circuit is in a low frame rate readout mode, the microbolometer units to be read out in the same microbolometer gating unit sequentially generate detection output signals through the first channel-level bias circuit; When the circuit is in a high frame rate readout mode, each microbolometer unit in the microbolometer gating unit to be read out simultaneously generates a detection output signal through the first channel level bias circuit and the second channel level bias circuit.

3. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 1 or 2, characterized in that: The microbolometer gating unit is gated by a first microbolometer gating switch.

4. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 3, characterized in that: The microbolometer gating unit includes two microbolometer units; The first microbolometer unit is connected to the first channel-level bias circuit via a second microbolometer selection switch; The second microbolometer unit is connected to the second channel-level bias circuit via a third microbolometer selection switch.

5. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 4, characterized in that: The first microbolometer unit and the second microbolometer unit are reset by controlling the fourth microbolometer gating switch and the fifth microbolometer gating switch, respectively.

6. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 5, characterized in that: The first microbolometer unit is connected to the second microbolometer unit, and the junction point thereof is grounded via the first microbolometer gating switch; The first microbolometer unit is connected in parallel to the fourth microbolometer gating switch and then connected to the first channel-level bias circuit through the second microbolometer gating switch; The second microbolometer unit is connected in parallel with the fifth microbolometer selection switch and then connected to the second channel-level bias circuit through the third microbolometer selection switch.

7. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 1 or 2, characterized in that: The first channel-level bias circuit and the second channel-level bias circuit have the same structure; The first channel-level bias circuit includes a transistor PM2_e, a transistor PM4_e, a transistor NM4_e and a blind resistor Rb_e; One end of the blind resistor Rb_e is connected to the operating voltage VSK, and the other end is connected to the source of the transistor PM2_e, the drain of the transistor PM2_e is connected to the source of the transistor PM4_e, the drain of the transistor PM4_e is grounded, the source of the transistor PM4_e is connected to the drain of the transistor NM4_e, the source of the transistor NM4_e is connected to the microbolometer gating unit, and the drain voltage of the transistor NM4_e serves as the detection output signal of the first channel-level bias circuit; The gates of the transistors PM2_e and PM4_e are both provided with a gate bias voltage Veb by a chip-level reference, and the gate of the transistor NM4_e is provided with a bias voltage vfid by the mirror bridge circuit.

8. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 7, characterized in that: The mirror bridge circuit includes a transistor PM1, a transistor PM3, a transistor NM3, a blind pixel mirror resistor Rbm and a pixel mirror resistor Rsm; One end of the blind pixel mirror resistor Rbm is connected to the operating voltage VSK, and the other end is connected to the source of the transistor PM1, the drain of the transistor PM1 is connected to the source of the transistor PM3, the drain of the transistor PM3 is grounded, the source of the transistor PM3 is connected to the drain of the transistor NM3, and the source of the transistor NM3 is grounded through the pixel mirror resistor Rsm; The gates of the transistors PM1 and PM3 are connected, and a chip-level reference provides a gate bias voltage Veb to the gates. The drain of the transistor NM3 is connected to the gate, and provides a bias voltage Vfid for the pixel array bias circuit.

9. The uncooled infrared focal plane dual-channel column-level readout circuit according to claim 8, characterized in that: The bias voltage Veb is connected to the gates of the transistor PM2_e and the transistor PM4_e, and the bias voltage Vfid is connected to the gate of the transistor NM4_e.

10. An uncooled infrared focal plane dual-channel column-level readout method, applied to the uncooled infrared focal plane dual-channel column-level readout circuit according to any one of claims 1 to 9, characterized in that: include Setting the conduction timing of the microbolometer gating switch according to the readout mode of the circuit and the microbolometer unit to be read out; The microbolometer gating switch is gated according to the conduction timing; When the circuit is in a low frame rate readout mode, the microbolometer unit to be read generates a detection output signal through the first channel level bias circuit; When the circuit is in a high frame rate readout mode, each microbolometer unit in the microbolometer gating unit that needs to be read out generates a detection output signal through the first channel level bias circuit and the second channel level bias circuit.

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