Test voltage compensation method, device and medium for use in a test machine

Abstract

The application provides a test voltage compensation method, device and medium for a test machine, wherein the test voltage compensation method of the voltage test machine comprises the following steps: performing initial testing on a target device to be tested based on an initial test voltage, so as to obtain the total resistance of the corresponding test circuit of the target device to be tested; determining a third test channel; connecting the first test channel, the second test channel and the third test channel based on two-to-two short circuit to form a corresponding channel group; obtaining the resistance of each channel group in parallel to form a resistance equation group, so as to calculate the resistance of the first test channel and the resistance of the second test channel; and calculating the target voltage after compensation of the initial test voltage based on the total resistance of the corresponding test circuit of the target device to be tested and the resistance of the first test channel and the resistance of the second test channel. The application can apply more accurate voltage to the device to be tested, and improve the accuracy of the test result.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit testing technology, and in particular to a test voltage compensation method, apparatus and medium for use in a test machine. Background Technology

[0002] Integrated circuit testing is a crucial step in ensuring that integrated circuits meet the required performance and quality parameters. It is an indispensable component in the design, manufacturing, and application of integrated circuit products and has become one of the key technologies for ensuring the high reliability of integrated circuit products.

[0003] For the integrated circuit industry, with semiconductor manufacturing processes now below 7nm, improving testing accuracy is crucial. Currently, all testing equipment has internal resistance due to its structure. This internal resistance can cause voltage division during voltage testing, leading to insufficient voltage supply and inaccurate results. Some testing equipment lacks voltage drop compensation, while others use the same compensation voltage method. Both methods are not highly accurate, significantly impacting high-precision testing and affecting the final test results.

[0004] Therefore, it is necessary to provide a novel test voltage compensation method, device, and medium for use in testing equipment to solve the aforementioned problems existing in the prior art. Summary of the Invention

[0005] The purpose of this invention is to provide a test voltage compensation method, device, and medium for use in a test machine, which can apply a more precise voltage to the device under test and improve the accuracy of the test results.

[0006] To achieve the above objectives, the present invention provides a test voltage compensation method for a testing machine, wherein the testing machine includes multiple test channels, the test channels being controlled by a source test unit to generate test voltages, and the compensation method includes:

[0007] An initial test is performed on the target device under test based on the initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected within the target device under test;

[0008] A third test channel is determined, and the first test channel, the second test channel, and the third test channel are connected by short circuits in pairs to form corresponding channel groups. The resistance of each channel group is obtained and a set of resistance equations is set together to calculate the resistance of the first test channel and the resistance of the second test channel.

[0009] Based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel, the target voltage after initial test voltage compensation is calculated.

[0010] The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

[0011] The beneficial effect of the test voltage compensation method for testing equipment described in this invention is that by calculating the resistance of the first test channel and the second test channel in the target device under test, and calculating the compensated target voltage based on the total resistance of the corresponding test circuit and the resistance of the first test channel and the second test channel, the applied voltage signal can be compensated more accurately, the test accuracy is greatly improved, and the problem of the actual power supply voltage of the corresponding test circuit dropping will not occur.

[0012] Optionally, each of the test channels is controlled by an independent source test unit to generate the test voltage. The step of determining the third test channel involves forming corresponding channel groups by short-circuiting the first, second, and third test channels in pairs, obtaining the resistance of each channel group, and simultaneously solving a system of resistance equations to calculate the resistance of the first and second test channels.

[0013] Select a test channel in the test equipment other than the first test channel and the second test channel as the third test channel;

[0014] The first test channel, the second test channel, and the third test channel are short-circuited in pairs to form multiple channel groups, and the resistance of each channel group is obtained.

[0015] The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel are calculated by combining a set of resistance equations based on the resistance of each group of channels.

[0016] Optionally, the resistance of each group of channels is the average of multiple resistance measurements.

[0017] Optionally, several test channels are controlled by the same shared source test unit to generate the test voltage, and the first test channel and the second test channel are controlled by one or more shared source test units to generate the test voltage. The step of determining the third test channel, forming corresponding channel groups by short-circuiting the first test channel, the second test channel, and the third test channel in pairs, obtaining the resistance of each channel group, and solving a system of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel includes:

[0018] Identify all shared source test units that control the first test channel and the second test channel, and select any test channel controlled by the shared source test units other than the first test channel and the second test channel as the third test channel;

[0019] Calculate the resistance values ​​of the first test channel, the second test channel, and the third test channel when they share each of the shared source test units;

[0020] The average resistance of the first test channel, the second test channel, and the third test channel is calculated based on the sum of the resistance values ​​corresponding to each of the shared source test units and the number of the shared source test units. This average resistance is then used as the resistance of each test channel.

[0021] Optionally, calculating the resistance values ​​of the first test channel, the second test channel, and the third test channel when using each of the shared source test units includes:

[0022] The first test channel, the second test channel, and the third test channel corresponding to each of the shared source test units are short-circuited to form multiple channel groups, and the resistance of each channel group is obtained;

[0023] The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel corresponding to each of the shared test units are calculated by combining a set of resistance equations based on the resistance of each group of channels.

[0024] Optionally, the resistance of each group of channels is the average of multiple resistance measurements.

[0025] Optionally, calculating the target voltage after initial test voltage compensation based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel includes:

[0026] Obtain the resistance R of the target device under test. DUT R DUT =R-R1-R2, where R represents the total resistance of the corresponding test circuit of the target device under test, and R1 and R2 represent the resistance of the first test channel and the resistance of the second test channel, respectively;

[0027] Based on the resistance R of the target device under test DUT And the total resistance of the corresponding test circuit of the target device under test, and calculate the compensated target voltage.

[0028] Optionally, the calculation process of the target voltage V satisfies the following formula:

[0029]

[0030] Wherein, V0 represents the initial test voltage.

[0031] The present invention also provides a test voltage compensation device for a test equipment, the test equipment including multiple test channels, the test channels being controlled by a source test unit to generate test voltages, and the compensation device including:

[0032] The first test module is used to perform an initial test on the target device under test based on an initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected to the target device under test;

[0033] The second test module is used to obtain the third test channel, and to form a corresponding channel group by connecting the first test channel, the second test channel and the third test channel by short-circuiting each other in pairs. The module obtains the resistance of each channel group and sets up a system of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel.

[0034] An analysis module is used to determine the third test channel and, based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel, calculate the target voltage after initial test voltage compensation.

[0035] The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

[0036] The present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the above-described test voltage compensation method for a test machine. Attached Figure Description

[0037] Figure 1 This is a structural diagram of a fully independent channel testing machine.

[0038] Figure 2 This is a structural diagram of a shared channel testing machine.

[0039] Figure 3 This is a schematic diagram of the structure of a pin-type short-circuit test board;

[0040] Figure 4 This is a schematic diagram of the testing structure of the testing machine.

[0041] Figure 5 This is a flowchart of the test voltage compensation method for a test machine according to the present invention;

[0042] Figure 6 This is a schematic diagram illustrating the execution process of the test voltage compensation method for a test machine according to the present invention;

[0043] Figure 7 This is a structural block diagram of the test voltage compensation device used in a test machine according to the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art. The terms "comprising" and similar expressions used herein mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, but do not exclude other elements or objects.

[0045] Currently, two types of testing equipment are generally used when performing voltage testing on semiconductor devices. The first type of testing equipment is a fully independent channel testing equipment, the structure of which is referenced... Figure 1 The first type includes multiple source test units, each controlling an independent test channel without interference. The second type of test equipment is a shared-channel test equipment, the structure of which is referenced... Figure 2It includes at least two source test units, each of which is connected to multiple test channels via a switch, and the multiple test channels share one or more source test units. In actual testing on the test equipment, it is generally adopted... Figure 3 The pin-type short-circuit test board connects the various test channels with wires to ensure that the test channels are in a short-circuit state, thereby calculating the resistance of each test channel.

[0046] The test voltage is also compensated during the current testing process, for reference. Figure 4 Ignoring the pin card resistance and assuming that the resistance of all channels of the tester is the same, only the resistance value of all test channels is tested to calculate the average resistance, and then compensation is made based on the average resistance value of the channels.

[0047] The resistances R1, R2, R3...R of each test channel were obtained by testing with a pin-type short-circuit test board. n (By short-circuiting the two adjacent channels using a test board, the total resistance of those two adjacent channels is measured; the resistance values ​​of the two adjacent channels are each half of the total resistance.) The average channel resistance R is then calculated. mean = (R1+R2+R3+……+R n ) / n.

[0048] Calculations show that the voltage required after compensation is... (The applied voltage without compensation is V, R) DUT (For testing the resistance of the structure itself). However, this compensation method is not very accurate and cannot effectively meet practical needs.

[0049] To address the problems existing in the prior art, embodiments of the present invention provide a test voltage compensation method for a test equipment, wherein the test equipment includes multiple test channels, and the test channels are controlled by a source test unit to generate test voltages, referencing... Figure 5 The compensation method includes the following steps:

[0050] S501. Perform an initial test on the target device under test based on the initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected within the target device under test.

[0051] The total resistance of the corresponding test circuit of the target device under test includes the resistance R of the target device under test. DUT and the resistance of the corresponding test channel, wherein the corresponding test channel includes at least two.

[0052] S502. Determine the third test channel, and form a corresponding channel group by connecting the first test channel, the second test channel, and the third test channel in pairs by short-circuiting them. Obtain the resistance of each channel group and solve a set of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel.

[0053] In this embodiment, since there are generally two types of testing equipment, different calculation methods are used for different testing equipment to calculate the resistance of the first test channel and the second test channel.

[0054] S503. Based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel, calculate the target voltage after the initial test voltage compensation.

[0055] The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

[0056] Specifically, the channels used in testing are composed of wiring, pin clips, and the target device under test (DUT). Their structure... Figure 4 As shown, assuming channel1 and channel2 are the two test channels used in the test, the total resistance of the entire test circuit is R1 + R2 + R DUT Due to the presence of channel resistance, the voltage that should have been applied to the target device under test (DUT) will be reduced. For example, if the voltage that needs to be applied to the DUT is V0, without compensation, the actual voltage applied to the target device under test will be... When the structure being tested requires high precision, the voltage drop caused by the channel resistance can have a significant impact on the test results. Therefore, voltage compensation is required for the test structure in high-precision testing.

[0057] In this embodiment, an initial test is performed on the target device under test based on the initial test voltage to obtain the total resistance of the corresponding test circuit. The resistance of the first test channel and the resistance of the second test channel are calculated by selecting the third test channel. The target voltage after compensation of the initial test voltage is calculated based on the total resistance of the corresponding test circuit, the resistance of the first test channel, and the resistance of the second test channel, thereby improving the test accuracy and precision.

[0058] Specifically, there are currently two common types of testing equipment: fully independent channel testing equipment and shared channel testing equipment. (See reference...) Figure 6 The following sections will provide a detailed description of these two testing machines.

[0059] In some embodiments, each of the test channels is controlled by an independent source test unit to generate the test voltage. Determining the third test channel involves forming corresponding channel groups by short-circuiting the first, second, and third test channels in pairs, obtaining the resistance of each channel group, and solving a system of resistance equations to calculate the resistance of the first and second test channels, including:

[0060] Select a test channel in the test equipment other than the first test channel and the second test channel as the third test channel;

[0061] The first test channel, the second test channel, and the third test channel are short-circuited in pairs to form multiple channel groups, and the resistance of each channel group is obtained.

[0062] The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel are calculated by combining a set of resistance equations based on the resistance of each group of channels.

[0063] For example, the test equipment is a fully independent channel test equipment, where each test channel is controlled by an independent source test unit and generates a corresponding test voltage. By selecting a test channel other than the first and second test channels as the third test channel in the test equipment, and short-circuiting the first, second, and third test channels together after determining the third test channel, three channel groups can be obtained respectively. The resistance in each channel group is obtained in sequence, and the first test resistance, second test resistance, and third test resistance are calculated by solving a system of resistance equations based on the resistance of each channel group.

[0064] Specifically, taking a testing machine with 12 test channels as an example, namely C1, C2, C3...C12, after selecting channels C1 and C2 as the first and second test channels respectively, starting with channel C3, each channel is sequentially designated as the third test channel. This allows multiple test channels to be combined using a pin-type short-circuit test board. Taking C3 as an example, the first test channel C1, the second test channel C2, and the third test channel C3 are combined to obtain three channel groups: C1C2, C1C3, and C2C3. Then, based on the resistances of the three channel groups, a system of resistance equations is established to calculate the resistances of C1, C2, and C3. For example, the resistance of C1C2 is R1+R2, the resistance of C1C3 is R1+R3, and the resistance of C2C3 is R2+R3. Similarly, by using different channels as the third test channel, the resistance value of each test channel from C1 to C12 can be calculated.

[0065] Furthermore, the resistance of each channel group is the average of multiple resistance measurements to improve the accuracy of the resistance measurement results for each channel group, thereby resulting in higher accuracy of the first test resistance, second test resistance, and third test resistance calculated in the end.

[0066] In some other embodiments, several test channels are controlled by the same shared source test unit to generate the test voltage, and the first test channel and the second test channel are controlled by one or more shared source test units to generate the test voltage. The step of determining the third test channel, forming corresponding channel groups by short-circuiting the first test channel, the second test channel, and the third test channel in pairs, obtaining the resistance of each channel group, and solving a system of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel includes:

[0067] Identify all shared source test units that control the first test channel and the second test channel, and select any test channel controlled by the shared source test units other than the first test channel and the second test channel as the third test channel;

[0068] Calculate the resistance values ​​of the first test channel, the second test channel, and the third test channel when they share each of the shared source test units;

[0069] The average resistance of the first test channel, the second test channel, and the third test channel is calculated based on the sum of the resistance values ​​corresponding to each of the shared source test units and the number of the shared source test units. This average resistance is then used as the resistance of each test channel.

[0070] For example, the testing equipment is a shared-channel testing equipment, where several test channels are controlled by the same shared source testing unit to generate the test voltage, and the first and second test channels are controlled by one or more shared source testing units to generate the test voltage, thus determining the third test channel. Since there are multiple shared source testing units in the current testing equipment, after selecting the first and second test channels, all shared source testing units in the current testing equipment are determined, and any test channel controlled by the shared source testing unit other than the first and second test channels is selected as the third test channel. The resistance values ​​corresponding to the first, second, and third test channels under the control of each shared source testing unit are calculated to facilitate the subsequent calculation of the average resistance value of each test channel, and the average resistance value is used as the final resistance value.

[0071] Furthermore, calculating the resistance values ​​of the first test channel, the second test channel, and the third test channel when using each of the shared source test units includes:

[0072] The first test channel, the second test channel, and the third test channel corresponding to each of the shared source test units are short-circuited to form multiple channel groups, and the resistance of each channel group is obtained;

[0073] The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel corresponding to each of the shared test units are calculated by combining a set of resistance equations based on the resistance of each group of channels.

[0074] In this embodiment, after determining the third test channel in the test equipment, the first test channel, the second test channel, and the third test channel corresponding to the first shared source test unit are first short-circuited to form multiple channel groups, and the resistance of each channel group is obtained in sequence. Then, the resistance equations of the multiple channel groups are combined to calculate the resistance of the first test channel, the second test channel, and the third test channel controlled by the first shared source test unit.

[0075] Taking the first shared source test unit SM1 in the test equipment simultaneously controlling 12 test channels as an example, the 12 test channels are C1, C2, C3...C12. Taking channel C1 as the first test channel controlled by the first shared source test unit SM1, and channel C2 as the second test channel controlled by the first shared source test unit SM1, then C3 to C12 are sequentially selected as the third test channels controlled by the first shared source test unit SM1. Then, using a pin-type short-circuit test board, the first test channel C1, the second test channel C2, and the third test channel C3 are shorted in pairs to form three channel groups. The resistances of the three channel groups are then combined into a system of resistance equations to calculate the resistances of the first test channel C1, the second test channel C2, and the third test channel C3. Similarly, the remaining channels C4 to C12 are sequentially selected as the third test channels, and the resistance values ​​of channels C4 to C12 are calculated in the same way. Specifically, the resistance value of C1C2 = R... 1U1 +R 2U1 The resistance value of C1C3 = R 1U1 +R 3U1 The resistance value of C2C3 = R 2U1 +R 3U1 Based on these three equations, the resistance R of channels C1, C2, and C3 can be calculated when using the first shared source test unit SM1. 1U1 R 2U1 R3U1 .

[0076] Then, using the same method, the resistances of the first test channel, the second test channel, and the third test channel controlled by the remaining shared source test units are calculated in sequence to obtain the resistances of channels C1 to C12 under the control of the remaining shared source test units.

[0077] Then, the resistance values ​​of each test channel in all shared source test units are averaged. The final average value is the resistance value of each test channel. For example, if there are 4 test units, the final resistance value of the first test channel is = (R... 1U1 +R 1U2 +R 1U3 +R 1U4 ) / 4, where R 1U1 R represents the resistance value of the first test channel C1 under the first shared source test unit. 1U2 The resistance value of the first test channel C1 under the second shared source test unit, R 1U3 The resistance value of the first test channel C1 under the third shared source test unit, R 1U4 The resistance value of the first test channel C1 under the fourth shared source test unit.

[0078] In some embodiments, during the testing process of the shared channel tester described above, the resistance of each group of channels is the average value of multiple resistance measurements to ensure the accuracy of subsequent calculations of the resistance in each test channel.

[0079] In some embodiments, calculating the target voltage after initial test voltage compensation based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel includes:

[0080] Obtain the resistance R of the target device under test. DUT R DUT =R-R1-R2, where R represents the total resistance of the corresponding test circuit of the target device under test, and R1 and R2 represent the resistance of the first test channel and the resistance of the second test channel, respectively;

[0081] Based on the resistance R of the target device under test DUT And the total resistance of the corresponding test circuit of the target device under test, and calculate the compensated target voltage.

[0082] After calculating the resistance R1 of the first test channel, the resistance R2 of the second test channel, and the total resistance R of the corresponding test circuit of the target device under test, voltage compensation can be performed based on the initial test voltage to calculate the compensated target voltage.

[0083] Furthermore, the calculation process for the target voltage V satisfies the following formula:

[0084]

[0085] Wherein, V0 represents the initial test voltage.

[0086] The test voltage compensation method for testing equipment described in this invention calculates the resistance of the first test channel and the second test channel within the target device under test, and calculates the compensated target voltage based on the total resistance of the corresponding test circuit and the resistance of the first test channel and the second test channel. This method can more accurately compensate the applied voltage signal, significantly improve test accuracy, and avoid the problem of a drop in the actual power supply voltage of the corresponding test circuit.

[0087] This invention provides a test voltage compensation device for a testing machine, the testing machine including multiple test channels, each test channel generating a test voltage under the control of a source test unit, with reference to... Figure 7 The compensation device includes:

[0088] The first test module 701 is used to perform an initial test on the target device under test based on an initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected to the target device under test.

[0089] The second test module 702 is used to obtain the third test channel, and to form a corresponding channel group by connecting the first test channel, the second test channel and the third test channel by short-circuiting them in pairs, to obtain the resistance of each channel group and to solve a set of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel.

[0090] Analysis module 703 is used to determine the third test channel and calculate the target voltage after initial test voltage compensation based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel.

[0091] The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

[0092] It should be noted that the structure and principle of the test voltage compensation device used in the test machine correspond one-to-one with the steps of the test voltage compensation method used in the test machine, so they will not be repeated here.

[0093] It should be noted that the division of the various modules in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, these modules can be implemented entirely in software via processing element calls; they can be fully implemented in hardware; or some modules can be implemented by processing element calls to software, while others are implemented in hardware. For example, the selection module can be a separate processing element, or it can be integrated into a chip in the above system. Alternatively, it can be stored as program code in the memory of the above system, and its function can be called and executed by a processing element of the system. The implementation of other modules is similar. Moreover, these modules can be fully or partially integrated together, or they can be implemented independently. The processing element mentioned here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules can be completed through the integrated logic circuits in the hardware of the processor element or through software instructions.

[0094] For example, these modules can be one or more integrated circuits configured to implement the above methods, such as one or more Application Specific Integrated Circuits (ASICs), one or more Digital Signal Processors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs). As another example, when a module is implemented using processing element scheduler code, the processing element can be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. Furthermore, these modules can be integrated together as a System-On-a-Chip (SOC).

[0095] The present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the above-described test voltage compensation method for a test machine.

[0096] The storage medium of the present invention stores a computer program, which, when executed by a processor, implements the above-described method. The storage medium includes various media capable of storing program code, such as read-only memory (ROM), random access memory (RAM), magnetic disk, USB flash drive, memory card, or optical disk.

[0097] Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0098] In the embodiments of this application, the functional units can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0099] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as flash memory, portable hard disk, read-only memory, random access memory, magnetic disk, or optical disk.

[0100] While embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations fall within the scope and spirit of the invention as set forth in the claims. Furthermore, the invention described herein may have other embodiments and can be implemented or carried out in various ways.

Claims

1. A method for compensating test voltage in a testing machine, the testing machine comprising multiple test channels, wherein the test channels are controlled by a source test unit to generate test voltages, characterized in that, The compensation method includes: An initial test is performed on the target device under test based on the initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected to the target device under test; A third test channel is determined, and the first test channel, the second test channel, and the third test channel are connected by short circuits in pairs to form corresponding channel groups. The resistance of each channel group is obtained and a set of resistance equations is set together to calculate the resistance of the first test channel and the resistance of the second test channel. Based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel, the target voltage after initial test voltage compensation is calculated. The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

2. The test voltage compensation method for a testing machine according to claim 1, characterized in that, Each of the test channels is controlled by an independent source test unit to generate the test voltage. The process of determining the third test channel involves connecting the first, second, and third test channels in pairs via short circuits to form corresponding channel groups. The resistance of each channel group is obtained, and a set of resistance equations is established to calculate the resistance of the first and second test channels. This includes: Select a test channel in the test equipment other than the first test channel and the second test channel as the third test channel; The first test channel, the second test channel, and the third test channel are short-circuited in pairs to form multiple channel groups, and the resistance of each channel group is obtained. The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel are calculated by combining a set of resistance equations based on the resistance of each group of channels.

3. The test voltage compensation method for a testing machine according to claim 2, characterized in that, The resistance of each group of channels is the average value of multiple resistance measurements.

4. The test voltage compensation method for a testing machine according to claim 1, characterized in that, Several test channels are controlled by the same shared source test unit to generate the test voltage, and the first test channel and the second test channel are controlled by one or more shared source test units to generate the test voltage. The step of determining the third test channel involves forming corresponding channel groups by short-circuiting the first test channel, the second test channel, and the third test channel in pairs, obtaining the resistance of each channel group, and solving a system of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel, including: Identify all shared source test units that control the first test channel and the second test channel, and select any test channel controlled by the shared source test units other than the first test channel and the second test channel as the third test channel; Calculate the resistance values ​​of the first test channel, the second test channel, and the third test channel when they share each of the shared source test units; The average resistance of the first test channel, the second test channel, and the third test channel is calculated based on the sum of the resistance values ​​corresponding to each of the shared source test units and the number of the shared source test units. This average resistance is then used as the resistance of each test channel.

5. The test voltage compensation method for a testing machine according to claim 4, characterized in that, The calculation of the resistance values ​​of the first test channel, the second test channel, and the third test channel when using each of the shared source test units includes: The first test channel, the second test channel, and the third test channel corresponding to each of the shared source test units are short-circuited to form multiple channel groups, and the resistance of each channel group is obtained; The resistance of the first test channel, the resistance of the second test channel, and the resistance of the third test channel corresponding to each of the shared source test units are calculated by combining a set of resistance equations based on the resistance of each group of channels.

6. The test voltage compensation method for a testing machine according to claim 5, characterized in that, The resistance of each group of channels is the average value of multiple resistance measurements.

7. The test voltage compensation method for a testing machine according to claim 1, characterized in that, The calculation of the target voltage after initial test voltage compensation based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel includes: Obtain the resistance R of the target device under test. DUT R DUT =R-R1-R2, where R represents the total resistance of the corresponding test circuit of the target device under test, and R1 and R2 represent the resistance of the first test channel and the resistance of the second test channel, respectively; Based on the resistance R of the target device under test DUT And the total resistance of the corresponding test circuit of the target device under test, and calculate the compensated target voltage.

8. The test voltage compensation method for a testing machine according to claim 7, characterized in that, The calculation process for the target voltage V satisfies the following formula: Wherein, V0 represents the initial test voltage.

9. A test voltage compensation device for a testing machine, the testing machine comprising multiple test channels, wherein the test channels are controlled by a source test unit to generate test voltages, characterized in that... The compensation device includes: The first test module is used to perform an initial test on the target device under test based on an initial test voltage to obtain the total resistance of the corresponding test circuit of the target device under test, wherein the corresponding test circuit includes a first test channel and a second test channel electrically connected to the target device under test; The second test module is used to obtain the third test channel, and to form a corresponding channel group by connecting the first test channel, the second test channel and the third test channel by short-circuiting each other in pairs. The module obtains the resistance of each channel group and sets up a system of resistance equations to calculate the resistance of the first test channel and the resistance of the second test channel. An analysis module is used to determine the third test channel and, based on the total resistance of the corresponding test circuit of the target device under test, the resistance of the first test channel, and the resistance of the second test channel, calculate the target voltage after initial test voltage compensation. The first test channel, the second test channel, and the third test channel are all different test channels in the test equipment, and the total resistance includes the resistance of the target device under test and the resistance of the test channel in the corresponding test circuit.

10. A computer-readable storage medium storing a computer program thereon, characterized in that, When the computer program is executed by the processor, it implements the test voltage compensation method for a test machine as described in any one of claims 1 to 8.

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