A method and system for calculating short-circuit current of a medium and low voltage active power distribution network

Abstract

The application discloses a kind of medium-low voltage active distribution network short-circuit current calculation method and system, belong to electric power technical field, including the following steps: considering the controlled characteristics of IIDG during LVRT, establish IIDG short-circuit current steady-state model during fault;According to the boundary conditions of different types of faults and the controlled characteristics of IIDG, form the equivalent circuit of the active distribution network composite sequence component;According to the equivalent circuit, write system node voltage equation;Considering the relative position of fault point and IIDG and the influence of IIDG on PCC voltage during LVRT, solve node voltage equation.The method is closer to actual value compared with the fault current calculation method of equivalent multiple IIDG as one large-capacity IIDG.

Description

Technical Field

[0001] This invention belongs to the field of power technology, specifically relating to a method and system for calculating short-circuit current in medium and low voltage active distribution networks. Background Technology

[0002] Scholars and experts refer to distribution networks containing a large number of distributed power sources as active distribution networks. Among them, inverter-interfaced distribution generation (IIDG), which is directly connected to the grid via inverters, is the main form of distributed power source in active distribution networks. With the continuous increase in the penetration rate of IIDG, the fault current calculation method based on the traditional single-source radial structure of distribution networks is clearly no longer applicable to active distribution network scenarios.

[0003] Current national standards specify dynamic reactive power support capabilities for IIDGs directly connected to 220kV and above voltage levels during Low Voltage Ride Through (LVRT). However, no explicit requirements are made for IIDGs connected to medium and low voltage levels. With the increasing penetration rate of IIDGs in medium and low voltage distribution networks, directly disconnecting IIDGs from the grid during faults using traditional methods will significantly reduce the reliability of power supply in these networks. Therefore, requiring IIDGs connected to medium and low voltage distribution networks to provide dynamic reactive power support during LVRT is imperative.

[0004] Existing fault analysis methods for medium- and low-voltage active distribution networks generally aggregate multiple inverter-type distributed power sources, treating them as a single large-capacity distributed power source. This allows the active distribution network to be equated to a transmission network with power sources at both ends for fault characteristic analysis. Some studies have also considered the impact of the change in the fault current output phase of an IIDG (Inverter-Inverter Diverter) on the directional element discrimination in the system. Combining this with the fault current output characteristics of the IIDG during LVRT (Low Voltage Reduction), the differences in voltage and current phases at various nodes in the distribution network with a single IIDG have been calculated. Given that most existing IIDGs employ a PQ control strategy with LVRT capability, their output current during faults is related to the positive-sequence voltage at the point of common coupling (PCC). Furthermore, distribution network lines are relatively short, and the equivalent impedance of the load is much greater than the line impedance, resulting in significant differences in the voltage drop experienced at different points during a fault. Additionally, considering the off-grid behavior when a symmetrical fault occurs upstream of the IIDG, the influence of the relative position between the fault point and the IIDG on the fault current calculation should be taken into account.

[0005] In summary, when calculating the short-circuit current in the aforementioned scenario, it is necessary to comprehensively consider the fault type, fault location, and the controlled characteristics of the IIDG during LVRT. Summary of the Invention

[0006] A method for calculating short-circuit current in medium- and low-voltage active distribution networks, including

[0007] Collect data from the power distribution network;

[0008] The distribution network data is input into the system node voltage equations and the IIDG short-circuit current steady-state model during faults;

[0009] Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, the node voltage equation is solved using an iterative algorithm. The IIDG output current result of the (k-1)th iteration is used as the input of the kth iteration until the voltage difference between each node after the (k-1)th and kth iterations is less than a set threshold, and then the short-circuit fault current is output.

[0010] In the above-mentioned method for calculating short-circuit current in medium and low voltage active distribution networks, the distribution network data specifically includes at least one of the following: distribution network line impedance parameters, positive sequence voltage at the IIDG grid connection point, d-axis and q-axis current components of the IIDG inverter control inner loop, and fault current output by the IIDG, wherein the distribution network line impedance parameters include positive and negative sequence impedances or admittances.

[0011] In the above-mentioned method for calculating short-circuit current in medium- and low-voltage active distribution networks, the steady-state model of the IIDG short-circuit current during a fault is as follows:

[0012]

[0013] Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point, and i is the IIDG number. Let I be the fault current output by the i-th IIDG. di ,I qi Let be the d-axis and q-axis currents in the inverter control loop of the i-th IIDG, respectively. This is the positive sequence voltage at the grid connection point of the IIDG.

[0014] In the above-mentioned method for calculating short-circuit current in medium- and low-voltage active distribution networks, the system node voltage equations include:

[0015] Nodal equations under asymmetric faults:

[0016]

[0017] The additional formula is:

[0018]

[0019] In the formula, U1, U2, and U3 are the corresponding node voltages in the equivalent circuit, U B + UC + and U PCC + Y represents the positive sequence voltages at points B and C and the IIDG grid connection point, respectively. LD For the load equivalent admittance, Y BC Let Y be the equivalent admittance of line BC. In the subscript, x represents the proportion of the distance between the fault location and the beginning of the line to the total length of the line, and 1-x represents the proportion of the distance between the fault location and the end of the line to the total length of the line. - Y represents the negative-order equivalent admittance. S For the system-side equivalent admittance, E s For the system-side equivalent power supply, f represents the relationship between the fault current output by IIDG and the positive sequence voltage at the grid connection point under fault conditions, as shown in equation (4).

[0020] The voltage equations for a symmetrical fault at multiple nodes are as follows:

[0021]

[0022] In the formula Y 1.2.3…n U 1,2,3…n i IIDG.1,2,3…n These represent the equivalent admittance, node voltage, and photovoltaic output current for the corresponding numbered nodes, respectively. The subscript x indicates the proportion of the fault point's distance from the beginning of the line to the total length of the line.

[0023] In the above-mentioned method for calculating short-circuit current in medium- and low-voltage active distribution networks, the IIDG operates as a constant power source with a power factor of 1 when the system is not faulty: reactive power Q = 0, active power P = 1 (pu); at this time, the active current I d =1(pu), reactive current I q =0; During the fault, IIDG provides reactive power support to the grid for a certain period of time; At this time, the power outer loop is blocked, and the current inner loop is given by equation (5), as shown below:

[0024]

[0025] Among them, U PCC I is the grid connection point voltage. N I is the rated current output by the IIDG. q For IIDG reactive current;

[0026] The active current of IIDG is:

[0027]

[0028] In the formula I d For IIDG active current, P ref For IIDG to output rated power, I maxThis is the limit value for the output current.

[0029] In the above-mentioned method for calculating short-circuit current in medium and low voltage active distribution networks, the fault current output by IIDG in the (k-1)th calculation is obtained by equations (4) to (6).

[0030] A short-circuit current calculation system for medium- and low-voltage active distribution networks with multiple inverter power sources includes:

[0031] Data Acquisition Module: Acquires data from the power distribution network;

[0032] Data input module: Inputs the distribution network data into the system node voltage equations and the IIDG short-circuit current steady-state model during faults;

[0033] Fault data calculation module: Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, the node voltage equation is solved using an iterative algorithm. The IIDG output current result of the (k-1)th iteration is used as the input of the kth iteration until the voltage difference between each node after the (k-1)th and kth iterations is less than the set threshold, and the short-circuit fault current is output.

[0034] The aforementioned short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access includes: the distribution network data collected by the acquisition module specifically includes distribution network line impedance parameters, positive sequence voltage at the IIDG grid connection point, d- and q-axis current components of the IIDG inverter control inner loop, fault current output by the IIDG, and distribution network line impedance parameters including positive and negative sequence impedance or admittance.

[0035] In the aforementioned short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access, when the data input module inputs distribution network data into the IIDG short-circuit current steady-state model during a fault, the IIDG short-circuit current steady-state model during a fault is as follows:

[0036]

[0037] Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point, and i is the IIDG number. Let I be the fault current output by the i-th IIDG. di ,I qi Let be the d-axis and q-axis currents in the inverter control loop of the i-th IIDG, respectively. This is the positive sequence voltage at the grid connection point of the IIDG.

[0038] In the aforementioned short-circuit current calculation system for medium- and low-voltage active distribution networks with multiple inverter power sources, when the data input module inputs distribution network data into the system node voltage equations, the system node voltage equations are based on the following formula:

[0039] Nodal equations under asymmetric faults:

[0040]

[0041] The additional formula is:

[0042]

[0043] In the formula, U1, U2, and U3 are the corresponding node voltages in the equivalent circuit, U B + U C + and U PCC + Y represents the positive sequence voltages at points B and C and the IIDG grid connection point, respectively. LD For the load equivalent admittance, Y BC Let Y be the equivalent admittance of line BC. In the subscript, x represents the proportion of the distance between the fault location and the beginning of the line to the total length of the line, and 1-x represents the proportion of the distance between the fault location and the end of the line to the total length of the line. - Y represents the negative-order equivalent admittance. S For the system-side equivalent admittance, E s For the system-side equivalent power supply, f represents the relationship between the fault current output by IIDG and the positive sequence voltage at the grid connection point under fault conditions, as shown in equation (4).

[0044] The voltage equations for a symmetrical fault at multiple nodes are as follows:

[0045]

[0046] In the formula Y 1.2.3…n U 1,2,3…n i IIDG.1,2,3…n These represent the equivalent admittance, node voltage, and photovoltaic output current for the corresponding numbered nodes, respectively. The subscript x indicates the proportion of the fault point's distance from the beginning of the line to the total length of the line.

[0047] Therefore, this invention has the following advantages: Based on different types of fault boundary conditions, this invention comprehensively considers the fault type, the relative position of the fault point and the IIDG, and the controlled characteristics of the IIDG, forming an equivalent circuit of the composite sequence component of the active distribution network. By listing some system node voltage equations, it achieves topology reconfiguration of the active distribution network under fault conditions. Compared with the traditional method of calculating fault current by equating multiple IIDGs to a large-capacity IIDG, the results obtained by this method are closer to the actual values. Attached Figure Description

[0048] Figure 1 This is a structural diagram of a typical 10kV active distribution network model with two IIDG connections.

[0049] Figure 2(a) shows when Figure 1 Composite sequence component diagram of the system when an asymmetric fault occurs at point k1;

[0050] Figure 2(b) shows when Figure 1 Composite sequence component diagram of the system when a symmetrical fault occurs at point k1;

[0051] Figure 3 Is when Figure 1 Composite sequence component diagram of the system when a symmetrical fault occurs at point k2;

[0052] Figure 4 It is a composite sequence component diagram generated when symmetrical faults occur at different fault points during the access of multiple IIDGs; Detailed Implementation

[0053] The technical solution of the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0054] Building such Figure 1 The diagram shows a simulation model of a typical 10kV active distribution network structure with two IIDG connections. The IIDG capacities are 4MW and 6MW respectively. The distance between point k1 and the beginning of the line is 0.7 times the total line length, i.e., x = 0.7. The equivalent line impedance is Z1 = (0.1 + j0.2) Ω / km, and the load impedance is Z... LD =3.54+j2.21, line AB is 4km long, BC is 6km long, and the equivalent voltage on the system side is E. s =10.5kV, the system equivalent impedance is Z s =j1.0.

[0055] A method for calculating short-circuit current in medium- and low-voltage active distribution networks with multiple inverter power sources is presented, with the following specific steps:

[0056] Step 1: Based on different types of fault boundary conditions, form the equivalent circuit of the active distribution network composite sequence component;

[0057] The changes in the power grid structure caused by the relative location of the fault point and the IIDG are considered, including the determination of the fault boundary point by combining islanding detection signals. To prevent unplanned islanding operation of the IIDG, islanding protection is generally installed at its grid connection point. When a symmetrical fault occurs upstream of the IIDG, the IIDG loses system-side frequency support. At this time, the PCC islanding protection trips, causing the IIDG to disconnect from the grid, and the signal is used to reconstruct the distribution network structure after the fault.

[0058] Step 1, when an asymmetric fault occurs at point k1, the composite sequence component diagram of the system is shown in Figure 2(a); Step 1, when a symmetric fault occurs at point k1, the composite sequence component diagram of the system is shown in Figure 2(b).

[0059] Step 1, when a symmetrical fault occurs at point k2, the composite sequence component diagram of the system is as follows: Figure 3 As shown;

[0060] When an asymmetric fault occurs at k2, the analysis method is the same as when an asymmetric fault occurs at k1, so it will not be elaborated further.

[0061] Step 2: Based on the equivalent circuit, write the system node voltage equations;

[0062] When an asymmetrical fault occurs at point k1, the composite sequence component diagram of the system is shown in Figure 2. The node voltage equation is:

[0063] Step 2, Asymmetric Fault

[0064] Based on the fault boundary conditions, the nodal voltage equations are as follows:

[0065]

[0066] There is also an additional formula:

[0067]

[0068] In the formula, subscripts 1, 2, and 3 are the node numbers in the equivalent circuit, and subscripts A, B, and C are the corresponding line endpoint numbers in the equivalent circuit. LD For the load equivalent admittance, Y BC The equivalent admittance of line BC is given by the subscript 'x', where 'x' represents the proportion of the distance between the fault location and the beginning of the line to the total length of the line, and 'y' represents the equivalent admittance of line BC. - Y represents the negative-order equivalent admittance. S This is the equivalent admittance on the system side.

[0069] Step 2, Symmetrical Fault

[0070] When a symmetrical fault occurs upstream of an IIDG (Integrated Distribution Grid), the IIDG loses system-side frequency support and will enter islanded operation mode, which violates current power system operation safety regulations. Therefore, the IIDG should be taken out of operation at this time, and the system structure, with the fault point as the boundary, forms a new active distribution network and a passive network. The calculation of the fault current does not involve the passive network. When there is no IIDG upstream of the fault point, the distribution network structure transforms into a traditional single-source radial type. When the fault point includes an IIDG upstream, the handling method is similar to that for asymmetrical faults, and the system node voltage equations are written. Furthermore, whenever the fault point crosses a node with an IIDG, it is equivalent to introducing an additional node with a voltage-controlled current source in the equivalent composite sequence network diagram, such as... Figure 4 As shown. Therefore, the multi-node voltage equations can be derived as follows:

[0071]

[0072] In the formula, subscripts 1, 2, 3...n are node numbers, and subscript x represents the proportion of the distance from the fault point to the beginning of the line to the total length of the line.

[0073] Step 3: Considering the controlled characteristics of the IIDG during LVRT, establish a steady-state model of the IIDG short-circuit current during the fault period.

[0074] Based on current national standards, when the system is not fault-prone, the IIDG operates as a constant power source with a power factor of 1, i.e., reactive power Q = 0 and active power P = 1 (pu). At this time, the active current I0... d =1(pu), reactive current I q =0. During the fault, the IIDG is required to provide reactive power support to the grid for a certain period of time. At this time, the power outer loop is blocked, and the current inner loop is directly given by equation (1), as shown below:

[0075]

[0076] Among them, U PCC I is the grid connection point voltage. N I is the rated current output by the IIDG. q This refers to the reactive current of IIDG.

[0077] To protect the inverter equipment, the output current of an IIDG inverter is generally set to 1.2 times its rated current. However, the output current will differ depending on whether the IIDG inverter current reaches its limit. When the limit is not reached, both active and reactive currents should increase simultaneously; once the limit is reached, as the reactive current increases, the active current decreases until it reaches zero, and the power supply delivers full reactive power. Therefore:

[0078]

[0079] In the formula I d For IIDG active current, P ref For IIDG to output rated power, I max This is the limit value for the output current.

[0080] Furthermore, the calculations assume that the active and reactive currents during the fault period can quickly track the command values. When an asymmetrical fault occurs in the system, the negative-sequence second harmonic power of the IIDG only causes the third harmonic phase current, but has no effect on the positive-sequence fundamental frequency phase current. Therefore, in fault analysis, it can be further equivalent to a voltage-controlled current source model controlled by the positive-sequence voltage at the grid connection point. At this time, the expression for the fault current output by the IIDG during the fault period can be obtained as follows:

[0081]

[0082] Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point, and i is the IIDG number. Let be the fault current output by the i-th IIDG. This is the positive sequence voltage at the grid connection point at this time.

[0083] Step 4: Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, solve the node voltage equation.

[0084] The nodal voltage equations are solved using an iterative algorithm, with the IIDG output current result of the (k-1)th iteration used as the input for the kth iteration, until the voltage difference between each node after the (k-1)th and kth iterations is less than ε = 10. -6 The details are as follows:

[0085] Rearrange equations (1) and (3) into equations (7) and (8).

[0086]

[0087]

[0088] In the formula, the superscript k represents the result obtained in the k-th iteration. In the (k-1)-th calculation, the fault current output by IIDG can be obtained from equations (4) to (6).

[0089] Below are specific examples of using the above methods.

[0090] Accuracy verification of short-circuit current calculation method for medium and low voltage active distribution networks with multiple inverter power sources.

[0091] For example Figure 1 The diagram shows a simulation model of a typical 10kV active distribution network structure with two IIDG connections. The IIDG capacities are 4MW and 6MW respectively. The distance between point k1 and the beginning of the line is 0.7 times the total line length, i.e., x = 0.7. The equivalent line impedance is Z1 = (0.1 + j0.2) Ω / km, and the load impedance is Z... LD =3.54+j2.21, line AB is 4km long, BC is 6km long, and the equivalent voltage on the system side is E. s =10.5kV, the system equivalent impedance is Z s =j1.0.

[0092] Further, the system sequence component networks for different fault types in this scenario are shown in Figures 2 and 3.

[0093] The system simulation results and the fault current output of each IIDG calculated using the described method under symmetrical and asymmetrical fault conditions are shown in Tables 1 and 2:

[0094] Table 1. Comparison of output fault current and node voltage of each IIDG under k1 asymmetrical fault.

[0095]

[0096] Table 2. Comparison of output fault current and node voltage of each IIDG under k1 symmetrical fault.

[0097]

[0098] The above results verify the accuracy of the method. Considering the controlled characteristics of the IIDG during LVRT, a steady-state model of the IIDG short-circuit current during the fault period is established. Based on different types of fault boundary conditions and the controlled characteristics of the IIDG, the equivalent circuit of the active distribution network composite sequence component is formed. Based on the equivalent circuit, the system node voltage equations containing the IIDG are written. Considering the relative position of the fault point and the IIDG and the influence of the IIDG on the PCC voltage during LVRT, the node voltage equations are solved.

[0099] This embodiment also provides a short-circuit current calculation system for medium- and low-voltage active distribution networks with multiple inverter power sources, including:

[0100] Data Acquisition Module: This module collects data from the distribution network, specifically including distribution network line impedance parameters, the positive-sequence voltage at the IIDG grid connection point, the d- and q-axis current components of the IIDG inverter control inner loop, and the fault current output by the IIDG. The distribution network line impedance parameters include positive and negative sequence impedance or admittance.

[0101] Data input module: Inputs the collected data into the system node voltage equations and the IIDG short-circuit current steady-state model during faults;

[0102] When the data input module inputs distribution network data into the IIDG short-circuit current steady-state model during a fault, the IIDG short-circuit current steady-state model during the fault is as follows:

[0103]

[0104] Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point, and i is the IIDG number. Let I be the fault current output by the i-th IIDG. di ,I qi Let be the d-axis and q-axis currents in the inverter control loop of the i-th IIDG, respectively. This is the positive sequence voltage at the grid connection point of the IIDG.

[0105] When the data input module inputs distribution network data into the system node voltage equations, the system node voltage equations are based on the following formula:

[0106] Nodal equations under asymmetric faults:

[0107]

[0108] The additional formula is:

[0109]

[0110] In the formula, U1, U2, and U3 are the corresponding node voltages in the equivalent circuit, U B + U C + and U PCC + Y represents the positive sequence voltages at points B and C and the IIDG grid connection point, respectively. LD For the load equivalent admittance, Y BC Let Y be the equivalent admittance of line BC. In the subscript, x represents the proportion of the distance between the fault location and the beginning of the line to the total length of the line, and 1-x represents the proportion of the distance between the fault location and the end of the line to the total length of the line. - Y represents the negative-order equivalent admittance. S For the system-side equivalent admittance, E s For the system-side equivalent power supply, f represents the relationship between the fault current output by IIDG and the positive sequence voltage at the grid connection point under fault conditions, as shown in equation (4).

[0111] The voltage equations for a symmetrical fault at multiple nodes are as follows:

[0112]

[0113] In the formula Y 1.2.3…n U 1,2,3…n i IIDG.1,2,3…n These represent the equivalent admittance, node voltage, and photovoltaic output current for the corresponding numbered nodes, respectively. The subscript x indicates the proportion of the fault point's distance from the beginning of the line to the total length of the line.

[0114] Fault data calculation module: Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, the node voltage equation is solved using an iterative algorithm. The IIDG output current result of the (k-1)th iteration is used as the input of the kth iteration until the voltage difference between each node after the (k-1)th and kth iterations is less than the set threshold, and the short-circuit fault current is output.

[0115] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present invention can be implemented using various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0116] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0117] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0118] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0119] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0120] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for calculating short-circuit current in medium- and low-voltage active distribution networks, characterized in that, include An active power distribution network structure simulation model is constructed, and the composite sequence component equivalent circuit of the active power distribution network is formed according to different types of fault boundary conditions. Collect data from the power distribution network; The distribution network data is input into the system node voltage equations and the IIDG short-circuit current steady-state model during faults; Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, the node voltage equation is solved using an iterative algorithm. The IIDG output current result of the (k-1)th iteration is used as the input of the kth iteration until the voltage difference between each node after the (k-1)th and kth iterations is less than a set threshold, and the short-circuit fault current is output. The steady-state model of the IIDG short-circuit current during the fault period is as follows: (1) Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point. i IIDG number, For the first i The fault current output by each IIDG I di , I qi Let be the d-axis and q-axis currents in the inverter control loop of the i-th IIDG, respectively. The positive sequence voltage at the grid connection point of the IIDG; The system node voltage equations include: Nodal equations under asymmetric faults: (2) The additional formula is: (3) In the formula U 1 ,U 2 ,U 3 represents the corresponding node voltage in the equivalent circuit. U B + , U C + and U PCC + These are the positive sequence voltages at points B and C, and the IIDG grid connection point, respectively. Y LD For the load equivalent admittance, Y BC The equivalent admittance of line BC is given by the subscript. x This represents the ratio of the distance between the fault location and the beginning of the line to the total length of the line, while 1-x represents the ratio of the distance between the fault location and the end of the line to the total length of the line. Y - This represents the negative-order equivalent admittance. Y S For the system-side equivalent admittance, E s For the system-side equivalent power supply, f The relationship between the fault current output by the IIDG and the positive sequence voltage at the grid connection point under fault conditions is shown in equation (4). The voltage equations for a symmetrical fault at multiple nodes are as follows: (4) In the formula Y 1.2.3…n ，U 1,2,3…n ,i IIDG.1,2,3…n These represent the equivalent admittance, node voltage, and photovoltaic output current for the corresponding numbered nodes, respectively, with subscripts. x This indicates the proportion of the total length of the line from the point of failure to the beginning of the line.

2. The method for calculating short-circuit current in a medium- and low-voltage active distribution network according to claim 1, characterized in that, The distribution network data specifically includes at least one of the following: distribution network line impedance parameters, positive sequence voltage at the IIDG grid connection point, d-axis and q-axis current components of the IIDG inverter control inner loop, and fault current output by the IIDG, wherein the distribution network line impedance parameters include positive and negative sequence impedances or admittances.

3. The method for calculating short-circuit current in a medium- and low-voltage active distribution network according to claim 1, characterized in that, When the system is not fault-prone, the IIDG operates in a constant power source state with a power factor of 1: reactive power Q=0, active power P=1 (pu); at this time, the active current... I d =1(pu), reactive current I q =0; During the fault, IIDG provides reactive power support to the grid for a certain period of time; At this time, the outer power loop is blocked, and the inner current loop is given by equation (5), as shown below: (5) in, U PCC The voltage at the grid connection point. I N The rated current output by the IIDG. I q For IIDG reactive current; The active current of IIDG is: (6) In the formula I d For IIDG active current, P ref To output rated power for IIDG, I max This is the limit value for the output current.

4. The method for calculating short-circuit current in a medium- and low-voltage active distribution network according to claim 3, characterized in that, In the (k-1)th calculation, the fault current output by IIDG is obtained by equations (4) to (6).

5. A short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access, comprising using the short-circuit current calculation method for medium- and low-voltage active distribution networks as described in any one of claims 1 to 4, characterized in that, include: Acquisition module: Builds a simulation model of the active power distribution network structure, and forms the composite sequence component equivalent circuit of the active power distribution network according to different types of fault boundary conditions; acquires power distribution network data; Data input module: Inputs the distribution network data into the system node voltage equations and the IIDG short-circuit current steady-state model during faults; Fault data calculation module: Considering the relative position of the fault point and the IIDG, as well as the nonlinear relationship between the PCC voltage and the IIDG fault current output during LVRT, the node voltage equation is solved using an iterative algorithm. The IIDG output current result of the (k-1)th iteration is used as the input of the kth iteration until the voltage difference between each node after the (k-1)th and kth iterations is less than the set threshold, and the short-circuit fault current is output.

6. The short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access according to claim 5, characterized in that, include: The data collected by the acquisition module specifically includes the distribution network line impedance parameters, the positive sequence voltage at the IIDG grid connection point, the d-axis and q-axis current components of the IIDG inverter control inner loop, the fault current output by the IIDG, and the distribution network line impedance parameters, including positive and negative sequence impedances or admittances.

7. A short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access, as described in claim 5, is characterized in that... When the data input module inputs distribution network data into the IIDG short-circuit current steady-state model during a fault, the IIDG short-circuit current steady-state model during a fault is based on the following formula: (7) Where β is the angle between the IIDG output current and the positive sequence voltage at the grid connection point. i IIDG number, For the first i The fault current output by each IIDG I di , I qi Let be the d-axis and q-axis currents in the inverter control loop of the i-th IIDG, respectively. This is the positive sequence voltage at the grid connection point of the IIDG.

8. A short-circuit current calculation system for medium- and low-voltage active distribution networks with multi-inverter power supply access, as described in claim 5, is characterized in that... When the data input module inputs distribution network data into the system node voltage equations, the system node voltage equations are based on the following formula: Nodal equations under asymmetric faults: (8) The additional formula is: (9) In the formula U 1 ,U 2 ,U 3 represents the corresponding node voltage in the equivalent circuit. U B + , U C + and U PCC + These are the positive sequence voltages at points B and C, and the IIDG grid connection point, respectively. Y LD For the load equivalent admittance, Y BC The equivalent admittance of line BC is given by the subscript. x This represents the ratio of the distance between the fault location and the beginning of the line to the total length of the line, while 1-x represents the ratio of the distance between the fault location and the end of the line to the total length of the line. Y - This represents the negative-order equivalent admittance. Y S For the system-side equivalent admittance, E s For the system-side equivalent power supply, f The relationship between the fault current output by the IIDG and the positive sequence voltage at the grid connection point under fault conditions is shown in equation (4). The voltage equations for a symmetrical fault at multiple nodes are as follows: (10) In the formula Y 1.2.3…n ，U 1,2,3…n ,i IIDG.1,2,3…n These represent the equivalent admittance, node voltage, and photovoltaic output current for the corresponding numbered nodes, respectively, along with subscripts. x This indicates the proportion of the total length of the line from the point of failure to the beginning of the line.

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