Voltage control method and device, chip, display device and electronic device

Abstract

The present disclosure relates to a voltage control method and device, a chip, a display device and an electronic device. The method comprises: obtaining a first mapping relationship of a reference voltage of each display panel and a second mapping relationship of a pixel circuit in each display panel, wherein the first mapping relationship comprises a mapping relationship between a display brightness value and the reference voltage of each display panel, and the second mapping relationship comprises a mapping relationship between the display brightness value and a negative power voltage; and determining and generating a target reference voltage and a target negative power voltage of each display panel according to a target display brightness value and each first mapping relationship and second mapping relationship. The embodiment of the present disclosure can realize dynamic changes of the reference voltage and the negative power voltage according to the display brightness value, thereby reducing power consumption while ensuring display quality.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to a voltage control method and device, a chip, a display device, and an electronic device. BACKGROUND

[0002] Active-matrix organic light-emitting diode (AMOLED) has undergone years of technical accumulation, and currently covers multiple fields such as flat panels, mobile phones, and televisions. AMOLED has a broad market prospect due to its characteristics such as self-emission, wide viewing angle, bendability, and flexibility. However, the current AMOLED has the problem of high power consumption, and related technologies cannot save power consumption while meeting visual effect requirements. SUMMARY

[0003] Therefore, the present disclosure provides a voltage control method, which comprises:

[0004] obtaining a first mapping relationship of reference voltages of each display panel and a second mapping relationship of pixel circuits in each display panel, wherein the first mapping relationship comprises a mapping relationship between display brightness values and reference voltages of each display panel, and the second mapping relationship comprises a mapping relationship between display brightness values and negative power supply voltages;

[0005] determining and generating target reference voltages and target negative power supply voltages of each display panel according to target display brightness values and each first mapping relationship and second mapping relationship.

[0006] In a possible implementation, each first mapping relationship and the second mapping relationship is divided into a plurality of segmented mapping relationships according to a range of display brightness values, wherein each segmented mapping relationship in the same display brightness range has the same change trend.

[0007] In a possible implementation, each segmented mapping relationship is a line segment with a negative slope, and the slope of each segmented mapping relationship gradually decreases along the direction in which the display brightness value increases.

[0008] In a possible implementation, when the display brightness value is less than or equal to a first display brightness value, the segmented mapping relationship is V=[(V4-V3) / TH_1]*(TH_1-DBV)+V3.

[0009] In a possible implementation, when the display brightness value is greater than the first display brightness value and less than or equal to a second display brightness value, the segmented mapping relationship is V=[(V3-V2) / (TH_2-TH_1)]*(TH_2-DBV)+V2.

[0010] In a possible implementation, when the display brightness value is greater than the second display brightness value, the piecewise mapping relationship is: V = [(V2-V1) / (255-TH_2)]*(255-DBV)+V1.

[0011] wherein V represents a reference voltage or a negative power supply voltage, V4 represents the reference voltage or the negative power supply voltage when the display brightness value is 0, V3 represents the reference voltage or the negative power supply voltage when the display brightness value is a first display brightness value TH_1, DBV represents the display brightness value, V2 represents the reference voltage or the negative power supply voltage when the display brightness value is a second display brightness value TH_2, and V1 represents the reference voltage or the negative power supply voltage when the display brightness value is 255, wherein the second display brightness value TH_2 is greater than the first display brightness value TH_1.

[0012] In a possible implementation, the reference voltage includes a positive reference voltage, a first negative reference voltage, and a second negative reference voltage, the positive reference voltage corresponds to V4, V3, V2, and V1 that are all positive voltages and decrease in turn, the first negative reference voltage and the second negative reference voltage and the negative power supply voltage correspond to V4, V3, V2, and V1 that are all negative voltages and decrease in turn, and V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different.

[0013] In a possible implementation, the pixel circuit includes a first charging transistor, a second charging transistor, a third charging transistor, an energy storage capacitor, a first control transistor, a second control transistor, a third control transistor, and a reset transistor, wherein

[0014] a first end of the first charging transistor is connected to a data voltage line to receive a data signal, a control end of the first charging transistor is configured to receive a control signal, and a second end of the first charging transistor is connected to a first end of the first control transistor and a first end of the second charging transistor,

[0015] a control end of the second charging transistor is connected to a first end of the energy storage capacitor, a first end of the third charging transistor, and a first end of the reset transistor, and a second end of the second charging transistor is connected to a first end of the second control transistor and a second end of the third charging transistor,

[0016] control ends of the first control transistor and the second control transistor are configured to receive an emission signal, a second end of the second control transistor is connected to a first end of the third control transistor and a positive electrode end of a light emitting element, a second end of the third control transistor is configured to receive a reset voltage, and a control end of the third control transistor is configured to receive a control signal,

[0017] The second end of the reset transistor is configured to receive a reset voltage, and the control end of the reset transistor is configured to receive a reset signal,

[0018] The second end of the energy storage capacitor is connected to the second end of the first control transistor and a power voltage line, and is configured to receive a positive power voltage,

[0019] The negative end of the light emitting element is configured to receive the target negative power voltage, and the control signal, the emission signal, the reset signal, the data signal, the reset voltage, and the positive power voltage are obtained according to the target reference voltage.

[0020] In a possible implementation, the light emitting element includes at least one of liquid crystal, micro light emitting diode, light emitting diode, mini light emitting diode, quantum dot light emitting diode, organic light emitting diode, active matrix organic light emitting diode, cathode ray tube, digital light processing element, field emission element, plasma element, electrophoretic element, electrowetting element, and small pitch element.

[0021] According to another aspect of the present disclosure, a voltage control device is provided, which includes:

[0022] The acquisition module is configured to acquire a first mapping relationship of reference voltages of each display panel and a second mapping relationship of pixel circuits in each display panel, the first mapping relationship including a mapping relationship between display brightness values and reference voltages of each display panel, and the second mapping relationship including a mapping relationship between display brightness values and negative power voltages;

[0023] The voltage generation module is configured to determine and generate target reference voltages and target negative power voltages of each display panel according to target display brightness values and each first mapping relationship and second mapping relationship.

[0024] According to another aspect of the present disclosure, a chip is provided, which includes the voltage control device.

[0025] According to another aspect of the present disclosure, a display device is provided, which includes the voltage control device or the chip.

[0026] According to another aspect of the present disclosure, an electronic device is provided, which includes:

[0027] A processor;

[0028] A memory for storing processor-executable instructions;

[0029] The processor is configured to implement the voltage control method when executing the instructions stored in the memory.

[0030] According to another aspect of the present disclosure, there is provided a non-transitory computer readable storage medium having computer program instructions stored thereon, wherein the computer program instructions, when executed by a processor, implement the voltage control method described above.

[0031] According to another aspect of the present disclosure, there is provided a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when run in a processor of an electronic device, the processor in the electronic device performs the voltage control method described above.

[0032] The embodiments of the present disclosure can realize dynamic changes of the reference voltage and the negative power supply voltage according to the display brightness value, reduce power consumption, and ensure display quality by obtaining the first mapping relationship of the reference voltage of each display panel and the second mapping relationship of the pixel circuit in each display panel, determining and generating the target reference voltage and the target negative power supply voltage of each display panel according to the target display brightness value and each first mapping relationship and second mapping relationship.

[0033] Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0034] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present disclosure and serve to explain the principles of the present disclosure.

[0035] Figure 1 A flow chart of a voltage control method according to an embodiment of the present disclosure is shown.

[0036] Figure 2 A slope diagram of each segmented mapping relationship according to an embodiment of the present disclosure is shown, Figure 3 A diagram of each first mapping relationship and the second mapping relationship according to an embodiment of the present disclosure is shown.

[0037] Figure 4 A circuit structure diagram of a pixel circuit according to an embodiment of the present disclosure is shown.

[0038] Figure 5 A block diagram of a voltage control device according to an embodiment of the present disclosure is shown.

[0039] Figure 6 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0040] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically noted.

[0041] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, which are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present disclosure.

[0042] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "multiple" is two or more, unless otherwise explicitly specified and limited.

[0043] In the present disclosure, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0044] The term "and / or" herein is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of the plurality or any combination of at least two of the plurality, for example, including at least one of A, B and C, which means including any one or more elements selected from the set consisting of A, B and C.

[0045] Please refer to Figure 1 , Figure 1 A flowchart of a voltage control method according to an embodiment of the present disclosure is shown.

[0046] As Figure 1 shown, the method comprises:

[0047] In step S11, a first mapping relationship of the reference voltage of each display panel and a second mapping relationship of the pixel circuit in each display panel are acquired, the first mapping relationship includes a mapping relationship of a display brightness value (DBV) and the reference voltage of each display panel, and the second mapping relationship includes a mapping relationship of the display brightness value and an ELVSS.

[0048] In step S12, a target reference voltage and a target ELVSS of each display panel are determined and generated according to the target display brightness value and each first mapping relationship and second mapping relationship.

[0049] The embodiments of the present disclosure can realize dynamic changes of the reference voltage and the ELVSS according to the display brightness value, reduce power consumption, and ensure display quality by acquiring the first mapping relationship of the reference voltage of each display panel and the second mapping relationship of the pixel circuit in each display panel, and determining and generating the target reference voltage and the target ELVSS of each display panel according to the target display brightness value and each first mapping relationship and second mapping relationship.

[0050] The number of display panels is not limited in the embodiments of the present disclosure, and the embodiments of the present disclosure can be applied to one display panel or more than two display panels (for example, one main screen and more than one auxiliary screen), so as to realize adaptive adjustment of the reference voltage and the ELVSS of each display panel, reduce display power consumption, and ensure display quality.

[0051] In a possible implementation, the voltage control method of the embodiments of the present disclosure can be applied to a processing component, or an electronic device including the processing component, such as a terminal or a server.

[0052] For example, the processing component includes but is not limited to a single processor, or a discrete component, or a combination of the processor and the discrete component. The processor can include a controller having an execution instruction function in the electronic device, and the processor can be implemented in any appropriate manner, for example, by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements. Inside the processor, the executable instructions can be executed by hardware circuits such as logic gates, switches, application specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers.

[0053] In one example, a terminal, also known as a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc., is a device that provides voice and / or data connectivity to a user, such as a handheld device with a wireless connection, a car-mounted device, etc. Currently, some examples of terminals are: mobile phones, tablets, notebooks, palmtops, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self driving, wireless terminals in remote medical surgery, wireless terminals in smart grid, wireless terminals in transportation safety, wireless terminals in smart city, wireless terminals in smart home, wireless terminals in Internet of Vehicles, etc.

[0054] The specific forms of the first mapping relationship and the second mapping relationship are not limited in the embodiments of the present disclosure. The relationship between the voltage and the display brightness value in the first mapping relationship and the second mapping relationship can be linear and / or nonlinear. For example, the first mapping relationship and the second mapping relationship can be obtained in advance and stored in the storage module. Therefore, the embodiments of the present disclosure can quickly obtain the first mapping relationship and the second mapping relationship from the storage module to determine and generate the target reference voltage and the target negative power supply voltage. In one example, the storage module can include a computer readable storage medium, which can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium can be, for example but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium include a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a programmable read-only memory (PROM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a hole and protrusion structure, and any suitable combination of the foregoing. The computer readable storage medium used herein is not to be interpreted as a transitory signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (for example, an optical pulse through an optical fiber cable), or an electrical signal transmitted through a wire.

[0055] In one possible implementation, each first mapping relationship and the second mapping relationship can be divided into a plurality of segmented mapping relationships according to the range of the display brightness value. Each segmented mapping relationship in the same display brightness range has the same change trend. For example, in the same display brightness value range, the voltage value decreases with the increase of the display brightness value (i.e., the display brightness value and the voltage value have a negative correlation) in each segmented mapping relationship. The segmented mapping relationship can be linear or nonlinear, which is not limited in the embodiments of the present disclosure.

[0056] In one possible implementation, each segment mapping relationship can be a line segment with a negative slope, and the slope of each segment mapping relationship gradually decreases along the direction of increasing display brightness. With this setting, as the display brightness gradually increases, the voltage adjustment range will become smaller and smaller, thereby avoiding large jumps in the display panel and reducing power consumption. Of course, the embodiments of this disclosure do not limit the specific form of each segment mapping relationship. The slope of the line segment can also be positive or 0. Those skilled in the art can set it according to the actual situation and needs, and the magnitude of the slope can also be set according to the actual situation. For example, the slope of each segment mapping relationship can also become larger and larger along the direction of increasing display brightness.

[0057] Please see Figure 2 , Figure 3 , Figure 2 A schematic diagram of the slopes of various segmented mapping relationships according to embodiments of the present disclosure is shown. Figure 3 A schematic diagram of various first mapping relationships and second mapping relationships according to embodiments of the present disclosure is shown.

[0058] In one example, such as Figure 2 and Figure 3 As shown, the reference voltage may include a positive reference voltage (such as VREFP), a first negative reference voltage (such as VREFN1), and a second negative reference voltage (such as VREFN2). The first mapping relationship may include the mapping relationship between the positive reference voltage (such as VREFP) and the display brightness value, the mapping relationship between the first negative reference voltage (such as VREFN1) and the display brightness value, and the mapping relationship between the second negative reference voltage (such as VREFN2) and the display brightness value. The second mapping relationship may include the mapping relationship between the negative power supply voltage (ELVSS) and the display brightness value.

[0059] In one possible implementation, such as Figure 3 As shown, when the display brightness value is less than or equal to the first display brightness value (0~TH_1), the segmented mapping relationship is: V=[(V4–V3) / TH_1]*(TH_1–DBV)+V3;

[0060] In one possible implementation, when the display brightness value is greater than the first display brightness value and less than or equal to the second display brightness value (TH_1+1~TH_2), the segmented mapping relationship is: V=[(V3–V2) / (TH_2-TH_1)]*(TH_2–DBV)+V2;

[0061] In one possible implementation, when the display brightness value is greater than the second display brightness value (TH_2+1~255), the segmented mapping relationship is: V=[(V2–V1) / (255-TH_2)]*(255–DBV)+V1;

[0062] wherein V represents a reference voltage or a negative power supply voltage, V4 represents the reference voltage or the negative power supply voltage when the display brightness value is 0, V3 represents the reference voltage or the negative power supply voltage when the display brightness value is a first display brightness value TH_1, DBV represents the display brightness value, V2 represents the reference voltage or the negative power supply voltage when the display brightness value is a second display brightness value TH_2, V1 represents the reference voltage or the negative power supply voltage when the display brightness value is 255, wherein the second display brightness value TH_2 is greater than the first display brightness value TH_1.

[0063] In a possible implementation, the reference voltages include a positive reference voltage (such as VREFP), a first negative reference voltage (such as VREFN1), and a second negative reference voltage (such as VREFN2), the V4, V3, V2, and V1 corresponding to the positive reference voltage are all positive voltages and the voltage values decrease in turn, the V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all negative voltages and the voltage values decrease in turn, and the V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different.

[0064] The V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different can mean that the V4 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different, the V3 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different, the V2 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different, and the V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different, which will be exemplarily introduced below.

[0065] Exemplarily, as shown in FIGS. 1 and 2, in the same display brightness value range, the positive reference voltage VREFP, the first negative reference voltage VREFN1, the second negative reference voltage VREFN2, and the negative power supply voltage ELVSS all decrease with the increase of the display brightness value, that is, have a negative slope. Figure 2 Figure 3 Exemplarily, as shown in FIGS. 1 and 2, in the same display brightness value range, the positive reference voltage VREFP, the first negative reference voltage VREFN1, the second negative reference voltage VREFN2, and the negative power supply voltage ELVSS all decrease with the increase of the display brightness value, that is, have a negative slope.

[0066] Exemplarily, as shown in FIGS. 1 and 2, in the same display brightness value range, the positive reference voltage VREFP, the first negative reference voltage VREFN1, the second negative reference voltage VREFN2, and the negative power supply voltage ELVSS all decrease with the increase of the display brightness value, that is, have a negative slope. Figure 2 Figure 3 ​​As shown, with the increase of the display brightness value, the slope of the piecewise mapping relationship (line segment) corresponding to each display brightness value range gradually decreases, such as Ration_P1 < Ration_P2 < Ration_P3, Ration_N1_1 < Ration_N1_2 < Ration_N1_3, Ration_N2_1 < Ration_N2_2 < Ration_N2_3, Ration_N3_1 < Ration_N3_2 < Ration_N3_3, wherein Ration_P1, Ration_P2, Ration_P3, Ration_N1_1, Ration_N1_2, Ration_N1_3, Ration_N2_1, Ration_N2_2, Ration_N2_3, Ration_N3_1, Ration_N3_2, Ration_N3_3 are all negative numbers, Ration_P1 represents the slope of DBV in the range of 0~TH_1 in the first mapping relationship corresponding to the positive reference voltage VREFP, Ration_P2 represents the slope of DBV in the range of TH_1+1~TH_2 in the first mapping relationship corresponding to the positive reference voltage VREFP, Ration_P3 represents the slope of DBV in the range of TH_2+1~255 in the first mapping relationship corresponding to the positive reference voltage VREFP, Ration_N1_1 represents the slope of DBV in the range of 0~TH_1 in the first mapping relationship corresponding to the first negative reference voltage VREFN1, Ration_N1_2 represents the slope of DBV in the range of TH_1+1~TH_2 in the first mapping relationship corresponding to the first negative reference voltage VREFN1, Ration_N1_3 represents the slope of DBV in the range of TH_2+1~255 in the first mapping relationship corresponding to the first negative reference voltage VREFN1, Ration_N2_1 represents the slope of DBV in the range of 0~TH_1 in the first mapping relationship corresponding to the second negative reference voltage VREFN2, Ration_N2_2 represents the slope of DBV in the range of TH_1+1~TH_2 in the first mapping relationship corresponding to the second negative reference voltage VREFN2, Ration_N2_3 represents the slope of DBV in the range of TH_2+1~255 in the first mapping relationship corresponding to the second negative reference voltage VREFN2, Ration_ELVSS_1 represents the slope of DBV in the range of 0~TH_1 in the second mapping relationship corresponding to the negative power supply voltage ELVSS, Ration_ELVSS_2 represents the slope of DBV in the range of TH_1+1~TH_2 in the second mapping relationship corresponding to the negative power supply voltage ELVSS, and Ration_ELVSS_3 represents the slope of DBV in the range of TH_2+1~255 in the second mapping relationship corresponding to the negative power supply voltage ELVSS.

[0067] For example, such as Figure 3 As shown, the first mapping relationship corresponds to the positive reference voltage VREFP:

[0068] When DBV≤TH_1, VREFP=[(VREFP4–VREFP3) / TH_1]*(TH_1–DBV)+VREFP3;

[0069] When TH_1<DBV≤TH_2, VREFP=[(VREFP3-VREFP2) / (TH_2-TH_1)]*(TH_2-DBV)+VREFP2;

[0070] When DBV>TH_2, VREFP=[(VREFP2–VREFP1) / (255-TH_2)]*(255–DBV)+VREFP1.

[0071] For example, such as Figure 3 As shown, the first mapping relationship corresponds to the first negative reference voltage VREFN1:

[0072] When DBV≤TH_1, VREFN1=[(VREFN1_4–VREFN1_3) / TH_1]*(TH_1–DBV)+VREFN1_3

[0073] When TH_1<DBV≤TH_2, VREFN1=[(VREFN1_3–VREFN1_2) / (TH_2-TH_1)]*(TH_2–DBV)+VREFN1_2;

[0074] When DBV>TH_2, VREFN1=[(VREFN1_2–VREFN1_1) / (255-TH_2)]*(255–DBV)+VREFN1_1.

[0075] For example, such as Figure 3 As shown, the first mapping relationship corresponds to the second negative reference voltage VREFN2:

[0076] When DBV≤TH_1, VREFN2=[(VREFN2_4–VREFN2_3) / TH_1]*(TH_1–DBV)+VREFN2_3

[0077] When TH_1<DBV≤TH_2, VREFN2=[(VREFN2_3–VREFN2_2) / (TH_2-TH_1)]*(TH_2–DBV)+VREFN2_2;

[0078] When DBV > TH_2, VREFN2 = [(VREFN2_2 - VREFN2_1) / (255-TH_2)]*(255-DBV)+VREFN2_1.

[0079] For example, as shown in FIG. 2, for the second mapping relationship corresponding to the negative power supply voltage ELVSS: Figure 3

[0080] When DBV > TH_2, ELVSS = [(ELVSS2 - ELVSS1) / (255-TH_2)]*(255-DBV)+ELVSS1.

[0081] When TH_1 < DBV ≤ TH_2, ELVSS = [(ELVSS3 - ELVSS2) / (TH_2-TH_1)]*(TH_2-DBV)+ELVSS2.

[0082] When DBV > TH_2, ELVSS = [(ELVSS2 - ELVSS1) / (255-TH_2)]*(255-DBV)+ELVSS1.

[0083] Wherein, VREFP4, VREFN1_4, VREFN2_4, ELVSS4 correspond to V4 as aforementioned, VREFP3, VREFN1_3, VREFN2_3, ELVSS3 correspond to V3 as aforementioned, VREFP2, VREFN1_2, VREFN2_2, ELVSS2 correspond to V2 as aforementioned, VREFP1, VREFN1_1, VREFN2_1, ELVSS1 correspond to V1 as aforementioned.

[0084] The specific size of the first display luminance value TH_1 and the second display luminance value TH_2 is not limited in the embodiments of the present disclosure, and can be set according to actual conditions and needs by those skilled in the art, and the specific size of the slope of each segmented mapping relationship is not limited in the embodiments of the present disclosure, and can be set according to actual conditions and needs by those skilled in the art.

[0085] Of course, the number of segmented mapping relationships is not limited in the embodiments of the present disclosure, and more segments can be added by those skilled in the art, so as to achieve more fine adjustment.

[0086] Of course, the above takes each segmented mapping relationship as a line segment with a negative slope, and the slope of each segmented mapping relationship gradually decreases along the direction of increasing display luminance value as an example for exemplary introduction, in other embodiments, if each segmented mapping relationship is a line segment with a positive slope, and the slope of each segmented mapping relationship gradually decreases along the direction of increasing display luminance value, then Figure 3 ​The various parameters have different size relationships, and the embodiments of the present disclosure are not limited in this regard.

[0087] The embodiments of the present disclosure do not limit the specific implementation of the step S12 of determining and generating the target reference voltage and the target negative power supply voltage of each display panel according to the target display brightness value and the various first mapping relationships and second mapping relationships, and an example is that after the target reference voltage and the target negative power supply voltage of each display panel are determined according to the target display brightness value and the various first mapping relationships and second mapping relationships, the power supply chip can be controlled to generate the corresponding target reference voltage and target negative power supply voltage, and an example is that the power supply chip can include a DC / DC converter to realize the generation of the target reference voltage and the target negative power supply voltage.

[0088] The embodiments of the present disclosure do not limit the specific implementation of the pixel circuit, and a person skilled in the art can configure a suitable pixel circuit according to different types of display elements, and an example is that the light emitting element includes at least one of liquid crystal, micro light emitting diode, light emitting diode, mini light emitting diode, quantum dot light emitting diode, organic light emitting diode, active matrix organic light emitting diode, cathode ray tube, digital light processing element, field emission element, plasma element, electrophoretic element, electrowetting element and small pitch element, and the following is described by taking the light emitting element as an organic light emitting diode (OLED) or an active matrix organic light emitting diode (AMOLED) as an example.

[0089] Please refer to Figure 4 , Figure 4 The circuit structure schematic diagram of the pixel circuit according to the embodiments of the present disclosure is shown.

[0090] In a possible implementation, as Figure 4 shown, the pixel circuit of the embodiments of the present disclosure can include a first charging transistor T7, a second charging transistor T3, a third charging transistor T2, an energy storage capacitor C st , a first control transistor T5, a second control transistor T6, a third control transistor T4 and a reset transistor T1, wherein

[0091] The first end of the first charging transistor T7 is connected to a data voltage line to receive a data signal Data, the control end of the first charging transistor T7 is used to receive a control signal Gate, and the second end of the first charging transistor T7 is connected to the first end of the first control transistor T5 and the first end of the second charging transistor T3.

[0092] The control end of the second charging transistor T3 is connected to the first end of the energy storage capacitor Cst, the first end of the third charging transistor T2 and the first end of the reset transistor T1, the second end of the second charging transistor T3 is connected to the first end of the second control transistor T6 and the second end of the third charging transistor T2,

[0093] The control ends of the first control transistor T5 and the second control transistor T6 are used to receive an emission signal EM, the second end of the second control transistor T6 is connected to the first end of the third control transistor T4 and the light emitting element, the second end of the third control transistor T4 is used to receive a reset voltage Vint, and the control end of the third control transistor T4 is used to receive a control signal Gate,

[0094] The second end of the reset transistor T1 is used to receive a reset voltage Vint, and the control end of the reset transistor T1 is used to receive a reset signal Reset,

[0095] The second end of the energy storage capacitor Cst is connected to the second end of the first control transistor T5 and the power voltage line, and is used to receive a power voltage ELVDD,

[0096] Wherein, the negative end of the light emitting element is used to receive the target negative power voltage ELVSS, and the control signal Gate, the emission signal EM, the reset signal Reset, the data signal Data, the reset voltage Vint and the positive power voltage ELVDD are obtained according to the target reference voltage.

[0097] The target reference voltage and the target negative power voltage ELVSS of each display panel are determined and generated by the target display brightness value and each first mapping relationship and second mapping relationship, so that the reference voltage and the negative power voltage can be dynamically changed according to the display brightness value, thereby realizing adaptive configuration of the corresponding target negative power voltage ELVSS, the control signal Gate, the emission signal EM, the reset signal Reset, the data signal Data, the reset voltage Vint and the positive power voltage ELVDD according to the target display brightness value, so as to reduce power consumption while ensuring display quality.

[0098] For example, the EM signal acts on the first control transistor T5 and the second control transistor T6 to control the switching of the OLED light emitting element, wherein the EM signal low level is effective to turn on the light emitting element, and the high level is to turn off the light emitting element. The longer the second control transistor T6 is turned on, the longer the OLED display device is turned on in a frame time, and the integrated brightness also presents linear increase with time.

[0099] An exemplary, digital voltage signal Data is applied to the N1 point and the energy storage capacitor C st Charging, the size of the charge will control the carrier concentration flowing through the second charging transistor T3, after the charging is completed, the charge is maintained in the energy storage capacitor C st The first charging transistor T7 and the third charging transistor T2 are closed, and the first control transistor T5 and the second control transistor T6 are opened, so that the ELVDD and ELVSS voltages are applied to the two ends of the light emitting element, and a current is formed through the second charging transistor T3. The current size controls the brightness of the light emitting element.

[0100] Referring to Figure 5 , Figure 5 A block diagram of a voltage control device according to an embodiment of the present disclosure is shown.

[0101] As Figure 5 shown, the device includes:

[0102] The acquisition module 10 is configured to acquire a first mapping relationship of reference voltages of each display panel and a second mapping relationship of pixel circuits in each display panel, the first mapping relationship including a mapping relationship between display brightness values and reference voltages of each display panel, and the second mapping relationship including a mapping relationship between display brightness values and negative power supply voltages.

[0103] The voltage generation module 20 is configured to determine and generate target reference voltages and target negative power supply voltages of each display panel according to target display brightness values and each first mapping relationship and second mapping relationship.

[0104] The embodiments of the present disclosure can realize dynamic changes of the reference voltages and the negative power supply voltages according to the display brightness values, reduce power consumption, and ensure display quality, by acquiring a first mapping relationship of reference voltages of each display panel and a second mapping relationship of pixel circuits in each display panel, and determining and generating target reference voltages and target negative power supply voltages of each display panel according to target display brightness values and each first mapping relationship and second mapping relationship.

[0105] In a possible implementation, each first mapping relationship and the second mapping relationship is divided into a plurality of segmented mapping relationships according to a range of display brightness values, and each segmented mapping relationship in the same display brightness range has the same variation trend.

[0106] In a possible implementation, each segmented mapping relationship is a line segment with a negative slope, and the slope of each segmented mapping relationship gradually decreases along the direction in which the display brightness value increases.

[0107] In a possible implementation, when the display brightness value is less than or equal to the first display brightness value, the segmented mapping relationship is: V = [(V4-V3) / TH_1]*(TH_1-DBV)+V3.

[0108] In a possible implementation, when the display brightness value is greater than the first display brightness value and less than or equal to the second display brightness value, the segmented mapping relationship is: V = [(V3-V2) / (TH_2-TH_1)]*(TH_2-DBV)+V2.

[0109] In a possible implementation, when the display brightness value is greater than the second display brightness value, the segmented mapping relationship is: V = [(V2-V1) / (255-TH_2)]*(255-DBV)+V1.

[0110] wherein V represents a reference voltage or a negative power supply voltage, V4 represents the reference voltage or the negative power supply voltage when the display brightness value is 0, V3 represents the reference voltage or the negative power supply voltage when the display brightness value is the first display brightness value TH_1, DBV represents the display brightness value, V2 represents the reference voltage or the negative power supply voltage when the display brightness value is the second display brightness value TH_2, and V1 represents the reference voltage or the negative power supply voltage when the display brightness value is 255, wherein the second display brightness value TH_2 is greater than the first display brightness value TH_1.

[0111] In a possible implementation, the reference voltage includes a positive reference voltage (such as VREFP), a first negative reference voltage (such as VREFN1), and a second negative reference voltage (such as VREFN2), the V4, V3, V2, and V1 corresponding to the positive reference voltage are all positive voltages and the voltage values decrease in turn, the V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all negative voltages and the voltage values decrease in turn, and the V4, V3, V2, and V1 corresponding to the first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different.

[0112] In a possible implementation, the pixel circuit includes a first charging transistor, a second charging transistor, a third charging transistor, an energy storage capacitor, a first control transistor, a second control transistor, a third control transistor, and a reset transistor, wherein,

[0113] a first end of the first charging transistor is connected to a data voltage line to receive a data signal, a control end of the first charging transistor is configured to receive a control signal, and a second end of the first charging transistor is connected to a first end of the first control transistor and a first end of the second charging transistor,

[0114] a control end of the second charging transistor is connected to a first end of the energy storage capacitor, a first end of the third charging transistor and a first end of the reset transistor, a second end of the second charging transistor is connected to a first end of the second control transistor and a second end of the third charging transistor,

[0115] a control end of the first control transistor and the second control transistor is configured to receive a transmission signal, a second end of the second control transistor is connected to a first end of the third control transistor and a positive end of the light emitting element, a second end of the third control transistor is configured to receive a reset voltage, and a control end of the third control transistor is configured to receive a control signal,

[0116] a second end of the reset transistor is configured to receive the reset voltage, and a control end of the reset transistor is configured to receive a reset signal,

[0117] a second end of the energy storage capacitor is connected to a second end of the first control transistor and a power voltage line, and is configured to receive a positive power voltage,

[0118] wherein the negative end of the light emitting element is configured to receive the target negative power voltage, and the control signal, the transmission signal, the reset signal, the data signal, the reset voltage and the positive power voltage are obtained according to the target reference voltage.

[0119] In a possible implementation, the light emitting element comprises at least one of liquid crystal, micro light emitting diode, light emitting diode, mini light emitting diode, quantum dot light emitting diode, organic light emitting diode, active matrix organic light emitting diode, cathode ray tube, digital light processing element, field emission element, plasma element, electrophoretic element, electrowetting element and small pitch element.

[0120] According to another aspect of the present disclosure, a chip is provided, comprising the voltage control device.

[0121] According to another aspect of the present disclosure, a display device is provided, comprising the voltage control device or the chip.

[0122] According to another aspect of the present disclosure, an electronic device is provided, comprising:

[0123] a processor;

[0124] a memory for storing processor-executable instructions;

[0125] wherein the processor is configured to implement the voltage control method when executing the instructions stored in the memory.

[0126] According to another aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the voltage control method described above.

[0127] According to another aspect of the present disclosure, there is provided a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when run in a processor of an electronic device, the processor in the electronic device implements the voltage control method described above.

[0128] Exemplarily, the electronic device in the embodiment can include, but is not limited to, a desktop computer, a television, a mobile device with a large size screen such as a mobile phone, a tablet computer, and other common electronic devices that need multiple chips to be connected in cascade to realize driving.

[0129] Exemplarily, the electronic device can also be a user equipment (UE), a mobile device, a user terminal, a terminal, a handheld device, a computing device, or a vehicle-mounted device, etc. Exemplarily, some terminals include, but are not limited to, a display, a smart phone or a portable device, a mobile phone, a tablet computer, a notebook computer, a palm computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, a wireless terminal in Internet of Vehicles, etc. For example, the server can be a local server or a cloud server.

[0130] Figure 6 A block diagram of an electronic device according to an embodiment of the present disclosure is shown.

[0131] For example, the electronic device 1900 can be provided as a server or a terminal device. Referring to FIG. 19, the electronic device 1900 includes one or more processors 1910, memory 1920 and a bus 1930. Figure 6The electronic device 1900 includes a processing component 1922, which is further composed of one or more processors, and memory resources represented by a memory 1932 for storing instructions, such as application programs, executable by the processing component 1922. The application programs stored in the memory 1932 can include one or more than one module each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the above method.

[0132] The electronic device 1900 can further include a power component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 can operate based on an operating system stored in the memory 1932, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or the like.

[0133] In exemplary embodiments, a non-transitory computer readable storage medium, such as the memory 1932 including computer program instructions executable by the processing component 1922 of the electronic device 1900 to perform the above method is also provided.

[0134] The above description is only exemplary embodiments of the present application, and is not intended to limit the scope of protection of the present application, which is determined by the appended claims.

[0135] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0136] It should be noted that, in this document, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element preceded by "comprises... a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the recited element.

[0137] The computer program product of the second aspect can include a computer readable storage medium. The computer readable storage medium can include instructions. The instructions can include one or both of: instructions for causing a computer to enable a user equipment device to receive a configuration message from a base station, the configuration message comprising an indication of a set of one or more parameters for a first type of hybrid automatic repeat request process, the first type of hybrid automatic repeat request process being associated with a first type of data; and instructions for causing a computer to enable a user equipment device to receive a configuration message from a base station, the configuration message comprising an indication of a set of one or more parameters for a first type of hybrid automatic repeat request process, the first type of hybrid automatic repeat request process being associated with a first type of data.

[0138] Embodiments of the present disclosure have been described above, with the understanding that these embodiments are exemplary only, and are not restrictive, and are not limited to the disclosed embodiments. Many modifications and changes to this disclosure would be apparent to those of ordinary skill in the art. The scope of the technology disclosed is not to be limited by the specific illustrative embodiments presented above, but only by the claims that follow. The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting.

Claims

1. A voltage control method, characterized in that, The method includes: Obtain a first mapping relationship of the reference voltage of each display panel and a second mapping relationship of the pixel circuit in each display panel. The first mapping relationship includes the mapping relationship between the display brightness value of each display panel and the reference voltage, and the second mapping relationship includes the mapping relationship between the display brightness value and the negative power supply voltage. Based on the target display brightness value and the various first and second mapping relationships, the target reference voltage and target negative power supply voltage of each display panel are determined and generated. Each of the first mapping relationships and the second mapping relationships is divided into multiple segmented mapping relationships according to the range of display brightness values. Among them, the segmented mapping relationships within the same display brightness range have the same trend of change. Each segment mapping relationship is a line segment with a negative slope, and the slope of each segment mapping relationship gradually decreases along the direction of increasing display brightness value.

2. The method according to claim 1, characterized in that, When the display brightness value is less than or equal to the first display brightness value, the segmented mapping relationship is: V=[(V4–V3) / TH_1]*(TH_1–DBV)+V3; When the display brightness value is greater than the first display brightness value and less than or equal to the second display brightness value, the segmented mapping relationship is: V=[(V3–V2) / (TH_2-TH_1)]*(TH_2–DBV)+V2; When the display brightness value is greater than the second display brightness value, the segmented mapping relationship is: V=[(V2–V1) / (255-TH_2)]*(255–DBV)+V1; Wherein, V represents the reference voltage or negative power supply voltage, V4 represents the reference voltage or negative power supply voltage when the display brightness value is 0, V3 represents the reference voltage or negative power supply voltage when the display brightness value is the first display brightness value TH_1, DBV represents the display brightness value, V2 represents the reference voltage or negative power supply voltage when the display brightness value is the second display brightness value TH_2, and V1 represents the reference voltage or negative power supply voltage when the display brightness value is 255, wherein the second display brightness value TH_2 is greater than the first display brightness value TH_1.

3. The method according to claim 2, characterized in that, The reference voltage includes a positive reference voltage, a first negative reference voltage, and a second negative reference voltage. The positive reference voltages V4, V3, V2, and V1 are all positive voltages and their values ​​decrease sequentially. The first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all negative voltages and their values ​​decrease sequentially. The first negative reference voltage, the second negative reference voltage, and the negative power supply voltage are all different.

4. The method according to claim 1, characterized in that, The pixel circuit includes a first charging transistor, a second charging transistor, a third charging transistor, an energy storage capacitor, a first control transistor, a second control transistor, a third control transistor, and a reset transistor, wherein... The first terminal of the first charging transistor is connected to the data voltage line to receive data signals. The control terminal of the first charging transistor is used to receive control signals. The second terminal of the first charging transistor is connected to the first terminal of the first control transistor and the first terminal of the second charging transistor. The control terminal of the second charging transistor is connected to the first terminal of the energy storage capacitor, the first terminal of the third charging transistor, and the first terminal of the reset transistor. The second terminal of the second charging transistor is connected to the first terminal of the second control transistor and the second terminal of the third charging transistor. The control terminals of the first and second control transistors are used to receive transmission signals. The second terminal of the second control transistor is connected to the first terminal of the third control transistor and the positive terminal of the light-emitting element. The second terminal of the third control transistor is used to receive a reset voltage, and the control terminal of the third control transistor is used to receive control signals. The second terminal of the reset transistor is used to receive a reset voltage, and the control terminal of the reset transistor is used to receive a reset signal. The second terminal of the energy storage capacitor is connected to the second terminal of the first control transistor and the power supply voltage line, and is used to receive the positive power supply voltage. The negative terminal of the light-emitting element is used to receive the target negative power supply voltage, and the control signal, the transmission signal, the reset signal, the data signal, the reset voltage, and the positive power supply voltage are obtained according to the target reference voltage.

5. The method according to claim 4, characterized in that, The light-emitting element includes at least one of liquid crystal, micro light-emitting diode, light-emitting diode, mini light-emitting diode, quantum dot light-emitting diode, organic light-emitting diode, active matrix organic light-emitting diode, cathode ray tube, digital light processing element, field emission element, plasma element, electrophoretic element, electrowetting element, and small-pitch element.

6. A voltage control device, characterized in that, The device includes: The acquisition module is used to acquire a first mapping relationship of the reference voltage of each display panel and a second mapping relationship of the pixel circuit in each display panel. The first mapping relationship includes the mapping relationship between the display brightness value of each display panel and the reference voltage, and the second mapping relationship includes the mapping relationship between the display brightness value and the negative power supply voltage. The voltage generation module is used to determine and generate the target reference voltage and target negative power supply voltage for each display panel based on the target display brightness value and various first and second mapping relationships. Each of the first mapping relationships and the second mapping relationships is divided into multiple segmented mapping relationships according to the range of display brightness values. Among them, the segmented mapping relationships within the same display brightness range have the same trend of change. Each segment mapping relationship is a line segment with a negative slope, and the slope of each segment mapping relationship gradually decreases along the direction of increasing display brightness value.

7. A chip, characterized in that, Includes the voltage control device according to claim 6.

8. A display device, characterized in that, Includes the voltage control device according to claim 6 or the chip according to claim 7.

9. An electronic device, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor is configured to implement the voltage control method according to any one of claims 1 to 5 when executing instructions stored in the memory.

10. A non-volatile computer-readable storage medium storing computer program instructions thereon, characterized in that, When the computer program instructions are executed by the processor, they implement the voltage control method according to any one of claims 1 to 5.

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