Determine the desired hash value in a function with control flow

Abstract

This document describes techniques and apparatus for determining an expected hash value in a function with control flow. A computing device (200) receives a function that includes function instructions (106) in at least three basic blocks (108) connected via a plurality of execution paths (302, 304). Hash input instructions (130) are inserted into a plurality of the basic blocks, and the basic blocks indirectly enforce a hash value at the corresponding insertion points. Hash values (408) at the ends of the plurality of basic blocks are set to a canonical value (134), and an expected hash value (128) and a hash input value (132) are calculated using a hash function (118). By using the canonical value (134) and the hash input value (132), the expected hash value (128) is the same regardless of which execution path is executed.

Description

Background Art

[0001] Modern computing devices process a large number of instructions (e.g., from an operating system, an application, or a component). Many of these instructions contain sensitive information or provide access to sensitive information. Thus, security is an increasingly important factor, not only in software but also in the processing system.

[0002] One aspect of processing system security is to ensure that every instruction that should be executed is executed. For example, a malicious attacker (e.g., a person, a machine, or software) may be able to cause an execution failure that skips an instruction or causes the instruction to execute differently than expected (e.g., not jump to the instruction or block of instructions defined by the skipped instruction). By not executing instructions as expected, security vulnerabilities may be exposed (e.g., an authentication process that may not be executed).

[0003] Hash values can be used to ensure that an instruction or a block of instructions is executed. For example, a processor can hash one or more execution instructions and compare the resulting hash value with an expected hash value. A match between the resulting hash value and the expected hash value may lead to a determination that no failure (adversarial or otherwise) has occurred (e.g., the instruction has executed as expected). However, a mismatch between the resulting hash value and the expected hash value may indicate a failure.

[0004] A problem arises when a function (e.g., multiple instructions) contains multiple execution paths. It is straightforward to protect a function by initializing and verifying hash values (e.g., via reset hash and verify hash instructions) in each basic block that is executed. Doing so is not only computationally expensive but may also fail to protect branch instructions (e.g., if / else instructions). Thus, this approach may not protect all lines of code in a function that has multiple execution paths with a single expected hash value. Summary of the Invention

[0005] Techniques and apparatus are described that enable determination of an expected hash value in a function with control flow. These techniques and apparatus enable a single verify hash instruction to be used to protect all instructions in a function that has multiple execution paths (e.g., control flow). In this way, leaving instructions unprotected can be mitigated to enhance security. Additionally, by reducing some hash operations, processing overhead can be reduced.

[0006] Aspects described below include methods performed by a computing device. The method receives a function having a plurality of basic blocks, the basic blocks including corresponding portions of function instructions and at least two execution paths between a first basic block and a second basic block. The method establishes a hash function for calculating a hash value in a corresponding execution instruction state of the function instructions, and inserts a reset hash instruction in the first basic block. Then, the method selects a target execution instruction state in the second basic block and inserts a verification hash instruction in the target execution instruction state. The method further inserts corresponding hash input instructions in each of the plurality of basic blocks other than the second basic block. The hash input instructions set corresponding hash input values to the hash function for calculating the hash value of the hash input instructions in the execution instruction state. Then, the method determines an expected hash value in the target execution instruction state and a hash input value of the hash input instructions based on an initial hash value, a canonical value, and the hash function. Then, the method compiles the function using the function instructions, the reset hash instruction, the hash input instructions having corresponding hash input values, and the verification hash instruction having the expected hash value in the target execution instruction state.

[0007] Aspects described below also include methods performed by a computing device. The method executes function instructions to reach a target execution instruction state. The function instructions are composed of a plurality of basic blocks of function instructions and have at least two execution paths between a first basic block and a second basic block. The method also executes hash instructions to reach a hash value in the target execution instruction state. The hash instructions include corresponding hash input instructions in a plurality of basic blocks other than the second basic block. Then, the method compares the hash value in the target execution instruction state with the expected hash value in the target execution instruction state. The expected hash value in the target execution instruction state is independent of which execution paths are executed. Then, the method executes a security function in response to a mismatch between the hash value in the target execution instruction state and the expected hash value in the execution instruction state. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Apparatuses and techniques for determining expected hash values in functions with control flow are described with reference to the following figures. The same reference numerals are used throughout the figures to refer to the same features and components:

[0009] Figure 1 Illustrates an example processing flow for determining an expected hash value in a function with control flow;

[0010] Figure 2 Illustrates an example electronic device in which an expected hash value in a function with control flow can be implemented;

[0011] Figure 3 Illustrates an example function having basic blocks of function instructions;

[0012] Figure 4 illustrates an example implementation of a technique for an example function described herein applied to Figure 3 ;

[0013] Figure 5 illustrates an example processing flow for using an expected hash value in a function with a control flow;

[0014] Figure 6 illustrates an example electronic device in which the use of an expected hash value in a function with a control flow can be implemented;

[0015] Figure 7 illustrates a part of an example method for determining an expected hash value in a function with a control flow;

[0016] Figure 8 illustrates Figure 7 another part of an example method for determining an expected hash value in a function with a control flow; and

[0017] Figure 9 illustrates an example method for using an expected hash value in a function with a control flow. DETAILED DESCRIPTION

[0018] OVERVIEW

[0019] Comparing the hash value of the execution instructions of a function with an expected hash value can be a useful tool for determining that the instructions have been executed. However, if the function includes multiple execution paths (e.g., multiple basic blocks with at least one branch instruction), then a simple approach initializes and verifies the hash values in each basic block (e.g., they do not hash the function as a whole). This results in three problems: 1) high computational overhead due to additional hash instructions and hash comparisons, 2) the function cannot be verified as a whole, and 3) branch instructions are not protected. This can lead to poor system performance and security vulnerabilities.

[0020] This document describes techniques and apparatus capable of determining an expected hash value in a function with control flow. A compiler receives a function that includes function instructions in at least three basic blocks. At least one of the basic blocks has a branch instruction such that the function has multiple execution paths. A reset hash instruction is inserted into a first basic block (e.g., an initial basic block) that sets an initial hash value for the hash, and a check hash instruction is inserted into a second basic block (e.g., a last basic block) that checks the hash against an expected hash for execution. Hash input instructions are also inserted into each basic block except the second basic block. The hash input instructions indirectly enforce a hash value at the respective insertion points. The function instructions are assigned hash inputs (e.g., instruction encodings), and an expected hash value at the end of each basic block except the second basic block is set to a canonical value. Using the hash function, instruction encodings, and set hash values, the hash value of each instruction (including the hash input instructions) is determined. From here, the expected hash value of the check hash instruction and the hash input values can be calculated using the hash function. The function is then compiled to include the function instructions, the hash function, the hash inputs of the function instructions, the reset hash instruction, the check hash instruction (including the expected hash value), and the hash input instructions (including the hash input values). By doing so, the expected hash value of the check hash instruction in the execution instruction state is the same regardless of which execution path is executed.

[0021] Example compiler processing flow

[0022] Figure 1 Illustrates an example processing flow 100 for determining an expected hash value in a function with control flow. The processing flow 100 is typically implemented in an electronic device (not shown) discussed below with respect to Figure 2 As shown, the process flow 100 includes a compiler 102 that generates a compiled function 104 from function instructions 106 of a function. The function instructions 106 include basic blocks of the function instructions, e.g., basic block 108. Each of the basic blocks 108 contains a set of instructions (e.g., a straight-line code sequence) that has no branches except at the entry and exit of the set. The function has at least three basic blocks 108: a first basic block 110, a second basic block 112, and one or more intermediate basic blocks 114. The first basic block 110 can be an initial basic block, and the second basic block 112 can be the last basic block of the function. The function instructions 106 include at least one branch function that can implement at least two execution paths between the first basic block 110 and the second basic block 112. For example, an "if / else" instruction at the end of the first basic block 110 can cause the function to continue execution of a first intermediate basic block (114-1) if the "if" is satisfied, otherwise execution of a second intermediate basic block (114-2).

[0023] Compiler 102 receives instruction function 106 and inserts or otherwise creates a series of hashed instructions 116 for the function. For example, compiler 102 may create hash function 118 and instruction input value 120 to be used as the hash function 118 for function instruction 106. Instruction input value 120 may be the instruction encoding of each function instruction 106.

[0024] Compiler 102 inserts reset hash instruction 122 into the first basic block 110 and inserts check hash instruction 124 into the second basic block 112. Reset hash instruction 122 resets the hash value to the initial hash value 126, and check hash instruction 124 performs a hash value check to the expected hash value 128 in the target execution instruction state. To protect the integrity of the function, reset hash instruction 122 is typically inserted at the beginning of the first basic block 110, and check hash instruction 124 is typically inserted at the end of the second basic block 112 (before any exit / return instruction of the function). However, without departing from the scope of the present disclosure, reset hash instruction 122 and check hash instruction 124 may be inserted at different positions in the respective basic blocks.

[0025] Compiler 102 also inserts hash input instructions 130 into the first basic block 110 and intermediate basic blocks 114. One of the instructions in hash input instructions 130 may be inserted between reset hash instruction 122 and the branch instruction in the first basic block 110. Other instructions in hash input instructions 130 may be inserted before a branch or jump instruction in the (multiple) intermediate basic blocks 114. Hash input instructions 130 set hash input values 132 for hash function 118 (similar to instruction input value 120 of function instruction 106).

[0026] Then, compiler 102 is able to determine the corresponding hash input values 132 of hash input instructions 130 and the expected hash value 128 of check hash instruction 124 using canonical value 134, the initial hash value 126 from reset hash instruction 122, instruction input value 120, and hash function 118. Canonical value 134 may be based on the target execution instruction state, such as the sum of the instructions encoded in the target execution instruction state. Regardless of which value is used for canonical value 134, compiler 102 sets the corresponding expected hash value of the last instruction in the first basic block 110 and intermediate basic blocks 114 to canonical value 134. Using hash function 118, compiler 102 then calculates the expected hash value in the execution state of function instruction 106 and hash input instructions 130. From these calculated expected hash values, and again using hash function 118, compiler 102 determines the hash input values 132 and the expected hash value 128 in the execution state of check hash instruction 124.

[0027] Next, compiler 102 compiles hash instruction 116 along with function instruction 106 into compiled function 104. Compiler 102 can utilize a table of hash input values 132 such that each hash input instruction 130 has a corresponding hash input value 132 in the table. Alternatively, hash input value 132 can be part of the corresponding hash input instruction 130. Additionally, compiled function 104 includes instruction input values 120 for each instruction and hash function 118 (or an indication thereof). In this way, when executed, compiled function 104 can verify execution hashing (using a verify hash instruction) against the expected hash value 128, regardless of which execution path is taken.

[0028] Example Compiling Computing Device

[0029] Figure 2 FIG. illustrates example computing device 200 in which a desired hash value in a function with control flow can be determined. Computing device 200 is illustrated using various non-limiting examples of computing device 200: smart phone 200-1, laptop computer 200-2, television 200-3, desktop computer 200-4, tablet computer 200-5, and wearable device 200-6. As shown on the right, computing device 200 includes at least one processor 202 and computer-readable medium 204.

[0030] Processor 202 (e.g., an application processor, microprocessor, digital signal processor (DSP), or controller) executes code stored in computer-readable medium 204 to implement operating system 206 and compiler 102, which are stored in storage medium 208 of computer-readable medium 204 (e.g., one or more non-transitory storage devices such as a hard disk drive, SSD, flash memory, read-only memory (ROM), EPROM, or EEPROM).

[0031] Computer-readable medium 204 (which can be either transitory or non-transitory) also includes memory 210 (e.g., one or more non-transitory computer-readable storage devices such as random access memory (RAM, DRAM, or SRAM)), which is accessed by operating system 206 and compiler 102.

[0032] Computing device 200 can include one or more communication systems (not shown) that can enable wired and / or wireless communication of device data, such as receiving data, transmitting data, or other information as described above. Example communication systems include NFC transceivers, WPAN radios compatible with various IEEE 802.15 (Bluetooth TM ) standards, and WPAN radios compatible with various IEEE 802.11 (WiFi TM)Any standard-compliant WLAN radio in the standard, WWAN ((3GPP-compliant) radio of a cellular phone, wireless metropolitan area network (WMAN) radio compliant with various IEEE 802.16 (WiMAX TM ) standard-compliant radio, infrared (IR) transceiver compliant with the Infrared Data Association (IrDA) protocol, and wired local area network (LAN) Ethernet transceiver.

[0033] The computing device 200 may also include one or more data input ports (not shown), through which any type of data, media content, and / or other inputs can be received, such as user-selectable inputs, messages, applications, music, television content, recorded video content, and any other type of audio, video, and / or image data received from any content and / or data source. The data input ports may include USB ports, coaxial cable ports, fiber optic ports for fiber optic interconnection or cabling, and other serial or parallel connectors (including internal connectors) for flash memory, DVDs, CDs, etc. These data input ports can be used to couple the electronic device to components, peripherals, or accessories, such as a keyboard, microphone, or camera.

[0034] Although not shown, the computing device 200 is also capable of including a system bus, interconnect, crossbar switch matrix, or data transfer system that couples the various components within the device. The system bus or interconnect can include any one or combination of different bus structures (such as a memory bus or memory controller, peripheral bus, universal serial bus, and / or a processor or local bus using any one of various bus architectures).

[0035] In some embodiments, the computing device 200 also includes an audio and / or video processing system (not shown) that processes audio data and / or passes audio and video data to an audio system (not shown) and / or a display system (not shown) (such as a video buffer or the screen of a smartphone or a camera). The audio system and / or display system may include any components that process, display, and / or otherwise present audio, video, display, and / or image data. The display data and audio signals can be transmitted to the audio component and / or display component via an RF (radio frequency) link, S-video link, HDMI (High-Definition Multimedia Interface), composite video link, component video link, DVI (Digital Video Interface), analog audio connection, or another similar communication link (such as a media data port). In some embodiments, the audio system and / or display system is an external or separate component of the computing device 200. Alternatively, the display system can be an integrated component of the exemplary computing device 200, such as part of an integrated touch interface.

[0036] Example Desired Hash Value Determination

[0037] Figure 3 Illustrates an example function 300 of a basic block with function instructions. The example function 300 is as follows:

[0038] void f(){

[0039] Instruction A;

[0040] if(condition){

[0041] Instruction B;

[0042] }else{

[0043] Instruction C;

[0044] }

[0045] Instruction D;

[0046] Return;

[0047] }

[0048] The basic block of the example function 300 includes a first basic block (e.g., the first basic block 110), and the first basic block includes:

[0049] Instruction A;

[0050] if(condition){.

[0051] The example function 300 also has a second basic block (e.g., the second basic block 112), and the second basic block includes:

[0052] Instruction D;

[0053] Return

[0054] The example function 300 also has a first intermediate basic block (e.g., the intermediate basic block 114-1), and the first intermediate basic block includes:

[0055] Instruction B;

[0056] Jump to the second basic block 112

[0057] The example function 300 also has a second intermediate basic block (e.g., the intermediate basic block 114-2), and the second intermediate basic block includes:

[0058] Instruction C;

[0059] Jump to the second basic block 112

[0060] The relationships of the basic blocks result in a first execution path 302 and a second execution path 304. One of ordinary skill in the art will recognize the relationships of conditional branch instructions and jump instructions relative to the function code. For example, the jump instruction in the middle basic block 114-2 is optional. When it is absent, the middle basic block 114-2 can directly end and "fall" into the second basic block 112.

[0061] As described above, the compiler adds (i) a reset hash instruction 122 to the first basic block 110, (ii) a verify hash instruction 124 to the second basic block 112, and (iii) a hash input instruction 130 to the basic blocks other than the second basic block. When completed, the basic blocks become:

[0062] First basic block 110

[0063] Reset the hash value to the initial hash value 126 (reset hash instruction 122)

[0064] Instruction A;

[0065] Calculate a hash value using the hash input value 132-1 (hash input instruction 130)

[0066] if (condition) {

[0067] Second basic block 112

[0068] Instruction D;

[0069] Verify the hash value against the expected hash value 128 (verify hash instruction 124)

[0070] Return

[0071] Intermediate basic block 114-1

[0072] Instruction B;

[0073] Calculate a hash value using the hash input value 132-2 (hash input instruction 130)

[0074] Jump to the second basic block 112

[0075] Intermediate basic block 114-2

[0076] Instruction C;

[0077] Calculate a hash value using the hash input value 132-3 (hash input instruction 130)

[0078] Jump to the second basic block 112.

[0079] Then, the compiler uses hash function 118 to compute hash input values 132-1, 132-2, and 132-3, as well as the expected hash value 128. In Figure 4 An example implementation of how to compute hash input values 132-1, 132-2, and 132-3, as well as the expected hash value 128, is illustrated.

[0080] Figure 4 An example implementation 400 of the techniques described herein applied to Figure 3 is illustrated for example function 300. Tables 402, 404, and 406 include basic blocks 108 of example function 300 and corresponding function instructions 106, instruction input values 120, or hash input values 132 (depending on whether the instruction is a function instruction 106 or a hash input instruction 130), as well as hash values 408 for each execution state. The conversion of the initial values (e.g., known values) in table 402 and the values (e.g., computed values) in tables 404 and 406 are described below. For clarity, the tables are illustrated; however, the compiler 102 can use any organizational technique to compute the values.

[0081] The process starts with values known or established in table 402. The hash function 118 (from Figure 1 ) is established as h = (h + input) % 10. However, the hash function 118 is arbitrary, and any hashing technique can be used without departing from the scope of the present disclosure. The initial hash value 126 is 5 in this example, and the instruction input values 120 of the function instructions 106 (e.g., instruction encodings) are set (4, 6, 3, 1, 8, 9, and 5).

[0082] The hash value 408 in the final execution state of each basic block 108 other than the second basic block 112 is set to a canonical value 134, which in this example is defined as the numerical value 8. As described above, the canonical value 134 can be based on the target execution instruction state, e.g., at the hash verification instruction 124. The canonical value 134 can be any value to which the hash value 408 in the final execution state (including all) can be set. For example, the canonical value 134 can be based on the target execution instruction state, e.g., based on all instructions on the target execution instruction state.

[0083] Using the hash function 118, the values in Table 404 can be calculated from the values in Table 402. For example, the hash value 408 in the execution instruction state of instruction A is 9 [(5 + 4) % 10]. The hash value 408 in the execution instruction state of the hash input instruction 130 of the first basic block 110 is 2 [(x + 6) % 10 = 8]. This ensures that the hash value 408 in the execution instruction state at the end of the first basic block 110 ("if" instruction) becomes the canonical value 134 (if the instruction executes as designed). The expected hash value 128 is the previous hash value 408, which is 3 in this example.

[0084] Using the hash function 118 again, the hash input values 132-1, 132-2, and 132-3 in Table 406 can be calculated from the values in Table 404. For example, the hash input value 132-1 is 3 [(9 + x) % 10 = 2], the hash input value 132-2 is 6 [(1 + x) % 10 = 7], and the hash input value 132-3 is [(6 + x) % 10 = 9].

[0085] As described above, using the calculated hash input values 132 and the expected hash value 128, the compiler 102 can compile the function for execution by the computing device. When executed, the expected hash value 128 is the same regardless of the execution path.

[0086] Example execution processing flow

[0087] Figure 5 Illustrates an example processing flow 500 using the expected hash value in a function with control flow. The processing flow 500 is typically implemented in an electronic device (not shown) discussed below with respect to Figure 6 As shown, the processing flow 500 includes at least one processor 502 that executes the compiled function 104. The processor 502 has an execution module 504 that executes function instructions 106 and a hash module 506 that executes hash instructions 116. Although not shown as a module of a single processor, the hash module 506 can be a separate piece of hardware from the execution module 504. The execution module 504 can relay the hash instructions 116 to the hash module 506 to determine and track the hash value 508. The hash value 508 is similar to the hash value 408; however, the hash value 508 is based on the actually executed instructions.

[0088] As part of the hash instruction 116, the hash module 506 receives the expected hash value 128 in the target execution instruction state. When the target execution instruction state is reached, the hash value 508 in the target execution instruction state is compared with the expected hash value 128. If a match is recognized, no action is taken. However, if the hash value 508 in the target execution instruction state does not match the expected hash value 128, the mismatch indicates a fault and the security function 510 is executed. For example, when a fault has been detected, the security function 510 can be an error code, a warning, a program stop, a processor lock, or any other suitable security protocol.

[0089] Due to the hash input instructions 130 in each basic block 108 except the second basic block 112, the expected hash value 128 is the same, e.g., regardless of which execution path is followed, either through the intermediate basic block 114-1 or through the second intermediate basic block 114-2. In this way, the compilation function 104 is verified as a whole while protecting all function instructions 106.

[0090] Example execution computing device

[0091] Figure 6 Illustrated is an example computing device 600 in which the use of an expected hash value in a function with control flow can be implemented. In some embodiments, the computing device 600 can be the same as the computing device 200. For example, the computing device 600 can implement the compiler 102. The computing device 600 is illustrated using various non-limiting examples of the computing device 600: a smart phone 600-1, a laptop computer 600-2, a television 600-3, a desktop computer 600-4, a tablet computer 600-5, and a wearable device 600-6. As shown on the right, the computing device 600 includes a processor 502 and a computer-readable medium 602.

[0092] The processor 502 (e.g., an application processor, a microprocessor, a digital signal processor (DSP), or a controller) executes the code stored in the computer-readable medium 602 to implement the operating system 604 and the compiler 104, which are stored in the storage medium 606 of the computer-readable medium 602 (e.g., one or more non-transitory storage devices such as a hard disk drive, an SSD, flash memory, a read-only memory (ROM), an EPROM, or an EEPROM).

[0093] The computer-readable medium 602 (which can be either transitory or non-transitory) also includes a memory 608 (e.g., one or more non-transitory computer-readable storage devices such as random access memory (RAM, DRAM, or SRAM)), which is accessed by the operating system 604 and the compilation function 104.

[0094] Computing device 600 can include one or more communication systems (not shown), which can enable wired and / or wireless communication of device data, such as receiving data, transmitting data, or other information as described above. Example communication systems include NFC transceivers, WPAN radios compliant with various IEEE 802.15 (Bluetooth TM ) standards, WLAN radios compliant with any of the various IEEE 802.11 (WiFi TM ) standards, WWAN (3GPP-compliant) radios of cellular phones, wireless metropolitan area network (WMAN) radios compliant with various IEEE 802.16 (WiMAX TM ) standards, infrared (IR) transceivers compliant with the Infrared Data Association (IrDA) protocol, and wired local area network (LAN) Ethernet transceivers.

[0095] Computing device 600 may also include one or more data input ports (not shown), through which any type of data, media content, and / or other inputs can be received, such as user-selectable inputs, messages, applications, music, television content, recorded video content, and any other type of audio, video, and / or image data received from any content and / or data source. The data input ports can include USB ports, coaxial cable ports, fiber optic ports for fiber optic interconnections or cabling, and other serial or parallel connectors (including internal connectors) for flash memory, DVDs, CDs, etc. These data input ports can be used to couple the electronic device to components, peripherals, or accessories, such as keyboards, microphones, or cameras.

[0096] Although not shown, computing device 600 can also include a system bus, interconnect, crossbar switch matrix, or data transfer system that couples the various components within the device. The system bus or interconnect can include any one or combination of different bus structures (such as a memory bus or memory controller, a peripheral bus, a universal serial bus, and / or a processor or local bus utilizing any one of the various bus architectures).

[0097] In some embodiments, computing device 600 also includes an audio and / or video processing system (not shown) that processes audio data and / or passes audio and video data to an audio system (not shown) and / or a display system (not shown) (e.g., a video buffer or the screen or camera of a smartphone). The audio system and / or display system can include any components that process, display, and / or otherwise render audio, video, display, and / or image data. Display data and audio signals can be transmitted to the audio components and / or display components via an RF (radio frequency) link, an S-video link, an HDMI (High-Definition Multimedia Interface), a composite video link, a component video link, a DVI (Digital Video Interface), an analog audio connection, or another similar communication link (such as a media data port). In some embodiments, the audio system and / or display system is an external or separate component of computing device 200. Alternatively, the display system can be an integrated component of exemplary computing device 600, such as part of an integrated touch interface.

[0098] Exemplary Method

[0099] Figure 7 and Figure 8 illustrates an exemplary method 700 for determining a desired hash value in a function with a control flow. This method can be implemented using the previously described examples, such as processing flow 100, computing device 200, and Figure 3 and Figure 4 the illustration shown. Aspects of this method are illustrated as operations 702 through 716. The order in which the operations of this method are shown and / or described is not intended to be construed as limiting, and any number or combination of the described method operations can be combined in any order to implement the method or an alternative method.

[0100] At 702, the computing device receives a function having a plurality of basic blocks, the basic blocks including respective portions of the function instructions and at least two execution paths between a first basic block and a second basic block. For example, computing device 200 can receive function instructions 106 having a plurality of basic blocks 108, the basic blocks 108 including respective portions of function instructions 106 and a first execution path 302 and a second execution path 304 between a first basic block 110 and a second basic block 112.

[0101] At 704, the computing device establishes a hash function that is used to calculate a hash value for the respective execution instruction states of the function instructions, and inserts a reset hash instruction having a corresponding initial hash value in the first basic block. For example, computing device 200 can establish a hash function 118 that is used to calculate hash value 408, and inserts a reset hash instruction 122 having an initial hash value 126 in the first basic block 110.

[0102] At 706, the computing device then selects a target execution instruction state in the second basic block and inserts a checksum hash instruction in the target execution instruction state. For example, the computing device 200 may select a target execution instruction state in the execution state of instruction D and insert a checksum hash instruction 124 in the target execution instruction state. The checksum hash instruction 124 has a corresponding expected hash value 128 that has not yet been determined.

[0103] At 708, the computing device further inserts corresponding hash input instructions in each of a plurality of basic blocks other than the second basic block. For example, the computing device 200 may insert corresponding hash input instructions 130 in the first basic block 110 and one or more intermediate basic blocks 114. The hash input instructions 130 have corresponding hash input values 132 that have not yet been determined.

[0104] After operation 708, the computing device continues Figure 8 . At 710, the computing device sets the expected hash value in the execution instruction state of the reset hash instruction to the initial hash value. For example, the computing device 200 may set the hash value 408 in the execution instruction state of the reset hash instruction 122 to the initial hash value 126.

[0105] At 712, the computing device sets the corresponding expected hash values in the final execution instruction states of a plurality of basic blocks other than the second basic block to canonical values. For example, the computing device 200 may set the corresponding hash values 408 in the execution instruction states of the "if" and "jump" instructions to the canonical value 134.

[0106] At 714, the computing device determines the expected hash value in the target execution instruction state and the hash input values of the hash input instructions based on the initial hash value, the canonical value, and the hash function. For example, the computing device 200 may determine the hash value 408 in the target execution instruction state of instruction D and the hash input value 132 of the hash input instruction 130 based on the initial hash value 126, the canonical value 134, and the hash function 118.

[0107] At 716, the computing device compiles the function using the function instruction, the reset hash instruction, the hash input instruction with the hash input value, and the checksum hash instruction with the expected hash value in the target execution instruction state. For example, the computing device 200 compiles the function using the function instruction 106, the reset hash instruction 122, the hash input instruction 130 with the hash input value 132, and the checksum hash instruction 124 with the expected hash value 128 in the target execution instruction state. Compiling the function 104 may also include the hash function 118 and the instruction input value 120.

[0108] Figure 9Illustrated is an example method 900 of utilizing an expected hash value in a function having a control flow. This method can be implemented using the examples described previously, such as processing flow 500 and computing device 600. Aspects of this method are illustrated as operations 902 through 908. The order in which the operations of this method are shown and / or described is not intended to be construed as limiting, and any number or combination of the described method operations can be combined in any order to implement the method or an alternative method.

[0109] At 902, the computing device executes function instructions having at least two execution paths to reach a target execution instruction state. For example, execution module 504 of computing device 600 can execute function instruction 106 using a first execution path 302 or a second execution path 304 to reach the execution instruction state of verification hash instruction 124.

[0110] At 904, the computing device executes a hash instruction, including a corresponding hash input instruction for the hash value at the target execution instruction state. For example, hash module 506 of computing device 600 can execute hash instruction 116 including hash input instruction 130 to reach the hash value at the execution instruction state of verification hash instruction 124.

[0111] At 906, then, the computing device compares the hash value at the target execution instruction state with the expected hash value at the target execution instruction state. For example, hash module 506 of computing device 600 can compare hash value 408 at the execution instruction state of verification hash instruction 124 with expected hash value 128.

[0112] At 908, in response to the hash value at the target execution instruction state not matching the expected hash value at the execution instruction state, the computing device executes a security function. For example, hash module 506 of computing device 600 can cause security function 510 to be executed. When an execution failure has occurred, the security function can be an alert, halting function continuation, or any other suitable security measure.

[0113] The foregoing discussion describes methods related to determining and utilizing an expected hash value in a function having a control flow. Aspects of these methods can be implemented in hardware (e.g., fixed logic circuitry), firmware, software, or any combination thereof. These techniques can use Figure 2 and Figure 6 one or more of the entities or components shown, which can be further divided, combined, etc. Thus, these figures illustrate some of the many possible systems or apparatuses that can employ the described techniques. The entities and components of these figures generally represent software, firmware, hardware, an entire device or network, or a combination thereof.

[0114] Example

[0115] Example 1: A method performed by a computing device, the method comprising: receiving a function, the function comprising: function instructions, a plurality of basic blocks including respective portions of the function instructions, and at least two execution paths between a first basic block and a second basic block among the plurality of basic blocks; establishing a hash function for calculating a corresponding hash value in an execution instruction state of the function instructions; inserting a reset hash instruction in the first basic block, the reset hash instruction setting the hash value in the execution instruction state of the reset hash instruction to an initial hash value; selecting a target execution instruction state in the second basic block; inserting a verification hash instruction in the target execution instruction state, the verification hash instruction comparing the hash value in the target execution instruction state with an expected hash value in the target execution instruction state; inserting a corresponding hash input instruction in each of the plurality of basic blocks other than the second basic block, the hash input instruction setting a corresponding hash input value to the hash function for calculating the hash value in the execution instruction state of the hash input instruction; determining the expected hash value in the target execution instruction state and the hash input value of the hash input instruction based on the initial hash value, a specification value, and the hash function; and forming a compiled function, the compiled function comprising: function instructions; a reset hash instruction having the initial hash value; a hash input instruction having the corresponding hash input value, and a verification hash instruction having the expected hash value in the target execution instruction state.

[0116] Example 2: The method according to Example 1, further comprising: setting the hash value in the execution instruction state of the reset hash instruction to the initial hash value; and setting the corresponding hash values in the final execution instruction states of the plurality of basic blocks other than the second basic block to the specification value, wherein the expected hash value and the hash input value in the target execution instruction state are further based on the hash value in the execution instruction state of the reset hash instruction and the corresponding hash values in the final execution instruction states.

[0117] Example 3: The method according to Example 1 or 2, wherein the corresponding instruction encoding values are used as the instruction input values of the hash function in the execution instruction state of the function instructions.

[0118] Example 4: The method according to any one of Examples 1 to 3, wherein the specification value is based on the target execution instruction state.

[0119] Example 5: The method according to any one of Examples 1 to 4, wherein the specification value is based on the instruction encoding values before the target execution instruction state.

[0120] Example 6: The method according to any one of Examples 1 to 5, wherein the corresponding hash input instructions are inserted before branch or jump instructions.

[0121] Example 7: The method according to any one of Examples 1 to 6, wherein at least two execution paths correspond to at least one intermediate basic block between the first basic block and the second basic block.

[0122] Example 8: The method according to any one of Examples 1 to 7, wherein the method is performed by a compiler.

[0123] Example 9: A method performed by a computing device, the method comprising: executing function instructions to reach a target execution instruction state, the function instructions: consisting of a plurality of basic blocks of the function instructions; and having at least two execution paths between a first basic block and a second basic block among the plurality of basic blocks, the target execution instruction state being in the second basic block; executing hash instructions among the plurality of basic blocks to reach a hash value in the target execution instruction state, the hash instructions including corresponding hash input instructions in each basic block among the plurality of basic blocks except the second basic block; comparing the hash value in the target execution instruction state with an expected hash value in the target execution instruction state, the expected hash value in the target execution instruction state being independent of which path is executed; and in response to a mismatch between the hash value in the target execution instruction state and the expected hash value in the execution instruction state, executing a security function.

[0124] Example 10: The method according to Example 9, wherein the hash function further comprises: a reset hash instruction in the first basic block; and a check hash instruction in the second basic block.

[0125] Example 11: The method according to Example 9 or 10, wherein the hash input instructions utilize a hash input value table, and wherein each hash input instruction has a corresponding hash input value in the hash input value table.

[0126] Example 12: The method according to any one of Examples 9 to 11, wherein the hash input instructions are executed before a branch or jump instruction.

[0127] Example 13: The method according to any one of Examples 9 to 12, wherein the hash instructions are executed by a hardware device that is separate from the processor executing the function instructions.

[0128] Example 14: The method according to any one of Examples 9 to 12, wherein the hash instructions are executed by a module of the processor that executes the function instructions.

[0129] Example 15: A computing device, the computing device comprising: at least one processor; and at least one computer-readable storage medium device, the device including instructions that, when executed by the at least one processor, cause the processor to perform the method according to any of the preceding claims.

[0130] While embodiments for determining an expected hash value in a function having a control flow have been described in language specific to certain features and / or methods, the subject matter of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features or methods are disclosed as example embodiments for determining an expected hash value in a function having a control flow. Further, while various examples have been described above, each with specific features, it should be understood that it is not necessary for the specific features of one example to be dedicated to that example. Instead, any feature described above and / or depicted in the figures can be combined with any example, in addition to or in place of any other feature of these examples.

Claims

1. A method performed by a computing device, the method comprising: Receiving a function, the function comprising: Function instructions; A plurality of basic blocks, the plurality of basic blocks comprising corresponding portions of the function instructions; and At least two execution paths between a first basic block and a second basic block among the plurality of basic blocks; Establishing a hash function for calculating a corresponding hash value in an execution instruction state of the function instructions; Inserting a reset hash instruction in the first basic block, the reset hash instruction setting the hash value in the execution instruction state of the reset hash instruction to an initial hash value; Selecting a target execution instruction state in the second basic block; Inserting a verification hash instruction in the target execution instruction state, the verification hash instruction comparing the hash value in the target execution instruction state with an expected hash value in the target execution instruction state; Inserting corresponding hash input instructions in each basic block among the plurality of basic blocks other than the second basic block, the hash input instructions setting corresponding hash input values to the hash function for calculating the hash value in the execution instruction state of the hash input instructions; Determining the expected hash value in the target execution instruction state and the hash input values of the hash input instructions based on the initial hash value, a specification value, and the hash function, wherein the corresponding hash values in the final execution instruction state of the plurality of basic blocks other than the second basic block are set to the specification value; and Forming a compiled function, the compiled function comprising: The function instructions; The reset hash instruction having the initial hash value; The hash input instructions having corresponding hash input values; and The verification hash instruction having the expected hash value in the target execution instruction state.

2. The method according to claim 1, further comprising: Setting the hash value in the execution instruction state of the reset hash instruction to the initial hash value; And wherein the expected hash value and the hash input values in the target execution instruction state are further based on the hash value in the execution instruction state of the reset hash instruction and the corresponding hash values in the final execution instruction state.

3. The method according to claim 1, wherein Corresponding instruction encoding values are used as instruction input values of the hash function in the execution instruction state of the function instructions.

4. The method according to claim 1, wherein, The specification value is based on all instructions in the target execution instruction state.

5. The method according to claim 1, wherein The specification value is based on instruction encoding values before the target execution instruction state.

6. The method according to claim 1, wherein, Corresponding hash input instructions are inserted before branch or jump instructions.

7. The method according to claim 1, wherein The at least two execution paths correspond to at least one intermediate basic block between the first basic block and the second basic block.

8. The method according to any one of claims 1 to 7, wherein, The method is executed by a compiler.

9. A method performed by a computing device, the method comprising: Executing function instructions to reach a target execution instruction state, the function instructions: Composed of a plurality of basic blocks of the function instructions; Having at least two execution paths between a first basic block and a second basic block among the plurality of basic blocks; and The target execution instruction state is in the second basic block; Execute hash instructions in the plurality of basic blocks to achieve the hash value in the target execution instruction state, the hash instructions including corresponding hash input instructions in each of the plurality of basic blocks except the second basic block; Compare the hash value in the target execution instruction state with the expected hash value in the target execution instruction state, the expected hash value in the target execution instruction state being determined based on an initial hash value, a specification value, and a hash function, the expected hash value in the target execution instruction state being independent of which execution paths in the execution path are executed, wherein the corresponding hash values in the final execution instruction state of the plurality of basic blocks except the second basic block are set to the specification value; and In response to the hash value in the target execution instruction state not matching the expected hash value in the execution instruction state, execute a security function.

10. The method according to claim 9, wherein, The hash instructions further include: A reset hash instruction in the first basic block; and A check hash instruction in the second basic block.

11. The method according to claim 9, wherein, The hash input instructions utilize a hash input value table, wherein each hash input instruction has a corresponding hash input value in the hash input value table.

12. The method according to claim 9, wherein The hash input instructions are executed before a branch or jump instruction.

13. The method according to any one of claims 9 to 12, wherein The hash instructions are executed by a hardware device separate from the processor executing the function instructions.

14. The method according to any one of claims 9 to 12, wherein The hash instructions are executed by a module of the processor executing the function instructions.

15. A computing device, comprising: At least one processor; And At least one computer-readable storage medium device including instructions that, when executed by the at least one processor, cause the processor to execute the method according to any one of claims 1-14.

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