A wiring structure suitable for electromagnetic compatibility fan control circuit

Abstract

The present invention provides an electromagnetic compatibility (EMC) fan control circuit, comprising: a power supply circuit for providing a voltage with a stable amplitude for the EMC fan control circuit; a drive circuit for driving a dual-winding stator and two sets of PWM signals to control the on and off of a switching tube; a microcontroller and its peripheral circuits for receiving and processing Hall effect signals and power supply voltage signals, and outputting two PWM signals for controlling the drive circuit and a frequency signal capable of reflecting the fan speed after performing internal software logic operations; the microcontroller and its peripheral circuits comprising: a microcontroller, a decoupling circuit, a Hall effect signal acquisition circuit, a frequency output circuit, and a voltage signal acquisition circuit, wherein the voltage signal acquisition circuit, the Hall effect signal acquisition circuit, and the decoupling circuit are each connected to a port of the microcontroller in a one-to-one correspondence. This structure improves the fan control circuit's anti-misconnection, speed feedback, and EMC performance.

Description

Technical Field

[0001] This specification relates to the technical field of brushless DC fans, and specifically to an electromagnetic compatibility fan control circuit and wiring structure. Background Art

[0002] Because brushless DC fans are functional components that provide ventilation and heat dissipation for other equipment, often used in a variety of specialized applications, their inherent misconnection protection, speed feedback, and electromagnetic compatibility (EMC) performance are crucial to their widespread use. Existing fan control principles, due to the diverse control signals, generate more harmonic interference than pure hardware circuits. Therefore, circuit board layouts that take EMC into account are crucial.

[0003] The existing fan control principle has more types of control signals, and the harmonic interference generated will be more than that of pure hardware circuits. Therefore, it is very important to take electromagnetic compatibility into consideration in the circuit board layout and routing. Summary of the Invention

[0004] In view of this, the embodiments of this specification provide an electromagnetic compatibility fan control circuit and wiring structure to prevent misconnection and improve the speed feedback and electromagnetic compatibility performance of the brushless DC fan.

[0005] The embodiments of this specification provide the following technical solutions:

[0006] An electromagnetic compatibility fan control circuit, comprising:

[0007] The power supply circuit is used to provide a voltage with a stable amplitude for the electromagnetic compatibility fan control circuit;

[0008] The drive circuit is used to drive the dual-winding stator and drive two sets of PWM signals to control the on and off of the switch tube;

[0009] The microcontroller and its peripheral circuits are used to receive and process Hall signals and power supply voltage signals. After internal software logic operations, they output two sets of PWM signals that control the drive circuit and a frequency signal that can reflect the fan speed. The microcontroller and its peripheral circuits include: a microcontroller, a decoupling circuit, a Hall signal acquisition circuit, a frequency output circuit, and a voltage signal acquisition circuit. The voltage signal acquisition circuit, the Hall signal acquisition circuit, and the decoupling circuit are respectively connected to the ports of the microcontroller in a one-to-one correspondence.

[0010] The decoupling circuit is used to stabilize the voltage amplitude of the microcontroller;

[0011] The Hall signal acquisition circuit is used to collect the Hall signal and transmit the Hall signal to the microcontroller;

[0012] The frequency output circuit is used to measure the real-time speed of the fan;

[0013] The voltage signal acquisition circuit is used to control the microcontroller to stop outputting the control signal to protect the drive circuit.

[0014] Furthermore, the power supply circuit includes: common-mode capacitor C1, common-mode capacitor C2, differential-mode capacitor C3, differential-mode capacitor C4, differential-mode capacitor C5, differential-mode capacitor C6, diode D1, tantalum electrolytic capacitor C7, filter capacitor C8, filter capacitor C9, resistor R1, resistor R2, integrated circuit U1, integrated circuit U2, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, and resistor R3;

[0015] Both ends of the common mode capacitor C1, the common mode capacitor C2, the differential mode capacitor C3, the differential mode capacitor C4, the differential mode capacitor C5 and the differential mode capacitor C6 are connected to the positive and negative poles of the power supply;

[0016] One end of the diode D1 is connected to the positive electrode of the power supply, and the other end of the diode D1 is the positive electrode of the VCC power supply and is connected to the positive electrode of the tantalum electrolytic capacitor C7;

[0017] The negative electrode of the tantalum electrolytic capacitor C7 is connected to the negative electrode return line of the power supply, and the filter capacitor C8 and the filter capacitor C9 are connected in parallel at both ends of the tantalum electrolytic capacitor C7;

[0018] The resistor R1 is connected in parallel with the resistor R2, and one end of the resistor R1 is connected to the tantalum electrolytic capacitor C7, and the other end of the resistor R1 is connected to the input end of the three-terminal integrated voltage regulator U1;

[0019] Capacitor C10 and capacitor C11 are connected in parallel between the input terminal and the ground terminal of the three-terminal integrated voltage regulator U1;

[0020] The input end of the three-terminal integrated voltage regulator U2 is connected to the output end of the three-terminal integrated voltage regulator U1, capacitor C12 and capacitor C13 are connected in parallel between the input end and the ground end of the three-terminal integrated voltage regulator U2, the output end of the three-terminal integrated voltage regulator U2 is the positive pole of the power supply, both ends of capacitor C14 and capacitor C15 are connected to the positive and negative poles of the power supply, and resistor R3 is connected in series between the positive and negative poles of the power supply.

[0021] Furthermore, the driving circuit includes:

[0022] Winding L1, winding L2, capacitor C19, capacitor C20, transistor Q1, transistor Q2, N-channel field effect transistor Q3, N-channel field effect transistor Q4, diode D2, diode D3, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, and resistor R15;

[0023] One end of winding L1 is connected to the common terminal VCC, and the other end of winding L1 is connected to capacitor C19 and the drain of N-channel field-effect transistor Q3. Capacitor C19 is connected in parallel between the drain and source of N-channel field-effect transistor Q3. Resistor R7 is connected in parallel between the gate and source of N-channel field-effect transistor Q3. Diode D2 and resistor R12 are connected in parallel to the gate of N-channel field-effect transistor Q3. The cathode of diode D2 and the other end of resistor R12 are both connected to resistor R10 and the collector of transistor Q1. The common end of resistor R10 and resistor R6 is connected to the positive terminal of the 12V power supply. The other end of resistor R6 is connected to resistor R14 and a port of the microcontroller. The emitter of transistor Q1 is connected to the power return line GND.

[0024] One end of winding L2 is connected to the common terminal VCC, and the other end of winding L2 is connected to capacitor C20 and the drain of N-channel field-effect transistor Q4. Capacitor C20 is connected in parallel between the drain and source of N-channel field-effect transistor Q4. Resistor R9 is connected in parallel between the gate and source of N-channel field-effect transistor Q4. Diode D3 and resistor R13 are connected in parallel to the gate of N-channel field-effect transistor Q4. The cathode of diode D3 and the other end of resistor R13 are both connected to resistor R11 and the collector of transistor Q2. The common end of resistor R11 and resistor R8 is connected to the positive electrode of the 12V power supply. The other end of resistor R8 is connected to resistor R15 and a port of the microcontroller. The emitter of transistor Q2 is connected to the power return line GND.

[0025] Furthermore, the voltage signal acquisition circuit is connected to the microcontroller, and the voltage signal acquisition circuit includes: a voltage divider resistor R19, an analog resistor R20, a filter capacitor C25 and a filter capacitor C26;

[0026] The voltage-dividing resistor R19 and the analog resistor R20 are both connected in series between the positive pole of the VCC power supply and the negative pole of the power return line GND. One end of the analog resistor R20 is connected to the voltage-dividing resistor R19, and the other end of the analog resistor R20 is respectively connected to one end of the filter capacitor C25 and one end of the filter capacitor C26. One end of the voltage-dividing resistor R19 is connected to the VCC power supply, and the other end of the voltage-dividing resistor R19 is respectively connected to the analog resistor R20, one end of the filter capacitor C25, and one end of the filter capacitor C26. The voltage-dividing resistor R19 and the analog resistor R20 are both connected in parallel between the port of the microcontroller and the negative pole of GND.

[0027] Furthermore, the frequency output circuit includes:

[0028] Current limiting resistor R16, current limiting resistor R17, transistor Q5, pull-up resistor R18, filter capacitor C21, filter capacitor C22, isolated power supply negative electrode GND, digital circuit negative electrode return line DGND, resistor R21 and resistor R22;

[0029] The collector of transistor Q5 is respectively connected to the pull-up resistor R18 and the current-limiting resistor R16, the emitter of transistor Q5 is connected to the negative electrode return line DGND of the digital circuit, the base of transistor Q5 is connected to one end of the current-limiting resistor R17, the other end of the current-limiting resistor R17 is connected to the frequency signal output, one end of the current-limiting resistor R16 is connected to the filter capacitor C21, the other end of the current-limiting resistor R16 is connected to the filter capacitor C22, one end of the resistor R21 is connected to the negative electrode GND of the isolated power supply, the other end of the resistor R21 is connected to the negative electrode return line DGND of the digital circuit, one end of the resistor R22 is connected to the resistor R21, the filter capacitor C21 and the negative electrode return line DGND of the digital circuit, and the other end of the resistor R22 is connected to the current-limiting resistor R16 and the negative electrode GND of the isolated power supply.

[0030] Furthermore, the decoupling circuit includes: a capacitor C16 and a capacitor C17, and the capacitor C16 and the capacitor C17 are both connected in parallel between VCC and GND of the microcontroller.

[0031] Furthermore, the Hall signal acquisition circuit includes: a Hall element H1, a pull-up resistor R4, a current limiting resistor R5, a filter capacitor C18 and a digital circuit negative return line DGND;

[0032] The Hall signal acquisition circuit is connected to the microcontroller;

[0033] The input end of the Hall element H1 is connected to the positive electrode of the 5V power supply, the output end of the Hall element H1 is connected to the 5V power supply through the pull-up resistor R4, the output end of the Hall element H1 is connected to the microcontroller through the current limiting resistor R5, the ground end of the Hall element H1 is connected to the negative return line DGND of the digital circuit, and the filter capacitor C18 is connected to the current limiting resistor R5 and the negative return line DGND of the digital circuit.

[0034] Furthermore, the wiring structure is applicable to the electromagnetic compatibility fan control circuit of claims 1 to 7.

[0035] Furthermore, the wiring structure includes: a top circuit layer, a bottom circuit layer, a middle circuit layer 1 and a middle circuit layer 2, wherein the power supply circuit is set on the top circuit layer, the drive circuit is set on the bottom circuit layer, the power line is set on the middle circuit layer 1, and the power return line is set on the middle circuit layer 2.

[0036] Furthermore, in the top circuit layer, common-mode capacitor C1, common-mode capacitor C2, differential-mode capacitor C3, differential-mode capacitor C4, differential-mode capacitor C5, and differential-mode capacitor C6 are all arranged around the power inlet; in the bottom circuit layer, capacitor C19 and capacitor C20 are both arranged adjacent to N-channel field-effect transistor Q3 and N-channel field-effect transistor Q4.

[0037] Compared with the prior art, the at least one technical solution adopted in the embodiments of this specification can achieve the following beneficial effects:

[0038] A power supply circuit provides a voltage with a stable amplitude; a driver circuit controls the on / off switching of the switch tube; a microcontroller and its peripheral circuits receive and process Hall signals and power supply voltage signals, and after internal software logic operations, output the two PWM signals that control the driver circuit and a frequency signal that reflects the fan speed. This electromagnetically compatible fan control circuit improves its misconnection prevention, speed feedback, and electromagnetic compatibility performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0040] Figure 1 This is a schematic diagram of the overall structure of the electromagnetic compatibility fan control circuit according to an embodiment of the present invention;

[0041] Figure 2 1 is a schematic diagram of the power supply circuit structure of an embodiment of the present invention;

[0042] Figure 3 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;

[0043] Figure 4 1 is a schematic diagram of the structure of a stabilizing amplitude circuit according to an embodiment of the present invention;

[0044] Figure 5 1 is a schematic structural diagram of a frequency output circuit according to an embodiment of the present invention;

[0045] Figure 6 1 is a schematic diagram of the structure of a voltage signal acquisition circuit according to an embodiment of the present invention;

[0046] Figure 7 1 is a schematic diagram of the structure of a Hall signal acquisition circuit according to an embodiment of the present invention;

[0047] Figure 8 1 is a schematic diagram of the structure of a decoupling circuit and a microcontroller according to an embodiment of the present invention;

[0048] Figure 9 This is a schematic diagram of the superposition of the routing of the power line and the power return line according to an embodiment of the present invention;

[0049] Figure 10 is a schematic diagram of the top circuit layer of an embodiment of the present invention;

[0050] Figure 11 is a schematic diagram of the bottom circuit layer of an embodiment of the present invention;

[0051] Figure 12 This is a schematic diagram of the middle circuit layer in an embodiment of the present invention;

[0052] Figure 13 Schematic diagram of the middle two-layer circuit layer in an embodiment of the present invention. DETAILED DESCRIPTION

[0053] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0054] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the features in the following embodiments and embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative work are within the scope of protection of this application.

[0055] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on this application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement an apparatus and / or practice a method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this apparatus and / or practice this method.

[0056] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0057] Additionally, in the following description, specific details are provided to provide a thorough understanding of the examples. However, one skilled in the art will appreciate that the aspects described can be practiced without these specific details.

[0058] The following describes the technical solutions provided by various embodiments of the present application in conjunction with the accompanying drawings.

[0059] like Figure 1 As shown, the electromagnetic compatibility fan control circuit of the embodiment of the present invention includes:

[0060] The power supply circuit is used to provide a voltage with a stable amplitude for the electromagnetic compatibility fan control circuit;

[0061] The drive circuit is used to drive the dual-winding stator and drive two sets of PWM signals to control the on and off of the switch tube;

[0062] The microcontroller and its peripheral circuits are used to receive and process Hall signals and power supply voltage signals. After performing internal software logic operations, they output two PWM signals that control the drive circuit and a frequency signal that reflects the fan speed. The microcontroller and its peripheral circuits include: a microcontroller, a decoupling circuit, a Hall signal acquisition circuit, a frequency output circuit, and a voltage signal acquisition circuit. The voltage signal acquisition circuit, the Hall signal acquisition circuit, and the decoupling circuit are all connected to the microcontroller ports in a one-to-one correspondence. The microcontroller can be the STC8H1K24.

[0063] The decoupling circuit stabilizes the voltage amplitude of the microcontroller. The Hall signal acquisition circuit collects and transmits Hall signals to the microcontroller. The frequency output circuit measures the real-time speed of the fan. The voltage signal acquisition circuit controls the microcontroller to stop outputting control signals to protect the drive circuit.

[0064] like Figure 2 As shown, the power supply module provides power for other modules of each level of the control circuit of the embodiment of the present invention. The power supply circuit includes: common-mode capacitor C1, common-mode capacitor C2, differential-mode capacitor C3, differential-mode capacitor C4, differential-mode capacitor C5, differential-mode capacitor C6, diode D1, tantalum electrolytic capacitor C7, filter capacitor C8, filter capacitor C9, resistor R1, resistor R2, three-terminal integrated voltage regulator U1, three-terminal integrated voltage regulator U2, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, and resistor R3.

[0065] Common-mode capacitors C1, C2, C3, C4, C5, and C6 all have their ends connected to the positive and negative terminals of the power supply. The common contact EGND is a reserved point for connection to the metal fan housing. This circuit can be used to reduce significant common-mode interference. Differential-mode capacitors C3, C4, C5, and C6 are all differential-mode capacitors. An appropriate number of differential-mode capacitors effectively reduces differential-mode interference in the circuit. Differential-mode capacitors primarily serve as filters. Therefore, when laying out the circuit board, the differential-mode capacitors should be placed near the main power supply.

[0066] One end of diode D1 is connected to the positive terminal of the power supply. The other end of diode D1 is connected to the positive terminal of the VCC power supply and the positive terminal of tantalum electrolytic capacitor C7. Diode D1 is connected in series with the main power supply circuit to prevent reverse polarity. The model and parameters of diode D1 should be based on the amplitude of the rated current and rated operating voltage of the main circuit.

[0067] The negative electrode of the tantalum electrolytic capacitor C7 is connected to the negative return line of the power supply, and the filter capacitors C8 and C9 are connected in parallel at both ends of the tantalum electrolytic capacitor C7; the resistor R1 is connected in parallel with the resistor R2, and one end is connected to the tantalum electrolytic capacitor C7, and the other end is connected to the input pin 1 of the three-terminal integrated voltage regulator U1. The capacitors C10 and C11 are connected in parallel between the input pin 1 and the ground pin 2 of U1 to play a filtering role. The output end of the three-terminal integrated voltage regulator U1 provides the power for the subsequent stage. +12V power supply; the input end of the three-terminal integrated voltage regulator U2 is connected to the output end of the three-terminal integrated voltage regulator U1, and capacitors C12 and C13 are also connected in parallel between input pin 1 and ground pin 2 of the three-terminal integrated voltage regulator U2 to play a filtering role. The output end of the three-terminal integrated voltage regulator U2 is the +5V power supply provided by the subsequent stage. Capacitors C14 and C15 are used for filtering the +5V power supply used by the subsequent stage. Resistor R3 is connected in series between the positive and negative electrodes as a load;

[0068] The VCC (circuit power supply voltage) port is the fan drive power port, and the VCC port is directly connected to the winding (winding L1 and winding L2 in the drive circuit). During operation, the ripple fluctuation of the winding back electromotive force can easily affect the amplitude of the VCC port and thus affect the performance of the fan, so tantalum electrolytic capacitor C7, filter capacitor C8, and filter capacitor C9 are set for filtering. Tantalum electrolytic capacitor C7, filter capacitor C8, and filter capacitor C9 are filter capacitors for the VCC power supply. If necessary, tantalum electrolytic capacitors with better fixed frequency band filtering performance can be selected. After current limiting and voltage reduction by resistors R1 and R2, the three-terminal integrated voltage regulator U1 and the three-terminal integrated voltage regulator U2 can stabilize the voltage at the required amplitude.

[0069] like Figure 3 As shown, the drive circuit includes a winding L1, a winding L2, a capacitor C19, a capacitor C20, a transistor Q1, a transistor Q2, an N-channel field effect transistor Q3, a transistor Q4, a diode D2, a diode D3, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14 and a resistor R15.

[0070] One end of winding L1 is connected to the common terminal VCC, and the other end of winding L1 is connected to capacitor C19 and the drain of N-channel FET Q3. Capacitor C19 is connected in parallel between the drain and source of N-channel FET Q3. Resistor R7 is connected in parallel between the gate and source of N-channel FET Q3. Diode D2 and resistor R12 are connected in parallel to the gate of N-channel FET Q3, forming a release path for the fast shutdown of N-channel FET Q3. The cathode of diode D2 and the other end of resistor R12 are both connected to resistor R10 and the collector of transistor Q1. The common end of resistor R10 and resistor R6 is connected to the positive terminal of a 12V power supply. The other end of resistor R6 is connected to resistor R14 and a port of the microcontroller. The emitter of transistor Q1 is connected to the power return line GND.

[0071] One end of winding L2 is connected to the common terminal VCC, and the other end of winding L2 is connected to capacitor C20 and the drain of N-channel FET Q4. Capacitor C20 is connected in parallel between the drain and source of N-channel FET Q4. Resistor R9 is connected in parallel between the gate and source of N-channel FET Q4. Diode D3 and resistor R13 are connected in parallel to the gate of N-channel FET Q4, forming a release path for the fast shutdown of N-channel FET Q4. The cathode of diode D3 and the other end of resistor R13 are both connected to resistor R11 and the collector of transistor Q2. The common end of resistor R11 and resistor R8 is connected to the positive terminal of a 12V power supply. The other end of resistor R8 is connected to resistor R15 and a port of the microcontroller. The emitter of transistor Q2 is connected to the power return line GND.

[0072] In the electromagnetic compatibility fan control circuit of the embodiment of the present invention, the main function of the drive module is to drive the dual-winding stator and the PWM signal to control the conduction and shutdown of two groups of switch tubes (two groups are PWM1P and PWM2P). Taking the PWM1P signal as an example, when PWM1P is at a high level, the current flows from the base of transistor Q1 to the emitter, the collector-emitter is forward-conducted, and the collector potential is zero. In this way, the gate voltage of the N-channel field effect transistor Q3 will also be aligned to a low level. Because the turn-on condition cannot be met, the state of the two groups of switch tubes is turned off at this time; when PWM1P is at a low level, the base and emitter of transistor Q1 are forward-cut off, and there is no conduction between the collector and the emitter. The gate voltage of the N-channel field effect transistor Q3 is determined by the voltage divider of resistor R7:

[0073] U G =[R7 / (R7+R 12 +R 10 )]×12V;

[0074] Among them, U G is the gate voltage of N-channel field effect transistor Q3; U GS is the gate-source voltage of N-channel field effect transistor Q3; U GSthIt is the gate-source turn-on voltage of N-channel field effect transistor Q3.

[0075] At this time U GS >U GSth , the drain and source of the N-channel field effect transistor Q3 are turned on, and the winding L1 is energized.

[0076] Diode D2 and resistor R12 form the FET shutdown release circuit, enabling rapid shutdown of N-channel FET Q3. Capacitor C19 absorbs the impact of the winding back EMF on the FET. The operating principle of a pair of switching transistors driven by a PWM2P signal is similar. A microcontroller outputs a PWM signal to control the operation of the two switching transistors, achieving alternating conduction of the dual windings.

[0077] like Figure 4 As shown, the microcontroller and its peripheral circuits are equipped with a pin header P1, filter capacitor C23, and filter capacitor C2. The positive and negative terminals of pin header P1 are connected to the two ends of the 5V power supply, and a pair of filter capacitors C23 and C24 are connected in parallel at both ends to stabilize the amplitude.

[0078] like Figure 5 As shown, the frequency output circuit includes: current limiting resistors R16 and R17, transistor Q5, pull-up resistor R18, filter capacitors C21 and C22, and a 0Ω resistor R21 that isolates the negative electrode GND of the power supply and the negative return line DGND of the digital circuit. The collector of transistor Q5 is respectively connected to the pull-up resistor R18 and the current-limiting resistor R16, the emitter of transistor Q5 is connected to the negative electrode return line DGND of the digital circuit, the base of transistor Q5 is connected to one end of the current-limiting resistor R17, the other end of the current-limiting resistor R17 is connected to the frequency signal output, one end of the current-limiting resistor R16 is connected to the filter capacitor C21, the other end of the current-limiting resistor R16 is connected to the filter capacitor C22, one end of the resistor R21 is connected to the negative electrode GND of the isolated power supply, the other end of the resistor R21 is connected to the negative electrode return line DGND of the digital circuit, one end of the resistor R22 is connected to the resistor R21, the filter capacitor C21 and the negative electrode return line DGND of the digital circuit, and the other end of the resistor R22 is connected to the current-limiting resistor R16 and the negative electrode GND of the isolated power supply.

[0079] The frequency signal output (PWMOUT) is connected to the base of transistor Q5 via current-limiting resistor R17 in high and low-level configurations. The emitter of transistor Q5 is connected to the negative digital circuit return line, DGND. The collector of transistor Q5 is connected to pull-up resistor R18 and current-limiting resistor R16, respectively. When the frequency signal is high, the collector outputs a low level; otherwise, it outputs a high level. Filter capacitors C21 and C22 are connected across current-limiting resistor R16 to stabilize the output signal waveform. A 0Ω resistor R21 is connected between the negative power supply return line, GND, and the negative digital circuit return line, DGND, to provide isolation.

[0080] like Figure 6 As shown, the voltage signal acquisition circuit is connected to the microcontroller and includes a voltage divider resistor R19, an analog resistor R20, and filter capacitors C25 and C26. The voltage signal acquisition circuit is connected to port 20 (P1.1 / PWM6) of the STC8H1K2 microcontroller. The voltage divider resistor R19 and the analog resistor R20 are connected in series between the positive VCC power supply and the negative GND. The voltage divider of the analog resistor R20 is monitored by the microcontroller. When its amplitude exceeds a set limit, the microcontroller can be controlled to stop outputting control signals, thereby protecting the drive circuit. Capacitors C25 and C26 primarily filter the collected voltage signal.

[0081] like Figure 7 As shown, the Hall signal acquisition circuit includes: Hall element H1 (model can be CS3175), pull-up resistor R4, current limiting resistor R5, filter capacitor C18 and digital circuit negative return line DGND. The Hall signal acquisition circuit is connected to port 15 (P3.2 / INT0) of the microcontroller. Hall element H1 includes an input terminal (VCC), a ground terminal (GND) and an output terminal (OUT). The input terminal of Hall element H1 is connected to the positive pole of the 5V power supply, and the output terminal of Hall element H1 is connected to the 5V power supply through pull-up resistor R4. At the same time, the output terminal of Hall element H1 is connected to port 15 (P3.2 / INT0) of the microcontroller through current limiting resistor R5 and transmits the Hall signal to the microcontroller. The ground terminal of Hall element H1 is connected to the digital circuit negative return line DGND, and filter capacitor C18 is connected to the current limiting resistor R5 and the digital circuit negative return line DGND.

[0082] like Figure 8 As shown, the decoupling circuit includes capacitors C16 and C17. Capacitors C16 and C17 are connected in parallel between the VCC and GND (positive and negative poles of the 5V power supply) of the microcontroller to ensure the stability of the power supply amplitude of the microcontroller.

[0083] The power supply circuit of the electromagnetically compatible fan control circuit of the present invention provides a stable voltage to the other modules at all levels. Therefore, the operating current of the power supply circuit is higher than that of other circuit modules, making it more susceptible to electromagnetic interference. Compared to the power supply circuit, the driver circuit is directly connected to the windings, which not only has the same high current characteristics but also radiates interference more easily. The microcontroller and its peripheral circuits are mostly signal processing lines with low current and high frequency characteristics. Therefore, the footprint of the power supply and power return lines on the circuit board needs to be minimized.

[0084] The power line and power return line of the circuit board are as follows Figure 9 As shown. Figure 9 It can be seen that the loop of the power line and the power return line is shortened as much as possible. Figure 9 This diagram shows the superimposed routing of the power line and power return lines, which are placed on different circuit layers. Both the power line and the power return lines are high-current, low-frequency traces, making them more susceptible to strong common-mode interference. Therefore, the area of ​​the loop envelope they form should be as small as possible. This minimizes the interference of the high current in the current mirror loop on sensitive components, facilitating sensitivity and radiation testing of the circuit board.

[0085] To summarize, first, the circuits for each module are arranged in zones. Common-mode and differential-mode capacitors directly connected to the power lines and return lines are placed near the inputs to filter out interference generated when the circuit board interacts with the outside world. Capacitors filtering the main switching transistors in the driver circuit are placed near them to minimize interference radiated from direct connections to the windings. Therefore, the wiring structure implemented in this invention is designed as a multilayer structure.

[0086] The multi-layer structure of the wiring structure includes: a top circuit layer, a bottom circuit layer, a middle circuit layer 1 and a middle circuit layer 2, wherein the power supply circuit is set on the top circuit layer, the drive circuit is set on the bottom circuit layer, the power line is set on the middle circuit layer 1, and the power return line is set on the middle circuit layer 2.

[0087] like Figure 10 As shown, in the top circuit layer, common-mode capacitors C1, C2, C3, C4, C5, and C6 are all arranged around the power inlet to filter out interference generated when the circuit board interacts with the outside world.

[0088] like Figure 11 As shown, in the bottom circuit layer, capacitors C19 and C20 are both arranged adjacent to the N-channel FET Q3 and N-channel FET Q4 to filter out as much interference as possible from radiation in the case of direct winding connection.

[0089] Specifically, the middle two circuit layers are as follows Figure 12 As shown, the middle 1 circuit layer is as follows Figure 13 As shown, the middle two wiring layers are used as much as possible to route the power lines of each level, while the middle one wiring layer is used as much as possible to route the return lines of each level. Intentionally separating the power lines and power return lines into different layers and wrapping them in the middle signal layer helps reduce interference radiation.

[0090] The wiring structure of the embodiment of the present invention takes into account the electromagnetic compatibility performance of the fan, increases the application occasions of the fan, takes into account the EMC performance of the fan, has reference significance for subsequent plate making, and is conducive to the subsequent development of high EMC performance fans.

[0091] The various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences from other embodiments. In particular, the method embodiments described later are relatively simple to describe because they correspond to the system. For relevant parts, refer to the description of the system embodiments.

[0092] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A wiring structure suitable for an electromagnetic compatibility fan control circuit, characterized in that: The electromagnetic compatibility fan control circuit includes: A power supply circuit, used for providing a voltage with a stable amplitude to the electromagnetic compatibility fan control circuit; The drive circuit is used to drive the dual-winding stator and drive two sets of PWM signals to control the on and off of the switch tube; The microcontroller and its peripheral circuits are used to receive and process the Hall signal and the power supply voltage signal, and after internal software logic operations, output the two sets of PWM signals for controlling the drive circuit and the frequency signal that can reflect the fan speed; The microcontroller and its peripheral circuits include: a microcontroller, a decoupling circuit, a Hall signal acquisition circuit, a frequency output circuit, and a voltage signal acquisition circuit. The voltage signal acquisition circuit, the Hall signal acquisition circuit, and the decoupling circuit are all connected to the ports of the microcontroller in a one-to-one correspondence. The decoupling circuit is used to stabilize the voltage amplitude of the microcontroller; The Hall signal acquisition circuit is used to acquire the Hall signal and transmit the Hall signal to the microcontroller; The frequency output circuit is used to measure the real-time rotation speed of the fan; The voltage signal acquisition circuit is used to protect the driving circuit by controlling the microcontroller to stop outputting the control signal; The wiring structure includes: a top wiring layer, a bottom wiring layer, a middle wiring layer 1 and a middle wiring layer 2, wherein the power supply circuit is arranged on the top wiring layer, the drive circuit is arranged on the bottom wiring layer, the power line is arranged on the middle wiring layer 1, and the power return line is arranged on the middle wiring layer 2.

2. The wiring structure for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The power supply circuit includes: common mode capacitor C1, common mode capacitor C2, differential mode capacitor C3, differential mode capacitor C4, differential mode capacitor C5, differential mode capacitor C6, diode D1, tantalum electrolytic capacitor C7, filter capacitor C8, filter capacitor C9, resistor R1, resistor R2, three-terminal integrated voltage regulator U1, three-terminal integrated voltage regulator U2, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, resistor R3; Both ends of the common mode capacitor C1, the common mode capacitor C2, the differential mode capacitor C3, the differential mode capacitor C4, the differential mode capacitor C5 and the differential mode capacitor C6 are connected to the positive and negative poles of the power supply; One end of the diode D1 is connected to the positive electrode of the power supply, and the other end of the diode D1 is the positive electrode of the VCC power supply and is connected to the positive electrode of the tantalum electrolytic capacitor C7; The negative electrode of the tantalum electrolytic capacitor C7 is connected to the negative electrode return line of the power supply, and the filter capacitor C8 and the filter capacitor C9 are connected in parallel at both ends of the tantalum electrolytic capacitor C7; The resistor R1 is connected in parallel with the resistor R2, and one end of the resistor R1 is connected to the tantalum electrolytic capacitor C7, and the other end of the resistor R1 is connected to the input end of the three-terminal integrated voltage regulator U1; Capacitor C10 and capacitor C11 are connected in parallel between the input terminal and the ground terminal of the three-terminal integrated voltage regulator U1; The input end of the three-terminal integrated voltage regulator U2 is connected to the output end of the three-terminal integrated voltage regulator U1, capacitor C12 and capacitor C13 are connected in parallel between the input end and the ground end of the three-terminal integrated voltage regulator U2, the output end of the three-terminal integrated voltage regulator U2 is the positive pole of the power supply, both ends of capacitor C14 and capacitor C15 are connected to the positive and negative poles of the power supply, and resistor R3 is connected in series between the positive and negative poles of the power supply.

3. The wiring structure suitable for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The driving circuit includes: Winding L1, winding L2, capacitor C19, capacitor C20, transistor Q1, transistor Q2, N-channel field effect transistor Q3, N-channel field effect transistor Q4, diode D2, diode D3, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, and resistor R15; One end of the winding L1 is connected to the common terminal VCC, the other end of the winding L1 is connected to the capacitor C19 and the drain of the N-channel field-effect transistor Q3, the capacitor C19 is connected in parallel between the drain and source of the N-channel field-effect transistor Q3, the resistor R7 is connected in parallel between the gate and source of the N-channel field-effect transistor Q3, the diode D2 and the resistor R12 are connected in parallel to the gate of the N-channel field-effect transistor Q3, the cathode of the diode D2 and the other end of the resistor R12 are both connected to the resistor R10 and the collector of the transistor Q1, the common end of the resistor R10 and the resistor R6 is connected to the positive electrode of the 12V power supply, the other end of the resistor R6 is connected to the resistor R14 and the port of the microcontroller, and the emitter of the transistor Q1 is connected to the power return line GND; One end of the winding L2 is connected to the common terminal VCC, and the other end of the winding L2 is connected to the capacitor C20 and the drain of the N-channel field-effect transistor Q4. The capacitor C20 is connected in parallel between the drain and source of the N-channel field-effect transistor Q4. The resistor R9 is connected in parallel between the gate and source of the N-channel field-effect transistor Q4. The diode D3 and the resistor R13 are connected in parallel to the gate of the N-channel field-effect transistor Q4. The cathode of the diode D3 and the other end of the resistor R13 are both connected to the resistor R11 and the collector of the transistor Q2. The common end of the resistor R11 and the resistor R8 is connected to the positive electrode of the 12V power supply. The other end of the resistor R8 is connected to the resistor R15 and the port of the microcontroller. The emitter of the transistor Q2 is connected to the power return line GND.

4. The wiring structure for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The voltage signal acquisition circuit is connected to the microcontroller, and the voltage signal acquisition circuit includes: a voltage divider resistor R19, an analog resistor R20, a filter capacitor C25 and a filter capacitor C26; The voltage-dividing resistor R19 and the analog resistor R20 are both connected in series between the positive pole of the VCC power supply and the negative pole of the power return line GND. One end of the analog resistor R20 is connected to the voltage-dividing resistor R19, and the other end of the analog resistor R20 is respectively connected to one end of the filter capacitor C25 and one end of the filter capacitor C26. One end of the voltage-dividing resistor R19 is connected to the VCC power supply, and the other end of the voltage-dividing resistor R19 is respectively connected to the analog resistor R20, one end of the filter capacitor C25 and one end of the filter capacitor C26. The voltage-dividing resistor R19 and the analog resistor R20 are both connected in parallel between the port of the microcontroller and the negative pole of GND.

5. The wiring structure suitable for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The frequency output circuit includes: Current limiting resistor R16, current limiting resistor R17, transistor Q5, pull-up resistor R18, filter capacitor C21, filter capacitor C22, isolated power supply negative electrode GND, digital circuit negative electrode return line DGND, resistor R21 and resistor R22; The collector of transistor Q5 is respectively connected to the pull-up resistor R18 and the current-limiting resistor R16, the emitter of transistor Q5 is connected to the negative electrode return line DGND of the digital circuit, the base of transistor Q5 is connected to one end of the current-limiting resistor R17, the other end of the current-limiting resistor R17 is connected to the frequency signal output, one end of the current-limiting resistor R16 is connected to the filter capacitor C21, the other end of the current-limiting resistor R16 is connected to the filter capacitor C22, one end of the resistor R21 is connected to the negative electrode GND of the isolated power supply, the other end of the resistor R21 is connected to the negative electrode return line DGND of the digital circuit, one end of the resistor R22 is connected to the resistor R21, the filter capacitor C21 and the negative electrode return line DGND of the digital circuit, and the other end of the resistor R22 is connected to the current-limiting resistor R16 and the negative electrode GND of the isolated power supply.

6. The wiring structure for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The decoupling circuit includes: a capacitor C16 and a capacitor C17, and the capacitor C16 and the capacitor C17 are both connected in parallel between the VCC and GND of the microcontroller.

7. The wiring structure for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: The Hall signal acquisition circuit includes: a Hall element H1, a pull-up resistor R4, a current limiting resistor R5, a filter capacitor C18 and a digital circuit negative electrode return line DGND; The Hall signal acquisition circuit is connected to the microcontroller; The input end of the Hall element H1 is connected to the positive electrode of the 5V power supply, the output end of the Hall element H1 is connected to the 5V power supply through the pull-up resistor R4, the output end of the Hall element H1 is connected to the microcontroller through the current limiting resistor R5, the ground end of the Hall element H1 is connected to the negative return line DGND of the digital circuit, and the filter capacitor C18 is connected to the current limiting resistor R5 and the negative return line DGND of the digital circuit.

8. The wiring structure for an electromagnetic compatibility fan control circuit according to claim 1, characterized in that: In the top circuit layer, common-mode capacitor C1, common-mode capacitor C2, differential-mode capacitor C3, differential-mode capacitor C4, differential-mode capacitor C5 and differential-mode capacitor C6 are all arranged around the power inlet; in the bottom circuit layer, capacitor C19 and capacitor C20 are both arranged adjacent to N-channel field-effect transistor Q3 and N-channel field-effect transistor Q4.

Images