A centralized time slot allocation method and device for SPN small particles

Abstract

The present invention relates to the field of network communication technology, and provides a centralized time slot allocation method and device for SPN small particles. The method includes analyzing the inbound delay sequence and outbound delay sequence of the network element based on the time slot delay information; calculating the delay difference array based on the inbound delay sequence and the outbound delay sequence, and analyzing the change rule of the inbound and outbound delay subscripts of the same value delay difference based on the delay difference array; finding the equal value interval of the target delay difference in the delay difference array, and searching for the unoccupied inbound and outbound delay combination of the target delay difference based on the equal value interval and the change rule of the inbound and outbound delay subscripts of the same value delay difference, and performing time slot allocation for the network element. The present invention reduces the complexity of this embodiment, shortens the execution time, reduces resource occupation, and improves execution efficiency by analyzing the change rule of the inbound and outbound delay subscripts of the same value delay difference and the change rule of the inbound and outbound delay subscripts.

Description

Technical Field

[0001] The present invention relates to the field of network communication technology, and in particular to a centralized time slot allocation method and device for SPN small particles. Background Art

[0002] SPN (Slicing Packet Network) small-granularity latency processing technology and small-granularity time slot control scheduling technology have become key technologies for meeting and adapting to deterministic low-latency scenarios with rigid isolation, particularly in real-world scenarios such as power grid relay protection. In centralized control deployments, the forwarding plane reports network transmission latency information to the control plane to characterize and manage service quality.

[0003] When adapting to low-latency services, SPN small-granule technology, due to the independent transmission and reception of its pipelines, requires the control system to configure only the transmission time slot, while the reception configuration adapts to the transmission direction. This results in inconsistent two-way latency for services within the pipeline after unidirectional optimization, resulting in two-way delay variation. The two-way delay variation of the network significantly impacts differential protection, and therefore directly determines the quality of services carried by the power distribution network. Grid-specific resource allocation and scheduling technology, targeting the two-way delay variation of SPN small-granule services, is a key technology for power grid service carrying and operation and maintenance.

[0004] When evaluating service latency, network operations and maintenance typically consider end-to-end service latency as one of the service quality assessment criteria. Service latency is composed of the network elements (NEs) and link transmission delays along the service route. Because NE latency is significantly smaller than link transmission delay, NE latency is typically ignored. Alternatively, slot allocation is performed sequentially based on the service bandwidth requirements, with fixed slot delays assigned. This results in a static allocation of slots. However, for SPN (Special Power Grid) (SPN) services, based on the principle of two-way delay difference, the two-way delay difference of a link is zero. If static allocation is used to assign fixed values ​​to NE slot delays, the end-to-end two-way delay difference may exceed the upper limit of relay protection requirements, failing to meet these requirements. This could trigger relay protection failures and impact service quality. Therefore, the key to evaluating SPN services lies in the end-to-end two-way delay difference between NEs. The aforementioned static allocation method no longer meets the requirements of the power industry. Therefore, how to schedule the bidirectional time slot resources of network elements and avoid the problem of excessive bidirectional delay difference has become a key link in the application of SPN small particle technology in the power grid.

[0005] In view of this, overcoming the defects of the prior art is an urgent problem to be solved in this technical field. Summary of the Invention

[0006] The technical problem to be solved by the present invention is that in the prior art, the static time slot allocation method cannot meet the allocation requirements of SPN small-granularity services.

[0007] The present invention adopts the following technical solutions:

[0008] In a first aspect, the present invention provides a centralized time slot allocation method for SPN small particles, comprising:

[0009] Analyze the time slot delay information reported by the forwarding plane to obtain an inbound delay sequence and an outbound delay sequence of the network element; wherein the inbound time slot delays in the inbound delay sequence and the outbound time slot delays in the outbound delay sequence are arranged in ascending order;

[0010] Calculating a delay difference array based on the inbound delay sequence and the outbound delay sequence, and analyzing the change rule of the inbound and outbound delay subscripts of the same delay difference based on the delay difference array;

[0011] Find the equivalent interval of the target delay difference in the delay difference array, and according to the equivalent interval and the change rule of the input and output delay subscripts of the delay difference with the same value, find the unoccupied input and output delay combination of the target delay difference. According to the input and output delay combination, allocate time slots to the network element to meet the end-to-end two-way delay difference requirement.

[0012] Preferably, the calculating of the delay difference array according to the inbound delay sequence and the outbound delay sequence specifically includes:

[0013] For each value of i, the i-th delay difference in the delay difference array is obtained by subtracting the Ni-th outbound delay in the outbound delay sequence from the i-th inbound delay in the inbound delay sequence; where i is an integer and i is less than N, and N is the number of corresponding time slot delays in the inbound delay sequence or the outbound delay sequence.

[0014] Preferably, finding an equal-value interval of the target delay difference in the delay difference array specifically includes:

[0015] Find the midpoint of the basic interval, compare the target delay difference with the delay difference at the midpoint, and narrow the interval according to the comparison result to obtain a narrowed interval, until the starting delay difference and the ending delay difference of the narrowed interval are finally equal to the target delay difference. The narrowed interval obtained by the final narrowing is the equivalent interval where the target delay difference is located; wherein the narrowed interval obtained by the previous narrowing is used as the basic interval for the next narrowing, and the subscript interval corresponding to the delay difference array is used as the basic interval for the first narrowing;

[0016] The narrowing of the interval according to the comparison result to obtain the narrowed interval specifically includes:

[0017] If the comparison result shows that the target delay difference is greater than the delay difference of the midpoint, the starting point of the narrowed interval obtained by narrowing the interval is the midpoint, and the end point of the narrowed interval is the end point of the basic interval;

[0018] If the comparison result shows that the target delay difference is less than the delay difference at the midpoint, the starting point of the narrowed interval is the starting point of the basic interval, and the end point of the narrowed interval is the midpoint;

[0019] If the comparison result is that the target delay difference is equal to the delay difference of the midpoint, then the midpoint is used as the reference point of the equal-value interval, and the start point and end point of the equal-value interval are expanded to both sides of the reference point.

[0020] Preferably, analyzing and obtaining a change rule of the input and output delay subscripts of the same delay difference according to the delay difference array specifically includes:

[0021] Find the median delay difference in the delay difference array, and calculate the change rule of the inbound and outbound delay subscripts in the first direction and the second direction according to the subscript centerPoint of the median delay difference;

[0022] In the first direction, the change rule of the in / out delay subscript is upperRightSlope=centerPoint÷(N-1-centerPoint);

[0023] In the second direction, the inbound and outbound delay subscript change rule is lowerLeftSlope=(N-1-centerPoint÷centerPoint; where N is the number of corresponding time slot delays in the inbound delay sequence or the outbound delay sequence.

[0024] Preferably, searching for an unoccupied input and output delay combination of the target delay difference according to the equal value interval and the change rule of the input and output delay subscripts of the equal value delay difference specifically includes:

[0025] According to the inbound time slot delay subscript and the outbound time slot delay subscript of each target delay difference in the equal value interval, determining one by one whether the inbound and outbound delay combinations corresponding to the target delay difference are occupied;

[0026] If no unoccupied input and output delay combination is found in the equal value interval, searching is performed starting from the equal value interval along the first direction and / or the second direction until an unoccupied input and output delay combination of the target delay difference is found.

[0027] Preferably, starting from the equal value interval, searching along the first direction and / or the second direction until an unoccupied input and output delay combination of the target delay difference is found specifically includes:

[0028] Determine a target area and search within the target area; if all entry and exit delay combinations within the target area are found to be occupied, perform the next search until an unoccupied entry and exit delay combination is found;

[0029] In the first search, the target area is determined based on the equal value interval. In subsequent searches, the target area of ​​the previous search is used as the reference area for the next search. The target area is determined based on the change pattern of the inbound and outbound delay subscripts of the reference area and the equal value delay difference.

[0030] or determining an equivalent range of the target delay difference according to the equivalent interval and the change rule of the inbound and outbound delay subscripts of the delay difference with the same value;

[0031] Each target delay difference in the equal value interval is used as an initial search position in turn, and the search is started from the initial search position. Each time an entry and exit delay combination is searched, it is determined whether the entry and exit delay combination is located in the equal value domain. If the entry and exit delay combination is located in the equal value domain, it is further determined whether the entry and exit delay combination is occupied. If the entry and exit delay combination is not located in the equal value domain or the entry and exit delay combination is occupied, the search is continued for the next entry and exit delay combination until an entry and exit delay combination that is located in the equal value domain and is not occupied is found.

[0032] Preferably, the searching from the initial search position specifically includes:

[0033] When searching along the first direction, the inbound time slot delay subscript m=i+1 and the outbound time slot delay subscript n=j+upperRightSlope of the current search position are calculated based on the inbound time slot delay subscript i and the outbound time slot delay subscript j of the reference position;

[0034] When searching along the second direction, the inbound time slot delay subscript m=i-1 and the outbound time slot delay subscript n=j-lowerLeftSlope of the current search position are calculated based on the inbound time slot delay subscript i and the outbound time slot delay subscript j of the reference position;

[0035] The current search position of the previous search is used as the reference position for the next search, and the initial search position is used as the reference position for the first search.

[0036] Preferably, when an unoccupied input and output delay combination for obtaining the target delay difference cannot be found, the method further includes:

[0037] The target delay difference is added to or subtracted from a preset deviation value to obtain a new target delay difference. The new target delay difference is used to find an unoccupied input and output delay combination corresponding to the new target delay difference. Time slots are allocated to the network element according to the input and output delay combination.

[0038] Preferably, allocating time slots to the network elements according to the input and output delay combinations specifically includes:

[0039] According to a first mapping relationship between an inbound time slot delay subscript and an inbound time slot number, mapping the inbound time slot delay subscript in the inbound and outbound time delay combination to obtain a corresponding inbound time slot number;

[0040] Mapping the outbound time slot delay subscripts in the inbound and outbound delay combinations to obtain corresponding outbound time slot numbers according to a second mapping relationship between outbound time slot delay subscripts and outbound time slot numbers; wherein the first mapping relationship and the second mapping relationship are recorded when obtaining the inbound delay sequence and the outbound delay sequence of the corresponding network element;

[0041] The inbound time slot number and the outbound time slot number are allocated to a network element.

[0042] In a second aspect, the present invention further provides a centralized time slot allocation device for SPN small particles, which is used to implement the centralized time slot allocation method for SPN small particles described in the first aspect, and the device includes:

[0043] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the processor to execute the centralized time slot allocation method for SPN small particles described in the first aspect.

[0044] In a third aspect, the present invention further provides a non-volatile computer storage medium, which stores computer-executable instructions, which are executed by one or more processors to complete the centralized time slot allocation method for SPN small particles described in the first aspect.

[0045] The present invention provides a time slot allocation method that meets the allocation requirements of SPN small-granularity services while eliminating the need to construct a delay difference matrix. Instead, the method analyzes the variation patterns of the inbound and outbound delay subscripts for delay differences of the same value. This variation pattern allows the method to determine the location of a target delay difference and then locate the location of delay differences of the same value as the target delay difference, thereby narrowing the search position and finding unoccupied outbound and inbound time slot delays for allocation. Because the delay difference matrix does not need to be constructed, the algorithm complexity of this embodiment is reduced, thereby shortening the algorithm time and reducing resource usage during algorithm execution. Furthermore, the narrowing of the location through the variation patterns of the inbound and outbound delay subscripts further reduces the time required for the algorithm search process and improves the algorithm's execution efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0047] Figure 1 This is a flow chart of a first centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0048] Figure 2 Schematic diagram of a delay difference matrix provided by an embodiment of the present invention;

[0049] Figure 3 Schematic diagram of a delay difference matrix in a specific scenario provided by an embodiment of the present invention;

[0050] Figure 4 Schematic diagram of the main diagonal and sub-diagonal of a delay difference matrix provided by an embodiment of the present invention;

[0051] Figure 5 Schematic diagram of the main diagonal and sub-diagonal lines of another delay difference matrix provided by an embodiment of the present invention;

[0052] Figure 6 1 is a flow chart of a second centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0053] Figure 7 1 is a flow chart of a third centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0054] Figure 8is a schematic diagram of a first direction and a second direction provided by an embodiment of the present invention;

[0055] Figure 9 1 is a flow chart of a fourth centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0056] Figure 10 is a schematic diagram of a target area provided by an embodiment of the present invention;

[0057] Figure 11 1 is a flow chart of a fifth centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0058] Figure 12 1 is a flow chart of a sixth centralized time slot allocation method for small SPN particles provided by an embodiment of the present invention;

[0059] Figure 13 This is a schematic diagram of the architecture of a centralized time slot allocation device for SPN small particles provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0061] In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0062] Embodiment 1:

[0063] In the prior art, time slots are usually allocated sequentially according to the service bandwidth requirements, and the time slot delay is assigned a fixed value. The overall time slot allocation method is a static allocation. However, for SPN small-granularity services, based on the principle of two-way delay difference, the two-way delay difference of the link is zero. If the time slot delay of the network element is still assigned a fixed value according to the static allocation method, the end-to-end two-way delay difference requirement cannot be guaranteed. This may cause the end-to-end two-way delay difference to exceed the upper limit requirement of the relay protection, thereby triggering relay protection and affecting service quality. Therefore, the key to the evaluation lies in the size of the two-way delay difference of the end-to-end network element. The above-mentioned static allocation method can no longer meet the requirements of the power industry. In order to solve this problem, this embodiment provides a centralized time slot allocation method for SPN small particles.

[0064] In order to facilitate the understanding and explanation of the method, this embodiment also provides a second time slot allocation method. The centralized time slot allocation method for SPN small particles is obtained based on the principle of the second time slot allocation method. Therefore, in the subsequent content of this embodiment, the second time slot allocation method will be explained first, and based on the principle of the second time slot allocation method, the centralized time slot allocation method for SPN small particles will be explained.

[0065] The second time slot allocation method is as follows Figure 1 As shown, specifically including:

[0066] In step 201, based on the time slot delay information reported by the forwarding plane, the inbound delay sequence inputSlotArray[n]={inA1, inA2,..., inAn} and the outbound delay sequence outputSlotArray[n]={outA1, outA2,..., outAn} of the corresponding network element are analyzed and sorted, and the mapping relationship Map between the time slot number and the sorted delay array is recorded. The inbound time slot delay in the inbound delay sequence and the outbound time slot delay in the outbound delay sequence are arranged in an ascending manner. In this method, the outbound delay sequence and the inbound delay sequence are expressed in the form of an array. In actual use, they can also be expressed in various forms such as a list, a set of ordered numbers, etc.

[0067] The time slot delay information includes the delay value generated by pairing the delay of the single network element input time slot number 0 with all output time slots, as well as the time interval between adjacent input time slots, that is, the fixed offset of the delay of adjacent time slots, so that an input time slot delay graph and an output time slot delay graph can be generated based on the time slot delay information, an outbound delay sequence can be obtained based on the outbound time slot delay graph, and an input delay sequence can be obtained based on the input time slot delay graph.

[0068] In step 202, a network element delay difference matrix is ​​constructed based on the inbound delay sequence and the outbound delay sequence. Specifically, the first delay inA1 of inputSlotArray[n] is subtracted from the last delay outAn of outputSlotArray[n], i.e., inputSlotArray[0]-outputSlotArray[n-1], to obtain an inbound and outbound delay difference div11. Then, the second-to-last delay outAn-1 of outputSlotArray[n] is subtracted from inA1 to obtain div12, i.e., inputSlotArray[0]-outputSlotArray[n-2]. This is deduced by analogy until the first delay outA1 of outputSlotArray[n] is obtained to obtain div1n. In this way, n numbers {div11, div12, ..., div1n} are obtained. Then, the second number inA2 of inputSlotArray[n] is subjected to the same difference operation, so that n groups of n inbound and outbound delay differences are obtained, i.e., the network element delay difference matrix is ​​obtained as shown below. Figure 2 As shown. The algorithm time complexity required for this step is O(N 2 ).

[0069] In step 203, the upper limit of the end-to-end two-way delay difference is recorded as tP2P. The upper limit of the two-way delay difference is obtained by technical personnel in this field based on the delay difference requirements and empirical analysis. The number of end-to-end network elements is neNum. The target delay difference upper limit of a single network element is calculated by taking the average value: tNeMax = tP2P ÷ neNum. The target delay difference is determined based on the target delay difference upper limit. For example, any time slot delay difference that is less than or equal to the target delay difference upper limit is selected in the delay difference matrix as the target delay difference. The target delay difference is also expressed as tNe as its alternative in subsequent embodiments.

[0070] Starting from the upper right corner of the matrix and looking from the upper right corner to the lower left corner, the matrix is ​​approximately a binary search tree. Therefore, starting from the upper right corner, compare the network element target delay difference tNe with the matrix value slotDiffMatrix[i][j] to find a value close to tNe, where i is the matrix row number and j is the matrix column number.

[0071] If tNe > slotDiffMatrix[i][j], it means that the target value is in the lower right half of the matrix (the right subtree of the binary search tree). Then, the column corresponding to the position of slotDiffMatrix[i][j] for comparison is shifted one column to the right, and its column index value j = j++. If tNe < slotDiffMatrix[i][j], it means that the target value is in the upper left half of the matrix (the left subtree of the binary search tree). Then, the row corresponding to the position of slotDiffMatrix[i][j] for comparison is shifted one row up, and its row index value i = i--. Search in this way until finding the matrix element whose absolute value is closest to the target value and is not occupied. Then, through the mapping Map of the row and column i, j of this element, the corresponding outgoing time slot number and incoming time slot number can be found, which are the time slot numbers to be allocated to this network element.

[0072] Based on the delay difference matrix constructed in the above time slot allocation method, perform eigenanalysis on the delay difference matrix to Figure 3 Taking the small-scale delay difference matrix shown as an example, the following characteristics of this delay difference matrix can be obtained:

[0073] When constructing the delay difference matrix, the elements in the first row are obtained by subtracting the values of the delays of each outgoing time slot from the minimum value of the delays of the incoming time slots respectively. The elements in the second row are obtained by subtracting the values of the delays of each outgoing time slot from the second smallest value of the delays of the incoming time slots respectively, and so on.

[0074] Assume that the minimum value of the delays of the incoming time slots is DelayInMin_1, the second smallest value of the delays of the incoming time slots is DelayInMin_2, and the delay range of the outgoing time slots is [DelayOutMin_1, DelayOutMax_1]. Then, the value range of the first row is [DelayInMin_1 - DelayOutMax_1, DelayInMin_1 - DelayOutMin_1], the value range of the second row is [DelayInMin_2 - DelayOutMax_1, DelayInMin_2 - DelayOutMin_1], and so on. The value range of the third row can be obtained as [DelayInMin_3 - DelayOutMax_1, DelayInMin_3 - DelayOutMin_1], and the value range of the k-th row can be obtained as [DelayInMin_k - DelayOutMax_1, DelayInMin_k - DelayOutMin_1].

[0075] The above value range exhibits equal offsets across rows, representing the fixed delay offset between adjacent time slots. Using the line from the upper left corner to the lower right corner of the matrix as the main diagonal and the line from the upper right corner to the lower left corner as the secondary diagonal, it can be seen that the element values ​​between different rows of the matrix are arranged in a stepped area along the secondary diagonal.

[0076] Due to the characteristics of the inbound and outbound delay map, the delay offset interval is a constant value. When the number of time slots is constant, the difference between the maximum and minimum inbound and outbound delays is also approximately a constant value.

[0077] For ease of calculation, integers are used as the precision of the delay difference matrix. The number of time slots is N. The delay difference between the maximum and minimum values ​​in each row of the delay difference matrix is ​​△, and the delay difference between elements in the same column between rows is the delay map offset. Therefore, if the delay difference matrix contains submatrices with multiple consecutive rows of elements arranged in a staircase pattern, then on average, submatrix blocks consisting of N / △ time slot delays are identical.

[0078] The dimension of such a submatrix s×t is: all combinations of rounding up (N / △) and rounding down (N / △). Such submatrices with the same element value are called "same value domains", such as Figure 3 Each 5×5 submatrix surrounded by a border in is a homogeneous domain. From the above analysis, we can see that the delay difference matrix is ​​distributed in a step-like manner with homogeneous domains as units. The matrix range that combines domains with the same element values ​​is called "isogeneous domain", such as Figure 3 In the figure, the delay difference -68 corresponds to four sub-matrices, also called homology domains, which are distributed from the lower left corner to the upper right corner. These four homology domains form an equal value domain.

[0079] In summary, the delay difference matrix is ​​a matrix with equal value domains as units, and the equal value domains are roughly parallel to the secondary diagonal, such as Figure 4 As shown in , the main diagonal is a solid line from the upper left corner to the lower right corner of the matrix, and the secondary diagonal is a dotted line from the upper right corner to the lower left corner of the matrix. However, in actual situations, in order to more accurately express the distribution law of the equal value range, the secondary diagonal is not necessarily a straight line, but a broken line formed by the position of the median delay difference on the main diagonal and the lines connecting the lower left corner and the lower right corner of the matrix, as shown in Figure 5 As shown in Figure 2, the delay difference matrix is ​​divided into two parts along the main diagonal (the line connecting the upper left and lower right corners of the delay difference matrix): the lower left part and the upper right part. Due to the matrix construction process, the element values ​​in the lower left and upper right parts are approximately symmetric. When i = j, the main diagonal formed by slotDiffMatrix[i][j] contains the permutations of most time slots, and the lower left and upper right parts contain all permutations of inbound and outbound time slots.

[0080] It should be noted here that Figure 3 、 Figure 4 This is only a schematic diagram of the delay difference matrix and does not represent the delay difference matrix in actual use. In actual situations, the scale of the delay difference matrix is ​​usually larger, such as a matrix size of 480×480.

[0081] This embodiment constructs a two-way delay difference matrix based on the characteristics of the delay data in the inbound and outbound delay graphs by using a reverse-order subtraction method to serve as the target range for optimal time slots. It also utilizes a binary search tree to improve search efficiency, transforming the complex time slot optimization problem into a mathematical one, providing a fundamental solution to the optimal time slot objective.

[0082] The general complexity of searching for items that meet the target requirements in an N×N matrix is ​​O(N²). This implementation first utilizes the characteristics of the input and output time slot delays to construct a matrix that increases from left to right and top to bottom. Secondly, by searching the matrix from the upper right corner to the lower left, the matrix can be approximated as a binary search tree. The complexity of finding a number in a binary search tree is O(log²N), significantly reducing the complexity of the search compared to searching item by item.

[0083] The advantage of this algorithm is that it accurately finds the desired delay variability combination. However, actual testing found that the combined time complexity of constructing and searching the delay variability matrix is ​​O(N² + log²N), and the process of optimizing time slots for each network element in the routing process consumes a significant amount of time. This is especially true when service delivery fails, requiring recalculation, which is even more time-consuming.

[0084] In order to further optimize the algorithm, based on the above characteristics of the delay difference matrix, this embodiment provides a centralized time slot allocation method for SPN small particles, such as Figure 6 As shown, the method includes:

[0085] In step 301, based on the time slot delay information reported by the forwarding plane, an inbound delay sequence and an outbound delay sequence of the corresponding network element are analyzed and obtained; wherein the inbound time slot delays in the inbound time delay sequence and the outbound time slot delays in the outbound time delay array are arranged in an ascending manner.

[0086] The input delay sequence is the above-mentioned inputSlotArray[n], and the output delay sequence is the above-mentioned outputSlotArray[n].

[0087] In step 302, a delay difference array is calculated based on the inbound delay sequence and the outbound delay sequence; and based on the delay difference array, a variation rule of inbound and outbound delay subscripts with the same delay difference is analyzed to obtain.

[0088] It should be noted here that the delay difference array should be distinguished from the above-mentioned delay difference matrix. The delay difference array is equivalent to the main diagonal in the delay difference matrix, wherein the i-th delay difference in the delay difference array is obtained by subtracting the Ni-th outbound time slot delay in the outbound time delay sequence from the i-th inbound time slot delay in the inbound time delay sequence; the i is an integer, and i is less than N, and the N is the number of corresponding time slot delays in the inbound time delay sequence or the outbound time delay sequence. In actual use, the number of inbound time slot delays is usually the same as the number of outbound time slot delays, that is, if the inbound time delay sequence contains N inbound time slot delays, the outbound delay sequence should also contain N outbound time slot delays.

[0089] Since the delay difference matrix is ​​obtained by subtracting the corresponding inbound time slot delay and outbound time slot delay combinations in the inbound delay sequence and the outbound delay sequence, the delay difference array is equivalent to the main diagonal of the delay difference matrix, and the delay difference array can cover the vast majority of delay differences in the delay difference matrix. The combination of the inbound time slot delay and the outbound time slot delay is also referred to as the inbound and outbound delay combination. The change pattern of the inbound and outbound delay subscripts of the same delay difference is the distribution pattern of the inbound and outbound delay combinations with the same delay difference in the delay difference matrix.

[0090] like Figure 3 As shown, the distribution law of the input and output delay combinations with the same delay difference is equivalent to the delay difference matrix, that is, the distribution law of the equal-value domain. The equal-value domain and its distribution law have been described in the above embodiment and will not be repeated here.

[0091] In step 303, an equal-value interval of the target delay difference is found in the delay difference array, and based on the equal-value interval and the change rule of the input and output delay subscripts of the same-value delay difference, an unoccupied input and output delay combination of the target delay difference is found. Based on the input and output delay combination, time slots are allocated to the network element to meet the end-to-end two-way delay difference requirement.

[0092] Among them, this embodiment also provides an optional implementation method for determining the target delay difference of each network element in the end-to-end process, specifically: the target delay difference of the network element is determined based on the end-to-end two-way delay difference requirement, specifically including: dividing the end-to-end two-way delay difference requirement by the number of network elements between the end-to-end, obtaining the target delay difference upper limit tNeMax = tP2P ÷ neNum of each network element, and then selecting any delay difference less than or equal to the target delay difference upper limit in the delay difference array as the target delay difference tNe. The target delay difference upper limit of the network element can also be calculated using a weight strategy, or an extreme method (e.g., the target delay difference upper limit of two network elements in the route is set to tP2P ÷ 2, and the delay difference of other network elements is set to 0).

[0093] The equal value interval is an interval in which all delay differences in the delay difference array are target delay differences. In the above delay difference matrix, it is represented by a line segment in the main diagonal, and the delay differences at the position of this line segment are all the target delay differences.

[0094] The inbound and outbound delay combination is the inbound time slot delay and the outbound time slot delay corresponding to the delay difference. When the time slot corresponding to any one of the inbound time slot delay and the outbound time slot delay is occupied, the inbound and outbound delay combination is occupied.

[0095] In this embodiment, there is no need to construct the delay difference matrix. Instead, the inbound and outbound delay index variation patterns for delay differences of the same value are analyzed. This variation pattern allows, after determining the location of a target delay difference, to locate the location of delay differences of the same value as the target delay difference, thereby narrowing the search location and finding unoccupied outbound and inbound time slot delays for allocation. Because there is no need to construct a delay difference matrix, the algorithm complexity of this embodiment is reduced, thereby shortening the algorithm execution time and reducing resource usage during algorithm execution. Furthermore, by narrowing the location based on the inbound and outbound delay index variation patterns, the algorithm search process is further reduced, thereby improving algorithm execution efficiency.

[0096] Due to the symmetry of the delay difference matrix, the values ​​on the main diagonal of the matrix contain all possible delay differences in all matrices. Based on this feature, this embodiment also provides the following optional implementation methods for the portion of the delay difference array calculated in the above embodiment, specifically including:

[0097] For each value of i, subtract the Ni-th outbound delay in the outbound delay sequence from the i-th inbound delay in the inbound delay sequence to obtain the i-th delay difference in the delay difference array. Here, i is an integer less than N (i.e., the value range of i is [0, N-1]), and N is the number of corresponding time slot delays in the inbound or outbound delay sequence. The algorithmic complexity of this step is O(N).

[0098] Similarly, based on the characteristics of the delay difference matrix, it can be seen that the equal-value domain of each delay difference is basically distributed in a stepped manner in the direction of the secondary diagonal. Among them, the equal-value domain where the median delay difference is located has the largest number of steps, and its entry and exit delay subscript change law is relatively easy to analyze, and can almost represent the change law of the equal-value domain of all delay differences. Based on this principle, this embodiment also provides the following preferred implementation method, that is, according to the delay difference array, the entry and exit delay subscript change law of the same value delay difference is analyzed, specifically including:

[0099] A median delay difference is found in the delay difference array, and a subscript change rule of the inbound and outbound delays in the first direction and the second direction is calculated according to the subscript centerPoint of the median delay difference.

[0100] In the first direction, the change rule of the in / out delay subscript is upperRightSlope=centerPoint÷(N-1-centerPoint).

[0101] In the second direction, the change rule of the in / out delay subscript is lowerLeftSlope=(N-1-centerPoint÷centerPoint.

[0102] Among them, the median delay difference is the value obtained by dividing the sum of the first delay difference with subscript 0 in the delay difference array and the second delay difference with subscript N-1 in the delay difference array by 2, that is, when the delay difference array is slotDiffArry[N-1], the median delay difference midSlotDiff=(slotDiffArry[0]+slotDiffArry[N-1]) / 2.

[0103] The delay difference array can cover most delay differences. When the median delay difference is in the delay difference array, the subscript centerPoint in the delay difference array can be obtained by continuously narrowing the range using the binary method. If the narrowing results in the existence of multiple median delay differences, that is, the narrowing results in an equal-value interval of the median delay difference, the center position of the equal-value interval is used as the median delay difference position, and the subscript of the median delay difference position is used in the calculation. The process of finding the median delay difference is based on the same concept as that of finding the target delay difference in subsequent embodiments, and will not be repeated here. The complexity of the algorithm is O(2×log2N). When the median delay difference is not in the delay difference array, the interval closest to the median delay difference can be obtained by binary narrowing, that is, the starting point of the interval is the value in the delay difference array that is smaller than and closest to the median delay difference, and the end point of the interval is the value in the delay difference array that is larger than and closest to the median delay difference. The center position of the interval is used as the median delay difference position, and the subscript of the median delay difference position is used in the calculation.

[0104] Since the subscript of each delay difference in the delay difference array is the same as the subscript of its corresponding inbound time slot delay and outbound time slot delay, the subscript centerPoint of the median delay difference can identify the location of the median delay difference. The location of the median delay difference is equivalent to the center position of the delay difference matrix. The line between the center position and the lower left corner of the delay difference matrix (i.e., the second direction), and the line between the center position and the upper right corner of the delay difference matrix (i.e., the first direction), are the sub-diagonal lines. The equal value domain of the median delay difference is distributed in a step-like manner along the sub-diagonal lines. The distribution law of the equal value domain of the median delay difference can represent the distribution law of the equal value domain of all delay differences in the delay difference matrix. That is, starting from any delay difference position in the delay difference array, draw a line parallel to the first direction in the first direction, and the equal value domain of the delay difference is distributed in a step-like manner along this line. Therefore, the search range can be narrowed according to the change rule of the in / out delay subscripts and the position of the target delay difference in the delay difference array.

[0105] After obtaining the variation rule of the in / out delay subscripts, the corresponding equal value domain can be obtained through the corresponding target delay difference, and the in / out time slots can be searched in the equal value domain.

[0106] Since all delay differences in the delay difference matrix exist on the main diagonal, and the main diagonal exists in the form of a delay difference array, the corresponding target delay difference can be searched in the delay difference array. This embodiment provides the following optional implementation methods, specifically including:

[0107] Find the midpoint of the basic interval, compare the target delay difference with the delay difference at the midpoint, and narrow the interval according to the comparison result to obtain a narrowed interval, until the starting delay difference and the ending delay difference of the narrowed interval are finally equal to the target delay difference. The narrowed interval obtained by the final narrowing is the equivalent interval where the target delay difference is located; wherein, the narrowed interval obtained by the previous narrowing is used as the basic interval for the next narrowing, and the subscript interval corresponding to the delay difference array is used as the basic interval for the first narrowing.

[0108] The narrowing of the interval according to the comparison result to obtain the narrowed interval specifically includes:

[0109] If the comparison result is that the target delay difference is greater than the delay difference at the midpoint, the starting point of the narrowed interval obtained by narrowing the interval is the midpoint, and the end point of the narrowed interval is the end point of the basic interval.

[0110] If the comparison result is that the target delay difference is smaller than the delay difference at the midpoint, the starting point of the narrowed interval is the starting point of the basic interval, and the end point of the narrowed interval is the midpoint.

[0111] If the comparison result is that the target delay difference is equal to the delay difference of the midpoint, then the midpoint is used as the reference point of the equal-value interval, and the start point and end point of the equal-value interval are expanded to both sides of the reference point.

[0112] It should be noted here that the "previous reduction" and "next reduction" described in this embodiment refer to two adjacent reduction processes. For example, three reductions have been carried out up to a certain time. For the convenience of description, these three reductions are referred to as the first reduction, the second reduction and the third reduction in chronological order. The first reduction is the "previous reduction" of the second reduction, the second reduction is the "next reduction" of the first reduction, the second reduction is the "previous reduction" of the third reduction, and the third reduction is the "next reduction" of the second reduction.

[0113] For example, during the first reduction, using [0, N-1] as the base interval, calculate centerPoint = [(0+N-1) / 2], and determine the difference between the delay difference slotDiffArry[centerPoint] at the location of centerPoint and the target delay difference u. If slotDiffArry[centerPoint] is less than u, the equivalent interval of the target delay difference u falls within the range of (centerPoint, N-1]. The narrowed interval is (centerPoint, N-1). The second narrowing is based on the range (centerPoint, N-1) and the midpoint value is calculated again until the equivalent interval (targetSIdx, targetEIdx) of the target delay difference u is found. Conversely, if slotDiffArry[centerPoint] is greater than u, the equivalent interval of the target delay difference u falls within [0, centerPoint). The narrowed interval is [0, centerPoint). The second narrowing is based on the range [0, centerPoint) and the midpoint value is calculated again until the equivalent interval (targetSIdx, targetEIdx) of the target delay difference u is found.

[0114] After obtaining the target delay difference, the unoccupied input and output delay combinations of the target delay difference are searched according to the change rule of the input and output delay subscripts of the equal value interval and the equal value delay difference, such as Figure 7 As shown, specifically including:

[0115] In step 401, according to the inbound time slot delay subscript and the outbound time slot delay subscript of each target delay difference in the equal value interval, it is determined one by one whether the inbound and outbound delay combinations corresponding to the target delay difference are occupied.

[0116] In step 402, if no unoccupied input and output delay combination is found in the equal value interval, each target delay difference in the equal value interval is used as the initial search position in turn, and the search is performed along the first direction and / or the second direction starting from the equal value interval until an unoccupied input and output delay combination of the target delay difference is found.

[0117] like Figure 8 As shown, with the main diagonal line as the dividing line, the upper right direction of the main diagonal line is the first direction, and the lower left direction of the main diagonal line is the second direction. Figure 8 As shown by the arrows, the first direction is parallel to the sub-diagonal line located at the upper right part of the main diagonal line, and the second direction is parallel to the sub-diagonal line located at the lower left part of the main diagonal line. The first direction and the second direction can be understood as the distribution direction of the equal value domain of the corresponding delay difference. Searching along these two directions can narrow the search range and improve the search efficiency.

[0118] When no unoccupied entry and exit delay combination is found in the first direction, the search may be conducted in the second direction, or vice versa, the search may be conducted in the second direction first and then in the first direction.

[0119] The step of searching from the equal value interval along the first direction and / or the second direction until an unoccupied input and output delay combination of the target delay difference is found may be implemented in the following two ways:

[0120] The first implementation method is as Figure 9 As shown, specifically including:

[0121] In step 501, a target area is determined and a search is performed within the target area. The search can be performed by traversing all input and output delay combinations in the target area in any manner, such as by traversing in the first direction and / or the second direction according to the subscript variation rule of the same-value delay differences, or by sequentially accessing each row or column within the boundary of the target area.

[0122] In step 502, if it is found that all the entry and exit delay combinations in the target area are occupied, the next search is performed until an unoccupied entry and exit delay combination is found.

[0123] Among them, when performing the first search, the target area is determined based on the equal value interval. In subsequent searches, the target area of ​​the previous search is used as the reference area for the next search, and the target area is determined based on the change rule of the input and output delay subscripts of the reference area and the equal value delay difference.

[0124] The target area can be expressed by any boundary point of the area and the size of the target area, such as:

[0125] S={(i, j, (s, t, k)}

[0126] Where S represents the target area, (i, j represents the boundary point of the upper left corner of the target area, (s, t represents the size of the target area is s × t, and k represents whether it is the target area of ​​the first search. If it is the target area of ​​the first search, k is 1, otherwise, k is 0.

[0127] During the first search, i takes the minimum value of the inbound time slot delay subscript in the equal-value interval, j takes the minimum value of the outbound time slot delay subscript, s is the value obtained by subtracting i from the maximum value of the inbound time slot delay subscript in the equal-value interval, t is the value obtained by subtracting j from the maximum value of the outbound time slot delay subscript in the equal-value interval, and k is 1, thus forming the target area.

[0128] When searching along the first direction, k is 1, which means that the inbound time slot delay subscript of each inbound and outbound delay combination in the target area is greater than the outbound time slot delay subscript. When searching along the second direction, k is 1, which means that the outbound time slot delay subscript of each inbound and outbound delay combination in the target area is greater than the inbound time slot delay subscript.

[0129] In subsequent searches, the boundary points corresponding to the target area can be calculated based on the boundary points of the reference interval, thereby determining the target area. For example, the reference interval of a certain time is:

[0130] S0={(i0,j0),(s,t,k}

[0131] When searching along the first direction, the target area determined according to the reference area is:

[0132] S={(i0+s, j0-upperRightSlope×s, 9s, t, 0}

[0133] When searching along the second direction, the target area determined according to the reference area is:

[0134] S={(i0-s, j0+lowerLeftSlope×s), (s, t, 0}

[0135] In actual use, the values ​​obtained by j0-upperRightSlope×s and j0+lowerLeftSlope×s may not be integer values. In this case, they need to be approximated to obtain integer subscripts.

[0136] The target area can be approximately regarded as the same-value area in the delay difference matrix (in the first search, the target area can be regarded as the part of the corresponding same-value area on the upper right or lower left of the main diagonal, which part is determined by the search direction). For example, Figure 10As shown in the figure, if the target delay difference is -67, the corresponding equivalent interval is Figure 10 If the line segment between the subscript (10, 10) and the subscript (14, 14) in the main diagonal is searched along the first direction, the target area determined in the first search is Figure 10 The first target area in the second search is Figure 10 The second target area shown is analogous to the second target area. If there is a third target area in the first direction from the second target area, then when it is found that all entry and exit delay combinations in the second target area are occupied, the third target area is continued to be searched.

[0137] The second implementation method is as follows Figure 11 As shown, specifically including:

[0138] In step 601, the equivalent range of the target delay difference is determined according to the equivalent interval and the change rule of the inbound and outbound delay subscripts of the delay difference with the same value.

[0139] In step 602, each target delay difference in the equal value interval is taken as an initial search position in turn, and the search is started from the initial search position.

[0140] In step 603, each time an input and output delay combination is searched, it is determined whether the input and output delay combination is within the equal value range. If the input and output delay combination is within the equal value range, it is further determined whether the input and output delay combination is occupied. If the input and output delay combination is not within the equal value range or is occupied, the search for the next input and output delay combination is continued until an input and output delay combination that is within the equal value range and is not occupied is found.

[0141] The equivalue domain is the overall area composed of the target areas searched each time in the first implementation method. The implementation method of determining the equivalue domain of the target delay difference and the implementation method of determining the target area are based on the same concept, that is, according to the subscript change rule of the equivalue interval and the same-value delay difference, the first target area is determined, and then based on the first target area, the second target area is determined, and so on, until all target areas are determined, and the equivalue domain is composed of all target areas.

[0142] Among them, whether the input and output delay combination is located in the equal value range can be determined directly by comparing the output time slot delay subscript and the input time slot delay subscript of the input and output delay combination with the equal value range. There is no need to calculate the delay difference when searching for each input and output delay combination, thereby improving the search efficiency.

[0143] The search is started from the initial search position, such as Figure 12 As shown, specifically including:

[0144] In step 701, when searching along the first direction, the incoming slot delay subscript m=i+1 and the outgoing slot delay subscript n=j+upperRightSlope of the current search position are calculated based on the incoming slot delay subscript i and the outgoing slot delay subscript j of the reference position.

[0145] In step 702, when searching along the second direction, the incoming slot delay subscript m=i-1 and the outgoing slot delay subscript n=j-lowerLeftSlope of the current search position are calculated based on the incoming slot delay subscript i and the outgoing slot delay subscript j of the reference position.

[0146] The current search position of the previous search is used as the reference position for the next search, and the initial search position is used as the reference position for the first search.

[0147] It should be noted here that the "previous search" and "next search" described in this embodiment refer to two adjacent search processes. For example, three searches have been performed up to a certain time. For the convenience of description, these three searches are referred to as the first search, the second search, and the third search in chronological order. The first search is the "previous search" of the second search, the second search is the "next search" of the first search, the second search is the "previous search" of the third search, and the third search is the "next search" of the second search.

[0148] In actual use, the values ​​obtained by j+upperRightSlope and j-lowerLeftSlope may not be integer values. In this case, they need to be approximately rounded to obtain integer subscripts.

[0149] Both of the above implementation methods are based on the characteristics of the delay difference matrix. The first implementation method first searches for each equivalent domain in the delay difference matrix. After the search for the part in the corresponding direction in an equivalent domain is completed, the search is performed in the next equivalent domain. The second implementation method directly determines the equivalent domain and traverses it according to the change rule of the input and output delay subscripts of the equivalent delay difference. During the traversal, multiple equivalent domains may be passed through. When traversing each input and output delay combination, it is determined whether the input and output delay combination is in the equivalent domain by judging, thereby screening the input and output delay combinations.

[0150] The algorithmic complexity of the first implementation is O(log2N), so the algorithmic complexity of this process is O(num×log2N), where num is the number of search rounds. The algorithmic complexity estimation in subsequent embodiments will still be based on the first implementation. Although the algorithmic complexity of the second implementation is increased, it is still relatively low compared to searching the entire delay difference matrix, greatly improving the search efficiency.

[0151] It should be emphasized here that the inbound time slot delay subscript, outbound time slot delay subscript, inbound time slot delay, outbound time slot delay, inbound and outbound delay combination and delay difference involved in this embodiment are all interrelated. The delay difference is calculated by the inbound time slot delay and the outbound time slot delay. The inbound and outbound delay combination is the combination of the inbound time slot delay and the outbound time slot delay. The inbound time slot delay subscript marks the position of the inbound time slot delay in the inbound delay sequence, and the outbound time slot delay subscript marks the position of the outbound time slot delay in the outbound delay sequence.

[0152] At the same time, the descriptions of equivalent intervals, target areas, reference areas, and equivalent domains involved in this embodiment are all abstract concepts, and do not absolutely refer to the inclusion of one of the above-mentioned inbound time slot delay subscripts, outbound time slot delay subscripts, inbound time slot delays, outbound time slot delays, inbound and outbound delay combinations, or delay differences within the interval or region. For ease of understanding, in terms of storage structure, an interval or region can be understood as containing one or more of the above-mentioned objects, and in terms of logical structure, other objects obtained by combining the included objects with the inbound delay sequence and the outbound delay sequence are also included in the interval or region. For example, when a computer program is running, if the object actually stored in an interval is an inbound and outbound delay combination, then logically, the inbound time slot delay subscripts, outbound time slot delay subscripts, inbound time slot delays, outbound time slot delays, and delay differences obtained from the inbound and outbound delay combinations should all be considered to be included in the interval.

[0153] For the convenience of description, in this embodiment, different included objects may be selected to describe the interval or area according to the different directions of concern when executing the corresponding steps. For example, when describing an equal-value interval, the included objects in the equal-value interval are mainly described as delay differences. When describing a target area, the included objects in the target area are mainly described as a combination of entry and exit delays. This should not be understood as an unclear determination of the technical disclosure.

[0154] In actual application scenarios, the inbound time slot delay and outbound time slot delay of each network element may not be integer values. Directly using non-integer values ​​for calculation will increase the computational difficulty and require more computing resources for the calculation process. To solve this problem, this embodiment further provides the following preferred implementation method, namely, analyzing the time slot delay information reported by the forwarding plane to obtain the inbound delay sequence and outbound delay sequence of the corresponding network element, specifically including:

[0155] According to the time slot delay information reported by the forwarding plane, an inbound time slot delay graph and an outbound time slot delay graph are generated, the inbound time slot delay graph is serialized to obtain an original inbound delay sequence, and the outbound time slot delay graph is serialized to obtain an original outbound delay sequence. The original inbound time slot delay and the original outbound time slot delay in the original inbound time delay sequence and the original outbound time slot delay are rounded down or up to obtain the inbound delay sequence and the outbound delay sequence of the corresponding network element.

[0156] Because the time slot delays are rounded when the inbound and outbound delay sequences are obtained, there may be deviations between the delay differences obtained from the inbound and outbound delay combinations and the original delay differences. In addition, when the inbound and outbound delay subscript variation pattern is obtained through the above analysis, the inbound and outbound delay subscript variation pattern of the median delay difference is used instead of the overall variation pattern. In actual use, there may be slight deviations between the inbound and outbound delay subscript variation patterns of different delay differences, resulting in an inability to find an unoccupied inbound and outbound delay combination at the target delay difference. To solve this problem, there is also the following preferred embodiment, namely, when an unoccupied inbound and outbound delay combination at the target delay difference cannot be found, the method further includes:

[0157] The target delay difference is added to or subtracted from a preset deviation value to obtain a new target delay difference. The new target delay difference is used to find an unoccupied input and output delay combination corresponding to the new target delay difference. Time slots are allocated to the network element according to the input and output delay combination.

[0158] The preset deviation value is obtained by those skilled in the art by analyzing the inbound delay sequence and the outbound delay sequence.

[0159] In actual use, there is also the following optional implementation method, that is, allocating time slots to the network element according to the input and output delay combination, specifically including:

[0160] According to a first mapping relationship between an inbound time slot delay subscript and an inbound time slot number, the inbound time slot delay subscript in the inbound and outbound time delay combination is mapped to obtain a corresponding inbound time slot number.

[0161] The outbound time slot delay subscripts in the inbound and outbound delay combinations are mapped to obtain corresponding outbound time slot numbers based on a second mapping relationship between outbound time slot delay subscripts and outbound time slot numbers; wherein the first mapping relationship and the second mapping relationship are recorded when obtaining an inbound delay sequence and an outbound delay sequence of a corresponding network element. The inbound time slot number and the outbound time slot number are assigned to the network element.

[0162] Combining the above implementation methods, it can be seen that the total algorithm complexity of the centralized time slot allocation method for SPN small particles provided by this embodiment is O(N+num×log2N). Compared with the second time slot allocation method mentioned above, this embodiment reduces the complexity of the algorithm by one dimension. The delay difference matrix constructed by this algorithm according to different delay maps has different accuracy in different ranges. After actual testing, it is approximately in the range of ± levels of us. This value is positively correlated with the movement value of the algorithm and the degree to which the delay difference matrix conforms to the model law. The number of movement steps of the algorithm is equal to the number of dimensions s×t, which reduces the complexity of the algorithm to a considerable extent and significantly improves the computational efficiency.

[0163] Example 2:

[0164] like Figure 13 FIG2 is a schematic diagram of the architecture of a centralized time slot allocation device for SPN small particles according to an embodiment of the present invention. The centralized time slot allocation device for SPN small particles according to this embodiment includes one or more processors 21 and a memory 22. Figure 13 A processor 21 is taken as an example.

[0165] The processor 21 and the memory 22 may be connected via a bus or other means. Figure 13 The bus connection is taken as an example.

[0166] The memory 22, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs and non-volatile computer executable programs, such as the centralized time slot allocation method for SPN small granules in Example 1. The processor 21 executes the centralized time slot allocation method for SPN small granules by running the non-volatile software programs and instructions stored in the memory 22.

[0167] The memory 22 may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state memory device. In some embodiments, the memory 22 may optionally include a memory remotely located relative to the processor 21, and such remote memory may be connected to the processor 21 via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0168] The program instructions / modules are stored in the memory 22 , and when executed by the one or more processors 21 , the centralized time slot allocation method for SPN small particles in the above-mentioned embodiment 1 is executed.

[0169] It is worth noting that the information interaction, execution process, etc. between the modules and units within the above-mentioned devices and systems are based on the same concept as the processing method embodiment of the present invention. The specific content can be found in the description of the method embodiment of the present invention and will not be repeated here.

[0170] Those skilled in the art will understand that all or part of the steps in the various methods of the embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium, which may include: read-only memory (ROM), random access memory (RAM), a disk or an optical disk, etc.

[0171] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A centralized time slot allocation method for SPN small particles, characterized in that: include: Analyze the time slot delay information reported by the forwarding plane to obtain an inbound delay sequence and an outbound delay sequence of the network element; wherein the inbound time slot delays in the inbound delay sequence and the outbound time slot delays in the outbound delay sequence are arranged in ascending order; Calculating a delay difference array based on the inbound delay sequence and the outbound delay sequence, and analyzing the change rule of the inbound and outbound delay subscripts of the same delay difference based on the delay difference array; Find an equal-value interval of the target delay difference in the delay difference array, find an unoccupied input and output delay combination of the target delay difference according to the equal-value interval and the change rule of the input and output delay subscripts of the delay difference with the same value, and allocate time slots to the network element according to the input and output delay combinations to meet the end-to-end two-way delay difference requirement; wherein, the i-th delay difference in the delay difference array is obtained by subtracting the Ni-th outbound time slot delay in the outbound delay sequence from the i-th inbound time slot delay in the inbound delay sequence, and N is the number of corresponding time slot delays in the inbound delay sequence or the outbound delay sequence.

2. The centralized time slot allocation method for SPN small particles according to claim 1 is characterized in that: Finding an equal value interval of the target delay difference in the delay difference array specifically includes: Find the midpoint of the basic interval, compare the target delay difference with the delay difference at the midpoint, and narrow the interval according to the comparison result to obtain a narrowed interval, until the starting delay difference and the ending delay difference of the narrowed interval are finally equal to the target delay difference. The narrowed interval obtained by the final narrowing is the equivalent interval where the target delay difference is located; wherein the narrowed interval obtained by the previous narrowing is used as the basic interval for the next narrowing, and the subscript interval corresponding to the delay difference array is used as the basic interval for the first narrowing; The narrowing of the interval according to the comparison result to obtain the narrowed interval specifically includes: If the comparison result shows that the target delay difference is greater than the delay difference of the midpoint, the starting point of the narrowed interval obtained by narrowing the interval is the midpoint, and the end point of the narrowed interval is the end point of the basic interval; If the comparison result shows that the target delay difference is less than the delay difference at the midpoint, the starting point of the narrowed interval is the starting point of the basic interval, and the end point of the narrowed interval is the midpoint; If the comparison result is that the target delay difference is equal to the delay difference of the midpoint, then the midpoint is used as the reference point of the equal-value interval, and the start point and end point of the equal-value interval are expanded to both sides of the reference point.

3. The centralized time slot allocation method for SPN small particles according to claim 1 is characterized in that: The analysis of the delay difference array to obtain a change rule of the input and output delay subscripts of the same delay difference specifically includes: Find the median delay difference in the delay difference array, and calculate the change rule of the inbound and outbound delay subscripts in the first direction and the second direction according to the subscript centerPoint of the median delay difference; In the first direction, the change rule of the in / out delay subscript ； In the second direction, the change rule of the in / out delay subscript ; Wherein, N is the number of corresponding time slot delays in the incoming delay sequence or the outgoing delay sequence.

4. The centralized time slot allocation method for SPN small particles according to claim 3 is characterized in that: The searching for an unoccupied input and output delay combination of the target delay difference according to the equal value interval and the change rule of the input and output delay subscripts of the equal value delay difference specifically includes: According to the inbound time slot delay subscript and the outbound time slot delay subscript of each target delay difference in the equal value interval, determining one by one whether the inbound and outbound delay combinations corresponding to the target delay difference are occupied; If no unoccupied input and output delay combination is found in the equal value interval, searching is performed starting from the equal value interval along the first direction and / or the second direction until an unoccupied input and output delay combination of the target delay difference is found.

5. The centralized time slot allocation method for SPN small particles according to claim 4 is characterized in that: Starting from the equal value interval, searching along the first direction and / or the second direction until an unoccupied input and output delay combination of the target delay difference is found, specifically including: Determine a target area and search within the target area; if all entry and exit delay combinations within the target area are found to be occupied, perform the next search until an unoccupied entry and exit delay combination is found; In the first search, the target area is determined based on the equal value interval. In subsequent searches, the target area of ​​the previous search is used as the reference area for the next search. The target area is determined based on the change pattern of the inbound and outbound delay subscripts of the reference area and the equal value delay difference. or determining an equivalent range of the target delay difference according to the equivalent interval and the change rule of the inbound and outbound delay subscripts of the delay difference with the same value; Each target delay difference in the equal value interval is used as an initial search position in turn, and the search is started from the initial search position. Each time an entry and exit delay combination is searched, it is determined whether the entry and exit delay combination is located in the equal value domain. If the entry and exit delay combination is located in the equal value domain, it is further determined whether the entry and exit delay combination is occupied. If the entry and exit delay combination is not located in the equal value domain or the entry and exit delay combination is occupied, the search is continued for the next entry and exit delay combination until an entry and exit delay combination that is located in the equal value domain and is not occupied is found.

6. The centralized time slot allocation method for SPN small particles according to claim 5 is characterized in that: The searching from the initial search position specifically includes: When searching along the first direction, the inbound time slot delay subscript m=i+1 and the outbound time slot delay subscript n=j+upperRightSlope of the current search position are calculated based on the inbound time slot delay subscript i and the outbound time slot delay subscript j of the reference position; When searching along the second direction, the inbound time slot delay subscript m=i-1 and the outbound time slot delay subscript n=j-lowerLeftSlope of the current search position are calculated based on the inbound time slot delay subscript i and the outbound time slot delay subscript j of the reference position; The current search position of the previous search is used as the reference position for the next search, and the initial search position is used as the reference position for the first search.

7. The centralized time slot allocation method for SPN small particles according to any one of claims 1 to 6, characterized in that: When an unoccupied input and output delay combination that can obtain the target delay difference cannot be found, the method further includes: The target delay difference is added to or subtracted from a preset deviation value to obtain a new target delay difference. The new target delay difference is used to find an unoccupied input and output delay combination corresponding to the new target delay difference. Time slots are allocated to the network element according to the input and output delay combination.

8. The centralized time slot allocation method for SPN small particles according to any one of claims 1 to 6, characterized in that: Allocating time slots to the network element according to the input and output delay combinations specifically includes: According to a first mapping relationship between an inbound time slot delay subscript and an inbound time slot number, mapping the inbound time slot delay subscript in the inbound and outbound time delay combination to obtain a corresponding inbound time slot number; Mapping the outbound time slot delay subscripts in the inbound and outbound delay combinations to obtain corresponding outbound time slot numbers according to a second mapping relationship between outbound time slot delay subscripts and outbound time slot numbers; wherein the first mapping relationship and the second mapping relationship are recorded when obtaining the inbound delay sequence and the outbound delay sequence of the corresponding network element; The inbound time slot number and the outbound time slot number are allocated to a network element.

9. A centralized time slot allocation device for SPN small particles, characterized in that: The device comprises: At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the processor to execute the centralized time slot allocation method for SPN small particles as described in any one of claims 1-8.

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