Display device with light emitting device

Abstract

A display apparatus including a light emitting device is provided. The light emitting device can include a first electrode, a light emitting layer, and a second electrode sequentially stacked on a display area of a device substrate. An upper coating layer can be disposed between the device substrate and the light emitting device. The light emitting layer, the second electrode, and the upper coating layer can extend on a bezel area of the device substrate. A moisture barrier hole penetrating the upper coating layer of the bezel area can include a first barrier side having a positive taper shape and a second barrier side having a negative taper shape. A lower passivation layer between the device substrate and the upper coating layer can include a lower penetration hole disposed between the first barrier side and the second barrier side. A reflection pattern overlapping the second barrier side can be disposed between the device substrate and the lower passivation layer. A barrier pattern can be disposed on the first barrier side of the moisture barrier hole. The barrier pattern can extend into the lower penetration hole. Accordingly, in the display apparatus, degradation of the light emitting layer due to external moisture penetration can be effectively prevented.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2021-0191748, filed on December 29, 2021, which is incorporated herein by reference as fully set forth herein. Technical Field

[0003] This disclosure relates to a display device in which a light-emitting device is disposed on a display area of ​​a device substrate. Background Technology

[0004] Generally, a display device provides an image to a user. For example, a display device may include pixel regions. Each pixel region may achieve a specific color. For example, each pixel region includes a light-emitting device. The light-emitting device may emit light that displays a specific color. For example, the light-emitting device may include a first electrode, a light-emitting layer, and a second electrode stacked in sequence.

[0005] A pixel driving circuit electrically connected to the light-emitting device can be disposed in each pixel region. The pixel driving circuit can provide a driving current to the light-emitting device corresponding to the data signal according to the gate signal. For example, the pixel driving circuit may include at least one thin-film transistor. Multiple insulating layers for independently controlling each pixel region can be stacked on the device substrate.

[0006] The light-emitting layer may be susceptible to moisture. For example, in a display device, the second electrode may cover the end portion of the light-emitting layer. The light-emitting layer can be formed by a deposition process. For example, the light-emitting layer may include a tail portion in which the thickness gradually decreases. However, in a display device, the size occupied by the second electrode can be increased by the tail portion of the light-emitting layer. Therefore, in a display device, the non-emitting area can be increased. That is, in a display device, the emitting area can be relatively reduced, and the image quality can be degraded. Summary of the Invention

[0007] Therefore, this disclosure relates to a display device that substantially avoids one or more problems caused by the limitations and disadvantages of related technologies.

[0008] One object of this disclosure is to provide a display device that can prevent the light-emitting layer from deteriorating due to external moisture without increasing the bezel area.

[0009] Another object of this disclosure is to provide a display device that can reliably prevent external moisture from penetrating through the tail portion of the light-emitting layer without reducing the display area.

[0010] Other advantages, objects, and features of this disclosure will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art upon examination of the following, or may be learned from practice of this disclosure. The objects and other advantages of this disclosure may be realized and attained by means of the structures specifically given in the written description and claims, and in the accompanying drawings.

[0011] To achieve these objectives and other advantages, and in accordance with the purposes of this disclosure, as embodied and broadly described herein, a display device including a device substrate is provided. The device substrate includes a display area and a bezel area. A reflective pattern is provided on the bezel area of ​​the device substrate. A separator is provided on the reflective pattern. The separator includes a first separation side having a negative cone shape. An upper coating layer is provided on the device substrate. The upper coating layer includes an upper through-hole having a first upper side and a second upper side. The first upper side is spaced apart from the first separation side. The second upper side overlaps with the separator. A lower passivation layer is provided between the reflective pattern and the separator. The lower passivation layer includes a lower through-hole. The lower through-hole is provided between the first upper side and the first separation side. A light-emitting device is provided on the upper coating layer of the display area. The light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially. A blocking pattern is provided on the first upper side of the upper through-hole. The blocking pattern extends into the lower through-hole. The light-emitting layer and the second electrode extend on the blocking pattern.

[0012] The end portion of the light-emitting layer can be surrounded by a blocking pattern and a second electrode.

[0013] The blocking pattern may include the same material as the first electrode of the light-emitting device.

[0014] A dam insulating layer covering the edge of the first electrode can extend over the border region of the device substrate. The end portion of the blocking pattern can be disposed between the upper coating layer and the dam insulating layer in the border region.

[0015] Thin-film transistors can be disposed between the display area of ​​the device substrate and the underlying passivation layer. The reflective pattern may include the same material as the gate electrode of the thin-film transistor.

[0016] The gate insulating layer of a thin-film transistor can extend between the device substrate and the reflective pattern.

[0017] A device buffer layer may be disposed between the device substrate and the thin-film transistor. The device buffer layer may extend between the device substrate and the reflective pattern. A connection pattern may be disposed between the device substrate and the device buffer layer. The connection pattern may include an area overlapping with the reflective pattern. A signal line may be disposed between the device buffer layer and the underlying passivation layer. The signal line may pass through a border area. The signal line may be connected to a connection pattern located outside the reflective pattern.

[0018] A light-blocking pattern can be disposed between the device substrate and the device buffer layer. The light-blocking pattern can overlap with the semiconductor pattern of the thin-film transistor. The interconnect pattern can include the same material as the light-blocking pattern.

[0019] A color filter can be disposed between a lower passivation layer and an upper coating layer. The color filter can overlap with the light-emitting device. The separator can be made of the same material as the color filter.

[0020] One side of the color filter can have a conical shape.

[0021] In another embodiment, a display device including a device substrate is provided. A light-emitting device is disposed on a display area of ​​the device substrate. The light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked sequentially. An upper coating layer is disposed between the device substrate and the light-emitting device. The upper coating layer extends over a border region of the device substrate. A first moisture-blocking hole penetrating the upper coating layer over the border region includes a first blocking side and a second blocking side. The first blocking side has a positive cone shape. The second blocking side has a negative cone shape. A first reflective pattern is disposed between the border region of the device substrate and the upper coating layer. The first reflective pattern overlaps with the second blocking side of the first moisture-blocking hole. A lower passivation layer is disposed between the first reflective pattern and the upper coating layer. The lower passivation layer includes a first lower through-hole. The first lower through-hole is disposed between the first blocking side and the second blocking side. A first blocking pattern is disposed on the first blocking side of the first moisture-blocking hole. The first blocking pattern extends into the first lower through-hole. The light-emitting layer and the second electrode extend over the first blocking side of the first moisture-blocking hole.

[0022] The first reflective pattern may be spaced apart from the first blocking side of the first moisture blocking hole.

[0023] A second moisture-blocking via may be disposed on the border region of the device substrate. The second moisture-blocking via may include a third blocking side and a fourth blocking side. The third blocking side may have a positive cone shape. The fourth blocking side may have a negative cone shape. The second moisture-blocking via may be spaced apart from the first moisture-blocking via. A second reflective pattern may be disposed between the border region of the device substrate and the upper coating layer. The second reflective pattern may be spaced apart from the first reflective pattern. The second reflective pattern may overlap with the fourth blocking side of the second moisture-blocking via. The lower passivation layer may include a second lower through-hole disposed between the third and fourth blocking sides.

[0024] The second blocking pattern can be disposed on the third blocking side of the second moisture blocking hole. The second blocking pattern can extend into the second lower penetrating hole.

[0025] The second blocking pattern may include the same material as the first blocking pattern. Attached Figure Description

[0026] The accompanying drawings, which are included to provide a further understanding of this disclosure and are incorporated in and form part of this application, illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0027] Figure 1 This is a schematic view of a display device according to an embodiment of the present disclosure;

[0028] Figure 2 This is a view showing the circuitry of a pixel region in a display device according to an embodiment of the present disclosure;

[0029] Figure 3A This is a cross-sectional view showing a pixel region in a display device according to an embodiment of the present disclosure;

[0030] Figure 3B It is along Figure 1 The view intercepted by line I-I';

[0031] Figure 4 yes Figure 3B A magnified view of region K in the image;

[0032] Figure 5A and Figures 5B to 13A and Figure 13B This is a view showing, in sequence, a method of forming a display device according to an embodiment of the present disclosure;

[0033] Figure 14 This is a view illustrating a display device according to another embodiment of the present disclosure; and

[0034] Figure 15 and Figure 16 This is a view showing, in sequence, a method of forming a display device according to another embodiment of the present disclosure. Detailed Implementation

[0035] In the following description, details relating to the above-described objectives, technical configurations, and operational effects of embodiments of this disclosure will be clearly understood through reference to the accompanying drawings illustrating some embodiments of this disclosure. Embodiments of this disclosure are provided herein to satisfactorily convey the technical spirit of this disclosure to those skilled in the art; therefore, this disclosure may be embodied in other forms and is not limited to the embodiments described below.

[0036] Furthermore, identical or very similar elements may be designated with the same reference numerals throughout the specification, and in the drawings, for convenience, the length and thickness of layers and regions may be exaggerated. It should be understood that when a first element is referred to as being "on" a second element, although the first element may be disposed on the second element to contact the second element, a third element may be inserted between the first and second elements.

[0037] Herein, terms such as “first” and “second” may be used to distinguish one element from another. However, the first element and the second element may be named arbitrarily as is convenient for those skilled in the art, without departing from the technical spirit of this disclosure.

[0038] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure. For example, elements described in the singular are intended to include multiple elements unless the context otherwise clearly indicates otherwise. Furthermore, it should be further understood in this disclosure that the terms “comprising” and “including” specify the presence of the stated features, integers, steps, operations, elements, components, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.

[0039] Moreover, unless “direct” is used, the terms “connection” and “linkage” can include two components being “connected” or “linked” through one or more other components located between the two components.

[0040] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It should be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having meanings consistent with their meanings in the relevant technical context and should not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0041] (Example)

[0042] Figure 1 This is a schematic view of a display device according to an embodiment of the present disclosure. Figure 2 This is a view showing the circuitry of a pixel region in a display device according to an embodiment of the present disclosure. Figure 3A This is a view showing a cross-section of a pixel region in a display device according to an embodiment of the present disclosure. Figure 3B It is along Figure 1 The view captured by line I-I'. Figure 4 yes Figure 3B A magnified view of region K in the image.

[0043] refer to Figures 1 to 4 The display device according to embodiments of the present disclosure may include a display panel DP, a data driver DD, a gate driver GD, a timing controller TC, and a power supply unit PU.

[0044] The display panel (DP) generates an image that is provided to the user. For example, the display panel (DP) may include multiple pixel areas (PA). The data driver (DD), gate driver (GD), timing controller (TC), and power supply unit (PU) provide signals for the operation of each pixel area (PA) via signal lines. These signal lines may include a data line (DL), a gate line (GL), and a power supply line (PL). For example, the data driver (DD) applies a data signal to each pixel area (PA) via the data line (DL), the gate driver (GD) applies a gate signal to each pixel area (PA) via the gate line (GL), and the power supply unit (PU) provides a power supply voltage to each pixel area (PA) via the power supply line (PL). The timing controller (TC) controls the data driver (DD) and the gate driver (GD). For example, the data driver (DD) receives digital video data and source timing control signals from the timing controller (TC), while the gate driver (GD) receives clock signals, reset clock signals, and start signals from the timing controller (TC).

[0045] Each pixel region PA can achieve a specific color. For example, a light-emitting device 300 can be disposed within each pixel region PA. The light-emitting device 300 can emit light displaying a specific color. For example, the light-emitting device 300 may include a first electrode 310, a light-emitting layer 320, and a second electrode 330 sequentially stacked on the device substrate 100. The device substrate 100 may include an insulating material. The device substrate 100 may include a transparent material. For example, the device substrate 100 may include glass or plastic.

[0046] The first electrode 310 may include a conductive material. The first electrode 310 may have high light transmittance. For example, the first electrode 310 may be a transparent electrode made of a transparent conductive material (e.g., ITO and IZO).

[0047] The light-emitting layer 320 can generate light with a brightness corresponding to the voltage difference between the first electrode 310 and the second electrode 330. For example, the light-emitting layer 320 may include an emissive material layer (EML) having an emissive material. The emissive material may include organic materials, inorganic materials, or a mixture of materials. For example, the display device according to embodiments of the present disclosure may be an organic light-emitting display device including an organic emissive material.

[0048] The light-emitting layer 320 may have a multilayer structure. For example, the light-emitting layer 320 may further include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Therefore, in the display device according to the embodiments of the present disclosure, the emission efficiency of the light-emitting layer 320 can be improved.

[0049] The second electrode 330 may include a conductive material. The second electrode 330 may include a material different from that of the first electrode 310. The reflectivity of the second electrode 330 may be higher than that of the first electrode 310. For example, the second electrode 330 may include metals such as aluminum (Al) and silver (Ag). Therefore, in a display device according to an embodiment of the present disclosure, light generated by the light-emitting layer 320 can pass through the first electrode 310 and the device substrate 100 and be emitted outwards.

[0050] A pixel driving circuit DC electrically connected to the light-emitting device 300 can be disposed within each pixel region PA. The operation of the light-emitting device 300 within each pixel region PA can be controlled by the pixel driving circuit DC of the corresponding pixel region PA. The pixel driving circuit DC of each pixel region PA can be electrically connected to one of the data lines DL, one of the gate lines GL, and one of the power supply voltage lines PL. For example, the pixel driving circuit DC of each pixel region PA can provide a driving current corresponding to the data signal to the light-emitting device 300 of the corresponding pixel region PA according to the gate signal. The driving current generated by the pixel driving circuit DC of each pixel region PA can be applied to the light-emitting device 300 of the corresponding pixel region PA and last for one frame. For example, the pixel driving circuit DC of each pixel region PA may include a first thin-film transistor T1, a second thin-film transistor T2, and a storage capacitor Cst.

[0051] The first thin-film transistor T1 may include a first semiconductor pattern, a first gate electrode, a first source electrode, and a first drain electrode. The second thin-film transistor T2 may have the same structure as the first thin-film transistor T1. For example, the second thin-film transistor T2 may include a second semiconductor pattern 221, a second gate electrode 223, a second source electrode 225, and a second drain electrode 227.

[0052] The first semiconductor pattern and the second semiconductor pattern 221 may include semiconductor materials. For example, the first semiconductor pattern and the second semiconductor pattern 221 may include oxide semiconductors, such as IGZO. The second semiconductor pattern 221 may include the same material as the first semiconductor pattern. For example, the second semiconductor pattern 221 may be disposed on the same layer as the first semiconductor pattern. The second semiconductor pattern 221 may be formed simultaneously with the first semiconductor pattern.

[0053] Each of the first semiconductor pattern and the second semiconductor pattern 221 may include a source region, a drain region, and a channel region. The channel region may be disposed between the source region and the drain region. The source region and the drain region may have a lower resistance than the channel region. For example, the source region and the drain region may include a conductive region formed of oxide semiconductor. The channel region may be a region formed of oxide semiconductor, which may not be conductive.

[0054] The first gate electrode and the second gate electrode 223 may comprise conductive materials. For example, the first gate electrode and the second gate electrode 223 may comprise metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second gate electrode 223 may comprise the same material as the first gate electrode. For example, the second gate electrode 223 may be disposed on the same layer as the first gate electrode. The second gate electrode 223 may be formed simultaneously with the first gate electrode.

[0055] A first gate electrode may be disposed on a first semiconductor pattern. For example, the first gate electrode may overlap with a channel region of the first semiconductor pattern. The first gate electrode may be insulated from the first semiconductor pattern. For example, the channel region of the first semiconductor pattern may have a conductivity corresponding to a voltage applied to the first gate electrode. A second gate electrode 223 may be disposed on a second semiconductor pattern 221. For example, the second gate electrode 223 may overlap with a channel region of the second semiconductor pattern 221. The second gate electrode 223 may be insulated from the second semiconductor pattern 221. The channel region of the second semiconductor pattern 221 may have a conductivity corresponding to a voltage applied to the second gate electrode 223.

[0056] The first source electrode, the first drain electrode, the second source electrode 225, and the second drain electrode 227 may comprise conductive materials. For example, the first source electrode, the first drain electrode, the second source electrode 225, and the second drain electrode 227 may comprise metals, such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The first drain electrode may comprise the same material as the first source electrode. For example, the first drain electrode may be disposed on the same layer as the first source electrode. The first drain electrode may be formed simultaneously with the first source electrode. The second drain electrode 227 may comprise the same material as the second source electrode 225. For example, the second drain electrode 227 may be disposed on the same layer as the second source electrode 225. The second drain electrode 227 may be formed simultaneously with the second source electrode 225.

[0057] The first source electrode and the first drain electrode may comprise the same material as the first gate electrode. For example, the first source electrode and the first drain electrode may be disposed on the same layer as the first gate electrode. The first source electrode and the first drain electrode may be formed simultaneously with the first gate electrode. The first source electrode and the first drain electrode may be insulated from the first gate electrode. For example, the first source electrode and the first drain electrode may be spaced apart from the first gate electrode.

[0058] The second source electrode 225 and the second drain electrode 227 may comprise the same material as the second gate electrode 223. For example, the second source electrode 225 and the second drain electrode 227 may be disposed on the same layer as the second gate electrode 223. The second source electrode 225 and the second drain electrode 227 may be formed simultaneously with the second gate electrode 223. The second source electrode 225 and the second drain electrode 227 may be insulated from the second gate electrode 223. For example, the second source electrode 225 and the second drain electrode 227 may be spaced apart from the second gate electrode 223.

[0059] A first source electrode may be electrically connected to a source region of a first semiconductor pattern. A first drain electrode may be electrically connected to a drain region of the first semiconductor pattern. A second source electrode 225 may be electrically connected to a source region of a second semiconductor pattern 221. A second drain electrode 227 may be electrically connected to a drain region of the second semiconductor pattern 221. The second source electrode 225 and the second drain electrode 227 may comprise the same material as the first source electrode and the first drain electrode. For example, the second source electrode 225 and the second drain electrode 227 may be disposed on the same layer as the first source electrode and the first drain electrode. The second source electrode 225 and the second drain electrode 227 may be formed simultaneously with the first source electrode and the first drain electrode. The first source electrode, the first drain electrode, the second source electrode 225, and the second drain electrode 227 may be spaced apart from each other.

[0060] A first thin-film transistor T1 and a second thin-film transistor T2 for each pixel region PA can be disposed between the device substrate 100 and the light-emitting device 300 of the corresponding pixel region PA. For example, at least one of the insulating layers can be disposed on the device substrate 100. Therefore, in the display device according to the embodiments of the present disclosure, unnecessary connections between the first thin-film transistor T1 and the second thin-film transistor T2 and the light-emitting device 300 of each pixel region PA can be prevented. For example, a device buffer layer 110, a gate insulating layer 120, a lower passivation layer 130, an over-coat layer 140, and a dam insulating layer 150 can be sequentially stacked on the device substrate 100.

[0061] The device buffer layer 110 may include an insulating material. For example, the device buffer layer 110 may include an inorganic insulating material, such as silicon oxide (SiO) and silicon nitride (SiN). The device buffer layer 110 may include a multilayer structure. For example, the device buffer layer 110 may have a stacked structure formed by layers made of silicon nitride (SiN) and layers made of silicon oxide (SiO).

[0062] A device buffer layer 110 may be disposed between the device substrate 100 and the first thin-film transistor T1 and the second thin-film transistor T2 of each pixel region PA. The device buffer layer 110 prevents contamination caused by the device substrate 100 during the formation of the first thin-film transistor T1 and the second thin-film transistor T2. For example, the entire surface of the device substrate 100 facing the first thin-film transistor T1 and the second thin-film transistor T2 of each pixel region PA may be covered by the device buffer layer 110. The first thin-film transistor T1 and the second thin-film transistor T2 of each pixel region PA may be disposed on the device buffer layer 110.

[0063] The gate insulating layer 120 may include an insulating material. For example, the gate insulating layer 120 may include an inorganic insulating material, such as silicon oxide (SiO) and silicon nitride (SiN). The gate insulating layer 120 may include a material having a high dielectric constant. For example, the gate insulating layer 120 may include a high-k material, such as hafnium oxide (HfO). The gate insulating layer 120 may have a multilayer structure.

[0064] A gate insulating layer 120 may be disposed on the device buffer layer 110. The gate insulating layer 120 may extend between the semiconductor pattern and the gate electrode of each of the first thin-film transistor T1 and the second thin-film transistor T2. For example, the gate electrode of each of the first thin-film transistor T1 and the second thin-film transistor T2 may be insulated from the semiconductor pattern of the corresponding thin-film transistor by the gate insulating layer 120. The gate insulating layer 120 may cover the first semiconductor pattern and the second semiconductor pattern 221 of each pixel region PA. The first gate electrode and the second gate electrode 223 of each pixel region PA may be disposed on the gate insulating layer 120.

[0065] A first source electrode, a first drain electrode, a second source electrode 225, and a second drain electrode 227 for each pixel region PA can be disposed on the gate insulating layer 120. For example, the gate insulating layer 120 of each pixel region PA may include a first source contact hole exposing the source region of the first semiconductor pattern, a first drain contact hole exposing the drain region of the first semiconductor pattern, a second source contact hole exposing the source region of the second semiconductor pattern 221, and a second drain contact hole exposing the drain region of the second semiconductor pattern 221.

[0066] The lower passivation layer 130 may include an insulating material. For example, the lower passivation layer 130 may include an inorganic insulating material, such as silicon oxide (SiO) and silicon nitride (SiN).

[0067] A lower passivation layer 130 may be disposed on the gate insulating layer 120. The lower passivation layer 130 prevents each of the first thin-film transistor T1 and the second thin-film transistor T2 from being damaged by external impact and moisture. For example, the first gate electrode, first source electrode, first drain electrode, second gate electrode 223, second source electrode 225, and second drain electrode 227 of each pixel region PA may be covered by the lower passivation layer 130. The lower passivation layer 130 may extend along the surface of each of the first thin-film transistor T1 and the second thin-film transistor T2 opposite to the device substrate 100. The lower passivation layer 130 may be in direct contact with the gate insulating layer 120 on the outside of the first thin-film transistor T1 and the second thin-film transistor T2 within each pixel region PA.

[0068] The upper coating layer 140 may include an insulating material. The upper coating layer 140 may include a material different from the lower passivation layer 130. For example, the upper coating layer 140 may include an organic insulating material.

[0069] An upper coating layer 140 may be disposed on a lower passivation layer 130. The upper coating layer 140 can eliminate thickness differences caused by the first thin-film transistor T1 and the second thin-film transistor T2 of each pixel region PA. For example, the upper surface of the upper coating layer 140 opposite to the device substrate 100 may be a flat surface. The first electrode 310, the light-emitting layer 320, and the second electrode 330 of each pixel region PA may be stacked sequentially on the upper surface of the upper coating layer 140. For example, the first electrode 310 of each pixel region PA may be electrically connected to the second thin-film transistor T2 of the corresponding pixel region PA through one of the electrode contact holes penetrating the upper coating layer 140. Therefore, in the display device according to the embodiments of the present disclosure, characteristic deviations caused by differences in the generation position of light emitted outward through the device substrate 100 can be prevented.

[0070] The dike insulation layer 150 may include an insulating material. For example, the dike insulation layer 150 may include an organic insulating material. The dike insulation layer 150 may include a material different from the upper coating layer 140.

[0071] A dam insulating layer 150 may be disposed on the upper coating layer 140. The first electrode 310 of each light-emitting device 300 may be insulated from the first electrode 310 of an adjacent light-emitting device 300 via the dam insulating layer 150. For example, the dam insulating layer 150 may cover the edge of the first electrode 310 located within each pixel region PA. Therefore, in a display device according to an embodiment of the present disclosure, the light-emitting device 300 of each pixel region PA can be independently controlled via the dam insulating layer 150. The light-emitting layer 320 and the second electrode 330 of each light-emitting device 300 may be stacked on the portion of the corresponding first electrode 310 exposed by the dam insulating layer 150. For example, the dam insulating layer 150 may define an emission region EA within each pixel region PA.

[0072] The emission region EA of each pixel region PA defined by the insulating layer 150 may not overlap with the pixel driving circuit DC of the corresponding pixel region PA. For example, the first thin-film transistor T1 and the second thin-film transistor T2 of each pixel region PA may be disposed outside the emission region EA of the corresponding pixel region PA. Therefore, in the display device according to the embodiment of the present disclosure, the light emitted from the light-emitting device 300 of each pixel region PA may not be blocked by the first thin-film transistor T1 and the second thin-film transistor T2 of the corresponding pixel region PA.

[0073] The light-emitting layer 320 of each light-emitting device 300 can be connected to the light-emitting layer 320 of adjacent light-emitting devices 300. For example, the light-emitting layer 320 of each light-emitting device 300 can extend onto the retaining layer 150. The light emitted from the light-emitting device 300 of each pixel region PA can display the same color as the light emitted from the light-emitting device 300 of the adjacent pixel region PA. For example, the light-emitting layer 320 of each pixel region PA can generate white light.

[0074] Each pixel region PA can achieve a different color than its adjacent pixel regions PA. For example, each pixel region PA may include a color filter 410 overlapping with the emission region EA of the corresponding pixel region PA. The color filter 410 can achieve a specific color using light passing through it. For example, the color filter 410 of each pixel region PA may be positioned in the path of light emitted from the light-emitting device 300 of the corresponding pixel region PA. The color filter 410 of each pixel region PA may be positioned between the device substrate 100 and the light-emitting device 300 of the corresponding pixel region PA. For example, the color filter 410 of each pixel region PA may be positioned between the device passivation layer 130 and the upper coating layer 140. The thickness difference caused by the color filter 410 of each pixel region PA can be removed by the upper coating layer 140.

[0075] The voltage applied to the second electrode 330 of each light-emitting device 300 can be the same as the voltage applied to the second electrode 330 of an adjacent light-emitting device 300. For example, the second electrode 330 of each light-emitting device 300 can be electrically connected to the second electrode 330 of an adjacent light-emitting device 300. The second electrode 330 of each light-emitting device 300 may comprise the same material as the second electrode 330 of an adjacent light-emitting device 300. For example, the second electrode 330 of each light-emitting device 300 can be formed simultaneously with the second electrode 330 of an adjacent light-emitting device 300. Therefore, in the display device according to the embodiments of the present disclosure, the process of forming the second electrode 330 of each light-emitting device 300 can be simplified.

[0076] A light-blocking pattern 250 may be disposed between the device substrate 100 and each of the first thin-film transistor T1 and the second thin-film transistor T2. For example, the light-blocking pattern 250 may be disposed between the device substrate 100 and the device buffer layer 110. The light-blocking pattern 250 may include a material capable of absorbing or reflecting light. The light-blocking pattern 250 may include a conductive material. For example, the light-blocking pattern 250 may include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W).

[0077] External light traveling in the direction of the semiconductor pattern of each of the first thin-film transistors T1 and the second thin-film transistors T2 can be blocked by the light-blocking pattern 250. For example, the light-blocking pattern 250 may include a region overlapping with the channel region of each semiconductor pattern. Therefore, in a display device according to an embodiment of the present disclosure, characteristic changes in each of the first thin-film transistors T1 and the second thin-film transistors T2 due to external light can be prevented.

[0078] The first thin-film transistor T1 of each pixel driving circuit DC can transmit a data signal to the corresponding second thin-film transistor T2 of the pixel driving circuit DC according to the gate signal. For example, the first gate electrode of each pixel driving circuit DC can be electrically connected to one of the gate lines GL, and the first source electrode of each pixel driving circuit DC can be electrically connected to one of the data lines DL. The second thin-film transistor T2 of each pixel driving circuit DC can generate a driving current corresponding to the data signal. For example, the second gate electrode 223 of each pixel driving circuit DC can be electrically connected to the first drain electrode of the corresponding pixel driving circuit DC, and the second source electrode 225 of each pixel driving circuit DC can be electrically connected to one of the power supply voltage supply lines PL. The driving current generated by the second thin-film transistor T2 of each pixel region PA can be provided to the light-emitting device 300 of the corresponding pixel region PA. For example, the first electrode 310 of each pixel region PA can be electrically connected to the second drain electrode 227 of the corresponding pixel region PA.

[0079] The gate line GL can be disposed on the same layer as the gate electrode 223 of each of the first thin-film transistor T1 and the second thin-film transistor T2. For example, the gate line GL can be disposed between the gate insulating layer 120 and the lower passivation layer 130. The gate line GL may comprise the same material as the gate electrode of each of the first thin-film transistor T1 and the second thin-film transistor T2. For example, the gate line GL can be formed simultaneously with the gate electrode of each of the first thin-film transistor T1 and the second thin-film transistor T2. The first gate electrode of each pixel region PA can be in direct contact with the corresponding gate line GL.

[0080] Data lines DL may intersect with gate lines GL. Data lines DL may be disposed on a different layer than gate lines GL. For example, data lines DL may be disposed between device substrate 100 and device buffer layer 110. Data lines DL may comprise the same material as light-blocking pattern 250. For example, data lines DL may be formed simultaneously with light-blocking pattern 250. Device buffer layer 110 and gate insulating layer 120 may include data contact holes that expose a portion of each data line DL. The first source electrode of each pixel region PA can be connected to the corresponding data line DL through one of the data contact holes.

[0081] The power supply line PL may extend parallel to the data line DL. For example, the power supply line PL may intersect with the gate line GL. The power supply line PL may be disposed on the same layer as the data line DL. For example, the power supply line PL may be disposed between the device substrate 100 and the device buffer layer 110. The power supply line PL may comprise the same material as the data line DL. For example, the power supply line PL may be formed simultaneously with the data line DL. The device buffer layer 110 and the gate insulating layer 120 may include power contact holes that expose a portion of each power supply line PL. The second source electrode 225 of each pixel region PA may be connected to the corresponding power supply line PL through one of the power contact holes.

[0082] The storage capacitor Cst of each pixel driving circuit DC can sustain the signal applied to the second gate electrode 223 of the corresponding pixel driving circuit DC for one frame. For example, the storage capacitor Cst of each pixel driving circuit DC can be electrically connected between the second gate electrode 223 and the second drain electrode 227 of the corresponding pixel driving circuit DC. The storage capacitor Cst of each pixel driving circuit DC can have a structure in which at least two capacitor electrodes 231 and 232 are stacked. For example, the storage capacitor Cst of each pixel driving circuit DC can have a stacked structure formed by the first capacitor electrode 231 and the second capacitor electrode 232. The second capacitor electrode 232 of each pixel driving circuit DC can be disposed on the first capacitor electrode 231 of the corresponding pixel driving circuit DC. The second capacitor electrode 232 of each pixel driving circuit DC can be insulated from the first capacitor electrode 231 of the corresponding pixel driving circuit DC. The storage capacitor Cst of each pixel driving circuit DC can be formed using a conductive layer disposed between the device substrate 100 and the upper coating layer 140. For example, the first capacitor electrode 231 of each pixel driving circuit DC can be disposed between the device substrate 100 and the device buffer layer 110, and the second capacitor electrode 232 of each pixel driving circuit DC can be disposed between the gate insulating layer 120 and the lower passivation layer 130.

[0083] The first capacitor electrode 231 of each pixel driving circuit DC may include the same material as the light-blocking pattern 250. For example, the first capacitor electrode 231 of each pixel driving circuit DC may include a metal, such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), or tungsten (W). The first capacitor electrode 231 of each pixel driving circuit DC may be formed simultaneously with the light-blocking pattern 250. For example, the first capacitor electrode 231 of each pixel driving circuit DC may be in direct contact with the light-blocking pattern 250 disposed within the corresponding pixel region PA.

[0084] The first capacitor electrode 231 of each pixel driving circuit DC can be electrically connected to the second drain electrode 227 of the corresponding pixel driving circuit DC. For example, the first capacitor electrode 231 of each pixel driving circuit DC can be connected to the second drain electrode 227 of the corresponding pixel driving circuit DC through the drain region of the light-blocking pattern 250 and the second semiconductor pattern 221 disposed in the corresponding pixel region PA. The drain region of the second semiconductor pattern 221 in each pixel region PA can be electrically connected to the light-blocking pattern 250 in the corresponding pixel region PA. For example, the device buffer layer 110 may include a storage contact hole disposed between the light-blocking pattern 250 and the drain region of the second semiconductor pattern 221 in each pixel region PA. The drain region of the second semiconductor pattern 221 in each pixel region PA can be connected to the light-blocking pattern 250 in the corresponding pixel region PA through one of the storage contact holes.

[0085] The second capacitor electrode 232 of each pixel driving circuit DC may include the same material as the gate electrode of the corresponding pixel driving circuit DC. For example, the second capacitor electrode 232 of each pixel driving circuit DC may include a metal, such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), or tungsten (W). The second capacitor electrode 232 of each pixel driving circuit DC may be formed simultaneously with the gate electrode of the corresponding pixel driving circuit DC.

[0086] The device substrate 100 of the display panel DP may include a display area AA and a bezel area BZ disposed outside the display area AA, wherein pixel areas PA are disposed within the display area AA. For example, a light-emitting device 300 may be disposed on an upper coating layer 140 of the display area AA. The bezel area BZ may surround the display area AA. Signal lines (e.g., DL, GL, and PL) may be connected across the bezel area BZ to the pixel driving circuit DC of each pixel area PA. For example, data lines DL, gate lines GL, and power supply lines PL electrically connected to the pixel driving circuit DC of each pixel area PA may extend on the bezel area BZ of the device substrate 100.

[0087] At least one of insulating layers (e.g., 110, 120, 130, 140, and 150) for insulating between signal lines (e.g., DL, GL, and PL) may be disposed on the border region BZ of the device substrate 100. For example, a device buffer layer 110, a gate insulating layer 120, a lower passivation layer 130, an upper coating layer 140, and a dam insulating layer 150 may extend on the border region BZ of the device substrate 100. The device buffer layer 110, the gate insulating layer 120, the lower passivation layer 130, the upper coating layer 140, and the dam insulating layer 150 may be stacked sequentially on the border region BZ of the device substrate 100.

[0088] The upper coating layer 140 may include at least one upper through-hole 140h disposed on the border region BZ of the device substrate 100. The upper through-hole 140h may penetrate the upper coating layer 140 of the border region BZ. For example, the upper through-hole 140h may include a first upper side 141s facing the display region AA and a second upper side 142s opposite to the first upper side 141s. The first upper side 141s and the second upper side 142s may have a positive tapered shape. For example, the width of the upper through-hole 140h may decrease as the distance from the device substrate 100 decreases.

[0089] At least one separating partition 420 may be disposed between the lower passivation layer 130 and the upper coating layer 140 of the border region BZ. The separating partition 420 may comprise an insulating material. For example, the separating partition 420 may comprise the same material as the color filter 410. The separating partition 420 may comprise a first separating side 421s facing the display region AA and a second separating side 422s opposite to the first separating side 421s. The first separating side 421s and the second separating side 422s may have a negative tapered shape. For example, the width of the separating partition 420 may decrease as the distance from the device substrate 100 decreases.

[0090] The separator 420 may include a region disposed within the upper through-hole 140h. For example, a first separation side 421s of the separator 420 may be disposed within the upper through-hole 140h. A second separation side 422s of the separator 420 may be disposed between the lower passivation layer 130 and the upper coating layer 140 of the border region BZ. For example, a second upper side 142s of the upper through-hole 140h may overlap with the separator 420.

[0091] The upper coating layer 140 and the separator 420 of the bezel region BZ may define at least one moisture-blocking hole BH. For example, the moisture-blocking hole BH may be disposed between a first upper side 141s of the upper penetrating hole 140h and a first separating side 421s of the separator 420. The first upper side 141s of the upper penetrating hole 140h may be defined as a first blocking side of the moisture-blocking hole BH. The first separating side 421s of the separator 420 may be defined as a second blocking side of the moisture-blocking hole BH. That is, in the display device according to the embodiments of the present disclosure, the moisture-blocking hole BH defined by the upper coating layer 140 and the separator 420 of the bezel region BZ may include a first blocking side (i.e., the first upper side 141s) having a positive cone shape and a second blocking side (i.e., the first separating side 421s) having a negative cone shape. The first blocking side of the moisture-blocking hole BH may face the display area AA. The moisture-blocking hole BH may penetrate the upper coating layer 140 of the bezel region BZ.

[0092] A reflective pattern 500 may be disposed between the gate insulating layer 120 and the lower passivation layer 130 in the border region BZ. The reflective pattern 500 may include a material with high reflectivity. For example, the reflective pattern 500 may include a metal. The reflective pattern 500 may be formed using a process for forming a pixel driving circuit DC within each pixel region PA. For example, the reflective pattern 500 may include the same material as the second gate electrode 223 of the second thin-film transistor T2 within each pixel region PA.

[0093] The reflective pattern 500 may overlap with the moisture-blocking hole BH and the partition 420. For example, a first upper side 141s and a second upper side 142s of the upper penetrating hole 140h may be provided on the reflective pattern 500. The upper penetrating hole 140h may overlap with the reflective pattern 500. The reflective pattern 500 may extend beyond the upper penetrating hole 140h and the partition 420. For example, a second separating side 422s of the partition 420 may be provided on the reflective pattern 500.

[0094] The lower passivation layer 130 may include a lower through-hole 130h overlapping with the moisture barrier hole BH. For example, the lower through-hole 130h may be disposed between a first blocking side and a second blocking side of the moisture barrier hole BH. The lower through-hole 130h may penetrate the lower passivation layer 130. For example, a portion of the reflective pattern 500 may be exposed through the lower through-hole 130h and the moisture barrier hole BH.

[0095] A blocking pattern 315 may be disposed on the first blocking side of the moisture blocking hole BH. The blocking pattern 315 may comprise a material capable of preventing external moisture penetration. The blocking pattern 315 may be formed using the same process as that used to form the light-emitting device 300. For example, the blocking pattern 315 may comprise the same material as the first electrode 310 within each pixel region PA. The blocking pattern 315 may be in direct contact with the upper coating layer 140. For example, the first blocking side of the moisture blocking hole BH may be in direct contact with the blocking pattern 315.

[0096] The blocking pattern 315 can extend into the lower penetration hole 130h. For example, the portion of the reflective pattern 500 exposed through the lower penetration hole 130h can be covered by the blocking pattern 315. The blocking pattern 315 can be in direct contact with the reflective pattern 500 located within the lower penetration hole 130h. Therefore, in the display device according to an embodiment of the present disclosure, the penetration of external moisture through the first blocking side of the moisture blocking hole BH can be prevented by the blocking pattern 315.

[0097] The light-emitting layer 320 and the second electrode 330 of each light-emitting device 300 may extend on the border region BZ of the device substrate 100. For example, the light-emitting layer 320 and the second electrode 330 may be stacked on the barrier pattern 315. The embankment insulating layer 150 of the border region BZ may include an opening 150h overlapping with the upper through-hole 140h and the separator 420. The light-emitting layer 320 and the second electrode 330 may extend into the lower through-hole 130h. The light-emitting layer 320 and the second electrode 330 may be partially separated by a first separation side 421s of the separator 420. For example, the light-emitting layer 320 may include an end portion 320e disposed within a moisture barrier hole BH. The end portion 320e of the light-emitting layer 320 may be disposed on the barrier pattern 315. The second electrode 330 may be in direct contact with the barrier pattern 315 outside the light-emitting layer 320. For example, the barrier pattern 315 and the second electrode 330 may surround the end portion 320e of the light-emitting layer 320 located within the moisture barrier hole BH. Therefore, in the display device according to the embodiments of the present disclosure, the penetration of external moisture through the light-emitting layer 320 can be prevented, regardless of the tail portion of the light-emitting layer 320. Therefore, in the display device according to the embodiments of the present disclosure, the deterioration of the light-emitting layer 320 due to external moisture can be prevented without increasing the bezel area BZ.

[0098] Furthermore, a moisture-blocking hole BH can be provided between the display area AA and the partition 420. That is, in the display device according to the embodiment of the present disclosure, the penetration of external moisture through the partition 420 can be prevented. Therefore, in the display device according to the embodiment of the present disclosure, the degree of freedom in the material of the partition 420 can be improved. Therefore, in the display device according to the embodiment of the present disclosure, the penetration of external moisture can be effectively prevented.

[0099] A connection pattern 290 may be disposed between a border region BZ of the device substrate 100 and a device buffer layer 110. The connection pattern 290 may include a conductive material. For example, the connection pattern 290 may include the same material as the light-blocking pattern 250. The connection pattern 290 may overlap with the reflective pattern 500. Signal lines (e.g., DL, GL, and PL) between the gate insulating layer 120 and the lower passivation layer 130 may pass through the border region BZ using the connection pattern 290. For example, each gate line GL disposed on the same layer as the reflective pattern 500 may pass through a moisture-blocking aperture BH using the connection pattern 290. Each gate line GL may be electrically connected to the connection pattern 290 outside the reflective pattern 500. That is, in a display device according to an embodiment of the present disclosure, each signal line (e.g., DL, GL, and PL) disposed on the same layer as the reflective pattern 500 may bypass the reflective pattern 500 using the connection pattern 290. Each gate line GL may penetrate the device buffer layer 110 and the gate insulating layer 120. Therefore, in the display device according to the embodiments of the present disclosure, external moisture that permeates through the interface between the device buffer layer 110 and the gate insulating layer 120 can be blocked by the gate line GL. Thus, in the display device according to the embodiments of the present disclosure, disconnection of signal lines (e.g., DL, GL, and PL) can be prevented, and degradation of the light-emitting layer 320 due to external moisture can be effectively prevented.

[0100] The encapsulation substrate 700 can be attached to the second electrode 330 of each light-emitting device 300 via a full-surface adhesive layer 600. For example, the full-surface adhesive layer 600 may include an adhesive material. The encapsulation substrate 700 prevents damage to the light-emitting device 300 from external moisture and impact. For example, the encapsulation substrate 700 may include a material with a specific hardness or higher. The encapsulation substrate 700 may include a material with relatively high thermal conductivity. For example, the encapsulation substrate 700 may include metals such as aluminum (Al), nickel (Ni), and iron (Fe). Therefore, in the display device according to embodiments of the present disclosure, the heat generated by the pixel driving circuit DC of each pixel region PA and the light-emitting device 300 can be dissipated through the encapsulation substrate 700. Therefore, in the display device according to embodiments of the present disclosure, the degradation of the light-emitting layer 320 within each pixel region PA can be effectively prevented.

[0101] The full-surface adhesive layer 600 and the encapsulation substrate 700 may extend on the border region BZ of the device substrate 100. For example, a moisture barrier hole BH may be filled by the full-surface adhesive layer 600. The encapsulation substrate 700 may overlap with the display region AA and the border region BZ of the device substrate 100.

[0102] Figure 5A and Figures 5B to 13A and Figure 13BThis is a view showing, in sequence, a method of forming a display device according to an embodiment of the present disclosure.

[0103] Reference Figure 3A , Figure 3B , Figure 4 , Figure 5A and Figures 5B to 13A and Figure 13B This section describes a method for forming a display device according to an embodiment of the present disclosure. First, the method for forming a display device according to an embodiment of the present disclosure may include the steps of providing a device substrate 100, the device substrate 100 including a display area AA and a border area BZ disposed outside the display area AA, wherein a pixel area PA is disposed within the display area AA; forming a light-blocking pattern 250 on the pixel area PA of the device substrate 100; forming a connection pattern 290 on the border area BZ of the device substrate 100; forming a device buffer layer 110 on the device substrate 100 in which the light-blocking pattern 250 and the connection pattern 290 are formed; and forming a device buffer layer 110 on the pixel area PA. The steps include: forming a semiconductor pattern (e.g., a second semiconductor pattern 221) on layer 110; forming a gate insulating layer 120 on a device substrate 100 in which the semiconductor pattern is formed; forming a gate electrode (e.g., a second gate electrode 223), a source electrode (e.g., a second source electrode 225), a drain electrode (e.g., a second drain electrode 227), and a second capacitor electrode 232 on the gate insulating layer 120 of the pixel region PA; forming a gate line GL on the gate insulating layer 120 of the border region BZ; and forming a reflection pattern 500 on the gate insulating layer 120 of the border region BZ. Figure 5A and Figure 5B As shown.

[0104] The light-blocking pattern 250 may be formed of a material with high reflectivity. The connection pattern 290 may be formed of a conductive material. The connection pattern 290 may be formed simultaneously with the light-blocking pattern 250. For example, the steps of forming the light-blocking pattern 250 and the connection pattern 290 may include forming a metal layer with high reflectivity on the device substrate 100, and patterning the metal layer. The connection pattern 290 may include the same material as the light-blocking pattern 250.

[0105] The gate electrode (e.g., second gate electrode 223), source electrode (e.g., second source electrode 225), drain electrode (e.g., second drain electrode 227), and second capacitor electrode 232 may comprise conductive materials. The gate line GL may comprise conductive materials. The reflective pattern 500 may comprise a material with high reflectivity. The gate line GL and reflective pattern 500 may be formed simultaneously with the gate electrode, source electrode, drain electrode, and second capacitor electrode 232. For example, the steps of forming the gate line GL, reflective pattern 500, gate electrode, source electrode, drain electrode, and second capacitor electrode 232 may include forming a metal layer with high reflectivity on the device substrate 100, and patterning the metal layer. The gate line GL may comprise the same material as the reflective pattern 500. The gate line GL and reflective pattern 500 may comprise the same material as the gate electrode, source electrode, drain electrode, and second capacitor electrode 232.

[0106] The gate line GL may be electrically connected to the connection pattern 290 outside the reflective pattern 500. For example, forming the gate line GL may include exposing the end portions of the connection pattern 290 by patterning the device buffer layer 110 and the gate insulating layer 120. The reflective pattern 500 may overlap with the central region of the connection pattern 290. The gate line GL may be spaced apart from the reflective pattern 500. For example, the gate line GL may be used to bypass the region in which the reflective pattern 500 is formed using the connection pattern 290. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, disconnection of the gate line GL due to the reflective pattern 500 can be prevented. Moreover, in the method of forming a display device according to an embodiment of the present disclosure, the gate line GL can prevent the penetration of external moisture through the interface between the device buffer layer 110 and the gate insulating layer 120.

[0107] The second semiconductor pattern 221, the second gate electrode 223, the second source electrode 225, and the second drain electrode 227 can constitute a second thin-film transistor T2, for example. A portion of the light-blocking pattern 250 can constitute a storage capacitor Cst. For example, a portion of the light-blocking pattern 250 that overlaps with the second capacitor electrode 232 can serve as a first capacitor electrode 231.

[0108] A method for forming a display device according to an embodiment of the present disclosure may include the steps of forming a lower passivation layer 130 on a device substrate 100 covering a gate line GL, a reflective pattern 500, a second thin-film transistor T2, and a storage capacitor Cst, and forming a filter material layer 400 on the lower passivation layer 130, such as... Figure 6A and Figure 6B As shown in the image.

[0109] The lower passivation layer 130 may be formed of an insulating material. For example, the lower passivation layer 130 may be formed of an inorganic insulating material, such as silicon oxide (SiO) and silicon nitride (SiN). For example, the step of forming the lower passivation layer 130 may include the step of depositing an inorganic insulating material on the device substrate 100.

[0110] The filter material layer 400 may include a material capable of achieving a specific color using light passing through it. For example, the filter material layer 400 may include a dye. The filter material layer 400 may include a photosensitive material. For example, the filter material layer 400 may be formed of a material with negative properties, wherein areas exposed by an exposure process are cured.

[0111] A method for forming a display device according to embodiments of the present disclosure may include the steps of arranging a mask pattern MA including a first opening P1 and at least one second opening P2 on a filter material layer 400, and the step of exposing a portion of the filter material layer 400 using the mask pattern MA, such as... Figure 7A and Figure 7B As shown.

[0112] The first opening P1 may overlap with the area where a color filter is formed by subsequent processes. The first opening P1 may be located within the pixel area PA. The first opening P1 may not overlap with the light-blocking pattern 250, the second thin-film transistor T2, and the storage capacitor Cst. For example, the first opening P1 may be located outside the light-blocking pattern 250, the second thin-film transistor T2, and the storage capacitor Cst.

[0113] The second opening P2 may overlap with a region in which a partition is formed by a subsequent process. For example, the second opening P2 may be provided on the border region BZ. The second opening P2 may overlap with the reflective pattern 500. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, light passing through the second opening P2 may be reflected by the reflective pattern 500 along the direction of the filter material layer 400 during the exposure process. That is, in the method of forming a display device according to an embodiment of the present disclosure, the light reflected by the reflective pattern 500 may expose the lower end of the filter material layer 400 that overlaps with the second opening P2. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, the side portion of the second region 400b exposed by the second opening P2 may be harder than the side portion of the first region 400a exposed by the first opening P1. During the exposure process, light may not be irradiated onto the third region 400c of the filter material layer 400 that overlaps with the mask pattern MA. That is, the third region 400c of the filter material layer 400 may not be exposed during the exposure process.

[0114] A method for forming a display device according to an embodiment of the present disclosure may include the steps of forming a color filter 410 and at least one separator 420 on a lower passivation layer 130, such as... Figure 8A and Figure 8B As shown.

[0115] The steps of forming the color filter 410 and the separator 420 may include removing the third region 400c of the filter material layer 400 that is not exposed by the mask pattern MA. The color filter 410 may be formed on the lower passivation layer 130 of the pixel region PA. The separator 420 may be formed on the lower passivation layer 130 of the border region BZ. For example, the color filter 410 may be formed using the first region 400a of the filter material layer 400 exposed by the first opening P1, and the separator 420 may be formed using the second region 400b of the filter material layer 400 exposed by the second opening P2. One side of the color filter 410 may be the same as one side of the first region 400a, and one side of the separator 420 may be the same as one side of the second region 400b. For example, the first separation side 421s of the separator 420 facing the display region AA and the second separation side 422s opposite to the first separation side 421s may have a negative cone shape. The first separating side 421s and the second separating side 422s of the separator 420 may have a larger tilt angle than the side of the color filter 410. The separator 420 may have the same thickness as the color filter 410.

[0116] A method for forming a display device according to an embodiment of the present disclosure may include the steps of curing the color filter 410 and the separator 420, such as... Figure 9A and Figure 9B As shown.

[0117] The gently sloping side portion of the color filter 410 can flow downwards along the direction of the lower passivation layer 130 through a curing process. For example, the side portion of the color filter 410 can have a positive cone shape through the curing process. The first separation side 421s and the second separation side 422s of the separator 420, which have steep slopes, can not flow downwards through the curing process. For example, after the curing process is completed, the first separation side 421s and the second separation side 422s of the separator 420 can maintain a negative cone shape.

[0118] A method for forming a display device according to an embodiment of the present disclosure may include the steps of forming an upper coating layer 140 including electrode contact holes and at least one upper through-hole 140h on a device substrate 100 in which color filters 410 and separators 420 are formed, and forming a lower through-hole 130h in a lower passivation layer 130, such as... Figure 10A and Figure 10B As shown.

[0119] The electrode contact hole can penetrate the upper coating layer 140 of the display area AA. For example, the electrode contact hole can partially expose the second drain electrode 227 of the second thin-film transistor T2. The upper penetration hole 140h can penetrate the upper coating layer 140 of the border area BZ. For example, the upper penetration hole 140h can overlap with the reflective pattern 500.

[0120] The upper penetrating hole 140h may have a conical shape. For example, the upper penetrating hole 140h may include a first upper side 141s facing the display area AA and a second upper side 142s opposite to the first upper side 141s. The second upper side 142s of the upper penetrating hole 140h may overlap with the partition 420. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, a moisture blocking hole BH may be defined by the first upper side 141s of the upper penetrating hole 140h and the first separating side 421s of the partition 420. For example, the first upper side 141s of the upper penetrating hole 140h may be the first blocking side of the moisture blocking hole BH, and the first separating side 421s of the partition 420 may be the second blocking side of the moisture blocking hole BH. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, the moisture blocking hole BH defined by the first upper side 141s of the upper through hole 140h and the first separation side 421s of the partition 420 may include a first blocking side (i.e., the first upper side 141s) having a positive cone shape and a second blocking side (i.e., the first separation side 421s) having a negative cone shape opposite to the first blocking side.

[0121] The lower through-hole 130h may overlap with the moisture-blocking hole BH. For example, the lower through-hole 130h may be formed between the first upper side 141s of the upper through-hole 140h and the first separation side 421s of the separator 420. The lower through-hole 130h may penetrate the lower passivation layer 130. A portion of the reflective pattern 500 disposed between the first upper side 141s of the upper through-hole 140h and the first separation side 421s of the separator 420 may be exposed by the lower through-hole 130h.

[0122] A method for forming a display device according to an embodiment of the present disclosure may include the steps of forming a first electrode 310 on an upper coating layer 140 of a pixel region PA, and forming a blocking pattern 315 on a first upper side 141s, such as... Figure 11A and Figure 11B As shown.

[0123] The first electrode 310 can be electrically connected to the second drain electrode 227 of the second thin-film transistor T2 through an electrode contact hole. The first electrode 310 may include a conductive material. The barrier pattern 315 may also include a conductive material. The barrier pattern 315 may be formed simultaneously with the first electrode 310. For example, the steps of forming the first electrode 310 and the barrier pattern 315 may include forming a conductive material layer on the device substrate 100 in which the electrode contact hole and the moisture barrier hole BH are formed, and patterning the conductive material layer.

[0124] The conductive material layer can be partially separated by a first separating side 421s of the separator 420, which is disposed within the upper through-hole 140h. For example, the first separating side 421s of the separator 420 may not be covered by the conductive material layer. The end portion of the blocking pattern 315 may be disposed within the moisture blocking hole BH. The other end portion of the blocking pattern 315 may be disposed on the upper coating layer 140 of the border region BZ.

[0125] A method for forming a display device according to an embodiment of the present disclosure may include the steps of forming a dam insulating layer 150 on a device substrate 100 in which a first electrode 310 and a blocking pattern 315 are formed, and forming a light-emitting layer 320 on the device substrate 100 in which the dam insulating layer 150 is formed, such as... Figure 12A and Figure 12B As shown in the image.

[0126] The embankment insulating layer 150 may expose a portion of the first electrode 310. The light-emitting layer 320 may contact the portion of the first electrode 310 exposed by the embankment insulating layer 150. For example, the embankment insulating layer 150 may define an emission region EA within the pixel region PA. The edge of the first electrode 310 may be covered by the embankment insulating layer 150.

[0127] The insulating layer 150 of the embankment can expose the moisture-blocking hole BH and the partition 420. For example, the light-emitting layer 320 can be partially separated by the first separation side 421s of the partition 420. The light-emitting layer 320 may include an end portion disposed within the moisture-blocking hole BH. For example, the end portion of the light-emitting layer 320 may be disposed on the blocking pattern 315. The light-emitting layer 320 can be in direct contact with the blocking pattern 315 located within the moisture-blocking hole BH. The end portion of the light-emitting layer 320 may be separated from the partition 420 through the lower penetrating hole 130h due to thickness differences.

[0128] A method for forming a display device according to embodiments of the present disclosure may include the step of forming a second electrode 330 on a light-emitting layer 320, such as... Figure 13A and Figure 13B As shown in the image.

[0129] A portion of the second electrode 330 formed on the emission region EA can together with a portion of the first electrode 310 exposed by the embankment insulating layer 150 and a portion of the light-emitting layer 320 located on that portion of the first electrode 310 to form a light-emitting device 300.

[0130] The second electrode 330 formed on the frame region BZ can be partially separated by the first separation side 421s of the separator 420. For example, the second electrode 320 may include an end portion disposed within the moisture barrier hole BH. The second electrode 330 may be formed by a material and process having better step coverage than the light-emitting layer 320. For example, the second electrode 330 may be in direct contact with the barrier pattern 315 outside the light-emitting layer 320. The end portion of the light-emitting layer 320 may be surrounded by the barrier pattern 315 and the second electrode 330. Therefore, in the method of forming a display device according to an embodiment of the present disclosure, the penetration of external moisture through the light-emitting layer 320 can be prevented.

[0131] A method for forming a display device according to embodiments of the present disclosure may include the step of attaching a package substrate 700 to a second electrode 330 using a full-surface adhesive layer 600, such as... Figure 3A and Figure 3B As shown.

[0132] The step of attaching the encapsulation substrate 700 may include forming a full-surface adhesive layer 600 on the encapsulation substrate 700. For example, a moisture barrier hole BH may be filled with the full-surface adhesive layer 600. The first separation side 421s of the partition portion 420 where the light-emitting layer 320 and the second electrode 330 are not formed may be in direct contact with the full-surface adhesive layer 600.

[0133] Therefore, the display device and the method of forming the display device according to the embodiments of the present disclosure may include the steps of forming a partition 420 having a negative conical side on the bezel region BZ using a reflective pattern 500, forming a lower penetrating hole 130h overlapping with a moisture-blocking hole BH defined by the partition 420 and the upper penetrating hole 140h of the upper coating layer 140 penetrating the bezel region BZ, and forming a blocking pattern 315 covering the first blocking side of the moisture-blocking hole BH using the process of forming the first electrode 310. Therefore, in the display device and the method of forming the display device according to the embodiments of the present disclosure, the end portion 320e of the light-emitting layer 320 may be surrounded by the blocking pattern 315 and the second electrode 330. Therefore, in the display device and the method of forming the display device according to the embodiments of the present disclosure, the deterioration of the light-emitting layer 320 due to the penetration of external moisture can be effectively prevented.

[0134] In the display device according to embodiments of the present disclosure, a plurality of moisture-blocking holes BH and a plurality of blocking patterns 315 can be formed on the bezel region BZ. Therefore, in the display device according to embodiments of the present disclosure, the penetration of external moisture through insulating layers (e.g., 110, 120, 130, 140, and 150) stacked on the bezel region BZ can be effectively prevented. Therefore, in the display device according to embodiments of the present disclosure, the degradation of image quality due to external moisture can be effectively prevented.

[0135] The display device according to an embodiment of the present disclosure is described in which a moisture-blocking hole BH is defined by a partition 420 comprising the same material as the color filter 410. However, in another embodiment of the display device according to the present disclosure, the moisture-blocking hole BH can be formed in various ways. For example, in another embodiment of the display device according to the present disclosure, a moisture-blocking hole BH comprising a first blocking side S1 having a positive cone shape and a second blocking side S2 having a negative cone shape can be formed by an upper coating layer 130 of the frame region BZ, such as... Figure 14 As shown. The reflective pattern 500 overlapping with the second blocking side S2 may be spaced apart from the first blocking side S1. For example, the lower penetrating hole 130h overlapping with the moisture blocking hole BH may expose the end portion of the reflective pattern 500.

[0136] Figure 15 and Figure 16 This is a view showing, in sequence, a method of forming a display device according to another embodiment of the present disclosure.

[0137] A method for forming a display device according to another embodiment of the present disclosure will be referred to Figures 14 to 16 The following description is provided. First, a method for forming a display device according to another embodiment of the present disclosure may include the steps of forming a reflective pattern 500 simultaneously with a gate line GL, forming a lower passivation layer 130 and a filter material layer 400 on a device substrate 100 in which the reflective pattern 500 is formed, arranging a mask pattern MA on the filter material layer 400 including an opening P3 overlapping the end portion of each reflective pattern 500, and exposing a portion of the filter material layer 400 using the mask pattern MA, as follows. Figure 15 As shown.

[0138] The filter material layer 400 may include a photosensitive material. For example, the filter material layer 400 may be formed of a material with positive properties, wherein the areas exposed by the exposure process are removed.

[0139] The reflective patterns 500 may be spaced apart from each other. Each opening P3 may overlap with one of the reflective patterns 500. For example, an end portion of each reflective pattern 500 may overlap with a mask pattern MA, and the other end of each reflective pattern 500 may overlap with one of the openings P3. Therefore, in a display device according to another embodiment of the present disclosure, only the lower end of the region of the filter material layer 400 that overlaps with each opening P3 can be exposed by light reflected by the reflective pattern 500. For example, in a display device according to another embodiment of the present disclosure, each exposed region 400d of the filter material layer 400 may have parallel sides in an exposure process implemented using a mask pattern MA.

[0140] A method for forming a display device according to another embodiment of the present disclosure may include the step of forming a moisture-blocking hole BH by removing the exposed area 400d of the filter material layer 400, such as... Figure 16 As shown.

[0141] The moisture blocking aperture BH may have the same shape as the exposed area 400d. For example, each moisture blocking aperture BH may include a first blocking side S1 with a positive cone shape and a second blocking side S2 with a negative cone shape. The first blocking side S1 of each moisture blocking aperture BH may face the display area AA. The second blocking side S2 of each moisture blocking aperture BH may be opposite to the display area AA.

[0142] A method for forming a display device according to another embodiment of the present disclosure may include the steps of removing the lower passivation layer 130 exposed by each moisture barrier hole BH, and forming a dam insulating layer 150, a barrier pattern 315, a light-emitting device 300, a full-surface adhesive layer 600, and an encapsulation substrate 700 on the device substrate 100 in which the moisture barrier holes BH are formed, such as... Figure 14 As shown. Therefore, in the display device and the method of forming the display device according to another embodiment of the present disclosure, the penetration of external moisture can be effectively prevented by utilizing each moisture-blocking hole BH without the need to form a separator. Therefore, in the display device and the method of forming the display device according to another embodiment of the present disclosure, process efficiency can be improved. That is, in the display device and the method of forming the display device according to another embodiment of the present disclosure, the degree of freedom in forming the moisture-blocking hole BH can be improved.

[0143] In a display device according to another embodiment of the present disclosure, moisture-blocking holes BH of various sizes can be formed. Therefore, the display device according to another embodiment of the present disclosure can minimize the impact of the moisture-blocking holes BH on the signal lines disposed on the bezel area BZ, and can effectively prevent the penetration of external moisture.

[0144] As a result, the display device according to embodiments of the present disclosure may include an upper coating layer disposed on a display area and a frame area of ​​a device substrate, a light-emitting device located on the upper coating layer in the display area, a moisture-blocking hole penetrating the upper coating layer in the frame area, a lower passivation layer disposed between the device substrate and the upper coating layer, and a blocking pattern disposed on a first blocking side having a positive conical shape on the moisture-blocking hole, wherein the lower passivation layer may include a lower penetrating hole overlapping the moisture-blocking hole, wherein the blocking pattern may extend within the lower penetrating hole, and the light-emitting layer and the second electrode of the light-emitting device may extend on the blocking pattern. Therefore, in the display device according to embodiments of the present disclosure, the penetration of external moisture through the upper coating layer and the light-emitting layer can be prevented without increasing the frame area. Therefore, in the display device according to embodiments of the present disclosure, the deterioration of the light-emitting layer due to external moisture can be prevented without reducing the display area.

Claims

1. A display device, comprising: A device substrate, comprising a display area and a bezel area; A reflective pattern disposed on the border region of the device substrate; A partition is disposed on the reflective pattern, the partition including a first separation side having a negative cone shape; An upper coating layer disposed on the device substrate includes an upper through hole, the upper through hole having a first upper side spaced apart from the first separation side and a second upper side overlapping the separator. A lower passivation layer is disposed between the reflective pattern and the separator, the lower passivation layer including a lower through hole disposed between the first upper side and the first separation side; A light-emitting device includes a first electrode, a light-emitting layer, and a second electrode, wherein the first electrode, the light-emitting layer, and the second electrode are stacked on top of each other and on the upper coating layer located within the display area; as well as A blocking pattern is disposed on the first upper side of the upper penetrating hole, the blocking pattern extending into the lower penetrating hole. The light-emitting layer and the second electrode extend on the blocking pattern.

2. The display device according to claim 1, wherein, The end portion of the light-emitting layer is surrounded by the blocking pattern and the second electrode.

3. The display device according to claim 1, wherein, The blocking pattern comprises the same material as the first electrode of the light-emitting device.

4. The display device according to claim 3, wherein, The display device further includes a dam insulating layer covering the edge of the first electrode, the dam insulating layer extending over the border region of the device substrate. The end portion of the blocking pattern is disposed between the upper coating layer and the embankment insulation layer in the border area.

5. The display device according to claim 1, wherein, The display device further includes a thin-film transistor disposed between the display area and the lower passivation layer on the device substrate. The reflective pattern comprises the same material as the gate electrode of the thin-film transistor.

6. The display device according to claim 5, wherein, The gate insulating layer of the thin-film transistor extends between the device substrate and the reflective pattern.

7. The display device according to claim 5, wherein, The display device further includes: A device buffer layer is disposed between the device substrate and the thin-film transistor, the device buffer layer extending between the device substrate and the reflective pattern; A connection pattern disposed between the device substrate and the device buffer layer, the connection pattern including a region overlapping the reflective pattern; and The signal line is positioned between the device buffer layer and the lower passivation layer, and the signal line passes through the border region. The signal line is connected to a connection pattern located outside the reflection pattern.

8. The display device according to claim 7, wherein, The display device further includes a light-blocking pattern disposed between the device substrate and the device buffer layer, the light-blocking pattern overlapping the semiconductor pattern of the thin-film transistor. The connecting pattern comprises the same material as the light-blocking pattern.

9. The display device according to claim 1, wherein, The display device further includes a color filter disposed between the lower passivation layer and the upper coating layer, the color filter overlapping the light-emitting device. The partition portion comprises the same material as the color filter.

10. The display device according to claim 9, wherein, One side of the color filter has a conical shape.

11. A display device, comprising: A light-emitting device includes a first electrode, a light-emitting layer, and a second electrode, wherein the first electrode, the light-emitting layer, and the second electrode are stacked on top of each other and on the display area of ​​a device substrate; An upper coating layer is disposed between the device substrate and the light-emitting device, the upper coating layer extending over the border area of ​​the device substrate; A first moisture-blocking hole penetrating the upper coating layer of the frame region, the first moisture-blocking hole including a first blocking side having a positive cone shape and a second blocking side having a negative cone shape; A first reflective pattern is disposed between the border region and the upper coating layer of the device substrate, the first reflective pattern overlapping the second blocking side of the first moisture blocking hole; A lower passivation layer is disposed between the first reflective pattern and the upper coating layer, the lower passivation layer including a first lower through hole disposed between the first blocking side and the second blocking side; and A first blocking pattern is disposed on the first blocking side of the first moisture blocking hole, and the first blocking pattern extends into the first lower penetrating hole. The light-emitting layer and the second electrode extend on the first blocking side of the first moisture-blocking hole.

12. The display device according to claim 11, wherein, The first reflective pattern is spaced apart from the first blocking side of the first moisture blocking hole.

13. The display device according to claim 11, wherein, The display device further includes: A second moisture-blocking hole is disposed on the frame region of the device substrate, the second moisture-blocking hole being spaced apart from the first moisture-blocking hole; and A second reflective pattern is disposed between the border region and the upper coating layer of the device substrate, the second reflective pattern being spaced apart from the first reflective pattern. The second moisture-blocking hole includes a third blocking side with a positive cone shape and a fourth blocking side with a negative cone shape. Wherein, the second reflective pattern overlaps with the fourth blocking side of the second moisture-blocking hole, and The lower passivation layer includes a second lower penetration hole disposed between the third blocking side and the fourth blocking side.

14. The display device according to claim 13, wherein, The display device further includes a second blocking pattern disposed on the third blocking side of the second moisture blocking hole, the second blocking pattern extending into the second lower penetrating hole.

15. The display device according to claim 14, wherein, The second blocking pattern comprises the same material as the first blocking pattern.

16. A display device, comprising: A substrate, comprising a display area and a bezel area; A reflective pattern disposed on the border region of the substrate; A partition provided on the reflective pattern; An upper coating layer disposed on the substrate, the upper coating layer including a first hole, the first hole overlapping a portion of the reflective pattern located outside the partition; A lower passivation layer is disposed between the reflective pattern and the partition, the lower passivation layer including a second hole overlapping the first hole; A blocking pattern is disposed in the second hole and extends to the end of the lower passivation layer that overlaps with the first hole; as well as A light-emitting device includes a first electrode, a light-emitting layer, and a second electrode, wherein the first electrode, the light-emitting layer, and the second electrode are stacked on top of each other and on an upper coating layer located within the display area. The partition includes a portion exposed by the first hole, and The second electrode extends over the barrier pattern and contacts the barrier pattern located at the end of the lower passivation layer.

17. The display device according to claim 16, wherein, The blocking pattern comes into contact with the reflective pattern located within the second aperture.

18. The display device according to claim 16, wherein, At least a portion of the sidewall of the partition is exposed from the blocking pattern located within the first hole.

19. The display device according to claim 16, wherein, The first hole includes a first sidewall portion that overlaps with the partition and a second sidewall portion that is offset relative to the partition.

20. The display device according to claim 19, wherein, The reflective pattern overlaps with the first sidewall portion of the first hole and is offset relative to the second sidewall portion of the first hole.

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