Efficient ghost illumination cancellation in emissive and non-emissive display panels

Abstract

The present disclosure relates to efficient ghost illumination cancellation in emissive and non-emissive display panels. Disclosed herein is a method of operating a display panel having a matrix of display elements. The method comprises the following ordered steps: (1) causing a current to flow from a power supply into an anode of a given display element and out of a cathode of the given display element to ground, wherein the current flow into the anode and out of the cathode to ground causes a parasitic capacitance associated with the anode to charge, (2) transferring charge from a storage capacitor to the parasitic capacitance associated with the cathode, and (3) stopping the current flow and then transferring charge from the parasitic capacitance associated with the anode to the storage capacitor.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular, to a technique for eliminating ghosting illumination caused by the charging and discharging of parasitic capacitances within emitting and non-emitting display panels. Background Technology

[0002] Many electronic devices, such as smartphones, smart glasses, smartwatches, tablets, laptops, monitors, and televisions, utilize display panels to display information to users. Such display panels are organized into a two-dimensional matrix of rows and columns, with the intersections representing display elements, such as areas (in the case of non-emissive displays) and pixels (in the case of emissive displays). A sample type of non-emissive display is, for example, a liquid crystal display (LCD) commonly used in televisions, while a sample type of emissive display is, for example, an organic light-emitting diode (OLED) display commonly used in smartphones.

[0003] Figure 1A An example of an LCD-based non-emissive display panel 12 incorporated into a stand-alone display 10 is shown. The non-emissive display panel 12 is formed by a two-dimensional matrix of display areas, wherein the sample display area is indicated by reference numeral 15. Each display area 15 contains a plurality of pixels, and each pixel contains at least one red sub-pixel, at least one green sub-pixel, and at least one blue sub-pixel.

[0004] The illustrated display area 15 represents each display area within the non-emissive display panel 12 and includes a liquid crystal LC 16a for modulating red, a liquid crystal LC 16b for modulating green, and a liquid crystal LC 16c for modulating blue. Liquid crystals 16a-16c are arranged on a backlight for that area, which is formed here by one or more light-emitting diodes (LEDs) 17 connected in series and / or parallel. A single area 17 can illuminate one or more liquid crystal LCs 16a, 16b, and 16c—for example, a single backlight area 17 can illuminate one or more liquid crystal LCs 16a for modulating red, one or more liquid crystal LCs 16b for modulating green, and one or more liquid crystal LCs 16c for modulating blue. Additionally or optionally, a single area 17 can illuminate one or more liquid crystal LCs modulating colors other than red, green, and blue.

[0005] exist Figure 1BThe specific layer structure forming the non-emissive display panel 12 can be seen, in which a backlight backplate 13 supports the backlight LEDs 17, and a color conversion and diffusion layer 19 is disposed on the backlight LEDs 17. Liquid crystal 16 is disposed on the color conversion and diffusion layer 19, and a display glass layer 18 is disposed on the liquid crystal 16. Note that the backlight backplate 13 and the LEDs 17 can be collectively referred to as matrix 14.

[0006] The image is generated by light emitted from LED 17, which is then converted into different red, green, and blue beams by color conversion and diffusion layer 19. These beams pass sequentially through liquid crystal 16 and exit the display glass 18. The voltage across each individual liquid crystal 16 is modulated, causing a change in the transparency of these individual liquid crystals, thereby modulating the amount of light passing through them. Different colors are displayed by operating the liquid crystal 16, which modulates the intensity of the red, green, and blue beams as they pass through. Since the light source itself is an LED 17 with a given area, rather than pixels within that given area, the display panel 12 is considered non-emissive (e.g., instead of having non-emissive pixels, it has emissive areas, each providing light to multiple pixels).

[0007] exist Figure 2A An example emitting display panel 22 incorporated into a freestanding display 20 is shown. The emitting display panel 22 is formed by a two-dimensional matrix of pixels, wherein sample pixels are indicated by reference numeral 25. Each pixel (e.g., pixel 25) includes at least one red sub-pixel, at least one green sub-pixel, and at least one blue sub-pixel. For example, pixel 25 includes a sub-pixel having a light-emitting diode (LED) 26a that produces blue light, a sub-pixel having an LED 26b that produces green light, and a sub-pixel having an LED 26c that produces red light. For example, LEDs 26a-26c may be organic light-emitting diodes (OLEDs) or micro-LEDs. Each pixel 25 may additionally or alternatively include one or more sub-pixels having a light-emitting diode that emits light having a color other than red, green, or blue.

[0008] exist Figure 2B The specific layer structure forming the emitting display panel 22 can be seen, in which the panel backplate 23 supports the LEDs 26, and the display glass 28 is disposed on the LEDs 26. One or more color conversion layers can be inserted between the panel backplate 23 and the display glass. The panel backplate 23 and the LEDs 26 can be collectively referred to as matrix 24.

[0009] An image is generated by emitting light of varying intensities using light-emitting diodes 16. Each pixel contains at least one red LED 26c, at least one green LED 26b, and at least one blue LED 26a. Each pixel can display a desired color by modulating the intensity of the light produced by its LED 26. Since the light source itself is the LED 26, which is also the source of the color produced by a given pixel, the display panel 22 is considered to be emission-type (e.g., having emitting pixels, each providing its own light).

[0010] One problem that can occur with both non-emissive and emissive displays is "ghosting." Generally, ghosting can occur when a given pixel or area is illuminated and then turned off, remaining partially illuminated for a period of time, resulting in a "ghosted" image. Ghosting can also occur when a given pixel or area is illuminated before being turned on.

[0011] Now refer to Figure 3 Describe the cause of the ghosting in more detail. Figure 3 The diagram shows a schematic block representation of matrix 14 or 24 within display panel 12 or 22. Pixels or areas are arranged in a two-dimensional matrix 14 or 24 of size M×N. It should be understood that the LEDs shown within each pixel or area can represent any useful arrangement of one or more sub-pixel LEDs or backlight LEDs. In the arrangement shown, the anode of each LED in the same row is coupled to the same anode power supply line, and the cathode of each LED in the same column is coupled to the same cathode power supply line. Each cathode power supply line is coupled to a corresponding column driver CD1, ..., CDM, and each anode power supply line is selectively coupled to voltage source 9 via corresponding switches Sw1, ..., Swn. Each anode power supply line has a corresponding parasitic capacitance Cpr1, ..., Cprn associated with it, and each cathode power supply line has a corresponding parasitic capacitance Cpc1, ..., Cpcm associated with it. Each pixel or area can be individually activated by closing the switch Sw1, ..., Swn of its corresponding anode power supply line and activating the column driver CD1, ..., CDm of its corresponding cathode power supply line.

[0012] Due to the repeated closing and opening of switches Sw1, ..., Swn, the parasitic capacitances Cpr1, ..., Cprn and Cpc1, ..., Cpcm may be charged and discharged, ultimately leading to ghosting. Two types of ghosting may occur.

[0013] When one of the switches Sw1, ..., Swn on the anode power supply line is closed and the column drivers CD1, ..., CDm are activated, charging their associated parasitic capacitances Cpr1, ..., Cprn, and then the switch is opened while the column driver remains active, "upper ghosting" may occur. This discharges the parasitic capacitance through the associated pixel or area and then to ground through the associated column driver, causing the LEDs within that pixel or area to illuminate in the process.

[0014] exist Figure 3 An example current path with ghosting can be observed, indicated by a light-colored arrow. Specifically, the discharge of parasitic capacitance Cpr1 through pixel / area [1,1], through column driver CD1, to ground can be observed.

[0015] When one of the switches Sw1, ..., Swn on the anode power supply line is closed and the column drivers CD1, ..., CDm are activated, charging their associated parasitic capacitances Cpr1, ..., Cprn, and then the switch is opened and the column driver is deactivated, "lower ghosting" may occur. As a result, the parasitic capacitances Cpr1, ..., Cprn discharge through the associated pixel or area to the associated parasitic capacitances Cpc1, ..., Cpcm on the cathode power supply line associated with the previously activated column drivers CD1, ..., CDm, causing the LEDs in that pixel or area to illuminate. The column parasitic capacitances Cpr1, ..., Cprm can also be directly charged by voltage source 9 immediately after the switches Sw1, ..., Swn decelerate, even if the row parasitic capacitances Cpr1, ..., Cprn are not charged or are only partially charged.

[0016] exist Figure 3 An example current path used for ghosting can be observed, indicated by a dark arrow. Specifically, the discharge of parasitic capacitance Cprn through pixel / region [n, 1] to parasitic capacitance Cpc1 can be observed.

[0017] Besides being undesirable in terms of display quality, ghosting is also undesirable because the current used for charging and discharging parasitic capacitance is wasted energy, as it contributes nothing to the image display. Given that display panels are typically used in battery-powered devices, this energy waste is itself undesirable, as it causes the battery to discharge faster.

[0018] Therefore, there is a desire to further develop this technology in the field of display panels in an attempt to eliminate or remove this ghosting. Summary of the Invention

[0019] This document discloses a method for operating a display panel having a matrix of display elements arranged in rows and columns. The method includes the steps of: a) activating a row driver associated with a given row and a column driver associated with a given column, such that current flows through a display element having an anode terminal coupled to an anode power supply line of the given row and a cathode terminal coupled to a cathode power supply line of the given column, wherein the current charges a parasitic capacitance associated with the anode power supply line of the given row; b) transferring charge from a storage capacitor to the cathode power supply line of the given column to pre-charge the parasitic capacitance associated with the cathode power supply line; c) deactivating the row driver associated with the given row; and d) transferring charge from the parasitic capacitance associated with the anode power supply line to a storage capacitor to prevent a first type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the column driver associated with the given column. The pre-charging of the parasitic capacitance associated with the cathode power supply line prevents a second type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the parasitic capacitance associated with the cathode power supply line.

[0020] The storage capacitor can be precharged before step b).

[0021] This document also discloses a method for operating a display panel having a matrix of display elements arranged in rows and columns. The method includes the steps of: a) activating a column driver associated with a given column and a row driver associated with a given row, such that current flows through the display elements, the display elements having an anode terminal connected to an anode power supply line of the given column and a cathode terminal connected to a cathode power supply line of the given row, wherein the current charges a parasitic capacitance associated with the anode power supply line of the given column; b) transferring charge from a storage capacitor to the cathode power supply line of the given row to precharge the parasitic capacitance associated with the cathode power supply line; c) deactivating the column driver associated with the given column; and d) transferring charge from the parasitic capacitance associated with the anode power supply line to a storage capacitor to prevent a first type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display elements to the row driver associated with the given row. The precharging of the parasitic capacitance associated with the cathode power supply line can prevent a second type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display elements to the parasitic capacitance associated with the cathode power supply line.

[0022] The storage capacitor can be precharged before step b).

[0023] This document also discloses a display comprising a matrix of display elements arranged in rows and columns, wherein each row has an associated row driver and each column has an associated column driver. Each display element has an anode terminal and a cathode terminal. Each row has an anode power supply line coupled to the row driver of that row and coupled to the anode terminals of the display elements in that row. Each column has a cathode power supply line coupled to the column driver of that row and coupled to the cathode terminals of the display elements in that column. Each anode power supply line has a switch that selectively couples the anode power supply line to a storage capacitor. Each cathode power supply line has a switch that selectively couples the cathode power supply line to a storage capacitor. The display drivers are configured to activate the row driver of a given row and activate the column driver of a given column, causing current to flow from the row driver through the anode power supply line of that row into the anode terminals of the display elements associated with the given row and given column, and out from the cathode terminals of the display elements through the cathode power supply line of that column to their column drivers, thereby charging the parasitic capacitance associated with the given row. The switch driver is configured to close a switch for the cathode power supply line of a given column, thereby transferring charge from a storage capacitor to a parasitic capacitance associated with the given column, and then open the switch for that cathode power supply line. The display driver is also configured to deactivate the row driver for a given row after closing the switch for the cathode power supply line of a given column. The switch driver is also configured to close a switch for the anode power supply line of a given row, thereby transferring charge from the parasitic capacitance associated with the given row to a storage capacitor.

[0024] A switch can be used to selectively couple the storage capacitor to a power supply voltage, and the switch driver can be further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of a given column, so as to precharge the storage capacitor before the charge is transferred from the storage capacitor to the parasitic capacitance associated with the given column.

[0025] Each display element can be an emitting pixel composed of multiple sub-pixels, making the display an emitting display.

[0026] Each display element can be an emitting area formed by multiple light-emitting diodes, which are arranged to emit light through multiple liquid crystals, making the display a non-emissive display.

[0027] This document also discloses a display comprising a matrix of display elements arranged in rows and columns, wherein each row has an associated row driver and each column has an associated column driver. Each display element has an anode terminal and a cathode terminal. Each row has a cathode power supply line coupled to the row driver of that row and coupled to the cathode terminals of the display elements in that row. Each column has an anode power supply line coupled to the column driver of that row and coupled to the anode terminals of the display elements in that column. Each cathode power supply line has a switch that selectively couples the cathode power supply line to a storage capacitor. Each anode power supply line has a switch that selectively couples the anode power supply line to a storage capacitor. The display drivers are configured to activate the column driver of a given column and activate the row driver of a given row, causing current to flow from the column driver through the anode power supply line of the column into the anode terminals of the display elements associated with the given row and the given column, and out from the cathode terminals of the display elements through the cathode power supply lines of the row to their row drivers, thereby charging the parasitic capacitance associated with the given column. The switch driver is configured to close a switch for the cathode power supply line of a given row, thereby transferring charge from a storage capacitor to a parasitic capacitance associated with the given row, and then open the switch for that cathode power supply line. The display driver is also configured to deactivate the column driver for a given column after closing the switch for the cathode power supply line of a given row. The switch driver is also configured to close a switch for the anode power supply line of a given column, thereby transferring charge from the parasitic capacitance associated with the given column to a storage capacitor.

[0028] A switch for selectively coupling the storage capacitor to the power supply voltage may be present, and the switch driver may be further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of a given row, so as to precharge the storage capacitor before the charge is transferred from the storage capacitor to the parasitic capacitance associated with the given row.

[0029] Each display element can be an emitting pixel composed of multiple sub-pixels, making the display an emitting display.

[0030] Each display element can be an emitting area composed of multiple light-emitting diodes, which are arranged to emit light through multiple liquid crystals, making the display a non-emissive display.

[0031] This document also discloses a method for operating a display panel having a matrix of display elements. The method includes the following steps: a) allowing current to flow from a power source into the anode of a given display element and out through the cathode of the given display element to ground, the current flowing into the anode and out through the cathode to ground, causing the parasitic capacitance associated with the anode to charge; b) transferring the charge from a storage capacitor to the parasitic capacitance associated with the cathode; and c) stopping the flow of current and then transferring the charge from the parasitic capacitance associated with the anode to the storage capacitor.

[0032] Steps a), b), and c) can be repeated for each display element within the matrix.

[0033] The method may also include charging the storage capacitor at least partially from a power source before the charge is transferred from the storage capacitor to the parasitic capacitance associated with the cathode.

[0034] This document also discloses a display comprising a matrix of display elements arranged in rows and columns, each display element having an anode terminal and a cathode terminal, each row having an anode power supply line coupled to the anode terminals of the display elements in that row, and each column having a cathode power supply line coupled to the cathode terminals of the display elements in that column.

[0035] A switch for each anode power supply line selectively couples the anode power supply line to the storage capacitor, and a switch for each cathode power supply line selectively couples the cathode power supply line to the storage capacitor.

[0036] The display driver is configured to activate the row driver for a given row and the column driver for a given column, and the switch driver is configured to close the switch of the cathode power supply line for a given column and then open the switch of that cathode power supply line.

[0037] The display driver is also configured to deactivate the row driver for a given row after closing the switch for the cathode power supply line for a given column, and the switch driver is also configured to close the switch for the anode power supply line for a given row.

[0038] The switch can selectively couple the storage capacitor to the power supply voltage, and the switch driver can be further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of a given column.

[0039] Each display element may include an emitting pixel consisting of multiple sub-pixels, making the display an emitting display.

[0040] Each display element may include an emitting area consisting of multiple light-emitting diodes arranged to emit light through multiple liquid crystals, making the display a non-emissive display.

[0041] This document also discloses a display comprising a matrix of display elements arranged in rows and columns, each display element having an anode terminal and a cathode terminal, each row having a cathode power supply line coupled to the cathode terminals of the display elements in that row, and each column having an anode power supply line coupled to the anode terminals of the display elements in that column.

[0042] A switch for each cathode power supply line selectively couples the cathode power supply line to a storage capacitor, a switch for each anode power supply line selectively couples the anode power supply line to a storage capacitor, a display driver is configured to activate a column driver for a given column and a row driver for a given row, and a switch driver is configured to close the switch for the cathode power supply line of a given row and then open the switch for that cathode power supply line. The display driver can also be configured to deactivate the column driver for a given column after closing the switch for the cathode power supply line of a given row, and the switch driver can also be configured to close the switch for the anode power supply line of a given column.

[0043] The switch can selectively couple the storage capacitor to the power supply voltage, and the switch driver can be further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of a given row.

[0044] Each display element may include an emitting pixel consisting of multiple sub-pixels, making the display an emitting display.

[0045] Each display element may include an emitting area consisting of multiple light-emitting diodes arranged to emit light through multiple liquid crystals, making the display a non-emissive display. Attached Figure Description

[0046] Figure 1A This is a graphical representation of a known non-emissive display.

[0047] Figure 1B yes Figure 1A A schematic diagram of the cross-section of a non-emissive display.

[0048] Figure 2A This is a graphical representation of a known non-emissive display.

[0049] Figure 2B yes Figure 2A A graphical representation of the cross-section of a non-emissive display.

[0050] Figure 3 yes Figure 1A or Figure 1B A block diagram of the display matrix of the monitor.

[0051] Figure 4This is a block diagram of the display disclosed herein, which includes a non-emissive display panel for ghosting elimination.

[0052] Figure 5 This is a block diagram of the display disclosed herein, which includes an emissive display panel for eliminating ghosting.

[0053] Figure 6 yes Figure 4 or Figure 5 A graphical representation of the display matrix of the monitor.

[0054] Figure 7 yes Figure 6 A graphical representation of the time-division operation of the display matrix.

[0055] Figure 8 yes Figure 4 or Figure 5 A schematic block diagram of the display matrix of the monitor, using a common cathode arrangement, showing the circuitry for eliminating ghosting.

[0056] Figure 9 It is displayed Figure 8 The timing diagram shows the operation of the display matrix.

[0057] Figure 10 yes Figure 4 or Figure 5 A schematic block diagram of the display matrix of the monitor, using a common anode arrangement, showing the circuitry for eliminating ghosting.

[0058] Figure 11 It is displayed Figure 10 The timing diagram shows the working status of the display matrix. Detailed Implementation

[0059] The following disclosure enables those skilled in the art to make and use the subject matter disclosed herein. The general principles described herein can be applied to embodiments and applications other than those detailed above without departing from the spirit and scope of this disclosure. This disclosure is not intended to be limited to the embodiments shown, but is given the widest scope consistent with the principles and features disclosed or suggested herein. Note that in the following description, any described resistor or resistor is a discrete device unless otherwise stated, and not merely an electrical lead between two points. Therefore, any described resistor or resistor coupled between two points has a greater resistance than a lead between those two points, and such a resistor or resistor should not be interpreted as a lead. Similarly, any described capacitor or capacitor is a discrete device unless otherwise stated, and is not a parasitic device unless otherwise stated. Furthermore, any described inductor or inductor is a discrete device unless otherwise stated, and is not a parasitic device unless otherwise stated.

[0060] Now refer to Figure 4 The design of a display 30 utilizing a non-emissive display panel 40 is described. The display 30 includes an interface controller 33 that receives input from an external device 27 (e.g., a system-on-a-chip (SOC) or microcontroller) including an input processor 28 (e.g., a GPU) and a system memory 29 in bidirectional communication with the input processor 28. The input processor 28 receives input image information and, in cooperation with the system memory 29, generates an output to the interface controller 33 indicating the next frame of image data to be displayed on the liquid crystal layer 38 of the display panel 40. The interface controller 33 processes the output from the input processor 28 and provides the output to a timing controller 34 and a display power management circuit 37. The timing controller 34 coordinates with a backlight controller 35 to provide control signals to the row drivers RD1, ..., RDn and column drivers CD1, ..., CDm associated with the backlight panel 14, as well as the LCD display driver 36, to provide control signals to the liquid crystal 38, thereby enabling coordination between the backlight panel 14 and the liquid crystal 38 to achieve image display. The display panel 40 includes a switch driver 99 for controlling switches within the display panel 40.

[0061] Each shown area within the backlight panel 14 may include multiple LEDs connected in series, and these LED strings may be connected in parallel with each other.

[0062] Note that in some cases, row drivers RD1, ..., RDn can be combined into one or more row drivers, and column drivers CD1, ..., CDm can be combined into one or more column drivers, and these one or more row drivers and one or more column drivers can be integrated in or on the backlight panel 14.

[0063] The details of the interconnections and switches within the display circuit 40 that implements the elimination or reduction of ghosting will be described below, but first, since these details also apply to displays utilizing an emissive display panel, such a display utilizing an emissive display panel will be described.

[0064] Now refer to Figure 5The design of a display 50 utilizing an emissive display panel 60 is described. The display 50 includes an interface controller 53 that receives input from an external device 57, such as a system-on-a-chip (SOC) or microcontroller, including an input processor 51 (e.g., a GPU) and a system memory 52 in bidirectional communication with the input processor. The input processor 51 receives input image information and, in cooperation with the system memory 52, produces an output to the interface controller 53 indicating the next frame of image data to be displayed on a display matrix 24. The display matrix 24 is emissive and can generate colored RGB light from subpixels of each pixel, and additionally or alternatively, can generate light colors different from RGB from subpixels of each pixel. The interface controller 53 processes the output from the input processor 51 and provides the output to a timing controller 54 and a display power management circuit 57. The timing controller 54 coordinates with a display driver 56 to provide control signals to the row drivers RD1, ..., RDn and column drivers CD1, ..., CDm associated with the display panel 24 to provide control signals for image display. The display panel 60 includes a switch driver 99 for controlling switches within the display panel 60.

[0065] Each pixel shown in the display matrix 24 includes a sub-pixel of a different color (e.g., red, green, blue and / or other colors), and each such sub-pixel may include multiple LEDs of the appropriate color connected in series, and these multiple LED strings may be connected in parallel with each other.

[0066] Note that in some cases, row drivers RD1, ..., RDn can be combined into one or more row drivers, and column drivers CD1, ..., CDm can be combined into one or more column drivers, and these one or more row drivers and one or more column drivers can be integrated in or on display matrix 24.

[0067] Now refer to Figure 6 A block diagram describing display panel 40 or 60 is provided, showing the interconnections between different pixels / areas. An M×N matrix of pixels / areas is shown, where the corresponding row drivers RD1, ..., RDn are coupled to the corresponding anode power supply line for each row, and the corresponding column drivers CD1, ..., CDm are coupled to the corresponding cathode power supply line for each column. It should be understood that M and N can be any integer.

[0068] The electrical arrangement can be such that each row driver RD1, ..., RDn is coupled to the anode of the LED in its own row, and each column driver CD1, ..., CDm is coupled to the cathode of the LED in its own column; conversely, the electrical arrangement can be such that each row driver is coupled to the cathode of the pixel in its own row, and each column driver is coupled to the anode of the pixel in its own column.

[0069] The operation of display panels 40 and 60 can be based on Figure 7 The time-multiplexing scheme shown is organized into image frames. During each image frame, each row driver RD1, ..., RDn is sequentially activated, and during the activation of each row driver, all column drivers CD1, ..., CDm are activated. Note that the sequential activation of row drivers RD1, ..., RDn during each image frame is configurable and can be dynamically changed during operation via the operation of the backlight controller 35 (for the non-emissive display 40) or the display driver 56 (for the emissive display 60). Furthermore, one or more rows may not be activated during a given image frame, or may be activated more than once during a given image frame, and this can also be configured via the operation of the backlight controller 35 or the display driver 56.

[0070] Now Figure 8 The diagram shows a block diagram of a display panel 40 or 60 with an M×N matrix of pixels / areas, wherein each row driver RD1, ..., RDn is coupled to the anode of its own row's pixel / area via a corresponding anode power supply line, and each column driver CD1, ..., CDm is coupled to the cathode of its own column's pixel / area via a corresponding cathode power supply line. Each row has a corresponding parasitic capacitance Cpr1, ..., Cprn associated with it, and each column has a corresponding parasitic capacitance Cpc1, ..., Cpcm associated with it. M and N can be any integer, so the display panel 40 or 60 can have any number of rows or columns.

[0071] Each anode power supply line is selectively coupled to the storage capacitor Cstorage via corresponding switches SWr, ..., SWrm. The storage capacitor Cstorage is selectively coupled to the parasitic capacitance Cpc1 via switch SWc1, and to the parasitic capacitance Cpcm via switch SWcn. Optional switch SWd selectively couples the storage capacitor to the power supply voltage Vdd. Switches SWr, ..., SWrm, SWc1, ..., SWcn, and SWd are controlled by switch driver 99, which causes the switching of the switches described below. Note that switch driver 99 can be integrated into one or more of the row drivers RD1, ..., RDm, or into one or more of the column drivers CD1, ..., CDn, or into any suitable external circuitry.

[0072] Now for further reference Figure 9 Let's describe the operation. In this example, assume that ghosting removal is being performed on row 1 and column 1. Furthermore, for the purposes of this example, switch SWr1 will be referred to as the discharge switch for parasitic capacitance Cpr1 in row 1, and switch SWc1 will be referred to as the pre-charge switch for parasitic capacitance Cpc1 in column 1.

[0073] Before time T1, the charge has been transferred from the row parasitic capacitance Cpr1 to the storage capacitor Cstorage.

[0074] At time T1, when switch SWr1 is off, switch SWc1 is off, optional switch SWd is off, and row driver RD1 and column driver CD1 are activated. The voltage on the anode power supply line of row 1 increases accordingly, and at time T2, current begins to flow through pixel / area [1,1] to column driver CD1, causing light emission. This current also has the effect of charging the row parasitic capacitance Cpr1.

[0075] The operation of the optional switch SWd is temporarily ignored. At time T5, column driver CD1 is deactivated and precharge switch SWc1 is closed, thereby precharging column parasitic capacitor Cpc1 due to charge sharing between storage capacitor Cstorage and column parasitic capacitor Cpc1.

[0076] At time T6, the pre-charge switch SWc1 is opened and the discharge switch SWr1 is closed, resulting in the parasitic capacitance Cpr1 being discharged into the storage capacitor Cstorage due to charge sharing.

[0077] The "upper ghosting" is eliminated by transferring charge from the parasitic row capacitance Cpr1 to the storage capacitor Cstorage when the row driver RD1 is deactivated, because the discharge of the parasitic row capacitance Cpr1 goes to the storage capacitor Cstorage instead of through the pixel / region [1,1].

[0078] Furthermore, by precharging the parasitic column capacitor Cpc1 before deactivating the row driver RD1, the "ghosting" is eliminated because there is no path for charge to flow from the parasitic row capacitor Cpr1 through pixel / region [1,1] to the parasitic column capacitor Cpc1 (since Cpc1 will have already been charged).

[0079] This technology not only eliminates upper ghosting but also saves power because instead of the parasitic row capacitor Cpr1 being discharged to ground through the column driver via the pixel / area, the charge from the parasitic row capacitor Cpr1 is transferred to the storage capacitor Cstorage, which is then used to precharge the parasitic column capacitor Cpc1.

[0080] Now returning to the optional switch SWd, which can be closed between times T3 and T4, thereby charging the storage capacitor Cstorage to the desired amount. This is likely desired, depending on the capacitance value of the column parasitic capacitance Cpc1, to ensure that Cstorage retains sufficient charge to fully precharge the column parasitic capacitance Cpc1 before time T5.

[0081] The above operations have been described for a single pixel / area, and are repeated for each pixel / area, except that for those operations, the discharge switch SWr of the currently active row is opened between times T1 and T6, the precharge switch SWc of the currently active column is closed between times T5 and T6, and the discharge switch SWr of the currently active row is closed between time T6 and the activation of the next row driver.

[0082] Now Figure 10 The diagram shows a block diagram of a display panel 40' or 60' with an M×N matrix of pixels / areas, wherein each row driver RD1, ..., RDn is coupled to the cathode of its own row's pixel / area via a corresponding cathode power supply line, and each column driver CD1, ..., CDm is coupled to the anode of its own column's pixel / area via a corresponding anode power supply line. Each row has a corresponding parasitic capacitance Cpr1, ..., Cprn associated with it, and each column has a corresponding parasitic capacitance Cpc1, ..., Cpcm associated with it. M and N can be any integer, so the display panel 40' or 60' can have any number of rows or columns.

[0083] Each anode power supply line is selectively coupled to the storage capacitor Cstorage via corresponding switches SWc1, ..., SWcn. The storage capacitor Cstorage is selectively coupled to the parasitic capacitance Cpr1 via switch SWr1, and to the parasitic capacitance Cprn via switch SWrm. An optional switch SWd selectively couples the storage capacitor Cstorage to the power supply voltage Vdd. Switches SWr, ..., SWrm, SWc1, ..., SWcn, and SWd are controlled by switch driver 99, which causes the switching of the switches described below.

[0084] Now for further reference Figure 11 Describe the operation. In this example, assume that ghosting cancellation is being performed on row 1 and column 1. Furthermore, for the purposes of this example, switch SWc1 will be referred to as the discharge switch for the parasitic capacitance Cpc1 of column 1, and switch SWr1 will be referred to as the pre-charge switch for the parasitic capacitance Cpr1 of row 1.

[0085] Before time T1, the charge has been transferred from the column parasitic capacitance Cpc1 to the storage capacitor Cstorage.

[0086] At time T1, when switch SWc1 is open, switch SWr1 is open, optional switch SWd is open, and row driver RD1 and column driver CD1 are activated. The voltage on the cathode power supply line of column 1 decreases accordingly, and at time T2, current begins to flow from column driver CD1 through pixel / area [1,1] to row driver RD1, causing light emission. This current also has the effect of charging the column parasitic capacitance Cpc1.

[0087] The operation of the optional switch SWd is temporarily ignored. At time T5, column driver CD1 is deactivated and precharge switch SWr1 is closed, thereby precharging row parasitic capacitor Cpr1 due to charge sharing between storage capacitor Cstorage and row parasitic capacitor Cpr1.

[0088] At time T6, the pre-charge switch SWr1 is opened and the discharge switch SWc1 is closed. As a result, due to charge sharing, the column parasitic capacitance Cpc1 is discharged to the storage capacitor Cstorage.

[0089] The "upper ghosting" is eliminated by transferring charge from the parasitic column capacitor CPC1 to the storage capacitor Cstorage when deactivating the column driver CD1, because the discharge of the parasitic column capacitor CPC1 goes to the storage capacitor Cstorage instead of through the pixel / area [1,1].

[0090] Furthermore, by precharging the parasitic row capacitor Cpr1 before the low-to-high commutation of the row driver RD1, the "ghosting" is eliminated because there is no path for charge to flow from the parasitic column capacitor Cpc1 through the pixel / region [1,1] to the parasitic row capacitor Cpr1 (since Cpr1 will already be charged).

[0091] This technique not only eliminates lower ghosting but also saves power because instead of the parasitic column capacitor Cpc1 discharging through the pixel / area [1,1], the charge from the parasitic column capacitor Cpc1 is transferred to the storage capacitor Cstorage via the row driver RD1 to ground, and then used to precharge the parasitic row capacitor Cpr1.

[0092] Now returning to the optional switch SWd, which can be closed between times T3 and T4, this charges the storage capacitor Cstorage to the desired amount. Depending on the capacitance value of the parasitic line capacitance Cpr1, it is desirable to ensure that Cstorage retains sufficient charge to fully precharge the parasitic line capacitance Cpr1 before time T5.

[0093] The above operations have been described for a single pixel / area, and are repeated for each pixel / area, except that for those operations, the discharge switch SWc for the currently active column is opened between times T1 and T6, the precharge switch SWr for the currently active row is closed between times T5 and T6, and the discharge switch SWc for the currently active column is closed between time T6 and the activation of the next column driver.

[0094] Finally, it is obvious that modifications and changes can be made to the content described and shown herein without departing from the scope of this disclosure, as defined in the appended claims.

[0095] Although this disclosure has been described with respect to a limited number of embodiments, those skilled in the art who benefit from this disclosure will understand that other embodiments can be conceived without departing from the scope of this disclosure. Therefore, the scope of this disclosure should be limited only by the appended claims.

Claims

1. A method of operating a display panel having a matrix of display elements arranged in rows and columns, the method comprising the following steps: a) Activate the row driver associated with a given row and the column driver associated with a given column such that current flows through a display element having an anode terminal connected to an anode power supply line of the given row and a cathode terminal connected to a cathode power supply line of the given column, wherein the current charges a parasitic capacitance associated with the anode power supply line of the given row. b) Transfer charge from the storage capacitor to the cathode power supply line of the given column to precharge the parasitic capacitance associated with the cathode power supply line; c) Deactivate the row driver associated with the given row; as well as d) Transferring charge from the parasitic capacitance associated with the anode power supply line to the storage capacitor to prevent a first type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the column driver associated with the given column; The pre-charging of the parasitic capacitance associated with the cathode power supply line prevents a second type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the parasitic capacitance associated with the cathode power supply line.

2. The method according to claim 1, further comprising precharging the storage capacitor prior to step b).

3. A method of operating a display panel having a matrix of display elements arranged in rows and columns, the method comprising the following steps: a) Activate the column driver associated with a given column and the row driver associated with a given row such that current flows through a display element having an anode terminal connected to an anode power supply line of the given column and a cathode terminal connected to a cathode power supply line of the given row, wherein the current charges a parasitic capacitance associated with the anode power supply line of the given column. b) Transfer charge from the storage capacitor to the cathode power supply line of the given row to precharge the parasitic capacitance associated with the cathode power supply line; c) Deactivate the column driver associated with the given column; as well as d) Transferring charge from the parasitic capacitance associated with the anode power supply line to the storage capacitor to prevent a first type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the line driver associated with the given line; The pre-charging of the parasitic capacitance associated with the cathode power supply line prevents a second type of ghosting that may be caused by the parasitic capacitance associated with the anode power supply line discharging through the display element to the parasitic capacitance associated with the cathode power supply line.

4. The method of claim 3 further includes precharging the storage capacitor prior to step b).

5. A display, comprising: A matrix of display elements arranged in rows and columns, wherein each row has a row driver associated with it and each column has a column driver associated with it; Each display element has an anode terminal and a cathode terminal; Each row has an anode power supply line coupled to the row driver of the row and coupled to the anode terminal of the display element in the row; Each column has a cathode power supply line coupled to the column driver of the row and coupled to the cathode terminal of the display element in the column; A switch for each anode power supply line selectively couples the anode power supply line to a storage capacitor; A switch for each cathode power supply line selectively couples the cathode power supply line to the storage capacitor; The display driver is configured to activate the row driver for a given row and the column driver for a given column, causing current to flow from the row driver through the anode power supply line of the row into the anode terminal of the display element associated with both the given row and the given column, and from the cathode terminal of the display element through the cathode power supply line of the column to the column driver of the column, thereby charging the parasitic capacitance associated with the given row. as well as A switch driver is configured to close a switch for the cathode power supply line of the given column, thereby transferring charge from the storage capacitor to the parasitic capacitance associated with the given column, and then open the switch for the cathode power supply line. The display driver is further configured to deactivate the row driver for the given row after closing the switch of the cathode power supply line for the given column; and The switch driver is also configured to close a switch for the anode power supply line of the given row, thereby transferring charge from the parasitic capacitance associated with the given row to the storage capacitor.

6. The display of claim 5, further comprising a switch for selectively coupling the storage capacitor to a power supply voltage; and wherein the switch driver is further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of the given column, so as to precharge the storage capacitor before charge is transferred from the storage capacitor to the parasitic capacitance associated with the given column.

7. The display of claim 5, wherein each display element includes an emitting pixel, the emitting pixel including a plurality of sub-pixels, such that the display is an emitting display.

8. The display of claim 5, wherein each display element includes an emitting region, the emitting region including a plurality of light-emitting diodes arranged to emit light through a plurality of liquid crystals, such that the display is a non-emissive display.

9. A display, comprising: A matrix of display elements arranged in rows and columns, wherein each row has a row driver associated with the row and each column has a column driver associated with the column; Each display element has an anode terminal and a cathode terminal; Each row has a cathode power supply line coupled to the row driver of the row and coupled to the cathode terminal of the display element in the row; Each column has an anode power supply line coupled to the column driver of the row and to the anode terminal of the display element in the column; A switch for each cathode power supply line selectively couples the cathode power supply line to a storage capacitor; A switch for each anode power supply line selectively couples the anode power supply line to a storage capacitor. The display driver is configured to activate the column driver for a given column and the row driver for a given row, causing current to flow from the column driver through the anode power supply line of the column into the anode terminal of the display element associated with both the given row and the given column, and from the cathode terminal of the display element through the cathode power supply line of the row to its row driver, thereby charging the parasitic capacitance associated with the given column. as well as A switch driver is configured to close a switch for the cathode power supply line of the given row, thereby transferring charge from the storage capacitor to the parasitic capacitance associated with the given row, and then open the switch for the cathode power supply line. 5 wherein the display driver is further configured to deactivate the column driver for the given column after closing the switch of the cathode power supply line for the given row; and and The switch driver is also configured to close a switch for the anode power supply line of the given column, thereby transferring charge from the parasitic capacitance associated with the given column to the storage capacitor.

10. The display of claim 9, further comprising a switch for selectively coupling the storage capacitor to a power supply voltage; and wherein the switch driver is further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of the given row, so as to precharge the storage capacitor before charge is transferred from the storage capacitor to the parasitic capacitance associated with the given row.

11. The display of claim 9, wherein each display element includes an emitting pixel, the emitting pixel including a plurality of sub-pixels, such that the display is an emitting display.

12. The display of claim 9, wherein each display element includes an emitting region, the emitting region including a plurality of light-emitting diodes arranged to emit light through a plurality of liquid crystals, such that the display is a non-emissive display.

13. A method of operating a display panel having a matrix of display elements, the method comprising the following steps: a) Allow current to flow from the power source into the anode of a given display element and out from the cathode of the given display element to ground; The current flowing into the anode and out of the cathode to ground causes the parasitic capacitance associated with the anode to be charged; b) Transferring charge from the storage capacitor to the parasitic capacitance associated with the cathode; as well as c) Stop the flow of current, and then transfer the charge from the parasitic capacitance associated with the anode to the storage capacitor.

14. The method of claim 13, further comprising repeating a), b) and c) for each display element within the matrix.

15. The method of claim 13, further comprising: The storage capacitor is charged at least partially from a power source before the charge is transferred from the storage capacitor to the parasitic capacitance associated with the cathode.

16. A display comprising: A matrix of display elements arranged in rows and columns; Each display element has an anode terminal and a cathode terminal; Each row has an anode power supply line coupled to the anode terminal of the display element in the row; Each column has a cathode power supply line coupled to the cathode terminal of the display element in the column; A switch for each anode power supply line selectively couples the anode power supply line to a storage capacitor; A switch for each cathode power supply line selectively couples the cathode power supply line to the storage capacitor; The display driver is configured to activate the row driver for a given row and the column driver for a given column. as well as A switch driver is configured to close a switch for the cathode power supply line of the given column and then open a switch for the cathode power supply line. The display driver is further configured to deactivate the row driver for the given row after closing the switch of the cathode power supply line for the given column; and The switch driver is also configured to close a switch for the anode power supply line of the given row.

17. The display of claim 16, further comprising a switch for selectively coupling the storage capacitor to a power supply voltage; and wherein the switch driver is further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage prior to closing the switch for the cathode power supply line of the given column.

18. The display of claim 16, wherein each display element includes an emitting pixel, the emitting pixel including a plurality of sub-pixels, such that the display is an emitting display.

19. The display of claim 16, wherein each display element includes an emitting region, the emitting region including a plurality of light-emitting diodes arranged to emit light through a plurality of liquid crystals, such that the display is a non-emissive display.

20. A display comprising: A matrix of display elements arranged in rows and columns; Each display element has an anode terminal and a cathode terminal; Each row has a cathode power supply line coupled to the cathode terminal of the display element in the row; Each column has an anode power supply line coupled to the anode terminal of the display element in the column; A switch for each cathode power supply line selectively couples the cathode power supply line to a storage capacitor; A switch for each anode power supply line selectively couples the anode power supply line to the storage capacitor; The display driver is configured to activate the column driver for a given column and the row driver for a given row. as well as A switch driver is configured to close a switch for the cathode power supply line of the given row and then open a switch for the cathode power supply line. The display driver is further configured to: deactivate the column driver for the given column after closing the switch of the cathode power supply line for the given row; and The switch driver is also configured to close a switch for the anode power supply line of the given column.

21. The display of claim 20, further comprising a switch for selectively coupling the storage capacitor to a power supply voltage; and wherein the switch driver is further configured to close the switch for selectively coupling the storage capacitor to the power supply voltage before closing the switch for the cathode power supply line of the given row.

22. The display of claim 20, wherein each display element includes an emitting pixel, the emitting pixel including a plurality of sub-pixels, such that the display is an emitting display.

23. The display of claim 20, wherein each display element includes an emitting region, the emitting region including a plurality of light-emitting diodes arranged to emit light through a plurality of liquid crystals, such that the display is a non-emissive display.

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