Display device

Abstract

To provide a display device in which parasitic capacitance between wirings can be reduced, a display device in which display quality is high, and a display device in which power consumption can be reduced. The display device of the present invention includes a signal line 121; a scan line 103; a first electrode 123; a second electrode 125a; a third electrode 125b; a first pixel electrode 139a; a second pixel electrode 139b; and a semiconductor film 135, wherein the signal line and the scan line cross, the first electrode is electrically connected to the signal line, the first electrode includes a region overlapping the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.

Description

[0001] This application is a divisional application of the invention patent application with application number 201680009371.3, application date February 3, 2016, entitled "Display Device". Technical Field

[0002] One aspect of the present invention relates to a display device. Note that this aspect of the present invention is not limited to the technical field described above. The technical field of one aspect of the invention disclosed in this specification relates to an object, method, or manufacturing method. Alternatively, one aspect of the present invention relates to a process, machine, manufacture, or composition of matter. Therefore, more specifically, examples of the technical field of one aspect of the present invention disclosed in this specification include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, energy storage devices, imaging devices, methods for driving these devices, or methods for manufacturing these devices. Background Technology

[0003] In recent years, vertically aligned (VA) liquid crystal display (LCD) devices have been proposed as a result of improved viewing angle characteristics and display quality. Furthermore, as a VA-type LCD device, a multi-domain structure LCD device has been proposed, in which a single pixel includes multiple pixel electrodes and a transistor connected to each pixel electrode and controlling the potential of the pixel electrodes. By arranging multiple pixel electrodes in a single pixel, the orientation of the liquid crystal can be made different for each pixel electrode. Therefore, the viewing angle of the multi-domain structure LCD device can be larger than that of existing VA-type LCD devices (see Patent Document 1).

[0004] Furthermore, there is a trend towards larger screen sizes for LCD devices, such as 60 inches or more diagonally, and development is underway towards screen sizes exceeding 120 inches diagonally. Moreover, there is a trend towards higher resolution screens, such as Full HD (FHD, 1920×1080) or 4K (3840×2160), and development is currently accelerating towards so-called 8K high-resolution LCD devices with a pixel count of 7680×4320.

[0005] Furthermore, in order to reduce afterimages and improve display quality, development has been undertaken for high-speed drives that double the driving speed (also known as double-speed drives), and further research has been conducted on high-speed drives that increase the driving speed by more than three times. In addition, to realize a liquid crystal display device for three-dimensional (3D) display, it is necessary to alternately display images for the right eye and the left eye, thus requiring the liquid crystal display device to operate at speeds of double or more.

[0006] [References]

[0007] [Patent Literature]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 2006-317867 Summary of the Invention

[0009] However, with the increasing size and resolution of liquid crystal display devices, the number of pixels required has increased significantly, resulting in shorter write times for each pixel. Consequently, the transistors controlling the potential of the pixel electrodes are required to operate at high speeds and have high on-state currents.

[0010] Furthermore, the increased parasitic capacitance between the wirings leads to a delay in signal transmission to the ends of the signal lines. As a result, this can cause a decrease in display quality, such as uneven display or poor grayscale, as well as an increase in power consumption.

[0011] Therefore, one objective of this invention is to provide a display device capable of reducing parasitic capacitance between wirings. Furthermore, one objective of this invention is to provide a display device with high display quality. Additionally, one objective of this invention is to provide a display device capable of reducing power consumption. Furthermore, one objective of this invention is to provide a novel semiconductor device or a novel display device, etc.

[0012] Note that the description of these objectives does not preclude the existence of other objectives. One aspect of the invention does not necessarily require achieving all of the aforementioned objectives. Furthermore, objectives other than those described above are clearly present in the specification, drawings, and claims, and can be derived from the description in the specification, drawings, and claims.

[0013] One aspect of the present invention is a display device comprising signal lines, scan lines intersecting the signal lines, a first electrode electrically connected to the signal lines, a second electrode opposite to the first electrode, a third electrode opposite to the first electrode, a first pixel electrode electrically connected to the second electrode, a second pixel electrode electrically connected to the third electrode, and a semiconductor film in contact with the first to third electrodes and disposed between the scan lines and the first to third electrodes, wherein the first electrode includes a region overlapping with the scan lines.

[0014] Another aspect of the present invention is the aforementioned display device, which includes a gate insulating film between the scan line and the semiconductor film, wherein the scan line, the gate insulating film, the semiconductor film, the first electrode and the second electrode constitute a first transistor, and the scan line, the gate insulating film, the semiconductor film, the first electrode and the third electrode constitute a second transistor.

[0015] Another aspect of the present invention is the aforementioned display device, which includes a first capacitor wiring electrically connected to a first pixel electrode and a second capacitor wiring electrically connected to a second pixel electrode, wherein the signal line includes a region overlapping between the first pixel electrode and the second pixel electrode, and the signal line does not include a region overlapping with the first capacitor wiring and the second capacitor wiring.

[0016] Another aspect of the present invention is the aforementioned display device, wherein a first electrode is disposed between a second electrode and a third electrode in the top surface shape.

[0017] Another aspect of the present invention is the aforementioned display device, wherein the semiconductor film comprises an oxide having In, M (M being aluminum, gallium, yttrium, or tin) and Zn.

[0018] Another aspect of the present invention is the aforementioned display device, wherein the semiconductor film includes a first semiconductor film and a second semiconductor film including a region overlapping with the first semiconductor film, wherein the first semiconductor film contains more oxides relative to the atomic number ratio of M to the atomic number ratio of In compared to the second semiconductor film.

[0019] Therefore, by employing one aspect of the present invention, the parasitic capacitance between the wirings of the display device can be reduced. Furthermore, by employing one aspect of the present invention, the display quality of the display device can be improved. Furthermore, by employing one aspect of the present invention, the power consumption of the display device can be reduced. Furthermore, by employing one aspect of the present invention, a novel semiconductor device or a novel display device, etc., can be provided. Note that the description of these effects does not preclude the existence of other effects.

[0020] Furthermore, one aspect of the present invention does not necessarily require all of the aforementioned effects. Effects other than those described above are readily apparent from the description, drawings, claims, etc., and these effects can be extracted from those descriptions. Attached Figure Description

[0021] Figure 1 is a top view and circuit diagram of one type of pixel;

[0022] Figure 2 is a top view and circuit diagram illustrating one aspect of the present invention;

[0023] Figure 3 is a top view and circuit diagram of one method of pixelation;

[0024] Figure 4 It is a cross-sectional view of a pixel;

[0025] Figure 5 It is a top view of pixels;

[0026] Figure 6It is a top view of pixels;

[0027] Figure 7 is a top view and circuit diagram of one type of pixel;

[0028] Figure 8 is a top view and circuit diagram of one method of pixelation;

[0029] Figure 9 It is a cross-sectional view of a pixel;

[0030] Figure 10 is a cross-sectional view illustrating an example of the manufacturing process of a semiconductor device;

[0031] Figure 11 is a cross-sectional view illustrating an example of the manufacturing process of a semiconductor device;

[0032] Figure 12 is a cross-sectional view illustrating an example of the manufacturing process of a semiconductor device;

[0033] Figure 13 is a cross-sectional view illustrating an example of the manufacturing process of a semiconductor device;

[0034] Figure 14 is a cross-sectional view showing an example of the manufacturing process of a semiconductor device, a top view showing one aspect of a semiconductor device, and a cross-sectional view.

[0035] Figure 15 is a cross-sectional view showing one embodiment of a semiconductor device;

[0036] Figure 16 is a top view and a cross-sectional view of one embodiment of a semiconductor device;

[0037] Figure 17 is a cross-sectional view showing one embodiment of a semiconductor device;

[0038] Figure 18 It is a diagram illustrating the band structure;

[0039] Figure 19 shows a Cs-corrected high-resolution TEM image of the CAAC-OS cross section and a schematic diagram of the CAAC-OS cross section.

[0040] Figure 20 shows a Cs-corrected high-resolution TEM image in the plane of CAAC-OS;

[0041] Figure 21 is a diagram illustrating the structural analysis of CAAC-OS and single-crystal oxide semiconductors obtained by XRD.

[0042] Figure 22 is a diagram showing the electron diffraction pattern of CAAC-OS;

[0043] Figure 23 This is a diagram showing the changes in the crystallization region of In-Ga-Zn oxides under electron irradiation;

[0044] Figure 24 This is a top view showing one manner of displaying the device;

[0045] Figure 25 This is a cross-sectional view showing one configuration of the display device;

[0046] Figure 26 This is a cross-sectional view showing one configuration of the display device;

[0047] Figure 27 This is a diagram illustrating the display module;

[0048] Figure 28 is a diagram illustrating an electronic device. Detailed Implementation

[0049] Embodiments of the present invention will now be described with reference to the accompanying drawings. However, the present invention is not limited to the following description. Those skilled in the art will readily understand that its methods and details can be varied in various forms without departing from the spirit and scope of the invention. Therefore, the present invention should not be construed as being limited only to the embodiments described below. Note that when describing the structure of the present invention with reference to the accompanying drawings, the same reference numerals are used in different drawings to denote the same constituent elements.

[0050] In addition, the terms "first," "second," "third," and so on up to "n" (where n is a natural number) used in this specification are used to avoid confusion of the constituent elements, rather than to limit the number of elements.

[0051] Additionally, depending on the context or situation, the terms "film" and "layer" can be interchanged. For example, sometimes "conductive layer" can be replaced with "conductive film." Furthermore, sometimes "insulating film" can be replaced with "insulating layer."

[0052] Implementation Method 1

[0053] In this embodiment, refer to Figures 1 to 12. Figure 9 The structure of a pixel in a liquid crystal display device is explained.

[0054] Figure 1A This is a top view of a pixel 100 of the multi-domain liquid crystal display device shown in this embodiment. Figure 1B Show Figure 1A The circuit diagram for pixel 100 is shown. Figure 2A This is a top view of a pixel 200 of an existing multi-domain liquid crystal display device. Figure 2B Show Figure 2A The circuit diagram of the pixel is shown.

[0055] like Figure 1A and Figure 1BAs shown, pixel 100 includes a scan line 103 and a signal line 121 intersecting the scan line 103. Pixel 100 also includes capacitor wiring 105a and capacitor wiring 105b extending in the same direction as the scan line 103. The scan line 103 is disposed between capacitor wiring 105a and capacitor wiring 105b.

[0056] Transistors 136 and 137 are disposed near the intersection of scan line 103 and signal line 121. Transistor 136 includes a semiconductor film 135 overlapping with scan line 103, and a first electrode 123 and a second electrode 125a overlapping semiconductor film 135. The first electrode 123 is electrically connected to signal line 121. The first electrode 123 serves as one of the source electrode and drain electrode in transistor 136. The second electrode 125a serves as the other of the source electrode and drain electrode in transistor 136.

[0057] Transistor 137 includes a semiconductor film 135 overlapping with scan line 103, and a first electrode 123 and a third electrode 125b overlapping with semiconductor film 135. The first electrode 123 serves as one of the source and drain electrodes in transistor 137. The third electrode 125b serves as the other of the source and drain electrodes in transistor 137.

[0058] exist Figure 1A In the top surface shape, a portion of the end of the semiconductor film 135 of transistors 136 and 137 is located outside the scan line 103 used as the gate electrode, but is not limited to this. Figure 1C As shown, in the transistors 136 and 137 included in pixel 100, the end of semiconductor film 135 may also be located inside the end of scan line 103.

[0059] The second electrode 125a of transistor 136 is electrically connected to pixel electrode 139a through opening 144a. In other words, transistor 136 is connected to liquid crystal element 142, which includes pixel electrode 139a, through second electrode 125a. Additionally, one electrode of capacitor element 140 is electrically connected to pixel electrode 139a and second electrode 125a of transistor 136, and the other electrode is electrically connected to capacitor wiring 105a (see reference). Figure 1B ).

[0060] The third electrode 125b of transistor 137 is electrically connected to pixel electrode 139b through opening 144b. In other words, transistor 137 is connected to liquid crystal element 143, including pixel electrode 139b, through third electrode 125b. Additionally, one electrode of capacitor element 141 is electrically connected to pixel electrode 139b and the third electrode 125b of transistor 137, and the other electrode is electrically connected to capacitor wiring 105b (see reference). Figure 1B ).

[0061] Openings 144a and 144b are provided in the insulating film 116, which will be described later. Furthermore, to avoid complicating the drawings, in... Figure 1A and Figure 2A In the image, no shadow lines are added to pixel electrodes 139a and 139b; only the outline of the top surface shape is shown with dashed lines.

[0062] Transistor 136 and transistor 137 are located approximately at the center of pixel 100 in the top surface shape, and are formed between pixel electrodes 139a and 139b of each sub-pixel in pixel 100.

[0063] One aspect of the present invention is a display device comprising a signal line 121, a scan line 103, a first electrode 123, a second electrode 125a, a third electrode 125b, a first pixel electrode 139a, a second pixel electrode 139b, and a semiconductor film 135. The signal line 121 intersects the scan line 103. The first electrode 123 is electrically connected to the signal line 121. The first electrode 125a includes a region overlapping with the scan line 103. The second electrode 125a is opposite to the first electrode 123. The third electrode 125b is opposite to the first electrode 123. The first pixel electrode 139a is electrically connected to the second electrode 125a. The second pixel electrode 139b is electrically connected to the third electrode 125b. The semiconductor film 135 is in contact with the first electrode 123, the second electrode 125a, and the third electrode 125b. The semiconductor film 135 is disposed between the scan line 103 and the first electrode 123 to the third electrode 125b.

[0064] Additionally, the following display device is also an embodiment of the present invention: the display device includes a gate insulating film 107, a transistor 136 and a transistor 137, the gate insulating film 107 is disposed between the scan line 103 and the semiconductor film 135, the transistor 136 includes the scan line 103, the gate insulating film 107, the semiconductor film 135, the first electrode 123 and the second electrode 125a, and the transistor 137 includes the scan line 103, the gate insulating film 107, the semiconductor film 135, the first electrode 123 and the third electrode 125b.

[0065] Transistors 136 and 137 share a first electrode 123, which serves as both a source and a drain electrode, and this first electrode 123 overlaps with the scan line 103. By employing this structure, the parasitic capacitance generated between one electrode of transistors 136 and 137 and the scan line 103 can be reduced in a pixel 100 constituting the display device.

[0066] In addition, such as Figure 1BAs shown, in transistor 136, a parasitic capacitance C1 is generated at the overlap between scan line 103 and the second electrode 125a. Additionally, in transistor 137, a parasitic capacitance C2 is generated at the overlap between scan line 103 and the third electrode 125b. Furthermore, parasitic capacitances C5, C6, and C7 are generated at the overlaps of signal line 121 and scan line 103, signal line 121 and capacitor wiring 105a, and signal line 121 and capacitor wiring 105b, respectively.

[0067] Here, as a contrasting example, Figure 2A A top view of pixel 200 is shown, in which, in the two transistors included in a pixel, different electrodes are electrically connected to signal lines and the electrodes do not overlap with scan lines. Figure 2B A circuit diagram of pixel 200 is shown. In the description of pixel 200, the same reference numerals are used for the same components as those of pixel 100, and the description of these components is omitted.

[0068] like Figure 2B As shown, pixel 200 includes a scan line 203 and a signal line 212 intersecting the scan line 203. Pixel 200 also includes capacitor wiring 105a and capacitor wiring 105b extending in the same direction as the scan line 203. The scan line 203 is disposed between capacitor wiring 105a and capacitor wiring 105b.

[0069] Additionally, transistors 236 and 237 are disposed near the intersection of scan line 203 and signal line 221. Transistor 236 includes a gate electrode protruding from scan line 203, a fourth electrode 223a protruding from signal line 221, and a second electrode 125a connected to liquid crystal element 142. One electrode of capacitor element 140 is electrically connected to pixel electrode 139a included in liquid crystal element 142 and second electrode 125a of transistor 236, and the other electrode of capacitor element 140 is electrically connected to capacitor wiring 105a (see reference). Figure 2B ).

[0070] Transistor 237 includes a gate electrode protruding from scan line 203, a fifth electrode 223b protruding from signal line 121, and a third electrode 125b connected to liquid crystal element 143. One electrode of capacitor element 141 is electrically connected to pixel electrode 139b of liquid crystal element 143 and third electrode 125b of transistor 237, and the other electrode of capacitor element 141 is electrically connected to capacitor wiring 105b (see reference). Figure 2B ).

[0071] The transistors 236 and 237 differ from the transistors 136 and 137 in pixel 100 in that they respectively include a fourth electrode 223a and a fifth electrode 223b, which serve as one of the source electrode and the drain electrode. Furthermore, the fourth electrode 223a and the fifth electrode 223b, which protrude from the signal line 221, do not overlap with the scan line 203.

[0072] Furthermore, in transistor 236, a parasitic capacitance C11 is generated at the overlap between scan line 203 and the second electrode 125a. Additionally, a parasitic capacitance C13 is generated at the overlap between scan line 203 and the fourth electrode 223a. In transistor 237, a parasitic capacitance C12 is generated at the overlap between scan line 203 and the third electrode 125b. Additionally, a parasitic capacitance C14 is generated at the overlap between scan line 203 and the fifth electrode 223b. Furthermore, parasitic capacitances C15, C16, and C17 are generated at the overlaps of signal line 221 and scan line 203, signal line 221 and capacitor wiring 105a, and signal line 221 and capacitor wiring 105b, respectively.

[0073] In transistors 136 and 236, if the areas of the overlapping portions of scan line 103 and the second electrode 125a and scan line 203 and the second electrode 125a are approximately the same, then parasitic capacitances C1 and C11 will be approximately the same. Similarly, in transistors 137 and 237, if the areas of the overlapping portions of scan line 103 and the third electrode 125b and scan line 203 and the third electrode 125b are approximately the same, then parasitic capacitances C2 and C12 will be approximately the same. Furthermore, if the areas of the overlapping portions of signal line 121 and scan line 103 and signal line 221 and scan line 203 are approximately the same, then parasitic capacitances C5 and C15 will be approximately the same. Finally, if the areas of the overlapping portions of signal line 121 and capacitor wiring 105a and signal line 221 and capacitor wiring 105a are approximately the same, then parasitic capacitances C6 and C16 will be approximately the same. In addition, the areas of the overlapping portions of signal line 121 and capacitor wiring 105b are approximately the same as the areas of the overlapping portions of signal line 221 and capacitor wiring 105b, and therefore the parasitic capacitances C7 and C17 are also approximately the same.

[0074] In pixel 200, which serves as a comparative example, the electrodes used as one of the source and drain electrodes in transistors 236 and 237 are different electrodes from each other (the fourth electrode 223a in transistor 236 and the fifth electrode 223b in transistor 237). Therefore, a parasitic capacitance C13 is generated between scan line 203 and the fourth electrode 223a, and a parasitic capacitance C14 is generated between scan line 203 and the fifth electrode 223b.

[0075] However, in pixel 100 shown in this embodiment, the electrode (first electrode 123) used as one of the source and drain electrodes in transistors 136 and 137 is common, and this electrode overlaps with scan line 103 at the overlap of signal line 121 and scan line 103. Therefore, in transistors 136 and 137, the parasitic capacitance generated at the overlap of this electrode and scan line 103 includes the aforementioned parasitic capacitance C5. Parasitic capacitance C5 is substantially the same as parasitic capacitance C15, therefore, the parasitic capacitance in pixel 100 is less than that in pixel 200, and the difference is equal to the parasitic capacitances C13 and C14. As described above, a display device according to one aspect of the present invention can reduce the parasitic capacitance generated between the wirings of a pixel 100.

[0076] Furthermore, in the pixel 100 shown in this embodiment, transistors 136 and 137 share a common semiconductor film. Therefore, transistors 136 and 137 can share the area where the first electrode 123 contacts the semiconductor film 135. As a result, the area occupied by transistors 136 and 137 in the pixel 100 can be reduced.

[0077] In addition, such as Figure 3A and Figure 3B As shown, in pixel 100, adjacent pixels can also share capacitor wiring 105a and capacitor wiring 105b. By adopting this structure, the number of capacitor wirings included in the display device can be reduced. Furthermore, as... Figure 3A As shown, by increasing the area of ​​the overlap between pixel electrode 139a and capacitor wiring 105a, the capacitance of capacitor element 140 can be increased. Similarly, by increasing the area of ​​the overlap between pixel electrode 139b and capacitor wiring 105b, the capacitance of capacitor element 141 can be increased.

[0078] Next, refer to Figure 4 The structure of the transistors and capacitors included in pixel 100 is explained.

[0079] Figure 4 Show Figure 1A The cross-sectional structure of transistor 136 and capacitor 140 between the dotted line AB is shown.

[0080] The transistor 136 includes a scan line 103, a semiconductor film 135, a gate insulating film 107 disposed between the scan line 103 and the semiconductor film 135, a first electrode 123 in contact with the semiconductor film 135, and a second electrode 125a in contact with the semiconductor film 135 on the substrate 101.

[0081] The capacitor element 140 includes a capacitor wiring 105a, a second electrode 125a, and a gate insulating film 107 disposed between the capacitor wiring 105a and the second electrode 125a on the substrate 101.

[0082] An insulating film 116 is provided on the gate insulating film 107, the semiconductor film 135, the first electrode 123, and the second electrode 125a. In addition, a pixel electrode 139a is provided on the insulating film 116, which is electrically connected to the second electrode 125a through an opening 144a provided in the insulating film 116.

[0083] Although not shown, transistor 137 has the same structure as transistor 136. Furthermore, capacitor element 141 and capacitor element 140 are composed of the same constituent elements.

[0084] As the substrate 101, in addition to glass substrates and ceramic substrates, heat-resistant plastic substrates capable of withstanding the processing temperatures of this manufacturing process can also be used. Furthermore, if the substrate does not need to be transparent, a substrate with an insulating film formed on the surface of a metal substrate such as stainless steel can also be used. As the glass substrate, alkali-free glass substrates such as barium borosilicate glass, aluminum borosilicate glass, or aluminosilicate glass can be used. Note that there are no limitations on the size of the substrate 101. For example, third to tenth generation glass substrates commonly used in liquid crystal display devices can be used. Additionally, as the material used for the substrate 101, the material used for the substrate 502 described in Embodiment 2 can be referenced.

[0085] A portion of scan line 103 serves as the gate electrode of transistor 136. Scan line 103 can be formed in a single layer or stack using metallic materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, or nickel, or alloys with these materials as the main components. Alternatively, semiconductors typically using polycrystalline silicon doped with impurity elements such as phosphorus, Ag-Pd-Cu alloys, Al-Nd alloys, Al-Ni alloys, etc., can also be used.

[0086] For example, as a two-layer structure for the scan line 103, the following structures are preferred: a two-layer structure with a molybdenum film stacked on an aluminum film; a two-layer structure with a molybdenum film stacked on a copper film; a two-layer structure with a titanium nitride film or a tantalum nitride film stacked on a copper film; a two-layer structure with a titanium nitride film and a molybdenum film stacked; a two-layer structure with an oxygen-containing copper-magnesium alloy film and a copper film stacked; a two-layer structure with an oxygen-containing copper-manganese alloy film and a copper film stacked; a two-layer structure with a copper-manganese alloy film and a copper film, etc. As a three-layer structure, a three-layer structure with a tungsten film or a tungsten nitride film, an aluminum and silicon alloy film or an aluminum and titanium alloy film, and a titanium nitride film or a titanium film stacked are preferred. By stacking a metal film used as a barrier film on a low-resistance film, the resistance can be reduced, and the diffusion of metal elements from the metal film into the semiconductor film can be prevented. In addition, as a material for the scan line 103, the material used for the conductive film 504 described in Embodiment 2 can be referred to.

[0087] In addition, capacitor wiring 105a and capacitor wiring 105b have the same material and stacked structure as scan line 103.

[0088] The gate insulating film 107 can be formed as a single layer or in a stack using silicon oxide film, silicon oxynitride film, silicon nitride film, silicon oxynitride film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film, or aluminum oxynitride film. In this embodiment, the gate insulating film 107 is a stacked structure of gate insulating film 107a and gate insulating film 107b. Furthermore, the materials used for gate insulating film 107a and gate insulating film 107b can refer to the materials used for insulating film 506 and insulating film 507 described in Embodiment 2.

[0089] As the semiconductor film 135, a silicon film or an oxide semiconductor film can be used. The semiconductor film 135 can suitably have an amorphous structure, a polycrystalline structure, a single crystal structure, or other crystalline structures.

[0090] In particular, an oxide semiconductor film is preferably used as the semiconductor film 135. Specifically, In-M (M is aluminum, gallium, yttrium, or tin) oxide or In-M-Zn oxide can be used. It is especially preferred that oxide semiconductor films 135a and 135b, which have different compositions, be used as the semiconductor film 135. As the materials used for oxide semiconductor films 135a and 135b, the materials used for oxide semiconductor films 508a and 508b described in Embodiment 2 can be referenced.

[0091] The first electrode 123 and the second electrode 125a can be formed in a single layer or in a stack using aluminum, copper, titanium, neodymium, scandium, molybdenum, chromium, tantalum, or tungsten, etc. Alternatively, aluminum alloys (such as Al-Nd alloys suitable for scan line 103) with added elements to prevent hillocks can be used to form the first electrode 123 and the second electrode 125a. Furthermore, crystalline silicon with added impurity elements as donors can also be used. Additionally, a stacked structure can be adopted in which a film is formed on the side in contact with crystalline silicon containing added impurity elements as donors using titanium, tantalum, molybdenum, tungsten, or nitrides of these elements, and aluminum or an aluminum alloy is formed thereon. Moreover, a stacked structure can be adopted in which the top and bottom surfaces of aluminum or an aluminum alloy are sandwiched between titanium, tantalum, molybdenum, tungsten, or nitrides of these elements. Furthermore, the materials used for the first electrode 123 and the second electrode 125a can refer to the materials used for the conductive films 512a and 512b described in Embodiment 2.

[0092] The signal line 121 and the third electrode 125b have the same material and stacked structure as the first electrode 123.

[0093] In this embodiment, the insulating film 116 is a stacked structure of insulating films 116a, 116b, and 116c. For the materials and forming methods used for insulating films 116a, 116b, and 116c, please refer to the descriptions of insulating films 514, 516, and 518 used in Embodiment 2. Furthermore, the insulating film 116 can be formed as a single layer or in a stack using the same material as the gate insulating film 107.

[0094] The pixel electrode 139a can be formed in a single layer or in layers using metal films such as molybdenum, titanium, tantalum, tungsten, aluminum, silver, copper, chromium, neodymium, and scandium, or alloy films containing these metals. Examples of aluminum-containing alloys include aluminum-nickel-lanthanum alloys, aluminum-titanium alloys, and aluminum-neodymium alloys. Examples of silver-containing alloys include silver-neodymium alloys and magnesium-silver alloys. Furthermore, alloys containing gold and copper can be used. Additionally, metal nitride films containing titanium nitride, molybdenum nitride, tungsten nitride, etc., can also be used. The material used for the pixel electrode 139a can refer to the material used for the conductive film 520 described in Embodiment 2. The pixel electrode 139b has the same material and layered structure as the pixel electrode 139a.

[0095] Alternatively, oxide semiconductor films can also be used as pixel electrodes. Figure 5 A top view of a pixel 100 including pixel electrodes 148 and 149 using an oxide semiconductor film is shown. Figure 6 for Figure 5 The cross-sectional structure of transistor 136 and capacitor element 145 between the dotted and dashed lines CD is shown.

[0096] In this specification, the oxide conductive film may be referred to as an oxide semiconductor film with high carrier density and low resistance, an oxide semiconductor film with conductivity, or an oxide semiconductor film with high conductivity, etc.

[0097] If an oxide semiconductor film is used as the pixel electrode 148, and an oxide semiconductor film is also used as the semiconductor film 135, both the semiconductor film 135 and the pixel electrode 148 can be formed in the same process, which is preferred. In the oxide semiconductor film, the resistivity can be controlled based on the concentration of oxygen defects and / or impurities such as hydrogen and water in the film. Therefore, by selectively performing a process to increase or decrease the concentration of oxygen defects and / or impurities on the oxide semiconductor film processed into an island shape, the resistivity of both the semiconductor film 135 and the pixel electrode 148 formed in the same process can be controlled.

[0098] Specifically, by plasma treating the island-shaped oxide semiconductor films 148a and 148b, which will be used as pixel electrodes 148, oxygen defects and / or impurities such as hydrogen and water in the oxide semiconductor films are increased, thereby achieving oxide semiconductor films with high carrier density and low resistance. On the other hand, insulating films 116a and 116b are provided on the transistor 136 to prevent the oxide semiconductor films 135a and 135b from being exposed to the aforementioned plasma treatment. Figure 6 In this process, insulating films 116a and 116b are provided in such a way that areas overlapping with oxide conductive films 148a and 148b are selectively removed.

[0099] Plasma treatment of oxide conductive films 148a and 148b typically includes plasma treatment using one or more gases selected from rare gases (He, Ne, Ar, Kr, Xe), phosphorus, boron, hydrogen, and nitrogen. More specifically, examples include plasma treatment under an Ar atmosphere, plasma treatment under a mixed atmosphere of Ar and hydrogen, plasma treatment under an ammonia atmosphere, plasma treatment under a mixed atmosphere of Ar and ammonia, or plasma treatment under a nitrogen atmosphere.

[0100] Furthermore, pixel electrode 149 and pixel electrode 148 have the same material and stacked structure. Additionally, in Figure 5 and Figure 6 In the pixel 100 shown, the capacitor element 145 includes a capacitor wiring 105a, a pixel electrode 148, and a gate insulating film 107 disposed between the capacitor wiring 105a and the pixel electrode 148. Additionally, the capacitor element 146 includes a capacitor wiring 105b, a pixel electrode 149, and a gate insulating film 107 disposed between the capacitor wiring 105b and the pixel electrode 149.

[0101] A more detailed description of the structure and manufacturing method of transistor 136 will be provided in Embodiment 2. By using the transistor described in Embodiment 2 in the pixel 100 described in this embodiment, the power consumption of the display device according to one aspect of the present invention can be reduced.

[0102] [Examples of pixel structure variations]

[0103] The following refers to Figures 7 to 7. Figure 9 The structure of a pixel in a liquid crystal display device having a different structure from the aforementioned pixel 100 will be described.

[0104] Figure 7A This is a top view of a pixel 300 of the multi-domain liquid crystal display device shown in this embodiment. Figure 7B Show Figure 7A The circuit diagram for pixel 300 is shown.

[0105] like Figure 7A and Figure 7B As shown, pixel 300 includes a scan line 303 and a signal line 321 intersecting the scan line 303. Signal line 321 includes a region overlapping with pixel electrode 339a and pixel electrode 339b. Pixel 300 also includes capacitor wiring 305a and capacitor wiring 305b extending in the same direction as signal line 321. In other words, signal line 321 does not include a region overlapping with capacitor wiring 305a and capacitor wiring 305b. Furthermore, capacitor wiring 305a and capacitor wiring 305b are electrically connected to pixel electrode 339a and pixel electrode 339b, respectively. Signal line 321 is disposed between capacitor wiring 305a and capacitor wiring 305b.

[0106] Transistors 336 and 337 are disposed near the intersection of scan line 303 and signal line 321. Transistor 336 includes a semiconductor film 335 overlapping with scan line 303, and a sixth electrode 323a and a seventh electrode 325a overlapping semiconductor film 335. The sixth electrode 323a is electrically connected to signal line 321. The sixth electrode 323a serves as one of the source and drain electrodes in transistor 336. The seventh electrode 325a serves as the other of the source and drain electrodes in transistor 336.

[0107] Transistor 337 includes a semiconductor film 335 overlapping with scan line 303, and an eighth electrode 323b and a ninth electrode 325b overlapping with semiconductor film 335. The eighth electrode 323b is electrically connected to signal line 321. The eighth electrode 323b serves as one of the source and drain electrodes in transistor 337. The ninth electrode 325b serves as the other of the source and drain electrodes in transistor 337.

[0108] The seventh electrode 325a of transistor 336 is electrically connected to pixel electrode 339a through opening 344a. In other words, transistor 336 is connected to liquid crystal element 342, which includes pixel electrode 339a, through seventh electrode 325a. Additionally, one electrode of capacitor element 340 is electrically connected to pixel electrode 339a and seventh electrode 325a of transistor 336, and the other electrode 345a is electrically connected to capacitor wiring 305a through opening 346a.

[0109] The ninth electrode 325b of transistor 337 is electrically connected to pixel electrode 339b through opening 344b. In other words, transistor 337 is connected to liquid crystal element 343, which includes pixel electrode 339b, through ninth electrode 325b. Additionally, one electrode of capacitor element 341 is electrically connected to pixel electrode 339b and the ninth electrode 325b of transistor 337, while the other electrode 345b is electrically connected to capacitor wiring 305b through opening 346b.

[0110] Openings 344a and 344b are disposed in the insulating film 316, which will be described later. Openings 346a and 346b are disposed in the gate insulating film 307, which will be described later. Furthermore, to avoid complicating the drawings, in... Figure 7A In the image, no shadow lines are added to pixel electrodes 339a and 339b; only the outline of the top surface shape is shown with dashed lines.

[0111] Transistors 336 and 337 are located approximately at the center of pixel 300 in the top surface shape, and are formed between pixel electrodes 339a and 339b of each sub-pixel in pixel 300.

[0112] The sixth electrode 323a and the eighth electrode 323b of transistors 336 and 337, which serve as one of the source and drain electrodes, overlap with the scan line 303 at the overlap of the signal line 321 and the scan line 303. By adopting this structure, the parasitic capacitance generated between one electrode of transistors 336 and 337 and the scan line 303 can be reduced in a pixel 300 constituting a display element. In addition, the seventh electrode 325a and the ninth electrode 325b of transistors 336 and 337, which serve as the other of the source and drain electrodes, respectively, overlap with the scan line 303.

[0113] In addition, such as Figure 7BAs shown, in transistor 336, a parasitic capacitance C21 is generated at the overlap between scan line 303 and the seventh electrode 325a. Additionally, in transistor 337, a parasitic capacitance C22 is generated at the overlap between scan line 303 and the ninth electrode 325b. Furthermore, a parasitic capacitance C25 is generated at the overlap between signal line 321 and scan line 303. The sixth electrode 323a and the eighth electrode 323b overlap with scan line 303 at the overlap between signal line 321 and scan line 303; therefore, the parasitic capacitances generated at the overlaps of the sixth electrode 323a and scan line 303, and the eighth electrode 323b and scan line 303, are included in the aforementioned parasitic capacitance C25.

[0114] Here, a comparison is made between pixel 300, which includes transistors 336 and 337, and pixel 100, which includes transistors 136 and 137. Since the area of ​​the overlap between the seventh electrode 325a and scan line 303 is larger than the area of ​​the overlap between the second electrode 125a and scan line 103, the parasitic capacitance C21 is greater than the parasitic capacitance C1. Furthermore, since the area of ​​the overlap between the ninth electrode 325b and scan line 303 is larger than the area of ​​the overlap between the third electrode 125b and scan line 103, the parasitic capacitance C22 is greater than the parasitic capacitance C2. Additionally, if the areas of the overlap between scan line 303 and signal line 321 and the areas of the overlap between scan line 103 and signal line 121 are approximately the same, the parasitic capacitances C25 and C5 will be approximately the same.

[0115] Furthermore, in pixel 100, parasitic capacitances C6 and C7 are generated at the overlapping portions of signal line 121 and capacitor wiring 105a, and at the overlapping portions of signal line 121 and capacitor wiring 105b, respectively. On the other hand, in pixel 300, signal line 321 does not include the area overlapping with capacitor wiring 305a and capacitor wiring 305b, therefore no parasitic capacitance is generated between signal line 321 and capacitor wiring 305a, and between signal line 321 and capacitor wiring 305b.

[0116] In a liquid crystal display device comprising multiple pixels, parasitic capacitances that cause signal transmission delays in signal lines have a smaller impact on signal transmission delays when generated in the portion of the signal transmission path closer to the end of the transistor. For example, in pixel 100, the parasitic capacitance C1 generated in the overlap portion of scan line 103 and second electrode 125a has a smaller impact on the signal transmission delay of signal line 121 than the parasitic capacitance C6 generated in the overlap portion of signal line 121 and capacitor wiring 105a. This is because, in a liquid crystal display device, if it is parasitic capacitance C6, the same number of parasitic capacitances C6 as those overlapping a signal line 121 will affect signal transmission; however, if it is parasitic capacitance C1, it will affect signal transmission when a transistor 136 connected to a signal line 121 is in a conducting state. Therefore, although the parasitic capacitance of pixel 300 is larger than that of pixel 100, the difference is equal to the difference between parasitic capacitance C21 and parasitic capacitance C1 and the difference between parasitic capacitance C22 and parasitic capacitance C2. However, the parasitic capacitances C6 and C7 generated in pixel 100 are not generated in pixel 300. Therefore, the parasitic capacitance that causes signal transmission delay in the signal lines included in the liquid crystal display device can be reduced.

[0117] In addition, such as Figure 7C As shown, the end of the semiconductor film 335 can also extend in the extension direction of the signal line 321, and the seventh electrode 325a and the ninth electrode 325b can be arranged with small areas of the overlap between the seventh electrode 325a and the scan line 303 and the overlap between the ninth electrode 325b and the scan line 303. By adopting this structure, the parasitic capacitances C21 and C22 mentioned above can be reduced. In addition, as Figure 7D As shown, the semiconductor film 335 can also be positioned such that, in the top view, the end of the semiconductor film 335 is located outside the overlap of the signal line 321 and the scan line 303. By forming a semiconductor film 335 between the signal line 321 and the scan line 303 in addition to the gate insulating film 307, the parasitic capacitance generated at the overlap of the signal line 321 and the scan line 303 can sometimes be reduced.

[0118] In addition, such as Figure 8A and Figure 8B As shown, in pixel 300, adjacent pixels can also share capacitor wiring 305a and capacitor wiring 305b. By adopting this structure, the number of capacitor wirings included in the display device can be reduced. Furthermore, as... Figure 8A As shown, by increasing the area of ​​the overlap between pixel electrode 339a and capacitor wiring 305a, the capacitance of capacitor element 340 can be increased. Similarly, by increasing the area of ​​the overlap between pixel electrode 339b and capacitor wiring 305b, the capacitance of capacitor element 341 can be increased.

[0119] Next, refer to Figure 9 The structure of the transistors and capacitors included in pixel 300 is explained.

[0120] Figure 9 Show Figure 7A The cross-sectional structure of transistor 336 and capacitor element 340 between the dotted and dashed lines CD is shown.

[0121] The transistor 336 includes a scan line 303, a semiconductor film 335, a gate insulating film 307 disposed between the scan line 303 and the semiconductor film 335, a sixth electrode 323a in contact with the semiconductor film 335, and a seventh electrode 325a in contact with the semiconductor film 335 on the substrate 301.

[0122] The capacitor element 340 includes an electrode 345a, a seventh electrode 325a, and a gate insulating film 307 disposed between the electrode 345a and the seventh electrode 325a on the substrate 301.

[0123] Additionally, a capacitor wiring 305a is provided on the gate insulating film 307, which is electrically connected to the electrode 345a through an opening 346a provided in the gate insulating film 307. An insulating film 316 is provided on the gate insulating film 307, the semiconductor film 335, the sixth electrode 323a, the seventh electrode 325a, and the capacitor wiring 305a. A pixel electrode 339a is provided on the insulating film 316, which is electrically connected to the seventh electrode 325a through an opening 344a provided in the insulating film 316.

[0124] Although not shown, transistor 337 has the same structure as transistor 336. Furthermore, capacitor elements 341 and 340 are composed of the same constituent elements.

[0125] Each layer constituting transistor 336 and capacitor element 340 has the same material and stacked structure as each layer constituting transistor 136 and capacitor element 140. Furthermore, the insulating film 316 and pixel electrode 339a can be made of the same materials as the insulating film 116 and pixel electrode 139a, respectively. Additionally, the electrode 345a and capacitor wiring 305a are made of the same materials as the scan line 303 and sixth electrode 323a, respectively.

[0126] A more detailed description of the structure and manufacturing method of transistor 336 will be provided in Embodiment 2. By using the transistor described in Embodiment 2 in the pixel 300 described in this embodiment, the power consumption of the display device according to one aspect of the present invention can be reduced.

[0127] When pixel 100 or pixel 300 as described in this embodiment is included, the multi-domain liquid crystal display device can reduce the parasitic capacitance generated between scan lines and signal lines (in other words, between scan lines used as gate electrodes of transistors and signal lines used as one of the source and drain electrodes of transistors). Furthermore, when pixel 300 as described in this embodiment is included, the multi-domain liquid crystal display device can reduce the parasitic capacitance generated between signal lines and capacitor wiring. Therefore, the display quality of large-format liquid crystal display devices, high-speed driven liquid crystal display devices, and high-resolution liquid crystal display devices can be improved, in particular. In addition, the power consumption of the liquid crystal display device can be reduced.

[0128] Furthermore, although this embodiment shows a structure with two transistors in one pixel, it is not limited to this. A pixel may also include three or more transistors and multiple pixel electrodes connected to those transistors.

[0129] The structure shown in this embodiment can be implemented by appropriately combining it with the structures shown in other embodiments.

[0130] Implementation Method 2

[0131] In this embodiment, refer to Figures 10 to 10. Figure 18 This invention describes a semiconductor device and a method for manufacturing the semiconductor device.

[0132] <Structure Example of a Semiconductor Device 1>

[0133] Figure 14C This is a top view of a transistor 500, which is a semiconductor device according to one aspect of the present invention. Figure 14B Equivalent to along Figure 14C The diagram shows cross-sectional views of the sections along the dotted-dashed line X1-X2 and Y1-Y2. Additionally, Figures 10A to 14A This is an explanation Figure 14B The diagram shows a cross-sectional view of the manufacturing process of transistor 500.

[0134] In addition, Figure 14C For simplicity, some of the constituent elements of transistor 500 (such as the insulating film used as the gate insulating film) are omitted. Furthermore, the direction of the dotted line X1-X2 is sometimes referred to as the channel length direction, and the direction of the dotted line Y1-Y2 is sometimes referred to as the channel width direction. Note that this is sometimes also used in the top view of the transistor later. Figure 14C Similarly, a portion of the constituent elements is omitted.

[0135] Transistor 500 includes: a conductive film 504 serving as a gate electrode on a substrate 502; an insulating film 506 on the substrate 502 and the conductive film 504; an insulating film 507 on the insulating film 506; an oxide semiconductor film 508 on the insulating film 507; a conductive film 512a serving as a source electrode electrically connected to the oxide semiconductor film 508; and a conductive film 512b serving as a drain electrode electrically connected to the oxide semiconductor film 508. Specifically, insulating films 514, 516, and 518 are disposed on the conductive films 512a, 512b, and the oxide semiconductor film 508 in transistor 500. The insulating films 514, 516, and 518 function as protective insulating films for transistor 500. Note that insulating film 514 is sometimes referred to as a first protective insulating film, and insulating film 516 as a second protective insulating film.

[0136] Furthermore, the oxide semiconductor film 508 includes a first oxide semiconductor film 508a on one side of the conductive film 504, which serves as the gate electrode, and a second oxide semiconductor film 508b on the first oxide semiconductor film 508a. Additionally, the insulating films 506 and 507 function as the gate insulating films of the transistor 500.

[0137] As the oxide semiconductor film 508, In-M (where M is aluminum, gallium, yttrium, or tin) oxide or In-M-Zn oxide can be used. In particular, In-M-Zn oxide is preferred as the oxide semiconductor film 508.

[0138] Furthermore, the first oxide semiconductor film 508a preferably contains more oxides than the second oxide semiconductor film 508b, which contain more In atoms relative to the number of atoms of M.

[0139] By having the first oxide semiconductor film 508a have a composition in which the atomic ratio of In is greater than the atomic ratio of M, the field-effect mobility (sometimes simply referred to as mobility or μFE) of the transistor 500 can be improved. Specifically, the field-effect mobility of the transistor 500 can exceed 10 cm⁻¹. 2 / Vs, preferably, exceeding 30cm 2 / Vs.

[0140] For example, by using the aforementioned high field-effect mobility transistors as gate drivers (in particular, demultiplexers connected to the output terminals of shift registers included in the gate driver) to generate gate signals, semiconductor devices or display devices with narrow bezel widths (also known as narrow bezels) can be provided.

[0141] On the other hand, by having the first oxide semiconductor film 508a have a composition where the ratio of In atoms is greater than the ratio of M atoms, the electrical characteristics of the transistor 500 are easily altered during light irradiation. However, in a semiconductor device according to one aspect of the present invention, a second oxide semiconductor film 508b is formed on the first oxide semiconductor film 508a. Because the second oxide semiconductor film 508b has a composition where the ratio of In atoms is less than that of the first oxide semiconductor film 508a, its band gap Eg is greater than that of the first oxide semiconductor film 508a. Therefore, the oxide semiconductor film 508 having the stacked structure of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b exhibits higher resistance to optical negative bias stress testing.

[0142] By employing the oxide semiconductor film with the above-described structure, the amount of light absorbed by the oxide semiconductor film 508 during light irradiation can be reduced. Therefore, it is possible to suppress changes in the electrical characteristics of the transistor 500 during light irradiation.

[0143] Furthermore, when oxygen defects are formed in the oxide semiconductor film 508 of the transistor 500, electrons are generated as charge carriers, thereby easily achieving always-on characteristics. Note that the always-on characteristic of a transistor refers to the characteristic of current flow (e.g., the current (Ids) between the drain and source) when the gate voltage Vg = 0V. Therefore, in order to obtain stable transistor characteristics, it is important to reduce oxygen defects in the oxide semiconductor film 508, especially to reduce oxygen defects in the first oxide semiconductor film 508a. Thus, in the structure of a transistor according to one aspect of the present invention, excess oxygen is introduced into the insulating film on the oxide semiconductor film 508, specifically into the insulating film 514 and / or the insulating film 516 on the oxide semiconductor film 508, causing oxygen to move from the insulating film 514 and / or the insulating film 516 into the oxide semiconductor film 508, thereby filling the oxygen defects in the oxide semiconductor film 508, especially filling the oxygen defects in the first oxide semiconductor film 508a. Alternatively, when the first barrier film 531 is formed on the insulating film 516, excess oxygen is introduced into the insulating film 516, causing oxygen to move from the insulating film 516 into the oxide semiconductor film 508, thereby filling oxygen defects in the oxide semiconductor film 508, especially filling oxygen defects in the first oxide semiconductor film 508a.

[0144] Furthermore, insulating films 514 and 516 more preferably have regions containing oxygen exceeding their stoichiometric composition (oxygen excess regions). In other words, insulating films 514 and 516 are insulating films capable of releasing oxygen. Moreover, to create oxygen excess regions in insulating films 514 and 516, oxygen excess regions can be formed, for example, by introducing oxygen into the insulating films 514 and 516 after film formation. Methods for introducing oxygen include ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, etc.

[0145] Furthermore, in order to fill oxygen defects in the first oxide semiconductor film 508a, it is preferable to form a thin layer near the channel region of the second oxide semiconductor film 508b. For example, the thickness near the channel region of the second oxide semiconductor film 508b is preferably 1 nm or more and 20 nm or less, more preferably 3 nm or more and 10 nm or less.

[0146] Furthermore, in order to fill the oxygen defects in the first oxide semiconductor film 508a, it is preferable to have high oxygen permeability in the second oxide semiconductor film 508b. By making the second oxide semiconductor film 508b highly permeable to oxygen, excess oxygen in the insulating film 514 and the insulating film 516 can be effectively allowed to permeate into the first oxide semiconductor film 508a.

[0147] Thus, in one embodiment of the semiconductor device of the present invention, by making the oxide semiconductor film a stacked structure and by including excess oxygen in the insulating film in contact with the oxide semiconductor film, a highly reliable semiconductor device can be provided. Furthermore, in one embodiment of the present invention, the temperature in the manufacturing process of the semiconductor device having the above structure can be reduced (typically below 400°C or below 375°C (preferably above 340°C and below 360°C)). The manufacturing process of the semiconductor device will be described later.

[0148] The other constituent elements included in the semiconductor device of this embodiment will now be described in detail.

[0149] <Substrate>

[0150] While there are no particular restrictions on the material of substrate 502, it must at least possess heat resistance capable of withstanding subsequent heat treatments. For example, glass substrates, ceramic substrates, quartz substrates, sapphire substrates, etc., can be used as substrate 502. Additionally, single-crystal or polycrystalline semiconductor substrates made of silicon or silicon carbide, compound semiconductor substrates made of silicon-germanium, SOI (Silicon on Insulator) substrates, etc., can also be used. Substrates on which semiconductor elements are disposed can also be used as substrate 502. When a glass substrate is used as substrate 502, large-area display devices can be manufactured by using large-area substrates of the 6th, 7th, 8th, 9th, and 10th generations. Using such large-area substrates reduces manufacturing costs and is therefore preferred.

[0151] A flexible substrate can also be used as substrate 502, and transistor 500 can be formed directly on the flexible substrate. Alternatively, a release layer can be provided between substrate 502 and transistor 500. The release layer can be used when a part or all of a semiconductor device is fabricated on the release layer, and then it is separated from substrate 502 and transferred to another substrate. In this case, transistor 500 can also be transferred to a substrate with low heat resistance or a flexible substrate.

[0152] <Conductive film used as gate electrode, source electrode, and drain electrode>

[0153] The conductive film 504 used as the gate electrode, the conductive film 512a used as the source electrode, and the conductive film 512b used as the drain electrode can all be formed using metal elements selected from chromium (Cr), copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), and cobalt (Co), alloys with the above metal elements as components, or alloys combining the above metal elements.

[0154] Furthermore, conductive films 504, 512a, and 512b can also have a single-layer structure or a stacked structure of two or more layers. Examples include a single-layer structure of an aluminum film containing silicon, a two-layer structure of a titanium film stacked on an aluminum film, a two-layer structure of a titanium film stacked on a titanium nitride film, a two-layer structure of a tungsten film stacked on a titanium nitride film, a two-layer structure of a tantalum nitride film or a tungsten nitride film stacked on a tungsten film, and a three-layer structure of a titanium film, an aluminum film, and a titanium film stacked sequentially. Additionally, alloy films or nitride films formed by combining aluminum with one or more of titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium can also be used.

[0155] Conductive films 504, 512a, and 512b can also use transparent and conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with added silicon oxide.

[0156] Alternatively, Cu-X alloy films (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be used as conductive films 504, 512a, and 512b. By using Cu-X alloy films, processing can be performed through a wet etching process, thereby reducing manufacturing costs.

[0157] <Insulating film used as gate insulating film>

[0158] The insulating films 506 and 507, which serve as the gate insulating films of the transistor 500, can each be made of one or more insulating films selected from silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, aluminum oxide, hafnium oxide, yttrium oxide, zirconium oxide, gallium oxide, tantalum oxide, magnesium oxide, lanthanum oxide, cerium oxide, and neodymium oxide, formed by plasma-enhanced chemical vapor deposition (PECVD), sputtering, or other methods. Note that single-layer or triple-layer insulating films selected from the above materials can also be used instead of a stacked structure of insulating films 506 and 507.

[0159] The insulating film 506 functions as a barrier film that inhibits oxygen permeation. For example, when excess oxygen is supplied to the insulating films 507, 114, 516 and / or the oxide semiconductor film 508, the insulating film 506 can inhibit oxygen permeation.

[0160] The insulating film 507 that contacts the oxide semiconductor film 508, which serves as the channel region of the transistor 500, is preferably an oxide insulating film, and more preferably includes a region containing oxygen in excess of its stoichiometric composition (oxygen excess region). In other words, the insulating film 507 is an insulating film capable of releasing oxygen. To create an oxygen excess region in the insulating film 507, the insulating film 507 can be formed, for example, in an oxygen atmosphere. Alternatively, oxygen can be introduced into the insulating film 507 after film formation to form an oxygen excess region. As a method for introducing oxygen, ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, etc., can be used.

[0161] Furthermore, when hafnium oxide is used as the insulating film 507, the following effects occur: Hafnium oxide has a higher relative permittivity than silicon oxide or silicon oxynitride. Therefore, the thickness of the insulating film 507 can be greater than when using silicon oxide or silicon oxynitride, thereby reducing leakage current caused by tunneling current. In other words, a transistor with a small off-state current can be realized. Moreover, hafnium oxide with a crystalline structure has a higher relative permittivity than hafnium oxide with an amorphous structure. Therefore, hafnium oxide with a crystalline structure is preferred for forming a transistor with a small off-state current. Examples of crystalline structures include monoclinic or cubic crystal systems. Note that one aspect of the invention is not limited to this.

[0162] Note that in this embodiment, a silicon nitride film is formed as the insulating film 506, and a silicon oxide film is formed as the insulating film 507. Compared to a silicon oxide film, a silicon nitride film has a higher relative permittivity and requires a larger thickness to obtain an electrostatic capacitance equal to that of a silicon oxide film. Therefore, by including a silicon nitride film in the gate insulating film of the transistor 500, the physical thickness of the insulating film can be increased. Thus, electrostatic discharge damage to the transistor 500 can be suppressed by inhibiting the decrease in its dielectric withstand voltage and increasing the dielectric withstand voltage.

[0163] <Oxide Semiconductor Films>

[0164] The aforementioned materials can be used as the oxide semiconductor film 508. When the oxide semiconductor film 508 is an In-M-Zn oxide, the atomic ratio of the metal elements in the sputtering target used to form the In-M-Zn oxide preferably satisfies In≥M and Zn≥M. The preferred atomic ratios of the metal elements in this sputtering target are In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, and In:M:Zn = 4:2:4.1. Furthermore, when the oxide semiconductor film 508 is an In-M-Zn oxide, a target containing polycrystalline In-M-Zn oxide is preferably used as the sputtering target. By using a target containing polycrystalline In-M-Zn oxide, a crystalline oxide semiconductor film 508 can be easily formed. Note that the atomic ratio of the formed oxide semiconductor film 508 includes an error within ±40% of the atomic ratio of the metal elements in the sputtering target. For example, when the atomic ratio In:Ga:Zn = 4:2:4.1 is used as the sputtering target, the atomic ratio of the formed oxide semiconductor film 508 is sometimes around In:Ga:Zn = 4:2:3.

[0165] For example, the first oxide semiconductor film 508a can be formed using sputtering targets with In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:4.1, etc. The preferred atomic ratio of the first oxide semiconductor film 508a is In:M:Zn = 4:α1 (1.5 ≤ α1 ≤ 2.5):α2 (2.5 ≤ α2 ≤ 3.5).

[0166] In addition, the second oxide semiconductor film 508b can be formed using the above sputtering targets such as In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, etc. The atomic ratio of the second oxide semiconductor film 508b is preferably In:M:Zn = 1:β1 (0.8 ≤ β1 ≤ 1.2):β2 (0.8 ≤ β2 ≤ 1.2). In addition, as the atomic ratio of the metal element of the sputtering target for the second oxide semiconductor film 508b, it is not necessarily required to satisfy both In ≥ M and Zn ≥ M at the same time, and it can also satisfy In < M and / or Zn < M. Specifically, examples include In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, etc.

[0167] The energy gap of the oxide semiconductor film 508 is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. Thus, by using an oxide semiconductor with a relatively wide energy gap, the off-state current of the transistor 500 can be reduced. In particular, an oxide semiconductor film having an energy gap of 2.0 eV or more, preferably 2.0 eV or more and 3.0 eV or less is used as the first oxide semiconductor film 508a, and an oxide semiconductor film having an energy gap of 2.5 eV or more and 3.5 eV or less is used as the second oxide semiconductor film 508b. In addition, it is preferable that the energy gap of the second oxide semiconductor film 508b is greater than the energy gap of the first oxide semiconductor film 508a.

[0168] In addition, the thicknesses of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b are each 3 nm or more and 200 nm or less, preferably each 3 nm or more and 100 nm or less, and more preferably each 3 nm or more and 50 nm or less.

[0169] In addition, an oxide semiconductor film with a low carrier density is used as the first oxide semiconductor film 508a. For example, the carrier density of the first oxide semiconductor film 508a can be lower than 8×10 11 / cm 3 , preferably lower than 1×10 11 / cm 3 , more preferably lower than 1×10 10 / cm 3 , and 1×10 -9 / cm 3 or more. In addition, an oxide semiconductor film with a relatively low carrier density is used as the second oxide semiconductor film 508b. For example, the carrier density of the second oxide semiconductor film 508b can be 1×10 17 / cm 3 or less, preferably 1×10 15 / cm 3 or less, more preferably 1×10 13 / cm3 Hereinafter, 1×10 is further preferred. 11 / cm 3 the following.

[0170] This invention is not limited to the above description; materials with appropriate compositions can be used according to the desired semiconductor and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. Furthermore, it is preferable to appropriately set the carrier density, impurity concentration, defect density, ratio of metal elements to oxygen atoms, interatomic distance, and density of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b to obtain the desired semiconductor characteristics of the transistor.

[0171] Using oxide semiconductor films with low impurity concentration and low defect state density as the first oxide semiconductor film 508a and the second oxide semiconductor film 508b is preferred because it allows the fabrication of transistors with superior electrical characteristics. Here, the state of low impurity concentration and low defect state density (few oxygen defects) is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". Because high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have fewer carrier generation sources, the carrier density can be reduced. Therefore, transistors with a channel region formed in this oxide semiconductor film rarely exhibit negative threshold voltage characteristics (also known as always-on characteristics). Because high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have a low defect state density, they are likely to have a low trap state density. The off-state current of high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films is significantly low, even with a channel width of 1×10⁻⁶. 6 For a device with a diameter of μm and a channel length L of 10μm, when the voltage between the source and drain electrodes (drain voltage) is in the range of 1V to 10V, the off-state current can also be below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10⁻⁶. -13 Below A.

[0172] Therefore, transistors with channel regions formed in oxide semiconductor films of high intrinsic purity or substantially high intrinsic purity can be transistors with small variations in electrical characteristics and high reliability. Furthermore, the charge trapped in the trap levels of the oxide semiconductor film requires a relatively long time to dissipate, sometimes acting like a fixed charge. Therefore, transistors with channel regions formed in oxide semiconductor films with high trap state density sometimes exhibit unstable electrical characteristics. Impurities include hydrogen, nitrogen, alkali metals, or alkaline earth metals.

[0173] Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, while oxygen defects are formed in the lattice (or the portion where oxygen desorption occurs) during this process. When hydrogen enters this oxygen defect, electrons are sometimes generated as charge carriers. Additionally, sometimes a portion of the hydrogen bonds with oxygen bonded to metal atoms, generating electrons as charge carriers. Therefore, transistors using oxide semiconductor films containing hydrogen tend to have always-on characteristics. Thus, it is preferable to minimize the amount of hydrogen in the oxide semiconductor film 508. Specifically, the hydrogen concentration in the oxide semiconductor film 508, measured using SIMS (Secondary Ion Mass Spectrometry), is 2 × 10⁻⁶. 20 atoms / cm 3 The following is preferred: 5×10 19 atoms / cm 3 Hereinafter, 1×10 is more preferred. 19 atoms / cm 3 The following is more preferably 5×10 18 atoms / cm 3 Hereinafter, 1×10 is more preferred. 18 atoms / cm 3 The following is more preferably 5×10 17 atoms / cm 3 Hereinafter, 1×10 is more preferred. 16 atoms / cm 3 the following.

[0174] Furthermore, the first oxide semiconductor film 508a preferably includes a portion in which its hydrogen concentration is lower than that of the second oxide semiconductor film 508b. By including a portion in the first oxide semiconductor film 508a in which its hydrogen concentration is lower than that of the second oxide semiconductor film 508b, a highly reliable semiconductor device can be provided.

[0175] Furthermore, when the first oxide semiconductor film 508a contains silicon or carbon, one of the elements in Group 14, the oxygen defects in the first oxide semiconductor film 508a increase, leading to the n-type formation of the first oxide semiconductor film 508a. Therefore, the concentration of silicon or carbon in the first oxide semiconductor film 508a, and the concentration of silicon or carbon near the interface with the first oxide semiconductor film 508a (the concentration measured by SIMS analysis), is 2 × 10⁻⁶. 18 atoms / cm 3 The following is preferred: 2×10 17 atoms / cm 3 the following.

[0176] Furthermore, in the first oxide semiconductor film 508a, the concentration of alkali metal or alkaline earth metal, as measured by SIMS analysis, is 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferred: 2×10 16 atoms / cm 3 The following applies. When alkali metals and alkaline earth metals bond with oxide semiconductors, charge carriers are sometimes generated, which increases the off-state current of the transistor. Therefore, it is preferable to reduce the concentration of alkali metals or alkaline earth metals in the first oxide semiconductor film 508a.

[0177] When nitrogen is present in the first oxide semiconductor film 508a, electrons are generated as charge carriers, increasing the charge carrier density and causing the first oxide semiconductor film 508a to become n-type. As a result, transistors using nitrogen-containing oxide semiconductor films tend to have always-on characteristics. Therefore, it is preferable to minimize the nitrogen content in the oxide semiconductor film as much as possible. For example, the nitrogen concentration measured by SIMS analysis is preferably 5 × 10⁻⁶. 18 atoms / cm 3 the following.

[0178] The first oxide semiconductor film 508a and the second oxide semiconductor film 508b may each have a non-single-crystal structure. Non-single-crystal structures include, for example, CAAC-OS (C-axis Aligned Crystalline Oxide Semiconductor), polycrystalline structures, microcrystalline structures, or amorphous structures. Among non-single-crystal structures, amorphous structures have the highest defect state density, while CAAC-OS has the lowest defect state density.

[0179] Here, refer to Figure 18 This describes the band structure of the oxide semiconductor film 508 and the insulating film in contact with the oxide semiconductor film 508.

[0180] Figure 18 This is an example of a band structure in the film thickness direction of a stacked structure having an insulating film 507, a first oxide semiconductor film 508a, a second oxide semiconductor film 508b, and an insulating film 514. For ease of understanding, the conduction band bottom level (Ec) of the insulating film 507, the first oxide semiconductor film 508a, the second oxide semiconductor film 508b, and the insulating film 514 is shown in the band structure.

[0181] exist Figure 18In the energy band diagram shown, silicon oxide films are used as insulating films 507 and 514, oxide semiconductor films formed using metal oxide targets with an atomic ratio of In:Ga:Zn = 4:2:4.1 are used as the first oxide semiconductor film 508a, and metal oxide films formed using metal oxide targets with an atomic ratio of In:Ga:Zn = 1:1:1.2 are used as the second oxide semiconductor film 508b.

[0182] like Figure 18 As shown, in the first oxide semiconductor film 508a and the second oxide semiconductor film 508b, the conduction band bottom energy level changes smoothly. In other words, the conduction band bottom energy level changes continuously or is continuously coupled. To achieve such a band structure, impurities that would form defect energy levels such as trap centers or recombination centers are not present at the interface between the first oxide semiconductor film 508a and the second oxide semiconductor film 508b.

[0183] In order to form a continuous bond between the first oxide semiconductor film 508a and the second oxide semiconductor film 508b, a multi-chamber film deposition apparatus (sputtering apparatus) equipped with a lock-up chamber can be used to continuously stack the films in such a way that the films are not exposed to the atmosphere.

[0184] It can be seen that: by adopting Figure 18 In the structure shown, the first oxide semiconductor film 508a is used as a well, and in the transistor using the above-described stacked structure, the channel region is formed in the first oxide semiconductor film 508a.

[0185] Furthermore, when the second oxide semiconductor film 508b is not formed, a trap level may be formed in the first oxide semiconductor film 508a. On the other hand, by employing the above-described stacked structure, this trap level may be formed in the second oxide semiconductor film 508b. Therefore, the trap level can be moved away from the first oxide semiconductor film 508a.

[0186] Furthermore, sometimes the trap level is farther from the vacuum level than the conduction band bottom level (Ec) of the first oxide semiconductor film 508a used as the channel region, and electrons tend to accumulate in the trap level. When electrons accumulate in the trap level, they become negative fixed charges, causing the threshold voltage of the transistor to drift in the positive direction. Therefore, it is preferable to adopt a structure in which the trap level is closer to the vacuum level than the conduction band bottom level (Ec) of the first oxide semiconductor film 508a. By adopting the above structure, electrons are less likely to accumulate in the trap level, thus increasing the on-state current of the transistor and also improving the field-effect mobility.

[0187] exist Figure 18In this process, the conduction band bottom energy level of the second oxide semiconductor film 508b is closer to the vacuum energy level than that of the first oxide semiconductor film 508a. Typically, the difference between the conduction band bottom energy level of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b is 0.15 eV or more, or 0.5 eV or more, and is less than 2 eV or less than 1 eV. In other words, the difference between the electron affinity of the second oxide semiconductor film 508b and the electron affinity of the first oxide semiconductor film 508a is 0.15 eV or more, or 0.5 eV or more, and is less than 2 eV or less than 1 eV.

[0188] By employing the above structure, the first oxide semiconductor film 508a becomes the main current path and is used as the channel region. Since the second oxide semiconductor film 508b includes one or more of the metal elements contained in the first oxide semiconductor film 508a where the channel region is formed, interface scattering is less likely to occur at the interface between the first oxide semiconductor film 508a and the second oxide semiconductor film 508b. Therefore, since the movement of charge carriers at this interface is not hindered, the field-effect mobility of the transistor is improved.

[0189] To prevent the second oxide semiconductor film 508b from being used as part of the channel region, the second oxide semiconductor film 508b is made of a material with sufficiently low conductivity. Alternatively, the second oxide semiconductor film 508b is made of a material whose electron affinity (the difference between the vacuum level and the conduction band bottom level) is lower than that of the first oxide semiconductor film 508a and whose conduction band bottom level differs from that of the first oxide semiconductor film 508a (band shift). Furthermore, to suppress the difference in threshold voltages caused by the drain voltage value, it is preferable to use a material whose conduction band bottom level of the second oxide semiconductor film 508b is closer to the vacuum level by 0.2 eV or more, preferably 0.5 eV or more, compared to the conduction band bottom level of the first oxide semiconductor film 508a.

[0190] Preferably, the second oxide semiconductor film 508b does not contain a spinel-type crystalline structure. When the second oxide semiconductor film 508b contains a spinel-type crystalline structure, the constituent elements of the conductive films 512a and 512b may sometimes diffuse into the first oxide semiconductor film 508a at the interface between the spinel-type crystalline structure and other regions. Note that when the second oxide semiconductor film 508b is CAAC-OS (described later), the properties of blocking constituent elements of the conductive films 512a and 512b, such as copper, are improved, and therefore this is preferred.

[0191] The thickness of the second oxide semiconductor film 508b is greater than or equal to the thickness at which the diffusion of constituent elements of conductive films 512a and 512b into the oxide semiconductor film 508b is suppressed, and is less than the thickness at which the supply of oxygen from the insulating film 514 to the oxide semiconductor film 508b is suppressed. For example, when the thickness of the second oxide semiconductor film 508b is 10 nm or more, the diffusion of constituent elements of conductive films 512a and 512b into the first oxide semiconductor film 508a can be suppressed. Furthermore, when the thickness of the second oxide semiconductor film 508b is 100 nm or less, oxygen can be effectively supplied from the insulating films 514 and 516 to the first oxide semiconductor film 508a.

[0192] Insulating film used as a protective insulating film for transistors.

[0193] Insulating films 514 and 516 function to supply oxygen to the oxide semiconductor film 508. Insulating film 518 functions as a protective insulating film for the transistor 500. Insulating films 514 and 516 contain oxygen. Insulating film 514 is an insulating film that allows oxygen to permeate. Note that insulating film 514 also serves as a film to mitigate damage to the oxide semiconductor film 508 during the subsequent formation of insulating film 516.

[0194] As the insulating film 514, silicon oxide, silicon oxynitride, etc., with a thickness of 5 nm or more and 150 nm or less can be used, preferably 5 nm or more and 50 nm or less.

[0195] Furthermore, it is preferable to have a low amount of defects in the insulating film 514. Typically, the spin density of the signal originating from the dangling bonds in silicon at g = 2.001, as measured by ESR (Electron Spin Resonance), is preferably 3 × 10⁻⁶. 17 spins / cm 3 The reason is that if the defect density of the insulating film 514 is high, oxygen will bond with the defect, thus reducing the amount of oxygen permeating the insulating film 514.

[0196] In the insulating film 514, sometimes oxygen entering from the outside does not completely migrate to the outside of the insulating film 514, but a portion of it remains inside the insulating film 514. Additionally, sometimes oxygen entering the insulating film 514 also migrates to the outside of the insulating film 514, resulting in oxygen movement within the insulating film 514. When forming an oxide insulating film 514 that allows oxygen to permeate, oxygen detached from the insulating film 516 disposed on the insulating film 514 can migrate through the insulating film 514 to the oxide semiconductor film 508.

[0197] Furthermore, the insulating film 514 can be formed using an oxide insulating film with a low density of states of oxide nitride. Note that the density of states of oxide nitride can sometimes be formed at the energy (E) at the top of the valence band of the oxide semiconductor film. V_OS The energy of the conduction band bottom of the oxide semiconductor film (E) C_OS Between ) . As E v_os and E c_os For oxide insulating films with low nitrogen oxide state density, silicon oxynitride films or aluminum oxynitride films with low nitrogen oxide release can be used.

[0198] Furthermore, in thermal desorption spectroscopy analysis, silicon oxynitride films with low nitrogen oxide release are those with higher ammonia release than nitrogen oxide release, typically with an ammonia molecule release of 1 × 10⁻⁶. 18 molecule / cm 3 Above and 5×10 19 molecule / cm 3 Note that the ammonia release amount is the amount released during heat treatment at a membrane surface temperature of 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower.

[0199] Nitrogen oxides (NO) x (where x is 0 or more and 2 or less, preferably 1 or more and 2 or less), typically NO2 or NO forms an energy level in the insulating film 514, etc. This energy level is located in the band gap of the oxide semiconductor film 508. Therefore, when nitrogen oxides diffuse to the interface between the insulating film 514 and the oxide semiconductor film 508, sometimes this energy level traps electrons on the insulating film 514 side. As a result, the trapped electrons remain near the interface between the insulating film 514 and the oxide semiconductor film 508, thereby causing the threshold voltage of the transistor to drift in the positive direction.

[0200] Furthermore, during heat treatment, nitrogen oxides react with ammonia and oxygen. During heat treatment, the nitrogen oxides contained in insulating film 514 react with the ammonia contained in insulating film 516, thereby reducing the amount of nitrogen oxides contained in insulating film 514. Therefore, electrons are less likely to be trapped at the interface between insulating film 514 and oxide semiconductor film 508.

[0201] By using E as an insulating film 514 v_os and E c_os The low density of states of nitrogen oxides in the oxide insulating film can reduce the threshold voltage drift of the transistor, thereby reducing the variation of the transistor's electrical characteristics.

[0202] By performing heat treatment during transistor manufacturing processes, typically below 400°C or below 375°C (preferably above 340°C and below 360°C), the spectrum of the insulating film 514, measured using ESR below 100K, revealed a first signal with a g-value of 2.037 to 2.039, a second signal with a g-value of 2.001 to 2.003, and a third signal with a g-value of 1.964 to 1.966. In X-band ESR measurements, the split width between the first and second signals, and between the second and third signals, was approximately 5 mT. Furthermore, the sum of the spin densities of the first signal (g-value 2.037 to 2.039), the second signal (g-value 2.001 to 2.003), and the third signal (g-value 1.964 to 1.966) was less than 1 × 10⁻⁶. 18 spins / cm 3 Typically 1×10 17 spins / cm 3 Above and below 1×10 18 spins / cm 3 .

[0203] In ESR spectra below 100 K, the first signal with a g value of 2.037 to 2.039, the second signal with a g value of 2.001 to 2.003, and the third signal with a g value of 1.964 to 1.966 are all attributed to nitrogen oxides (NO). x Signals with x values ​​of 0 or higher and 2 or lower, preferably 1 or higher and 2 or lower. Typical examples of nitrogen oxides include nitric oxide and nitrogen dioxide. That is, the lower the total number of spin densities of the first signal with a g value of 2.037 or higher and 2.039, the lower the second signal with a g value of 2.001 or higher and 2.003 or lower, and the lower the third signal with a g value of 1.964 or higher and 1.966 or lower, the lower the content of nitrogen oxides in the oxide insulating film.

[0204] In addition, for E v_os and E c_os The nitrogen concentration of the oxide insulating film with low density of states of nitrogen oxides was 6 × 10⁻⁶ using SIMS. 20 atoms / cm 3 the following.

[0205] E is formed by PECVD using silane and nitrous oxide at a substrate temperature above 220°C and below 350°C. v_os and E c_os The oxide insulating film with low density of states of nitrogen oxides can form a dense and hard film.

[0206] Insulating film 516 is formed using an oxide insulating film with an oxygen content exceeding its stoichiometric composition. Due to heating, a portion of the oxygen in this oxide insulating film is released. TDS analysis shows that the amount of oxygen released from this oxide insulating film, converted to oxygen atoms, is 1.0 × 10⁻⁶. 19 atoms / cm 3 The preferred value is 3.0 × 10⁴. 20 atoms / cm 3 That's all. Note that the surface temperature of the membrane during the TDS analysis is preferably 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower.

[0207] The insulating film 516 can be a silicon oxide film or a silicon oxynitride film with a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less.

[0208] Furthermore, it is preferable to have a low amount of defects in the insulating film 516; typically, the spin density of the signal originating from the dangling bonds in silicon at g = 2.001, as measured by ESR, is less than 1.5 × 10⁻⁶. 18 spins / cm 3 More preferably 1×10 18 spins / cm 3 Therefore, since the insulating film 516 is farther away from the oxide semiconductor film 508 compared to the insulating film 514, the defect density of the insulating film 516 can also be higher than that of the insulating film 514.

[0209] Furthermore, since insulating films 514 and 516 can be formed using the same type of material, the interface between insulating film 514 and insulating film 516 is sometimes not clearly identifiable. Therefore, in this embodiment, the interface between insulating film 514 and insulating film 516 is shown as a dashed line. Note that although a two-layer structure of insulating film 514 and insulating film 516 is described in this embodiment, it is not limited to this; for example, a single-layer structure of insulating film 514 or insulating film 516 may also be used.

[0210] The insulating film 518 has the function of blocking oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 518, oxygen can be prevented from diffusing from the oxide semiconductor film 508 to the outside, and oxygen contained in the insulating films 514 and 516 can also be prevented from diffusing to the outside. Furthermore, hydrogen, water, etc., can be prevented from entering the oxide semiconductor film 508 from the outside. For example, a nitride insulating film can be used as the insulating film 518. Examples of such nitride insulating films include silicon nitride, silicon oxynitride, aluminum nitride, and aluminum oxynitride. In particular, when silicon oxynitride or silicon nitride films are used as the insulating film 518, oxygen diffusion to the outside can be suppressed, so this is preferred.

[0211] Alternatively, an oxide insulating film that blocks oxygen, hydrogen, and water can be used as the insulating film 518 instead of a nitride insulating film that blocks oxygen, hydrogen, water, alkali metals, and alkaline earth metals. Examples of oxide insulating films that block oxygen, hydrogen, and water include aluminum oxide films, aluminum oxynitride films, gallium oxide films, gallium oxynitride films, yttrium oxide films, yttrium oxynitride films, hafnium oxide films, and hafnium oxynitride films. Aluminum oxide, hafnium oxide, or yttrium oxide are particularly preferred as oxide insulating films that block oxygen, hydrogen, and water.

[0212] While the various films described above, such as conductive films, insulating films, and oxide semiconductor films, can be formed using sputtering or PECVD methods, they can also be formed using methods such as thermal CVD (Chemical Vapor Deposition) or ALD (Atomic Layer Deposition). MOCVD (Metal Organic Chemical Vapor Deposition) is an example of a thermal CVD method.

[0213] Since thermal CVD is a film formation method that does not use plasma, it has the advantage of not producing defects caused by plasma damage.

[0214] Film formation using thermal CVD can be performed as follows: source gas and oxidant are simultaneously supplied into the chamber, and the pressure inside the chamber is set to atmospheric pressure or reduced pressure, so that it reacts near the substrate or on the substrate and is deposited on the substrate.

[0215] Alternatively, film formation using the ALD method can be performed as follows: The pressure within the chamber is set to atmospheric pressure or reduced pressure. The source gases for the reaction are sequentially introduced into the chamber, and this process is repeated. For example, two or more source gases can be sequentially supplied into the chamber by switching various switching valves (also called high-speed valves). To prevent mixing of multiple source gases, an inert gas (such as argon or nitrogen) is introduced simultaneously with or after the first source gas, followed by the introduction of the second source gas. Note that when the first source gas and the inert gas are introduced simultaneously, the inert gas is used as the charge carrier gas. Alternatively, the inert gas can be introduced simultaneously with the second source gas. Alternatively, the first source gas can be evacuated by vacuum pumping without introducing an inert gas, followed by the introduction of the second source gas. The first source gas adheres to the substrate surface to form a first layer. The subsequently introduced second source gas reacts with this first layer, thereby stacking the second layer on top of the first layer to form a thin film. By repeatedly introducing the gas in this sequence until the desired thickness is obtained, a thin film with good step coverage can be formed. Since the thickness of the thin film can be adjusted according to the number of times the gas is introduced in sequence, the ALD method can accurately adjust the thickness and is suitable for manufacturing micro FETs.

[0216] Various films, such as conductive films, insulating films, oxide semiconductor films, and metal oxide films, as described in the above embodiments, can be formed using thermal CVD methods such as MOCVD. For example, when forming an In-Ga-ZnO film, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula of trimethylindium is In(CH3)3. The chemical formula of trimethylgallium is Ga(CH3)3. Dimethylzinc has the chemical formula Zn(CH3)2. However, not limited to the above combinations, triethylgallium (chemical formula Ga(C2H5)3) can be used instead of trimethylgallium, and diethylzinc (chemical formula Zn(C2H5)2) can be used instead of dimethylzinc.

[0217] For example, when forming a hafnium oxide film using an ALD (Alternating Discharge) film-forming apparatus, two gases are used: a source gas obtained by vaporizing a liquid containing a solvent and a hafnium precursor compound (hafnium alkoxide, tetramethylammonium hafnium (TDMAH), etc.); and ozone (O3) as an oxidant. Furthermore, the chemical formula of tetramethylammonium hafnium is Hf[N(CH3)2]4. Other materials include tetra(ethylmethylammonium)hafnium.

[0218] For example, when forming an alumina film using an ALD (Alternating Current Deposition) apparatus, two gases are used: a source gas obtained by vaporizing a liquid containing a solvent and an aluminum precursor compound (such as trimethylaluminum (TMA)); and H2O as an oxidant. Furthermore, the chemical formula of trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylammonium)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptadecyl)one.

[0219] For example, when forming a silicon oxide film using a film-forming apparatus employing the ALD method, hexachlorosilane is attached to the surface to be formed, removing the chlorine contained in the attached material, and supplying free radicals of oxidizing gases (O2, nitrous oxide) to react with the attached material.

[0220] For example, when forming a tungsten film using an ALD (Alternating Discharge) method, WF6 gas and B2H6 gas are introduced sequentially and repeatedly to form an initial tungsten film, followed by the sequential and repeated introduction of WF6 gas and H2 gas to form the final tungsten film. Note that SiH4 gas can also be used instead of B2H6 gas.

[0221] For example, when forming oxide semiconductor films such as In-Ga-ZnO films using an ALD (Alternating Deposition) apparatus, In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly to form an In-O layer, then Ga(CH3)3 gas and O3 gas are introduced sequentially and repeatedly to form a GaO layer, and finally Zn(CH3)2 gas and O3 gas are introduced sequentially and repeatedly to form a ZnO layer. Note that the order of these layers is not limited to the example above. Furthermore, these gases can be mixed to form mixed compound layers such as In-Ga-O layers, In-Zn-O layers, Ga-Zn-O layers, etc. Note that although H2O gas obtained by bubbling with an inert gas such as Ar can be used instead of O3 gas, it is preferable to use O3 gas that does not contain H. Additionally, In(C2H5)3 gas can be used instead of In(CH3)3 gas. Ga(C2H5)3 gas can also be used instead of Ga(CH3)3 gas. Zn(CH3)2 gas can also be used.

[0222] <Structure Example of a Semiconductor Device 2>

[0223] Next, refer to Figure 16A and Figure 16B Explanation and Figure 14B and Figure 14C The diagram shows different structural examples of transistor 500. Additionally, when representing parts having the same function as described above, the same shading lines are sometimes used without additional reference numerals.

[0224] Figure 16A This is a top view of a transistor 570, which is a semiconductor device according to one aspect of the present invention. Figure 16B Equivalent to along Figure 16A The cross-section shown by the dotted line X3-X4 and along Figure 16A The cross-sectional view of the cut surface along the dotted line Y3-Y4 is shown.

[0225] Transistor 570 includes: a conductive film 504 serving as a first gate electrode on substrate 502; an insulating film 506 on substrate 502 and conductive film 504; an insulating film 507 on insulating film 506; an oxide semiconductor film 508 on insulating film 507; an insulating film 514 on oxide semiconductor film 508; an insulating film 516 on insulating film 514; a conductive film 512a serving as a source electrode electrically connected to oxide semiconductor film 508; a conductive film 512b serving as a drain electrode electrically connected to oxide semiconductor film 508; an insulating film 514 on oxide semiconductor film 508; an insulating film 516 on insulating film 514; an insulating film 518 on insulating film 516; a conductive film 520a on insulating film 518; and a conductive film 520b on insulating film 518. Insulating films 514, 516, and 518 function as the second gate insulating film of transistor 570. Furthermore, the conductive film 520a is electrically connected to the conductive film 512b through openings 542c provided in the insulating films 514, 516, and 518. In the transistor 570, the conductive film 520a functions, for example, as a pixel electrode for a display device. In the transistor 570, the conductive film 520b serves as a second gate electrode (also called a back gate electrode).

[0226] like Figure 16B As shown, the conductive film 520b is connected to the conductive film 504, which serves as the first gate electrode, through openings 542a and 542b provided in the insulating films 506, 507, 514, 516, and 518. Therefore, the same potential is applied to the conductive film 520b and the conductive film 504.

[0227] Furthermore, while this embodiment illustrates a structure in which openings 542a and 542b are provided to connect the conductive film 520b to the conductive film 504, it is not limited to this. For example, a structure could be used where only one of the openings 542a and 542b is formed to connect the conductive film 520b to the conductive film 504, or a structure could be used where openings 542a and 542b are not provided and the conductive film 520b is not connected to the conductive film 504. When a structure is used where the conductive film 520b is not connected to the conductive film 504, different potentials can be applied to the conductive film 520b and the conductive film 504 respectively.

[0228] like Figure 16BAs shown, the oxide semiconductor film 508 is located opposite the conductive film 504 used as a gate electrode and the conductive film 520b used as a second gate electrode, sandwiched between the two conductive films used as gate electrodes. The length and width of the channel of the conductive film 520b used as the second gate electrode are both greater than the length and width of the channel of the oxide semiconductor film 508. The conductive film 520b covers the entire oxide semiconductor film 508 through the insulating films 514, 516, and 518. Furthermore, since the conductive film 520b used as the second gate electrode and the conductive film 504 used as the gate electrode are connected in the openings 542a and 542b provided in the insulating films 506, 507, 514, 516, and 518, the side of the oxide semiconductor film 508 in the width direction is opposite to the conductive film 520b used as the second gate electrode through the insulating films 514, 516, and 518.

[0229] In other words, in the channel width direction of transistor 570, conductive film 504 serving as gate electrode and conductive film 520b serving as second gate electrode are connected in the openings provided in insulating films 506, 507 serving as gate insulating films and insulating films 514, 516, 518 serving as second gate insulating films, while conductive film 504 and conductive film 520b surround oxide semiconductor film 508 through insulating films 506, 507 serving as gate insulating films and insulating films 514, 516, 518 serving as second gate insulating films.

[0230] By employing the above structure, the electric fields of the conductive film 504 used as the gate electrode and the conductive film 520b used as the second gate electrode surround the oxide semiconductor film 508 included in the transistor 570. As shown in the transistor 570, the device structure of the transistor in which the electric fields of the gate electrode and the second gate electrode surround the oxide semiconductor film in which the channel region is formed can be called a surroundd channel (S-channel) structure.

[0231] Because transistor 570 has an s-channel structure, an electric field to induce a channel can be effectively applied to the oxide semiconductor film 508 using the conductive film 504, which serves as the gate electrode. This improves the current-driving capability of transistor 570, resulting in high on-state current characteristics. Furthermore, the increased on-state current allows for miniaturization of transistor 570. Additionally, the structure of transistor 570 surrounded by the conductive film 504 (serving as the gate electrode) and the conductive film 520b (serving as the second gate electrode) enhances its mechanical strength.

[0232] Note that the other structures of transistor 570 are the same as those of transistor 500 described above, and it performs the same function.

[0233] Furthermore, the transistors of this embodiment can be freely combined with the above-described structures. For example, they can be... Figure 14A and Figure 14B The transistor 500 shown is a transistor used for pixels in a display device, while... Figure 16A and Figure 16B The transistor 570 shown is a transistor used as a gate driver for a display device.

[0234] <Semiconductor Device Manufacturing Method 1>

[0235] Next, refer to the following. Figures 10A to 14A A method for manufacturing a transistor 500 of a semiconductor device according to one aspect of the present invention will be described in detail. Figures 10A to 14A It is a cross-sectional view illustrating the manufacturing method of a semiconductor device.

[0236] First, a conductive film is formed on substrate 502. This conductive film is then processed through photolithography and etching processes to form a conductive film 504, which serves as the gate electrode. Next, insulating films 506 and 507 (see reference) are formed on the conductive film 504 to serve as the gate insulating film. Figure 10A ).

[0237] In this embodiment, a glass substrate is used as substrate 502. A tungsten film with a thickness of 100 nm is formed as conductive film 504, which serves as the gate electrode, by sputtering. Furthermore, a silicon nitride film with a thickness of 400 nm is formed as insulating film 506 by PECVD, and a silicon oxynitride film with a thickness of 50 nm is formed as insulating film 507 by PECVD.

[0238] As the insulating film 506, a stacked structure of silicon nitride films can be adopted. Specifically, as the insulating film 506, a three-layer structure of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film can be adopted. An example of this three-layer structure can be formed through the following steps.

[0239] A first silicon nitride film with a thickness of 50 nm can be formed under the following conditions: for example, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia with a flow rate of 100 sccm are used as source gases and supplied to the reaction chamber of the PECVD apparatus, the pressure in the reaction chamber is controlled at 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply.

[0240] A second silicon nitride film with a thickness of 300 nm can be formed under the following conditions: silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia with a flow rate of 2000 sccm are used as source gases and supplied to the reaction chamber of the PECVD device. The pressure in the reaction chamber is controlled at 100 Pa, and a high-frequency power supply of 27.12 MHz is used to supply 2000 W of power.

[0241] A third silicon nitride film with a thickness of 50 nm can be formed under the following conditions: silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 sccm are used as the source gases, the source gases are supplied to the reaction chamber of the PECVD device, the pressure in the reaction chamber is controlled at 100 Pa, and a high-frequency power supply of 27.12 MHz is used to supply 2000 W of power.

[0242] Alternatively, the substrate temperature during the formation of the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film can be set to 350°C or below.

[0243] For example, when a conductive film containing copper (Cu) is used as the conductive film 504, the following effects are achieved by using a three-layer structure of silicon nitride film as the insulating film 506.

[0244] The first silicon nitride film can suppress the diffusion of copper (Cu) from the conductive film 504. The second silicon nitride film has the function of releasing hydrogen, which can improve the withstand voltage of the insulating film used as the gate insulating film. The third silicon nitride film releases less hydrogen and can suppress the diffusion of hydrogen released from the second silicon nitride film.

[0245] In order to improve the interface characteristics between the insulating film 507 and the subsequently formed oxide semiconductor film 508 (more specifically, the first oxide semiconductor film 508a), it is preferable to use an insulating film containing oxygen.

[0246] Next, an oxide semiconductor film 509 is formed on the insulating film 507 at a first temperature. Furthermore, as the oxide semiconductor film 509, a first oxide semiconductor film 509a is formed, and then a second oxide semiconductor film 509b is formed (see reference). Figure 10B ).

[0247] The first temperature for forming the oxide semiconductor film 509 is above room temperature and below 340°C, preferably above room temperature and below 300°C, more preferably above 100°C and below 250°C, and even more preferably above 100°C and below 200°C. Forming the oxide semiconductor film 509 by heating can improve the crystallinity of the oxide semiconductor film 509. On the other hand, when a large glass substrate (e.g., the 6th to 10th generation) is used as the substrate 502, the substrate 502 may sometimes deform when the first temperature is above 150°C and below 340°C. Therefore, when using a large glass substrate, by setting the first temperature to above 100°C and below 150°C, deformation of the glass substrate can be suppressed.

[0248] The substrate temperatures during the deposition of the first oxide semiconductor film 509a and the second oxide semiconductor film 509b can be the same or different. However, it is preferred to make the substrate temperatures of the first oxide semiconductor film 509a and the second oxide semiconductor film 509b the same, as this can reduce manufacturing costs.

[0249] In this embodiment, a first oxide semiconductor film 509a is formed by sputtering using an In-Ga-Zn metal oxide target with an atomic ratio of In:Ga:Zn = 4:2:4.1. Then, a second oxide semiconductor film 509b is continuously formed by sputtering using an In-Ga-Zn metal oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.2 in a vacuum. Furthermore, the substrate temperature for forming both the first and second oxide semiconductor films 509a and 509b is set to 170°C.

[0250] Furthermore, when forming the oxide semiconductor film 509 by sputtering, a rare gas (typically argon), oxygen, or a mixture of rare gas and oxygen is appropriately used as the sputtering gas. Moreover, when using a mixed gas, it is preferable to increase the proportion of oxygen relative to the rare gas. Additionally, it is necessary to ensure the high purity of the sputtering gas. For example, the oxygen or argon gas used as the sputtering gas should have a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, and even more preferably -120°C or lower, thereby minimizing the ingress of moisture or other contaminants into the oxide semiconductor film 509.

[0251] Furthermore, when forming the oxide semiconductor film 509 by sputtering, a high-vacuum pump (to 5 × 10⁻⁶) is preferably used in the processing chamber of the sputtering apparatus. -7 Pa or higher and 1×10 -4(Pa or less) to remove as much water and other substances as possible that are impurities to the oxide semiconductor film 509. Alternatively, a turbomolecular pump and a cold trap are preferably combined to prevent gases, especially those containing carbon or hydrogen, from flowing back from the extraction system into the processing chamber.

[0252] Next, the oxide semiconductor film 509 is processed to form an island-shaped oxide semiconductor film 508. Note that the first oxide semiconductor film 509a becomes an island-shaped first oxide semiconductor film 508a, and the second oxide semiconductor film 509b becomes an island-shaped second oxide semiconductor film 508b (see reference). Figure 10C ).

[0253] Next, without performing a process at a temperature higher than the first temperature described above, a conductive film 512, which will become the source electrode and drain electrode, is formed on the insulating film 507 and the oxide semiconductor film 508 by sputtering (see reference). Figure 11A ).

[0254] In this embodiment, the conductive film 512 is formed by sputtering a tungsten film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm, which are sequentially stacked. Although the conductive film 512 is a two-layer stacked structure in this embodiment, it is not limited to this. For example, the conductive film 512 may also be a three-layer structure consisting of a tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm, which are sequentially stacked.

[0255] Next, masks 536a and 536b are formed in the desired areas on the conductive film 512 (see reference). Figure 11B ).

[0256] In this embodiment, masks 536a and 536b are formed by coating a photosensitive resin film on a conductive film 512 and patterning the photosensitive resin film using a photolithography process.

[0257] Next, the conductive film 512 is processed from the conductive film 512 and the masks 536a and 536b using an etchant 538, thereby forming conductive films 512a and 512b that are separated from each other (see reference). Figure 11C ).

[0258] In this embodiment, a dry etching apparatus is used to process the conductive film 512. However, the processing method for the conductive film 512 is not limited to this. For example, a chemical solution can be used as the etchant 538, and a wet etching apparatus can be used to process the conductive film 512 and the second oxide semiconductor film 508b. Note that compared to processing the conductive film 512 using a wet etching apparatus, processing the conductive film 512 using a dry etching apparatus can form finer patterns. On the other hand, compared to processing the conductive film 512 using a dry etching apparatus, processing the conductive film 512 using a wet etching apparatus can reduce manufacturing costs.

[0259] Next, the surface of the second oxide semiconductor film 508b is cleaned from the second oxide semiconductor film 508b, conductive films 512a, 512b, and masks 536a, 536b using etchant 539 (see reference). Figure 12A ).

[0260] As an example of the aforementioned washing method, washing with a chemical solution such as phosphoric acid can be employed. By washing with a chemical solution such as phosphoric acid, impurities (e.g., elements contained in the conductive films 512a and 512b) adhering to the surface of the second oxide semiconductor film 508b can be removed. Note that this washing is not necessarily required. It may be omitted depending on the circumstances.

[0261] In addition, during the formation of conductive films 512a and 512b and / or during the washing process described above, the area of ​​the second oxide semiconductor film 508b exposed from the conductive films 512a and 512b may sometimes become thinner than the first oxide semiconductor film 508a.

[0262] Furthermore, during the formation of conductive films 512a and 512b and / or during the aforementioned washing process, the area of ​​the second oxide semiconductor film 508b exposed from the conductive films 512a and 512b may not become thinner. Figure 15A and Figure 15B Here is an example of this situation. Figure 15A and Figure 15B This is a cross-sectional view showing an example of a semiconductor device. Figure 15A yes Figure 14B This is an example of a case where the second oxide semiconductor film 508b of the transistor 500 does not become thinner. Additionally, as... Figure 15B As shown, the second oxide semiconductor film 508b can also be pre-formed to be thinner than the first oxide semiconductor film 508a, and the thickness of the area exposed from the conductive films 512a and 512b can be the same as that of the first oxide semiconductor film 508a. Figure 14B The transistor 500 shown is equivalent. Additionally, as... Figure 15CAs shown, the second oxide semiconductor film 508b can also be pre-formed to be thinner than the first oxide semiconductor film 508a, and an insulating film 519 can be formed on the second oxide semiconductor film 508b and the insulating film 507. In this case, an opening is formed in the insulating film 519 to allow the second oxide semiconductor film 508b to contact the conductive films 512a and 512b. The insulating film 519 can be formed using the same material and the same forming method as the insulating film 514.

[0263] Next, by removing masks 536a and 536b, a conductive film 512a serving as a source electrode and a conductive film 512b serving as a drain electrode are formed on the second oxide semiconductor film 508b. Furthermore, the oxide semiconductor film 508 has a stacked structure of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b (see reference). Figure 12B ).

[0264] Next, an insulating film 514 serving as a first protective insulating film and an insulating film 516 serving as a second protective insulating film are formed on the oxide semiconductor film 508 and the conductive films 512a and 512b, and then a first barrier film 531 is formed (see reference). Figure 12C ).

[0265] Furthermore, preferably, after forming the insulating film 514, the insulating film 516 is continuously formed without exposure to the atmosphere. After forming the insulating film 514, without exposure to the atmosphere, the insulating film 516 is continuously formed by adjusting one or more of the source gas flow rate, pressure, high-frequency power, and substrate temperature. This reduces the concentration of atmospheric impurities at the interface between the insulating films 514 and 516 while allowing oxygen contained in the insulating films 514 and 516 to move into the oxide semiconductor film 508, thereby reducing the amount of oxygen defects in the oxide semiconductor film 508.

[0266] For example, silicon oxynitride film can be formed as insulating film 514 by PECVD. In this case, a silicon-containing deposition gas and an oxidizing gas are preferably used as the source gas. Typical examples of silicon-containing deposition gases are silane, disilane, propane, fluorinated silane, etc. Oxidizing gases include nitrous oxide, nitrogen dioxide, etc. Furthermore, an insulating film 514 containing nitrogen and with low defect content can be formed by PECVD under the following conditions: the flow rate of the oxidizing gas is greater than 20 times and less than 100 times, preferably more than 40 times and less than 80 times, the flow rate of the deposition gas; and the pressure in the processing chamber is less than 100 Pa, preferably less than 50 Pa.

[0267] In this embodiment, the insulating film 514 is formed using PECVD under the following conditions: the temperature of the substrate 502 is maintained at 220°C; silane with a flow rate of 50 sccm and nitrous oxide with a flow rate of 2000 sccm are used as the source gases; the pressure inside the processing chamber is 20 Pa; and the high-frequency power supplied to the parallel plate electrodes is 13.56 MHz and 100 W (power density of 1.6 × 10⁻⁶). -2 W / cm 2 ).

[0268] As the insulating film 516, a silicon oxide film or a silicon oxynitride film is formed under the following conditions: the temperature of the substrate in the vacuum-evacuated processing chamber of the PECVD apparatus is maintained at 180°C or higher and 350°C or lower; source gas is introduced into the processing chamber and the pressure inside the processing chamber is set to 100 Pa or higher and 250 Pa or lower, preferably 100 Pa or higher and 200 Pa or lower; and 0.17 W / cm² is supplied to the electrodes disposed in the processing chamber. 2 Above and 0.5W / cm 2 The following is more preferably 0.25 W / cm 2 Above and 0.35W / cm 2 The following are high-frequency power values.

[0269] In the film-forming conditions of the insulating film 516, high-frequency power with the aforementioned power density is supplied in a reaction chamber with the aforementioned pressure. This improves the decomposition efficiency of the source gas in the plasma, increases oxygen free radicals, and promotes the oxidation of the source gas, resulting in an oxygen content in the insulating film 516 exceeding its stoichiometric composition. On the other hand, in the film formed at the aforementioned substrate temperature, since the bonding force between silicon and oxygen is weak, some of the oxygen in the film is removed due to the heat treatment in subsequent processes. As a result, an oxide insulating film with an oxygen content exceeding its stoichiometric composition and with some oxygen removed due to heating can be formed.

[0270] In the process of forming the insulating film 516, the insulating film 514 is used as a protective film for the oxide semiconductor film 508. Therefore, the insulating film 516 can be formed using high-frequency power with high power density while minimizing damage to the oxide semiconductor film 508.

[0271] Furthermore, in the film formation conditions of insulating film 516, by increasing the flow rate of the silicon-containing deposition gas relative to the oxidizing gas, the amount of defects in insulating film 516 can be reduced. Typically, it is possible to form an oxide insulating film with a low amount of defects, wherein the spin density of the signal arising from the dangling bonds of silicon at g = 2.001, as measured by ESR, is less than 6 × 10⁻⁶. 17 spins / cm 3 Preferably 3×10 17spins / cm 3 The following is more preferably 1.5 × 10 17 spins / cm 3 The following. This can improve the reliability of transistors.

[0272] Alternatively, heat treatment can be performed after the insulating films 514 and 516 are formed (in other words, after the insulating film 516 is formed and before the first barrier film 531 is formed). This heat treatment can reduce the amount of nitrogen oxides contained in the insulating films 514 and 516. Furthermore, this heat treatment can move a portion of the oxygen contained in the insulating films 514 and 516 into the oxide semiconductor film 508, thereby reducing the amount of oxygen defects in the oxide semiconductor film 508.

[0273] The temperature for heat treatment of insulating films 514 and 516 is typically set below 400°C, preferably below 375°C, more preferably above 340°C and below 360°C, and even more preferably above 150°C and below 350°C. The heat treatment can be carried out in an atmosphere of nitrogen, oxygen, ultra-dry air (containing less than 20 ppm of water, preferably less than 1 ppm, more preferably less than 10 ppb), or a rare gas (argon, helium, etc.). The nitrogen, oxygen, ultra-dry air, or rare gas preferably does not contain hydrogen, water, etc. This heat treatment can be carried out using an electric furnace, an RTA device, or the like.

[0274] The first barrier film 531 contains oxygen and a metal (selected from at least one of indium, zinc, titanium, aluminum, tungsten, tantalum, molybdenum, hafnium, and yttrium). Indium tin oxide (also known as ITO), indium tin silicon oxide (hereinafter also known as ITSO), or indium oxide is preferred as the first barrier film 531 because it provides good coverage for uneven surfaces.

[0275] Alternatively, the first barrier film 531 can be formed by sputtering. When the first barrier film 531 is very thin, it is sometimes difficult to suppress oxygen that may be released from the insulating film 516 to the outside. On the other hand, when the first barrier film 531 is very thick, it is sometimes impossible to properly add oxygen to the insulating film 516. Therefore, the thickness of the first barrier film 531 is preferably 1 nm or more and 20 nm or less, more preferably 2 nm or more and 10 nm or less. In this embodiment, an ITSO with a thickness of 5 nm is formed as the first barrier film 531.

[0276] Next, oxygen 540 is added to the insulating film 516, which serves as the second protective insulating film, through the first barrier film 531. Note that in the accompanying drawings, the oxygen to be added to the insulating film 516 is schematically represented as oxygen 540a (see figure). Figure 13A Additionally, oxygen 540 is sometimes added to insulating film 514.

[0277] Methods for adding oxygen 540 to the insulating film 516 through the first barrier film 531 include ion doping, ion implantation, and plasma treatment. Oxygen 540 can be categorized as excess oxygen or oxygen radicals. Furthermore, when adding oxygen 540, applying a bias voltage to the substrate side can effectively add oxygen 540 to the insulating film 516. For example, a power density of 1 W / cm² can be set as the bias voltage. 2 Above and 5W / cm 2 The following is acceptable. Oxygen is added by providing a first barrier film 531 on the insulating film 516. The first barrier film 531 can be used as a protective film to inhibit oxygen from escaping from the insulating film 516. Therefore, more oxygen can be added to the insulating film 516.

[0278] Next, the first barrier film 531 or a portion thereof, and a portion thereof serving as the second protective insulating film, are removed using etchant 542 (see reference). Figure 13B ).

[0279] Methods for removing the first barrier film 531 and the insulating film 516, which serves as a second protective insulating film, include dry etching, wet etching, or a combination of both. Note that when using dry etching, the etchant 542 is an etching gas; when using wet etching, the etchant 542 is a chemical solution. In this embodiment, the first barrier film 531 is removed by wet etching. Wet etching is preferred as a method for removing the first barrier film 531 because it helps to reduce manufacturing costs.

[0280] Next, an insulating film 518, which serves as a second barrier film, is formed on the insulating film 516 (see reference). Figure 14A ).

[0281] When the insulating film 518 is formed by PECVD, the substrate temperature is below 400°C, preferably below 375°C, and more preferably above 340°C and below 360°C. By setting the substrate temperature during the formation of the insulating film 518 to the above range, the excess oxygen or oxygen free radicals can diffuse into the oxide semiconductor film 508. By setting the substrate temperature during the formation of the insulating film 518 to the above range, a dense film can be formed, which is therefore preferred.

[0282] For example, when forming a silicon nitride film as an insulating film 518 using PECVD, a silicon-containing deposition gas, nitrogen, and ammonia are preferably used as the source gas. By using a small amount of ammonia compared to nitrogen, active species are generated by the dissociation of ammonia in the plasma. These active species cleave the silicon-hydrogen bonds and nitrogen triple bonds contained in the silicon-containing deposition gas. As a result, silicon-nitrogen bonding can be promoted, and a dense silicon nitride film with fewer silicon-hydrogen bonds and fewer defects can be formed. On the other hand, when the amount of ammonia relative to nitrogen is large, the decomposition of the silicon-containing deposition gas and nitrogen does not progress, and silicon-hydrogen bonds remain, resulting in the formation of a silicon nitride film with more defects and less density. Therefore, in the source gas, the flow rate ratio of nitrogen relative to ammonia is set to 5 times or more and 50 times or less, preferably 10 times or more and 50 times or less.

[0283] In this embodiment, as the insulating film 518, a silicon nitride film with a thickness of 50 nm is formed using a PECVD apparatus with silane, nitrogen, and ammonia as source gases. The flow rate of silane is 50 sccm, the flow rate of nitrogen is 5000 sccm, and the flow rate of ammonia is 100 sccm. The pressure of the processing chamber is set to 100 Pa, the substrate temperature is set to 350°C, and a high-frequency power of 1000 W is supplied to the parallel planar electrodes using a 27.12 MHz high-frequency power supply. The PECVD apparatus has an electrode area of ​​6000 cm². 2 The parallel-plate PECVD unit, when the supplied electrical power is converted into power density per unit area, is 1.7 × 10⁻⁶. -1 W / cm 2 .

[0284] Alternatively, heat treatment can be performed after the insulating film 518, which serves as the second barrier film, is formed. Furthermore, by performing heat treatment after the formation of the insulating film 518, excess oxygen or oxygen free radicals in the insulating film 516 can diffuse into the oxide semiconductor film 508, thereby filling oxygen defects in the oxide semiconductor film 508. Alternatively, by forming the insulating film 518 through heating, excess oxygen or oxygen free radicals in the insulating film 516 can diffuse into the oxide semiconductor film 508, thereby filling oxygen defects in the oxide semiconductor film 508.

[0285] The above processes can be used to form Figure 14B The transistor 500 is shown.

[0286] <Semiconductor Device Manufacturing Method 2>

[0287] Below, regarding Figures 10A to 14A The manufacturing methods of the transistor 500 shown are described using different manufacturing methods.

[0288] First, similar to <Method for Manufacturing a Semiconductor Device 1>, the following steps are performed: Figures 10A to 12CThe process shown. Then, do not proceed. Figure 13A , Figure 13B , Figure 14A The process shown. That is to say, Figure 12C The structure shown has the same Figure 14B and Figure 14C The transistor 500 shown has the same function.

[0289] At this time, a metal oxide film is used as the first barrier film 531, and the metal oxide film is preferably formed of aluminum oxide, hafnium oxide or yttrium oxide.

[0290] Furthermore, when aluminum oxide, hafnium oxide, or yttrium oxide is formed as the first barrier film 531 by sputtering, the sputtering gas preferably contains at least oxygen. During the formation of the first barrier film 531, oxygen is used as the sputtering gas, which becomes oxygen radicals in the plasma, and sometimes either or both of the oxygen and the oxygen radicals are added to the insulating film 516. Therefore, this step may be omitted. Figure 13A The process of adding oxygen 540 is shown. In other words, when forming the first barrier film 531, the oxygen addition treatment and the formation of the first barrier film 531 can be performed simultaneously. In addition, during the formation of the first barrier film 531 (especially in the early stage of formation), the first barrier film 531 has the function of adding oxygen, and after the formation of the first barrier film 531, the first barrier film 531 has the function of blocking oxygen.

[0291] Furthermore, as the first barrier film 531, for example when aluminum oxide is formed by sputtering, a mixed layer is sometimes formed near the interface between the insulating film 516 and the first barrier film 531. When the insulating film 516 is a silicon oxynitride film, Al may be formed as this mixed layer. x Si y O z .

[0292] Furthermore, when alumina, hafnium oxide, or yttrium oxide is used as the first barrier film 531, these materials possess high insulation and high oxygen barrier properties. Therefore, no further processing is required. Figure 13B The process of removing the first barrier film 531 shown and Figure 14A The process of forming the insulating film 518 is shown. Therefore, the first barrier film 531 has the same function as the insulating film 518.

[0293] Furthermore, by heating the substrate at a temperature below 400°C, preferably below 375°C, and more preferably above 340°C and below 360°C during film formation to form the first barrier film 531, excess oxygen or oxygen free radicals added to the insulating film 516 can diffuse into the oxide semiconductor film 508. Alternatively, when a heat treatment below 400°C, preferably below 375°C, and more preferably above 340°C and below 360°C is performed after the formation of the first barrier film 531, excess oxygen or oxygen free radicals added to the insulating film 516 can diffuse into the oxide semiconductor film 508.

[0294] Thus, by using aluminum oxide, hafnium oxide, or yttrium oxide as the first barrier film 531, the manufacturing process of the semiconductor device can be shortened, thereby reducing manufacturing costs.

[0295] <Semiconductor Device Manufacturing Method 3>

[0296] Next, refer to Figures 17A to 17C A method for manufacturing a transistor 570 according to one aspect of the present invention will be described in detail. Figures 17A to 17C It is a cross-sectional view illustrating the manufacturing method of a semiconductor device.

[0297] First, perform the same steps as in the manufacturing method of transistor 500 shown above (until...). Figures 10A to 14A (The processes up to the step shown).

[0298] Next, a mask is formed on the insulating film 518 using a photolithography process, forming openings 542c in desired areas of the insulating films 514, 516, and 518. Furthermore, a mask is formed on the insulating film 518 using a photolithography process, forming openings 542a and 542b in desired areas of the insulating films 506, 507, 514, 516, and 518. The opening 542c is formed such that it reaches the conductive film 512b. Furthermore, the openings 542a and 542b are formed such that they both reach the conductive film 504 (see reference). Figure 17A ).

[0299] Furthermore, openings 542a, 542b, and 542c can be formed in the same process or in different processes. When forming openings 542a, 542b, and 542c in the same process, a gray-toned mask or a halftone mask can be used, for example. Alternatively, openings 542a and 542b can be formed in multiple steps. For example, insulating films 506 and 507 can be processed, followed by insulating films 514, 516, and 518.

[0300] Next, a conductive film 520 is formed on the insulating film 518 in such a way as to cover the openings 542a, 542b, and 542c (see reference). Figure 17B ).

[0301] As the conductive film 520, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) can be used. In particular, the conductive film 520 can use light-transmitting conductive materials such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (ITO), indium zinc oxide, and indium tin silicon oxide (ITSO). Furthermore, the conductive film 520 can be formed, for example, by sputtering. In this embodiment, an ITSO with a thickness of 110 nm is formed by sputtering.

[0302] Next, a mask is formed on the conductive film 520 through a photolithography process, and the conductive film 520 is processed into the desired shape to form conductive films 520a and 520b (see reference). Figure 17C ).

[0303] Methods for forming conductive films 520a and 520b include dry etching, wet etching, or a combination of dry etching and wet etching. In this embodiment, the conductive film 520 is processed into conductive films 520a and 520b using a wet etching method.

[0304] Through the above steps, it is possible to manufacture Figure 16A and Figure 16B The transistor 570 is shown.

[0305] The structures and methods shown in this embodiment can be appropriately combined with the structures and methods shown in other embodiments.

[0306] Implementation Method 3

[0307] In this embodiment, the structure of the oxide semiconductor included in a semiconductor device according to one aspect of the present invention is described in detail.

[0308] <Structure of Oxide Semiconductors>

[0309] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors include CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline Oxide Semiconductor), a-like OS (amorphous like Oxide Semiconductor), and amorphous oxide semiconductors.

[0310] From another perspective, oxide semiconductors are divided into amorphous oxide semiconductors and crystalline oxide semiconductors. Crystalline oxide semiconductors include single-crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and nc-OS, among others.

[0311] As a definition of amorphous structure, it is generally known that it is in a metastable state and not fixed, and is isotropic without inhomogeneous structure. In other words, the bond angles of amorphous structures are not fixed, and they have short-range order but not long-range order.

[0312] Conversely, a substantially stable oxide semiconductor cannot be called a completely amorphous oxide semiconductor. Furthermore, an oxide semiconductor that lacks isotropy (e.g., has a periodic structure in tiny regions) cannot be called a completely amorphous oxide semiconductor. Note that a-like OS has a periodic structure in tiny regions, but also contains voids and exhibits an unstable structure. Therefore, a-like OS is physically close to an amorphous oxide semiconductor.

[0313] <caac-os>

[0314] First, let's explain CAAC-OS.

[0315] CAAC-OS is one of the oxide semiconductors that contains multiple c-axis oriented crystalline regions (also known as particles).

[0316] In the composite analysis image of the bright-field image and diffraction pattern of CAAC-OS obtained by transmission electron microscopy (TEM) (also known as a high-resolution TEM image), multiple particles were observed. However, in the high-resolution TEM image, no clear boundaries, i.e., grain boundaries, were observed between the particles. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility caused by grain boundaries is not likely to occur.

[0317] The following section describes the CAAC-OS observed using TEM. Figure 19A This shows a high-resolution TEM image of the CAAC-OS cross-section obtained by viewing from a direction approximately parallel to the sample plane. The high-resolution TEM image was obtained using the Spherical Aberration Corrector function. This high-resolution TEM image obtained using the Spherical Aberration Corrector function is specifically referred to as a Cs-corrected high-resolution TEM image. For example, a Cs-corrected high-resolution TEM image can be obtained using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by Nippon Electron Ltd.

[0318] Figure 19B Showing will Figure 19A (1) A magnified Cs-corrected high-resolution TEM image of region (1). (By...) Figure 19B It can be confirmed that the metal atoms in the particles are arranged in layers. Each layer of metal atoms has a concave-convex configuration that reflects the surface (also called the formed surface) or the top surface of the CAAC-OS film and is arranged in a manner parallel to the formed surface or the top surface of the CAAC-OS.

[0319] like Figure 19B As shown, CAAC-OS has a unique atomic arrangement. Figure 19C It is a diagram that uses auxiliary lines to show the unique atomic arrangement. (From...) Figure 19B and Figure 19C It is known that the size of a single particle is greater than 1 nm or 3 nm, and the size of the gaps created by the tilt between particles is about 0.8 nm. Therefore, the particles can also be called nanocrystals (nc). Note that CAAC-OS can also be called an oxide semiconductor with CANC (C-Axis Aligned nanocrystals).

[0320] Here, based on Cs-corrected high-resolution TEM images, the configuration of CAAC-OS particles 5100 on substrate 5120 is schematically represented as a structure of stacked bricks or blocks (see reference). Figure 19D ).exist Figure 19C The portion observed to tilt between particles corresponds to Figure 19D The area shown is 5161.

[0321] also, Figure 20A This shows a Cs-corrected high-resolution TEM image of the CAAC-OS plane obtained by viewing it from a direction approximately perpendicular to the sample surface. Figure 20B , Figure 20C and Figure 20D Show respectively Figure 20A Cs-corrected high-resolution TEM images magnified from regions (1), (2), and (3) in the image. Figure 20B , Figure 20C and Figure 20D It can be seen that the metal atoms in the particles are arranged in triangular, square, or hexagonal shapes. However, there is no regularity in the arrangement of metal atoms between different particles.

[0322] Next, the analysis of CAAC-OS using X-ray diffraction (XRD) will be explained. For example, when analyzing the structure of CAAC-OS containing InGaZnO4 crystals using the out-of-plane method, such as... Figure 21A As shown, a peak often appears around the diffraction angle (2θ) of 31°. Since this peak originates from the (009) plane of the InGaZnO4 crystal, it can be inferred that the crystals in CAAC-OS have a c-axis orientation, and the c-axis is oriented approximately perpendicular to the surface or top surface to which it is formed.

[0323] Note that when analyzing the structure of CAAC-OS using the out-of-plane method, in addition to the peak near 2θ 31°, a peak sometimes also appears near 2θ 36°. The peak near 2θ 36° indicates that a portion of the CAAC-OS contains crystals without c-axis orientation. Preferably, in the CAAC-OS structure analyzed using the out-of-plane method, a peak appears near 2θ 31° but no peak appears near 2θ 36°.

[0324] On the other hand, when analyzing the structure of CAAC-OS using the in-plane method, where X-rays are incident on the sample from a direction approximately perpendicular to the c-axis, a peak appears around 2θ = 56°. This peak originates from the (110) plane of the InGaZnO4 crystal. In CAAC-OS, even when 2θ is fixed at around 56° and the sample is rotated about the normal vector of the sample plane (φ-axis) for analysis (φ-scan), the peak value remains the same. Figure 21B As shown, no clear peak is observed. In contrast, in single-crystal oxide semiconductors of InGaZnO4, when performing a φ scan with 2θ fixed at around 56°, as shown... Figure 21C As shown, six peaks originating from the crystal plane equivalent to (110) were observed. Therefore, structural analysis using XRD confirmed that the orientations of the a-axis and b-axis in CAAC-OS are irregular.

[0325] Next, CAAC-OS analysis using electron diffraction will be explained. For example, when an electron beam with a diameter of 300 nm is incident on a CAAC-OS containing InGaZnO4 crystals in a direction parallel to the sample plane, it is possible to obtain... Figure 22A The diffraction pattern shown is also known as a selected area transmission electron diffraction pattern. This diffraction pattern contains spots originating from the (009) plane of InGaZnO4 crystallization. Therefore, electron diffraction also reveals that the particles contained in CAAC-OS have a c-axis orientation, and the c-axis is oriented approximately perpendicular to the formed surface or top surface. On the other hand, Figure 22B The diffraction pattern is shown when an electron beam with a diameter of 300 nm is incident on the same sample in a direction perpendicular to the sample plane. Figure 22B A ring-shaped diffraction pattern was observed. Therefore, electron diffraction also indicates that the a-axis and b-axis of the particles contained in CAAC-OS are not oriented. It can be considered that... Figure 22B The first ring in the crystal originates from the (010) and (100) planes of InGaZnO4 crystals. Furthermore, it can be considered that... Figure 22B The second ring in the middle is caused by (110) surface, etc.

[0326] As mentioned above, CAAC-OS is a highly crystalline oxide semiconductor. Since the crystallinity of oxide semiconductors can sometimes be reduced due to the introduction of impurities or the formation of defects, from the opposite perspective, CAAC-OS can be said to be an oxide semiconductor with fewer impurities or defects (such as oxygen defects).

[0327] In addition, impurities refer to elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition metals. For example, elements such as silicon, which have a stronger bonding force with oxygen than the metal elements constituting the oxide semiconductor, can remove oxygen from the oxide semiconductor, thereby disrupting the atomic arrangement and leading to a decrease in crystallinity. Furthermore, because heavy metals such as iron or nickel, argon, carbon dioxide, etc., have large atomic radii (or molecular radii), they can also disrupt the atomic arrangement of oxide semiconductors, leading to a decrease in crystallinity.

[0328] When oxide semiconductors contain impurities or defects, their properties can sometimes change due to light or heat. For example, impurities in oxide semiconductors can sometimes act as carrier traps or carrier sources. In addition, oxygen defects in oxide semiconductors can sometimes act as carrier traps or carrier sources by trapping hydrogen.

[0329] CAAC-OS with few impurities and oxygen defects is an oxide semiconductor with low carrier density. Such oxide semiconductors are called high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. CAAC-OS has low impurity concentration and low defect state density. That is, it can be said that CAAC-OS is an oxide semiconductor with stable properties.

[0330] <nc-os>

[0331] Next, we will explain nc-OS.

[0332] In high-resolution TEM images of nc-OS, there are regions where crystalline regions are observable and regions where clear crystalline regions are not observed. The crystalline regions in nc-OS are mostly 1 nm or larger than 10 nm, or larger than 1 nm. Note that oxide semiconductors with crystalline regions larger than 10 nm but smaller than 100 nm are sometimes referred to as microcrystalline oxide semiconductors. For example, grain boundaries are sometimes not clearly observable in high-resolution TEM images of nc-OS. Note that the origin of nanocrystals may be the same as that of particles in CAAC-OS. Therefore, the crystalline regions of nc-OS are sometimes referred to as particles below.

[0333] In nc-OS, the atomic arrangement in tiny regions (e.g., regions larger than 1 nm and smaller than 10 nm, particularly regions larger than 1 nm and smaller than 3 nm) exhibits periodicity. Furthermore, no regularity in crystal orientation is observed between different particles in nc-OS. Therefore, no orientation is observed in the overall film. Thus, sometimes nc-OS is indistinguishable from a-like OS or amorphous oxide semiconductors in certain analytical methods. For example, when performing structural analysis of nc-OS using out-of-plane X-rays with a beam diameter larger than the particle size, no peaks representing crystal planes are detected. When electron diffraction is performed on nc-OS using an electron beam with a beam diameter larger than the particle size (e.g., 50 nm or larger), a halo-like diffraction pattern is observed. On the other hand, when nanobeam electron diffraction is performed on nc-OS using an electron beam with a beam diameter close to or smaller than the particle size, spots are observed. Additionally, in the nanobeam electron diffraction pattern of nc-OS, sometimes high-brightness regions resembling circles (rings) are observed. Moreover, in the nanobeam electron diffraction pattern of nc-OS, multiple spots are sometimes observed in the annular region.

[0334] Thus, since there is no regularity in the crystallization orientation between particles (nanocrystals), nc-OS can also be called an oxide semiconductor containing RANC (Random Aligned nanocrystals) or an oxide semiconductor containing NANC (Non-Aligned nanocrystals).

[0335] nc-OS is an oxide semiconductor with higher regularity than amorphous oxide semiconductors. Therefore, the defect state density of nc-OS is lower than that of a-like OS or amorphous oxide semiconductors. However, no regularity in crystal orientation is observed between different particles in nc-OS. Therefore, the defect state density of nc-OS is higher than that of CAAC-OS.

[0336] <a-like OS>

[0337] a-like OS is an oxide semiconductor with a structure between nc-OS and amorphous oxide semiconductor.

[0338] Voids are sometimes observed in high-resolution TEM images of a-like OS. Additionally, in high-resolution TEM images, there are areas where crystallization is clearly visible and areas where crystallization is not visible.

[0339] Because a-like OS contains voids, its structure is unstable. To demonstrate that a-like OS has an unstable structure compared to CAAC-OS and nc-OS, the structural changes caused by electron irradiation are shown below.

[0340] As samples for electron irradiation, a-like OS (referred to as sample A), nc-OS (referred to as sample B), and CAAC-OS (referred to as sample C) were prepared. Each sample was an In-Ga-Zn oxide.

[0341] First, high-resolution cross-sectional TEM images of each sample were obtained. The high-resolution cross-sectional TEM images show that each sample has a crystalline structure.

[0342] Note that the determination of which part is considered a crystalline region is as follows. For example, the unit lattice of InGaZnO4 is known to have a structure in which nine layers, comprising three In-O layers and six Ga-Zn-O layers, are stacked in a layered manner along the c-axis. The spacing between these layers that are close to each other is almost equal to the lattice surface spacing (also known as the d-value) of the (009) plane, which is determined to be 0.29 nm by crystal structure analysis. Therefore, the portion with a lattice fringe spacing of 0.28 nm or more and 0.30 nm or less can be considered as an InGaZnO4 crystalline region. Each lattice fringe corresponds to the ab plane of the InGaZnO4 crystal.

[0343] Figure 23 Examples are shown where the average crystal size of the crystalline portions (22 to 45 portions) of various samples was investigated. Note that the crystal size corresponds to the length of the lattice fringes described above. Figure 23 It can be seen that in a-like OS, the crystalline region gradually increases in size according to the cumulative electron dose. Specifically, as... Figure 23 As shown in (1), it can be seen that in the initial observation using TEM, the crystal part with a size of about 1.2 nm (also called the initial crystal nucleus) has a cumulative irradiation dose of 4.2 × 10⁻⁶. 8 e - / nm 2 The growth rate reached approximately 2.6 nm. On the other hand, it was found that the cumulative electron irradiation dose for both nc-OS and CAAC-OS from the start of electron irradiation to the present was 4.2 × 10⁻⁶. 8 e - / nm 2 Within this range, the size of the crystallized portion remained unchanged. Specifically, such as Figure 23 As shown in (2) and (3) in the figure, regardless of the cumulative irradiation of electrons, the average crystal size of nc-OS and CAAC-OS is about 1.4 nm and about 2.1 nm, respectively.

[0344] Thus, electron irradiation can sometimes induce the growth of crystalline regions in a-like OS. On the other hand, it is known that electron irradiation-induced crystalline region growth is almost nonexistent in nc-OS and CAAC-OS. In other words, a-like OS has an unstable structure compared to CAAC-OS and nc-OS.

[0345] Furthermore, because a-like OS contains voids, its density is lower than that of nc-OS and CAAC-OS. Specifically, the density of a-like OS is more than 78.6% and less than 92.3% of that of single-crystal oxide semiconductors with the same composition. The densities of nc-OS and CAAC-OS are more than 92.3% and less than 100% of those of single-crystal oxide semiconductors with the same composition. Note that it is difficult to form oxide semiconductors with densities less than 78% of those of single-crystal oxide semiconductors.

[0346] For example, in oxide semiconductors with an atomic ratio of In:Ga:Zn = 1:1:1, the density of a single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm³. 3 Therefore, for example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn = 1:1:1, the density of a-like OS is 5.0 g / cm³. 3 Above and less than 5.9 g / cm 3 Additionally, for example, in oxide semiconductors with an atomic ratio of In:Ga:Zn = 1:1:1, the densities of nc-OS and CAAC-OS are 5.9 g / cm³. 3 Above and less than 6.3 g / cm 3 .

[0347] Note that sometimes single-crystal oxide semiconductors with identical compositions do not exist. In such cases, by combining different single-crystal oxide semiconductors in arbitrary proportions, the density of single-crystal oxide semiconductors corresponding to the desired composition can be estimated. The density of single-crystal oxide semiconductors corresponding to the desired composition can be calculated using a weighted average based on the combination proportions of the different single-crystal oxide semiconductors. Note that it is preferable to minimize the number of types of single-crystal oxide semiconductors used in the density calculation.

[0348] As described above, oxide semiconductors have various structures and properties. Note that oxide semiconductors can be, for example, stacked films of two or more types, including amorphous oxide semiconductors, a-like OS, nc-OS, and CAAC-OS.

[0349] Implementation Method 4

[0350] In this embodiment, using Figures 24 to 26 The description includes an example of a transistor display device illustrated in the preceding embodiments.

[0351] Figure 24 This is a top view showing an example of a display device. Figure 24 The display device 700 shown includes: a pixel portion 702 disposed on a first substrate 701; a source driving circuit portion 704 and a gate driving circuit portion 706 disposed on the first substrate 701; a sealant 712 disposed around the pixel portion 702, the source driving circuit portion 704, and the gate driving circuit portion 706; and a second substrate 705 disposed opposite to the first substrate 701. Note that the first substrate 701 and the second substrate 705 are sealed by the sealant 712. That is, the pixel portion 702, the source driving circuit portion 704, and the gate driving circuit portion 706 are sealed by the first substrate 701, the sealant 712, and the second substrate 705. Note that although in Figure 24 Although not shown in the figure, a display element is disposed between the first substrate 701 and the second substrate 705.

[0352] Furthermore, in the display device 700, an FPC (Flexible Printed Circuit) terminal section 708 is provided in an area on the first substrate 701 not surrounded by the sealant 712, which is electrically connected to the pixel section 702, the source drive circuit section 704, and the gate drive circuit section 706, respectively. The FPC terminal section 708 is connected to an FPC 716, and various signals are supplied to the pixel section 702, the source drive circuit section 704, and the gate drive circuit section 706 via the FPC 716. The pixel section 702, the source drive circuit section 704, the gate drive circuit section 706, and the FPC terminal section 708 are each connected to wiring 710. Various signals supplied by the FPC 716 are supplied to the pixel section 702, the source drive circuit section 704, the gate drive circuit section 706, and the FPC terminal section 708 via wiring 710.

[0353] Alternatively, multiple gate drive circuit sections 706 may be provided in the display device 700. Furthermore, while an example is shown where the source drive circuit section 704 and the gate drive circuit section 706 are formed on the same first substrate 701 as the pixel section 702, the display device 700 is not limited to this structure. For example, only the gate drive circuit section 706 may be formed on the first substrate 701, or only the source drive circuit section 704 may be formed on the first substrate 701. In this case, a structure in which a substrate on which the source drive circuit or gate drive circuit is formed (e.g., a drive circuit substrate formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) is mounted on the first substrate 701 may also be used. Furthermore, there are no particular limitations on the connection method for the separately formed drive circuit substrate, and methods such as COG (Chip On Glass) and wire bonding can be used.

[0354] In addition, the pixel section 702, the source driving circuit section 704 and the gate driving circuit section 706 included in the display device 700 include a plurality of transistors, and the transistors described in Embodiment 2 can be used as such transistors.

[0355] Furthermore, the display device 700 can employ various methods or incorporate various display elements. Examples of display elements include liquid crystal elements, EL (electroluminescent) elements (including EL elements made of organic and inorganic materials, organic EL elements, or inorganic EL elements) such as LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors (transistors that emit light according to current), electron emission elements, electrophoretic elements, display elements using microelectromechanical systems (MEMS) such as grating light valves (GLV), digital micromirror devices (DMD), digital micro-shutter (DMS) elements, MIRASOL (registered trademark) displays, interferometric modulation (IMOD) elements, piezoelectric ceramic displays, and electrowetting elements. In addition, display media whose contrast, brightness, reflectivity, and transmittance change due to electrical or magnetic effects can also be included. Quantum dots can also be used as display elements. Examples of display devices using liquid crystal elements include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays, reflective liquid crystal displays, intuitive liquid crystal displays, and projective liquid crystal displays). Examples of display devices using EL elements include EL displays. Examples of display devices using electron emission elements include field emission displays (FEDs) or surface-conduction electron-emitter displays (SEDs). Examples of display devices using quantum dots include quantum dot displays. Examples of display devices using electronic ink or electrophoretic elements include electronic paper. Note that when implementing transflective or reflective liquid crystal displays, it is sufficient to make part or all of the pixel electrodes function as reflective electrodes. For example, it is sufficient to make part or all of the pixel electrodes contain aluminum, silver, etc. Furthermore, in this case, storage circuits such as SRAM can be placed below the reflective electrodes. This can further reduce power consumption.

[0356] The display method of the display device 700 can be progressive scan or interlaced scan. Furthermore, the color elements controlled within pixels during color display are not limited to the three colors RGB (R for red, G for green, and B for blue). For example, it can be composed of four pixels: an R pixel, a G pixel, a B pixel, and a W (white) pixel. Alternatively, in a PenTile arrangement, a color element can be composed of two colors from RGB, and different two colors can be selected depending on the color element. Alternatively, one or more colors such as yellow, cyan, and magenta can be added to RGB. Additionally, the display area size of each color element's pixel can be different. However, the disclosed invention is not limited to color display devices, but can also be applied to monochrome display devices.

[0357] In addition, to enable full-color display by using white light (W) for backlighting (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.), a color layer (also called a filter) can be used. As a color layer, red (R), green (G), blue (B), yellow (Y), etc., can be appropriately combined. By using a color layer, color reproduction can be further improved compared to not using a color layer. At this time, it is also possible to set up areas including and excluding the color layer, and directly use the white light from the excluding color layer area for display. By partially setting up areas excluding the color layer, when displaying bright images, the brightness reduction caused by the color layer can sometimes be reduced, resulting in a power consumption reduction of about 20% to 30%. However, when using self-emissive elements such as organic or inorganic EL elements for full-color display, R, G, B, Y, and white (W) can be emitted from elements having each luminous color. By using self-emissive elements, power consumption can sometimes be further reduced compared to using a color layer.

[0358] In this embodiment, using Figure 25 and Figure 26 This describes the structure of a display device using a VA (vertically aligned) type liquid crystal element as the display element. VA type refers to a method of controlling the arrangement of liquid crystal molecules in the display device. A VA type liquid crystal display device is a normally black type display device in which the liquid crystal molecules are oriented perpendicular to the panel surface when no voltage is applied. In the display device shown in this embodiment, a pixel is divided into several regions (sub-pixels), and the liquid crystal molecules are oriented in different directions for each region. This is called multi-domain configuration or multi-domain design.

[0359] Figure 25 yes Figure 24 The cross-sectional view between the dotted and dashed lines QR is shown. Figure 25 The display device 700 shown includes: a lead-in wiring section 711; a pixel section 702; a source drive circuit section 704; and an FPC terminal section 708. The lead-in wiring section 711 includes wiring 710. The pixel section 702 includes a transistor 750 and a capacitor element 790. The source drive circuit section 704 includes a transistor 752.

[0360] Transistors 750 and 752 may use the transistors described in Embodiment 2.

[0361] The transistor used in this embodiment comprises a highly purified oxide semiconductor film in which oxygen defect formation is suppressed. This transistor can reduce the current value in the off-state (off-state current value). Therefore, the hold time of electrical signals such as image signals can be extended, and the write interval can also be extended when the power is on. Thus, the refresh frequency can be reduced, thereby suppressing power consumption.

[0362] Furthermore, the transistors used in this embodiment exhibit high field-effect mobility, enabling high-speed driving. For example, by using such high-speed driving transistors in a liquid crystal display device, switching transistors for the pixel section and driving transistors for the driving circuit section can be formed on the same substrate. In other words, since a separate semiconductor device formed from silicon wafers or the like is not required as the driving circuit, the number of components in the semiconductor device can be reduced. Additionally, high-quality images can be provided in the pixel section by using high-speed driving transistors.

[0363] The capacitor element 790 employs a structure with a dielectric between a pair of electrodes. More specifically, one electrode of the capacitor element 790 uses a conductive film formed through the same process as the conductive film used as the gate electrode of the transistor 750, while the other electrode of the capacitor element 790 uses a conductive film used as the source and drain electrodes of the transistor 750. Furthermore, the dielectric sandwiched between the pair of electrodes uses an insulating film used as the gate insulating film of the transistor 750.

[0364] In addition, Figure 25 In the transistor 750, transistor 752 and capacitor element 790, insulating films 764, 766, 768 and planarization insulating film 770 are provided.

[0365] Insulating films 764, 766, and 768 can be formed using the same materials and manufacturing methods as insulating films 514, 516, and 518 described in Embodiment 2. As the planarization insulating film 770, heat-resistant organic materials such as polyimide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide resin, and epoxy resin can be used. The planarization insulating film 770 can also be formed by stacking multiple insulating films formed from these materials. Alternatively, a structure without the planarization insulating film 770 can be adopted.

[0366] Wiring 710 is formed in the same process as the conductive films used as the source and drain electrodes of transistors 750 and 752. Wiring 710 can also use conductive films formed in a different process than those used as the source and drain electrodes of transistors 750 and 752, such as using conductive films used as gate electrodes. For example, when a material containing copper is used for wiring 710, signal delay is reduced due to wiring resistance, allowing for large-screen displays.

[0367] Additionally, the FPC terminal portion 708 includes a connecting electrode 760, an anisotropic conductive film 780, and an FPC 716. The connecting electrode 760 and the conductive film used as the source and drain electrodes of transistors 750 and 752 are formed in the same process. Furthermore, the connecting electrode 760 and the terminals included in the FPC 716 are electrically connected through the anisotropic conductive film 780.

[0368] Furthermore, glass substrates can be used, for example, as the first substrate 701 and the second substrate 705. Additionally, the first substrate 701 and the second substrate 705 can be made of the same material as the substrate 502 described in Embodiment 2.

[0369] On one side of the second substrate 705, there is a light-shielding film 738 used as a black matrix, a coloring layer 736 used as a color filter, and an insulating film 734 in contact with the light-shielding film 738 and the coloring layer 736.

[0370] Furthermore, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching the insulating film, used to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Alternatively, a spherical spacer may also be used as the structure 778.

[0371] In addition, such as Figure 26 As shown, multiple layers of coloring 736 can also be stacked as spacers instead of structure 778. For example, Figure 26 The display device 700 shown includes a red coloring layer 736R, a green coloring layer 736G, and a blue coloring layer 736B. Coloring layers 736G and 736B are disposed on the coloring layer 736R at positions overlapping with the light-shielding film 738. By employing this structure, the process of forming the structure 778 can be omitted. Furthermore, Figure 26 The display device 700 shown does not include the insulating film 734. Alternatively, a stack of any two of the coloring layers 736R, 736G, and 736B may be used as the aforementioned spacer.

[0372] This embodiment shows a structure 778 disposed on one side of the first substrate 701, but it is not limited thereto. For example, a structure in which the structure 778 is disposed on one side of the second substrate 705 or a structure in which the structure 778 is disposed on both the first substrate 701 and the second substrate 705 may also be used.

[0373] The display device 700 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is disposed on one side of a second substrate 705 and serves as a counter electrode. The display device 700 can change the orientation state of the liquid crystal layer 776 by applying a voltage to the conductive film 772 and the conductive film 774, thereby controlling the transmission and blocking of light to display an image. Protrusions 744 are provided on the conductive film 774.

[0374] The conductive film 772 is connected to the conductive film of the transistor 750, which serves as both the source and drain electrodes. The conductive film 772 is formed on the planarized insulating film 770 and serves as a pixel electrode, i.e., one electrode of the display element. Additionally, the conductive film 772 functions as a reflective electrode. The display device 700 is a so-called reflective color liquid crystal display device in which external light is reflected by the conductive film 772 and displayed through the color layer 736.

[0375] Furthermore, the conductive film 772 can be a conductive film that is transparent to visible light or a conductive film that is reflective to visible light. For example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) is preferably used as the conductive film that is transparent to visible light. For example, a material containing aluminum or silver is preferably used as the conductive film that is reflective to visible light. In this embodiment, a conductive film that is reflective to visible light is used as the conductive film 772.

[0376] Furthermore, when using a conductive film that is reflective to visible light, the conductive film 772 can also adopt a stacked structure. For example, an aluminum film with a thickness of 100 nm can be formed as the lower layer, and a silver alloy film (e.g., an alloy film containing silver, palladium, and copper) with a thickness of 30 nm can be formed as the upper layer. By adopting the above structure, the following excellent effects are achieved.

[0377] The above-mentioned superior effects are as follows: (1) it can improve the adhesion between the base film and the conductive film 772; (2) it can use a chemical solution to etch the aluminum film and the silver alloy film together; (3) it can make the cross-sectional shape of the conductive film 772 into a good shape (e.g., a conical shape). The reason for (3) can be attributed to the following: when using a chemical solution for etching, the etching rate of the aluminum film is slower than that of the silver alloy film, or when the lower aluminum film is exposed after the upper silver alloy film is etched, electrons are extracted from the metal that is cheaper than the silver alloy film, in other words, aluminum, which has a higher ionization tendency. As a result, the etching of the silver alloy film is suppressed, while the etching of the lower aluminum film proceeds faster.

[0378] In addition, as Figures 25 to 27 The display device 700 shown exemplifies a reflective color liquid crystal display device, but the display device 700 is not limited to this. For example, a transmissive color liquid crystal display device may also be used, employing a conductive film that is transparent to visible light as the conductive film 772. In the case of a transmissive liquid crystal display device, the pair of electrodes included in the capacitor element 790 are positioned in a location that does not overlap with the conductive film 772. Furthermore, each layer disposed in the path of light incident from the substrate 701 and emitted through the liquid crystal element 775 and the color layer 736 is preferably a layer that is transparent to visible light.

[0379] The conductive film 772 includes a slit 725. The slit 725 is provided to control the orientation of liquid crystal molecules. An alignment film 746 is provided on the conductive film 772, the planarization insulating film 770, and the structure 778. Similarly, an alignment film 748 is provided on the conductive film 774.

[0380] When a voltage is applied to the conductive film 772 on which the slit 725 is formed, an electric field strain (tilted electric field) is generated near the slit 725. By configuring the slit 725 and the protrusion 744 on one side of the substrate 705 in an interlocking manner, a tilted electric field is effectively generated and the orientation of the liquid crystal is controlled, and the orientation direction of the liquid crystal is made different according to each position. That is, by making the liquid crystal molecules tilt in different directions in each sub-pixel included in a pixel to achieve multi-domain, the viewing angle of the liquid crystal display panel is expanded.

[0381] In addition, although Figure 25 Although not illustrated, optical components (optical substrates) such as polarizing components, phase difference components, and anti-reflection components can be appropriately incorporated. For example, circular polarization utilizing polarizing and phase difference substrates can also be used. Furthermore, backlighting, sidelighting, etc., can also be used as light sources.

[0382] The structure shown in this embodiment can be implemented by appropriately combining it with the structures shown in other embodiments.

[0383] Implementation Method 5

[0384] In this embodiment, refer to Figure 27 Figures 2 to 28 illustrate a display module and electronic device having one aspect of the semiconductor device of the present invention.

[0385] Figure 27 The display module 8000 shown includes a touch panel 8004 connected to FPC 8003, a display panel 8006 connected to FPC 8005, a backlight 8007, a frame 8009, a printed circuit board 8010, and a battery 8011, located between the upper cover 8001 and the lower cover 8002.

[0386] The display device according to one aspect of the present invention can be used, for example, for a display panel 8006.

[0387] The upper cover 8001 and the lower cover 8002 can be appropriately changed in shape or size according to the size of the touch panel 8004 and the display panel 8006.

[0388] The touch panel 8004 can be a resistive film touch panel or a capacitive touch panel, and can be formed in a manner overlapping with the display panel 8006. Alternatively, the opposing substrate (sealing substrate) of the display panel 8006 can also function as a touch panel. Furthermore, a light sensor can be provided within each pixel of the display panel 8006 to create an optical touch panel.

[0389] Backlight 8007 includes light source 8008. Note that, although in Figure 27 The illustration shows a structure in which a light source 8008 is arranged on a backlight 8007, but it is not limited to this. For example, the light source 8008 can be arranged at the end of the backlight 8007 and a light diffuser plate can be used. When using a self-emissive light-emitting element such as an organic EL element, or when using a reflective panel, a structure in which the backlight 8007 is not arranged can be adopted.

[0390] In addition to protecting the display panel 8006, the frame 8009 also serves as electromagnetic shielding to block electromagnetic waves generated by the operation of the printed circuit board 8010. Furthermore, the frame 8009 can also function as a heat sink.

[0391] The printed circuit board 8010 includes a power supply circuit and a signal processing circuit for outputting video and clock signals. The power supply circuit can be powered by an external commercial power supply or by a separately provided battery 8011. When using a commercial power supply, the battery 8011 can be omitted.

[0392] In addition, components such as polarizers, phase difference plates, and prism sheets can also be installed in the display module 8000.

[0393] Figures 28A to 28G This diagram illustrates electronic devices. These electronic devices may include a housing 5000, a display unit 5001, a speaker 5003, an LED light 5004, operation keys 5005 (including a power switch or operation switch), connection terminals 5006, sensors 5007 (with the function of measuring factors such as force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, tilt, vibration, odor, or infrared radiation), a microphone 5008, etc.

[0394] Figure 28A The mobile computer is shown, which may also include a switch 5009, an infrared port 5010, etc., in addition to the above. Figure 28B A portable image reproduction device (e.g., a DVD reproduction device) equipped with a recording medium is shown. In addition to the above, the portable image reproduction device may also include a second display unit 5002, a recording medium reading unit 5011, etc. Figure 28C The example shown is a goggle-type display, which may include, in addition to the above, a second display unit 5002, a support unit 5012, and headphones 5013. Figure 28D A portable game console is shown, which may include, in addition to the above, a recording medium reading unit 5011, etc. Figure 28E A digital camera with television reception function is shown. In addition to the above, the digital camera may also include an antenna 5014, a shutter button 5015, an image receiving unit 5016, etc. Figure 28F A portable game console is shown, which may include, in addition to the above, a second display unit 5002, a recording medium reading unit 5011, etc. Figure 28G A portable television receiver is shown, which may also include, in addition to the above, a charger 5017 capable of transmitting and receiving signals.

[0395] Figures 28A to 28G The electronic device shown can have various functions. For example, it can have the following functions: displaying various data (still images, moving images, text images, etc.) on the display unit; a touch panel; displaying calendars, dates, or times; controlling processing using various software (programs); performing wireless communication; connecting to various computer networks using wireless communication functions; sending or receiving various data using wireless communication functions; reading programs or data stored in a recording medium and displaying them on the display unit, etc. Furthermore, in an electronic device with multiple display units, it can have the following functions: one display unit mainly displays image data, while another display unit mainly displays text data; or, displaying stereoscopic images by taking parallax into account on multiple display units, etc. Furthermore, in an electronic device with an image receiving unit, it can have the following functions: capturing still images; capturing moving images; automatically or manually correcting the captured images; storing the captured images in a recording medium (external or built into the camera); displaying the captured images on the display unit, etc. Note that... Figures 28A to 28G The electronic device shown may have functions not limited to those described above, but may have various functions.

[0396] The electronic device described in this embodiment is characterized by having a display section for displaying certain information. Furthermore, the display device shown in Embodiment 4 can be appropriately adapted to this display section.

[0397] The structure shown in this embodiment can be implemented by appropriately combining it with the structures shown in other embodiments.

[0398] Symbol Explanation

[0399] 100 pixels

[0400] 101 substrate

[0401] 103 scan lines

[0402] 105A Capacitor Wiring

[0403] 105B Capacitor Wiring

[0404] 107 Gate insulating film

[0405] 107a gate insulating film

[0406] 107b gate insulating film

[0407] 114 Insulating film

[0408] 116 Insulating film

[0409] 116a insulating film

[0410] 116b insulating film

[0411] 116c insulating film

[0412] 121 signal line

[0413] 123 Electrode

[0414] 125a electrode

[0415] 125b electrode

[0416] 135 Semiconductor Film

[0417] 135a oxide semiconductor film

[0418] 135b oxide semiconductor film

[0419] 136 transistors

[0420] 137 transistors

[0421] 139a pixel electrode

[0422] 139b pixel electrode

[0423] 140 Capacitor Components

[0424] 141 Capacitor Components

[0425] 142 Liquid Crystal Element

[0426] 143 Liquid Crystal Element

[0427] 144a Opening

[0428] 144b Opening

[0429] 145 Capacitor Components

[0430] 146 Capacitor Components

[0431] 148 pixel electrode

[0432] 148a oxide conductive film

[0433] 148b oxide conductive film

[0434] 149 pixel electrode

[0435] 200 pixels

[0436] 203 scan lines

[0437] 221 signal line

[0438] 223a electrode

[0439] 223b electrode

[0440] 236 transistors

[0441] 237 transistors

[0442] 300 pixels

[0443] 301 substrate

[0444] 303 scan lines

[0445] 305a capacitor wiring

[0446] 305b capacitor wiring

[0447] 307 gate insulating film

[0448] 316 Insulating Film

[0449] 321 signal line

[0450] 323a electrode

[0451] 323b electrode

[0452] 325a electrode

[0453] 325b electrode

[0454] 335 Semiconductor Film

[0455] 336 transistors

[0456] 337 transistors

[0457] 339a pixel electrode

[0458] 339b pixel electrode

[0459] 340 Capacitor Component

[0460] 341 Capacitor Component

[0461] 342 Liquid Crystal Element

[0462] 343 Liquid Crystal Element

[0463] 344a Opening

[0464] 344b Opening

[0465] 345a electrode

[0466] 345b electrode

[0467] 346a Opening

[0468] 346b Opening

[0469] 500 transistors

[0470] 502 substrate

[0471] 504 conductive film

[0472] 506 insulating film

[0473] 507 Insulating Film

[0474] 508 oxide semiconductor film

[0475] 508a oxide semiconductor film

[0476] 508b oxide semiconductor film

[0477] 509 Oxide Semiconductor Film

[0478] 509a Oxide Semiconductor Film

[0479] 509b oxide semiconductor film

[0480] 512 conductive film

[0481] 512a conductive film

[0482] 512b conductive film

[0483] 514 Insulating Film

[0484] 516 Insulating Film

[0485] 518 Insulating Film

[0486] 519 Insulating Film

[0487] 520 conductive film

[0488] 520a conductive film

[0489] 520b conductive film

[0490] 531 barrier membrane

[0491] 536a mask

[0492] 536b mask

[0493] 538 Etching Agent

[0494] 539 Etching Agent

[0495] 540 Oxygen

[0496] 540a Oxygen

[0497] 542 Etching Agent

[0498] 542a Opening

[0499] 542b Opening

[0500] 542c Opening

[0501] 570 transistors

[0502] 700 display device

[0503] 701 substrate

[0504] 702 pixels

[0505] 704 Source Drive Circuit Section

[0506] 705 substrate

[0507] 706 Gate Drive Circuit Section

[0508] 708 FPC Terminal Section

[0509] 710 wiring

[0510] 711 Cabling Department

[0511] 712 sealant

[0512] 716 FPC

[0513] 725 slit

[0514] 734 Insulating Film

[0515] 736 shaded layer

[0516] 736B shader layer

[0517] 736G shader layer

[0518] 736R shader layer

[0519] 738 shading film

[0520] 744 protrusion

[0521] 746 Orientation Film

[0522] 748 Orientation Film

[0523] 750 transistors

[0524] 752 transistors

[0525] 760 Connecting Electrode

[0526] 764 Insulating Film

[0527] 766 Insulating Film

[0528] 768 Insulating Film

[0529] 770 Planarized insulating film

[0530] 772 conductive film

[0531] 774 conductive film

[0532] 775 Liquid Crystal Components

[0533] 776 Liquid Crystal Layer

[0534] 778 Structure

[0535] 780 Anisotropic Conductive Film

[0536] 790 Capacitor Components

[0537] 5000 casing

[0538] 5001 Display Section

[0539] 5002 Display Section

[0540] 5003 Speaker

[0541] 5004 LED lights

[0542] 5005 Operation Key

[0543] 5006 Connecting Terminal

[0544] 5007 sensor

[0545] 5008 microphone

[0546] 5009 switch

[0547] 5010 Infrared Port

[0548] 5011 Recording Media Reading Unit

[0549] 5012 Support Section

[0550] 5013 Headphones

[0551] 5014 Antenna

[0552] 5015 Shutter Button

[0553] 5016 Image Receiving Unit

[0554] 5017 Charger

[0555] 5100 particles

[0556] 5120 substrate

[0557] Area 5161

[0558] 8000 Display Module

[0559] 8001 Top Cover

[0560] 8002 bottom cover

[0561] 8003 FPC

[0562] 8004 Touch Panel

[0563] 8005 FPC

[0564] 8006 Display Panel

[0565] 8007 Backlight

[0566] 8008 Light Source

[0567] 8009 Framework

[0568] 8010 Printed Circuit Board

[0569] 8011 battery

Claims

1. A display device, comprising: A plurality of pixels, wherein one of the plurality of pixels includes: a first transistor; a second transistor; a first pixel electrode electrically connected to the first transistor; a second pixel electrode electrically connected to the second transistor; a first capacitor element electrically connected to the first transistor; a third capacitor element electrically connected to the first transistor; a second capacitor element electrically connected to the second transistor; and a fourth capacitor element electrically connected to the second transistor. The display device includes: The first conductive layer has a region serving as the gate electrode of the first transistor, a region serving as the gate electrode of the second transistor, and a region serving as a scan line; The second conductive layer has the same material as the first conductive layer and has a region that serves as an electrode for the first capacitor element; The first insulating layer has a region that contacts the top surface of the first conductive layer and a region that contacts the top surface of the second conductive layer; A semiconductor film is located on the first insulating layer and has a channel formation region for the first transistor and a channel formation region for the second transistor. A third conductive layer is located on the semiconductor film and has a region serving as one of the source and drain electrodes of the first transistor, a region serving as one of the source and drain electrodes of the second transistor, and a region serving as a signal line. The fourth conductive layer has a region serving as another of the source and drain electrodes of the first transistor and a region serving as another electrode of the first capacitor element, and has a region in contact with the first pixel electrode; The fifth conductive layer has a region that serves as another of the source electrode and drain electrode of the second transistor, and has a region that contacts the second pixel electrode; The sixth conductive layer has the same material as the third, fourth, and fifth conductive layers; and The second insulating layer has a region that contacts the top surface of the third conductive layer, a region that contacts the top surface of the fourth conductive layer, a region that contacts the top surface of the fifth conductive layer, and a region that contacts the top surface of the sixth conductive layer. In the top view, the sixth conductive layer has a region extending in a direction parallel to the direction in which the third conductive layer extends. The first pixel electrode is located above the second insulating layer and has a region that overlaps with the second conductive layer through the fourth conductive layer and a region that overlaps with the second conductive layer through the sixth conductive layer.

2. A display device, comprising: A plurality of pixels, wherein one of the plurality of pixels includes: a first transistor; a second transistor; a first pixel electrode electrically connected to the first transistor; a second pixel electrode electrically connected to the second transistor; a first capacitor element electrically connected to the first transistor; a third capacitor element electrically connected to the first transistor; a second capacitor element electrically connected to the second transistor; and a fourth capacitor element electrically connected to the second transistor. The display device includes: The first conductive layer has a region serving as the gate electrode of the first transistor, a region serving as the gate electrode of the second transistor, and a region serving as a scan line; The second conductive layer has the same material as the first conductive layer and has a region that serves as an electrode for the first capacitor element; The first insulating layer has a region that contacts the top surface of the first conductive layer and a region that contacts the top surface of the second conductive layer; A semiconductor film is located on the first insulating layer and has a channel formation region for the first transistor and a channel formation region for the second transistor. A third conductive layer is located on the semiconductor film and has a region serving as one of the source and drain electrodes of the first transistor, a region serving as one of the source and drain electrodes of the second transistor, and a region serving as a signal line. The fourth conductive layer has a region serving as another of the source and drain electrodes of the first transistor and a region serving as another electrode of the first capacitor element, and has a region in contact with the first pixel electrode; The fifth conductive layer has a region that serves as another of the source electrode and drain electrode of the second transistor, and has a region that contacts the second pixel electrode; The sixth conductive layer has the same material as the third, fourth, and fifth conductive layers; and The second insulating layer has a region that contacts the top surface of the third conductive layer, a region that contacts the top surface of the fourth conductive layer, a region that contacts the top surface of the fifth conductive layer, and a region that contacts the top surface of the sixth conductive layer. In the top view, the sixth conductive layer has a region extending in a direction parallel to the direction in which the third conductive layer extends. The first pixel electrode is located above the second insulating layer and has a region overlapping the second conductive layer with the fourth conductive layer and a region overlapping the second conductive layer with the sixth conductive layer. The first conductive layer has a region extending in a direction intersecting the direction in which the third conductive layer extends. The second conductive layer has a region that overlaps with the second pixel electrode of one of the other pixels adjacent to the first conductive layer in the direction in which the first conductive layer extends.

3. The display device according to claim 1 or 2, wherein, The sixth conductive layer has areas that serve as capacitor wiring.

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