A dual-mode MEMS flow sensor and its manufacturing method
By integrating thermoelectric and piezoresistive flow sensors, the shortcomings of existing flow sensors in terms of measurement accuracy and range are solved, high-precision measurement of small flow and large flow rate fluids are achieved, and the sensor is miniaturized and easy to integrate.
Patent Information
- Application Number
- CN202310434690.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-21
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2043-04-21
AI Technical Summary
The existing flow sensors have shortcomings in taking into account both measurement accuracy and range. Thermoelectric flow sensors have poor results when measuring large flow rate fluids, while the piezoresistive flow sensors have poor accuracy when measuring small flow rate fluids.
A dual-mode MEMS flow sensor is designed, integrating thermoelectric and piezoresistive flow sensors. By making a through-flow channel inside the substrate, a thermoelectric flow sensor is below the flow channel and a piezoresistive flow sensor is above the flow channel. The flow of small and large flow velocities is measured using the thermopile and varistors.
It achieves widening the range while ensuring measurement accuracy, is suitable for measuring fluids with small flow velocities and large flow velocities, and the sensor is miniaturized and easy to integrate the environment.
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Figure CN116465468B_ABST
Abstract
Description
Technical Field
[0001] The invention provides a dual-mode MEMS flow sensor and a preparation method thereof, belonging to the technical field of micro-electromechanical systems (MEMS). Background Art
[0002] The measurement of flow is closely related to industrial production, urban environmental monitoring, medical equipment manufacturing and other fields. Sensors that can accurately measure flow are of great significance to scientific research, industrial development, and ecological construction. As the use scenarios and purposes become increasingly complex and diverse, flow sensors based on different working principles are now widely studied and continuously improved. At present, common flow sensors include: (1) flow sensors with simple principles such as volumetric, turbine, and heat loss; (2) flow sensors with novel principles such as ultrasonic, thermoelectric, and differential pressure. Flow sensors based on different principles have different measurement accuracy and measurement range, and different requirements for fluid flow rate. For example, thermoelectric flow sensors have higher accuracy when measuring low-flow fluids, but have poorer results when measuring high-flow fluids. Piezoresistive flow sensors are more suitable for measuring high-flow fluid flow: when measuring low-flow fluids, due to the small pressure difference between the upstream and downstream of the flow channel, the resistance change of the piezoresistor due to stress is small, and the voltage output through the Wheatstone bridge does not change significantly, resulting in poor measurement results. At present, there is a lack of research on flow sensors that take into account both range and measurement accuracy. Therefore, the market needs a new flow sensor that can expand the measuring range while ensuring the measurement accuracy. The present invention integrates a thermoelectric flow sensor and a piezoresistive flow sensor, uses the thermoelectric flow sensor to measure low-flow fluids, and uses the piezoresistive flow sensor to measure high-flow fluids, and has the advantages of high linearity, small size, and easy integration with the environment. Summary of the invention
[0003] Technical problem: To overcome the deficiencies in the prior art, the present invention provides a dual-mode MEMS flow sensor and a preparation method thereof. By making a flow channel penetrating the substrate inside the substrate, the flow channel is parallel to the upper and lower surfaces of the substrate. Below the flow channel is a thermoelectric flow sensor composed of two thermopiles and a heating resistor, and the placement directions of the thermopiles and the heating resistor are perpendicular to the flow channel direction. Above the flow channel is a membrane structure, and there is a piezoresistor at each end of the membrane structure for measuring the pressure difference at both ends of the flow channel. When the thermoelectric flow sensor below the flow channel works, the heating resistor generates a stable and symmetrically distributed thermal field. The output voltages of the two thermopiles symmetrically distributed with respect to the heating resistor are equal. When the fluid flows through, the fluid brings the heat from the upstream to the downstream. The temperature of the upstream thermopile decreases and the output voltage decreases, while the temperature of the downstream thermopile increases and the output voltage increases. When the piezoresistive flow sensor above the flow channel works, the greater the flow velocity of the fluid, the greater the pressure difference between the inlet and outlet of the flow channel. By using a Wheatstone bridge to measure the resistance change of the piezoresistors corresponding to the inlet and outlet positions on the membrane structure, the pressure difference between the inlet and outlet of the flow channel can be calculated, and then the flow rate of the fluid can be obtained. The piezoresistors on the membrane structure are one arm of the Wheatstone bridge, and the piezoresistors of the other three arms are not on the membrane structure. In addition, using the Wheatstone bridge to measure the resistance can reduce the interference of temperature on the measurement and eliminate the influence of the heating resistor below the flow channel on the piezoresistors.
[0004] Technical solution: A dual-mode MEMS flow sensor uses silicon-on-insulator as the first substrate and the second substrate, and the first substrate is bonded to the second substrate:
[0005] The first substrate includes: a flow channel, a first cavity, a first silicon substrate layer, a first intermediate layer, a first top layer, a membrane structure, a plurality of piezoresistors, a first Wheatstone bridge, a second Wheatstone bridge, a first bonding pad, a second bonding pad, a third bonding pad, a fourth bonding pad, a fifth bonding pad, a sixth bonding pad, a seventh bonding pad, and a first connection wire;
[0006] The second substrate includes: a second silicon substrate layer, a second intermediate layer, a second top layer, a heating resistor, a first thermopile, a second thermopile, a second cavity, an eighth bonding pad, and a second connection wire;
[0007] The first substrate from the upper surface to the lower surface is successively the first top layer, the first intermediate layer, and the first silicon substrate layer; the second substrate from the upper surface to the lower surface is successively the second top layer, the second intermediate layer, and the second silicon substrate layer; the first top layer of the first substrate and the second top layer of the second substrate are the bonding interfaces; the flow channel is located in the first top layer for the passage of fluid;
[0008] The first cavity is located in the first silicon substrate layer, and the membrane structure is formed between the first cavity and the flow channel; there is a piezoresistor at each end of the membrane structure, which are respectively an arm of the first Wheatstone bridge and the second Wheatstone bridge. The other three arms of the first Wheatstone bridge and the second Wheatstone bridge are all the same piezoresistors, and the three piezoresistors are arranged around the periphery of the membrane structure and on the first connection line; when there is no fluid passing through, since the initial values of the piezoresistors are the same, the output voltages of the first Wheatstone bridge and the second Wheatstone bridge are both 0; the piezoresistors are connected by the first connection line, and the inputs and outputs of the first Wheatstone bridge and the second Wheatstone bridge are both connected to the first bonding pad to the seventh bonding pad through the first connection line; the first thermopile and the second thermopile are symmetrically distributed with respect to the heating resistor, and the placement direction is perpendicular to the flow channel direction;
[0009] The range of the second cavity includes the heating resistor, the hot end of the first thermopile, and the hot end of the second thermopile; the first thermopile and the second thermopile are both composed of thermocouples connected in series. The thermocouple includes a semiconductor arm and a metal arm, and the semiconductor arm and the metal arm are isolated by a thermoelectric material insulation layer made of silicon nitride; the first thermopile, the second thermopile, and the heating resistor are connected to the eighth bonding pad through the second connection line.
[0010] During operation, the structures above and below the flow channel work simultaneously: (1) The heating resistor below the flow channel generates a stable symmetric thermal field, and the output voltages of the first thermopile and the second thermopile symmetrically distributed with respect to the heating resistor are equal. When the fluid passes through the flow channel, the fluid brings the heat from the upstream to the downstream, causing the output voltage of the upstream thermopile to decrease and the output voltage of the downstream thermopile to increase. This structure has high measurement accuracy, but when a fluid with a large flow rate passes through, the measurement is prone to saturation and the response will be delayed, so it is more suitable for measuring fluids with a small flow rate. (2) The first Wheatstone bridge and the second Wheatstone bridge composed of piezoresistors above the flow channel have an output voltage of 0 because the initial resistance values of the resistors are equal. When the fluid passes through the flow channel, the upstream pressure is greater than the downstream pressure, and the absolute value of the difference between the change value of the resistance of the upstream piezoresistor and the change value of the resistance of the downstream piezoresistor increases with the increase of the flow rate. This structure has good linearity, but when a fluid with a small flow rate passes through, the pressure difference at both ends of the flow channel is small, and the change in the resistance value of the piezoresistor is not obvious, so it is more suitable for measuring fluids with a large flow rate. When the flow rate of the fluid is small, the measurement result of the thermoelectric structure below the flow channel is used to calculate the fluid flow rate; when the flow rate of the fluid is large, the measurement result of the piezoresistor above the flow channel is used to calculate the fluid flow rate.
[0011] The preparation process flow of the dual-mode MEMS flow sensor of the present invention is divided into two parts: the first part completes the second substrate and the heating resistor, the first thermopile, the second thermopile, the second cavity, the bonding pad, and the second connection line structure on the second substrate. The second part completes the first substrate and the flow channel, the first cavity, the piezoresistor, the first Wheatstone bridge, the second Wheatstone bridge, the membrane structure, the bonding pad, the first connection line structure, and the bonding of the first substrate and the second substrate.
[0012] The process flow of the first part is as follows:
[0013] (1) Select a single-crystalline silicon wafer as the second silicon substrate layer of silicon-on-insulator;
[0014] (2) Deposit a layer of SiO2 on the upper surface of the second silicon substrate layer, coat photoresist, remove the photoresist at the reserved position for fabricating the second cavity, etch out a groove, and initially form the second cavity;
[0015] (3) Prepare the second substrate and the second cavity: Select a P-type silicon wafer, form a layer of SiO2 as the second intermediate layer on the upper surface of the P-type silicon wafer through thermal oxidation, and the un-thermally oxidized part serves as the second top layer. Bond the upper surface of the second silicon substrate layer with the second intermediate layer through silicon-silicon dioxide bonding, and use chemical mechanical polishing process (CMP)
[0016] Thin the second top layer to form a complete silicon-on-insulator structure. The preparation of the second substrate is completed, and from the upper surface to the lower surface, there are the second top layer, the second intermediate layer, and the second silicon substrate layer in sequence, and the second cavity structure is formed;
[0017] (4) Deposit a layer of polysilicon on the upper surface of the second top layer by chemical vapor deposition, photolithograph the polysilicon, and perform N-type ion implantation to form the semiconductor arms of the heating resistor, the first thermopile, and the second thermopile;
[0018] (5) Deposit a layer of silicon nitride as the thermoelectric material insulation layer, and perform patterning on it to isolate the two thermoelectric materials;
[0019] (6) Deposit a layer of Al and pattern it to form the metal arms of the first thermopile and the second thermopile;
[0020] (7) Grow and photolithograph SiO2, perform N-type heavy doping ion implantation to form semiconductor connection lines;
[0021] (8) Perform photolithography, sputter Au, and lift-off on the upper surface of the second substrate to form bonding pads;
[0022] (9) Deposit a layer of silicon nitride, perform patterning on it, and remove the silicon nitride in the areas other than the first thermopile, the second thermopile, and the heating resistor as a protective layer.
[0023] The second part of the process flow is as follows:
[0024] (1) Select a single-crystalline silicon wafer, and form a layer of SiO2 on the upper surface through thermal oxidation as the first intermediate layer, and the un-thermally-oxidized part serves as the first silicon substrate layer;
[0025] (2) Photolithograph the first intermediate layer, etch out grooves, and initially form the first cavity;
[0026] (3) Select an un-thermally-oxidized N-type silicon wafer as the first top layer, grow a layer of SiO2 on the upper surface of the first top layer and perform photolithography, and conduct P-type ion implantation to form 8 piezoresistors with the same resistance value, where 2 piezoresistors are located at both ends of the film structure to be prepared. The length of the first silicon substrate layer is less than the length of the first top layer, and the length of the first top layer is less than the length of the second substrate;
[0027] (4) Strip the remaining SiO2, grow and photolithograph SiO2, and conduct P-type heavy doping ion implantation to form the first connection line, connecting 4 piezoresistors to form the first Wheatstone bridge, and connecting 4 piezoresistors to form the second Wheatstone bridge;
[0028] (5) Photolithograph, sputter Au, and strip on the upper surface of the first top layer to form a bonding pad structure. The bonding pads on the first top layer are respectively used for the bias voltage input and signal output of the Wheatstone bridge;
[0029] (6) Bond the upper surfaces of the first intermediate layer and the first top layer by silicon-silicon dioxide bonding, and use the CMP process to thin the first top layer to form a complete silicon-on-insulator structure. The first substrate is completed, and from the upper surface to the lower surface are the first top layer, the first intermediate layer, and the first silicon substrate layer in sequence, and the first cavity structure is formed;
[0030] (7) Etch a groove across the substrate on the first top layer to initially form a flow channel;
[0031] (8) Bond the first top layer of the first substrate and the second top layer of the second substrate by silicon-silicon bonding to form the final flow channel. The part between the flow channel and the first cavity forms the final film structure;
[0032] Beneficial effects:
[0033] (1) This flow sensor integrates a thermoelectric flow sensor and a piezoresistive flow sensor, realizing dual-mode measurement.
[0034] (2) The thermoelectric mode of this flow sensor is suitable for measuring fluids with small flow velocities, and the piezoresistive mode is suitable for measuring fluids with large flow velocities, broadening the measurement range while ensuring measurement accuracy.
[0035] (3) The flow channel of this flow sensor is fabricated inside the substrate, achieving miniaturization and being easy to integrate with the environment. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The following, in conjunction with the drawings, through a detailed description of the specific embodiments of the present invention, will make the technical solutions and their beneficial effects of the present invention obvious.
[0037] Figure 1 Shown is a top view schematic diagram of the dual-mode MEMS flow sensor of the present invention;
[0038] Figure 2 Shown is a sectional view taken along line A-A of the dual-mode MEMS flow sensor of the present invention;
[0039] Figure 3 Shown is a top view of the second substrate of the dual-mode MEMS flow sensor of the present invention;
[0040] Figure 4 Shown is a sectional view taken along line B-B of the second substrate of the dual-mode MEMS flow sensor of the present invention;
[0041] Figure 5 Shown is a top view of the first top layer before bonding of the dual-mode MEMS flow sensor of the present invention;
[0042] The component numbers in the figure are as follows:
[0043] First substrate 1, second substrate 2, flow channel 3, first cavity 4, first silicon substrate layer 5, first intermediate layer 6, first top layer 7, piezoresistor 8, first Wheatstone bridge 9, second Wheatstone bridge 10, second cavity 11, second silicon substrate layer 12, second intermediate layer 13, second top layer 14, heating resistor 15, first thermopile 16, second thermopile 17, thermocouple 18, semiconductor arm 19, metal arm 20, thermoelectric material insulating layer 21, membrane structure 22, bonding pads 230, bonding pads 231, bonding pads 232, bonding pads 233, bonding pads 234, bonding pads 235, bonding pads 236, bonding pads 237, first connection line 241, second connection line 242, silicon nitride protective layer 25. SPECIFIC EMBODIMENTS
[0044] The specific embodiments of the dual-mode MEMS flow sensor of the present invention are as follows:
[0045] The dual-mode MEMS flow sensor of the present invention uses silicon-on-insulator (SOI) as the first substrate 1 and the second substrate 2. After the structures on the first substrate 1 and the second substrate 2 are completed, they are bonded to form a complete structure. On the surface and inside of the first substrate 1, there are: a flow channel 3, a first cavity 4, a first silicon substrate layer 5, a first intermediate layer 6, a first top layer 7, a membrane structure 22, piezoresistors 8, a first Wheatstone bridge 9, a second Wheatstone bridge 10, bonding pads 231, bonding pads 232, bonding pads 233, bonding pads 234, bonding pads 235, bonding pads 236, bonding pads 237, and a first connecting wire 241. On the surface and inside of the second substrate 2, there are: a second silicon substrate layer 12, a second intermediate layer 13, a second top layer 14, a heating resistor 15, a first thermopile 16, a second thermopile 17, a second cavity 11, a bonding pad 230, and a second connecting wire 242.
[0046] The first substrate 1 from the upper surface to the lower surface is successively the first top layer 7, the first intermediate layer 6, and the first silicon substrate layer 5. The second substrate 2 from the upper surface to the lower surface is successively the second top layer 14, the second intermediate layer 13, and the second silicon substrate layer 12. The first top layer 7 of the first substrate 1 and the second top layer 14 of the second substrate 2 are the bonding interfaces. The flow channel 3 is located on the first top layer 7 for the passage of fluid. The first cavity 4 is located in the first silicon substrate layer 5, and a membrane structure 22 is formed between the first cavity 4 and the flow channel 3. At both ends of the membrane structure 22 corresponding to the inlet and outlet of the flow channel 3, there is a piezoresistor 8 each, which are respectively one arm of the first Wheatstone bridge 9 and the second Wheatstone bridge 10. The other three arms of the Wheatstone bridge are the same piezoresistors 8, surrounding the edge of the membrane structure 22 but not located on the membrane structure 22 and not subject to stress. When there is no fluid passing through, since the initial values of the piezoresistors 8 are the same, the output voltages of the first Wheatstone bridge 9 and the second Wheatstone bridge 10 are both 0. The piezoresistors 8 are connected by the first connecting wire 241 to form a Wheatstone bridge, and the input and output are connected to the bonding pads 231 to 237 through the first connecting wire 241.
[0047] The first thermopile 16 and the second thermopile 17 are symmetrically distributed with respect to the heating resistor 15, and the placement direction is perpendicular to the direction of the flow channel 3. The range of the second cavity 11 includes the heating resistor 15, the hot ends of the first thermopile 16, and the hot ends of the second thermopile 17. The thermopiles are all composed of thermocouples 18 formed by series connection of semiconductor arms 19 and metal arms 20, and the semiconductor arms 19 and the metal arms 20 are isolated by a thermoelectric material insulation layer 21 with a composition of silicon nitride. The first thermopile 16, the second thermopile 17, and the heating resistor 15 are connected to the bonding pad 230 through the second connecting wire 242.
[0048] During operation, the structures above and below the flow channel 3 work simultaneously: (1) The heating resistor 15 below the flow channel 3 generates a stable and symmetric thermal field. The first thermopile 16 and the second thermopile 17 symmetrically distributed with respect to the heating resistor 15 output equal voltages. When the fluid passes through the flow channel 3, the fluid carries the heat from the upstream to the downstream, causing the output voltage of the upstream thermopile to decrease and the output voltage of the downstream thermopile to increase. This structure has high measurement accuracy, but when a fluid with a large flow rate passes through, the measurement is prone to saturation and the response will be delayed. Therefore, it is more suitable for measuring fluids with a small flow rate. (2) The first Wheatstone bridge 9 and the second Wheatstone bridge 10 composed of piezoresistors 8 above the flow channel 3 have equal initial resistance values. Therefore, when the input voltage Vin is applied to the bonding pad 235 and the bonding pads 232 and 236 are grounded, the outputs of the first Wheatstone bridge 9 and the second Wheatstone bridge 10 are 0. When the fluid passes through the flow channel 3, the upstream pressure is greater than the downstream pressure, and the absolute value of the difference between the change values of the resistance of the upstream piezoresistor 8 and the change values of the resistance of the downstream piezoresistor 8 increases with the increase in the flow rate. The first Wheatstone bridge 9 outputs a voltage through the bonding pads 233 and 237, and the second Wheatstone bridge 10 outputs a voltage through the bonding pads 231 and 234. This structure has good linearity, but when a fluid with a small flow rate passes through, the pressure difference at both ends of the flow channel 3 is small, and the change in the resistance value of the piezoresistor 8 is not obvious. Therefore, it is more suitable for measuring fluids with a large flow rate. When the flow rate of the fluid is small, the measurement result of the thermoelectric structure below the flow channel 3 is used to calculate the fluid flow rate; when the flow rate of the fluid is large, the measurement result of the piezoresistor 8 above the flow channel 3 is used to calculate the fluid flow rate.
[0049] The preparation process flow of the dual-mode MEMS flow sensor of the present invention is divided into two parts: The first part completes the second substrate 2 and the structures of the heating resistor 15, the first thermopile 16, the second thermopile 17, the second cavity 11, the bonding pads 230, and the second connection line 242 on the second substrate 2. The second part completes the first substrate 1 and the structures of the flow channel 3, the first cavity 4, the piezoresistor 8, the first Wheatstone bridge 9, the second Wheatstone bridge 10, the membrane structure 22, the bonding pads 231 to 237, the first connection line 241 on the first substrate 1, and the bonding of the first substrate 1 and the second substrate 2.
[0050] The process flow of the first part is as follows:
[0051] (1) Select a single-crystalline silicon wafer as the second silicon substrate layer 12 of silicon-on-insulator;
[0052] (2) Deposit a layer of SiO2 on the upper surface of the second silicon substrate layer 12, coat photoresist, remove the photoresist at the reserved position for fabricating the second cavity 11, etch out a groove, and initially form the second cavity 11;
[0053] (3) Preparation of the second substrate 2 and the second cavity 11: Select a P-type silicon wafer. Through thermal oxidation, a layer of SiO2 is formed on the upper surface of the P-type silicon wafer as the second intermediate layer 13, and the un-thermally oxidized part serves as the second top layer 14. The upper surface of the second silicon substrate layer 12 is silicon-silicon dioxide bonded to the second intermediate layer 13, and the second top layer 14 is thinned using chemical mechanical polishing process (CMP) to form a complete silicon-on-insulator structure. The preparation of the second substrate 2 is completed, and from the upper surface to the lower surface, there are the second top layer 14, the second intermediate layer 13, and the second silicon substrate layer 12 in sequence, and the second cavity 11 structure is formed;
[0054] (4) Deposit a layer of polysilicon on the upper surface of the second top layer 14 by chemical vapor deposition, photolithograph the polysilicon, and perform N-type ion implantation to form the heating resistor 15, the semiconductor arms 19 of the first thermopile 16 and the second thermopile 17;
[0055] (5) Deposit a layer of silicon nitride as the thermoelectric material insulation layer 21, and perform patterning on it to isolate the two thermoelectric materials;
[0056] (6) Deposit a layer of Al and pattern it to form the metal arms 20 of the first thermopile 16 and the second thermopile 17;
[0057] (7) Grow and photolithograph SiO2, perform N-type heavy doping ion implantation to form the semiconductor connection line 242;
[0058] (8) Perform photolithography, sputter Au, and lift-off on the upper surface of the second substrate 2 to form the bonding pad 230;
[0059] (9) Deposit a layer of silicon nitride, perform patterning on it, and remove the silicon nitride in the areas other than the first thermopile 16, the second thermopile 17, and the heating resistor 15 as the protective layer 25.
[0060] The process flow of the second part is as follows:
[0061] (1) Select a single-crystal silicon wafer. Through thermal oxidation, a layer of SiO2 is formed on the upper surface as the first intermediate layer 6, and the un-thermally oxidized part serves as the first silicon substrate layer 5;
[0062] (2) Photolithograph the first intermediate layer 6, etch out the grooves, and initially form the first cavity 4;
[0063] (3) Select the un-thermally oxidized N-type silicon wafer as the first top layer 7. Grow a layer of SiO2 on the upper surface of the first top layer 7 and perform photolithography, and perform P-type ion implantation to form 8 varistors 8 with the same resistance value, and 2 of the varistors 8 are located at both ends of the film structure 22 to be prepared. The length of the first silicon substrate layer 5 is less than the length of the first top layer 7, and the length of the first top layer 7 is less than the length of the second substrate 2;
[0064] (4) Strip the remaining SiO2, grow and lithograph SiO2, perform P-type heavy doping ion implantation to form the first connection line 241, connect 4 varistors 8 to form the first Wheatstone bridge 9, and connect 4 varistors 8 to form the second Wheatstone bridge 10;
[0065] (5) On the upper surface of the first top layer 7, lithograph, sputter Au, and strip to form bonding pads 231 to 237;
[0066] (6) Bond the upper surface of the first intermediate layer 6 and the first top layer 7 by silicon-silicon dioxide bonding, and use the CMP process to thin the first top layer 7 to form a complete silicon-on-insulator structure. The first substrate 1 is prepared, and from the upper surface to the lower surface are the first top layer 7, the first intermediate layer 6, and the first silicon substrate layer 5 in sequence, and the first cavity 4 structure is formed;
[0067] (7) Etch a groove across the substrate on the first top layer 7 to initially form the flow channel 3;
[0068] Bond the first top layer 7 of the first substrate 1 and the second top layer 14 of the second substrate 2 by silicon-silicon bonding to form the final flow channel 3. The part between the flow channel 3 and the first cavity 4 forms the final film structure 22;
[0069] The above is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.
Claims
1. A dual-mode MEMS flow sensor, characterized in that: Silicon on insulator is used as the first substrate (1) and the second substrate (2), and the first substrate (1) is bonded to the second substrate (2): The first substrate (1) includes: a flow channel (3), a first cavity (4), a first silicon substrate layer (5), a first intermediate layer (6), a first top layer (7), a membrane structure (22), a plurality of piezoresistors (8), a first Wheatstone bridge (9), a second Wheatstone bridge (10), a first bonding pad (231), a second bonding pad (232), a third bonding pad (233), a fourth bonding pad (234), a fifth bonding pad (235), a sixth bonding pad (236), a seventh bonding pad (237), a first connecting wire (241); The second substrate (2) includes: a second silicon substrate layer (12), a second intermediate layer (13), a second top layer (14), a heating resistor (15), a first thermopile (16), a second thermopile (17), a second cavity (11), an eighth bonding pad (230), a second connecting wire (242); The first substrate (1) from the upper surface to the lower surface is successively the first top layer (7), the first intermediate layer (6), and the first silicon substrate layer (5); the second substrate (2) from the upper surface to the lower surface is successively the second top layer (14), the second intermediate layer (13), and the second silicon substrate layer (12); the first top layer (7) of the first substrate (1) and the second top layer (14) of the second substrate (2) are the bonding interface; the flow channel (3) is located on the first top layer (7) for the passage of fluid; The first cavity (4) is located in the first silicon substrate layer (5), and the membrane structure (22) is formed between the first cavity (4) and the flow channel (3); there is a piezoresistor (8) at each end of the membrane structure (22), which are respectively one arm of the first Wheatstone bridge (9) and the second Wheatstone bridge (10), and the other three arms of the first Wheatstone bridge (9) and the second Wheatstone bridge (10) are all the same piezoresistor (8), and the three piezoresistors (8) surround the periphery of the membrane structure (22) and are connected to the first connecting wire (241); when there is no fluid passing through, since the initial values of the piezoresistors (8) are the same, the output voltages of the first Wheatstone bridge (9) and the second Wheatstone bridge (10) are both 0; the piezoresistors (8) are connected by the first connecting wire (241), and the inputs and outputs of the first Wheatstone bridge (9) and the second Wheatstone bridge (10) are both connected to the first bonding pad (231) to the seventh bonding pad (237) through the first connecting wire (241); the first thermopile (16) and the second thermopile (17) are symmetrically distributed with respect to the heating resistor (15), and the placement direction is perpendicular to the direction of the flow channel (3); The scope of the second cavity (11) includes the heating resistor (15), the hot ends of the first thermopile (16) and the second thermopile (17); the first thermopile (16) and the second thermopile (17) are both formed by connecting thermocouples (18) in series. The thermocouple (18) includes a semiconductor arm (19) and a metal arm (20), and the semiconductor arm (19) and the metal arm (20) are isolated by a thermoelectric material insulating layer (21) made of silicon nitride; the first thermopile (16), the second thermopile (17) and the heating resistor (15) are connected to the eighth bonding pad (230) through a second connecting wire (242).
2. A preparation method of a dual-mode MEMS flow sensor, characterized in that: It includes the following steps: Step 1): Obtain the second substrate (2) and the heating resistor (15), the first thermopile (16), the second thermopile (17), the second cavity (11), the eighth bonding pad (230), and the second connecting wire (242) on the second substrate (2); Step 2): Obtain the first substrate (1) and the flow channel (3), the first cavity (4), the varistor (8), the first Wheatstone bridge (9), the second Wheatstone bridge (10), the film structure (22), the first bonding pad (231) to the seventh bonding pad (237), and the first connecting wire (241) on the first substrate (1); Step 3): Bond the first substrate (1) and the second substrate (2); The specific implementation process of Step 1) is as follows: Step 1.1): Select a single crystal silicon wafer as the second silicon substrate layer (12); Step 1.2): Deposit a layer of SiO2 on the upper surface of the second silicon substrate layer (12), coat photoresist, remove the photoresist at the reserved position for fabricating the second cavity (11), etch out a groove, and initially form the second cavity (11); Step 1.3): Select a P-type silicon wafer, form a layer of SiO2 as the second intermediate layer (13) on the upper surface of the P-type silicon wafer through thermal oxidation, and the un-thermally oxidized part is used as the second top layer (14); Bond the upper surface of the second silicon substrate layer (12) and the second intermediate layer (13) by silicon-silicon dioxide bonding, and use chemical mechanical polishing process CMP to thin the second top layer (14) to obtain the second substrate (2), and completely form the second cavity (11); Step 1.4): Deposit a layer of polysilicon on the upper surface of the second top layer (14) by chemical vapor deposition, photolithograph the polysilicon, and perform N-type ion implantation to form the heating resistor (15), the semiconductor arms (19) of the first thermopile (16) and the second thermopile (17); Step 1.5): Deposit a layer of silicon nitride as the thermoelectric material insulating layer (21), and perform patterning on the thermoelectric material insulating layer (21); Step 1.6): Deposit a layer of Al and pattern it to form the metal arms (20) of the first thermopile (16) and the second thermopile (17); Step 1.7): Grow and photolithograph SiO2, perform N-type heavy doping ion implantation to form the semiconductor second connecting wire (242); Step 1.8): Perform photolithography, sputter Au, and strip on the upper surface of the second substrate (2) to form the eighth bonding pad (230). Step 1.9): Deposit a layer of silicon nitride, perform patterning on the silicon nitride, and remove the silicon nitride in the areas other than the first thermopile (16), the second thermopile (17), and the heating resistor (15) as the protective layer (25). The specific implementation process of Step 2) is as follows: Step 2.1): Select a single-crystalline silicon wafer, form a layer of SiO2 on the upper surface by thermal oxidation as the first intermediate layer (6), and the un-thermally oxidized part as the first silicon substrate layer (5). Step 2.2): Perform photolithography on the first intermediate layer (6), etch out grooves, and initially form the first cavity (4). Step 2.3): Select the un-thermally oxidized N-type silicon wafer as the first top layer (7), grow a layer of SiO2 on the upper surface of the first top layer (7) and perform photolithography, and perform P-type ion implantation to form 8 piezoresistors (8) with the same resistance value, where 2 piezoresistors (8) are located at both ends of the membrane structure (22) to be prepared; the length of the first silicon substrate layer (5) is less than the length of the first top layer (7), and the length of the first top layer 7 is less than the length of the second substrate (2). Step 2.4): Strip the remaining SiO2, grow and perform photolithography on SiO2, and perform P-type heavy doping ion implantation to form the first connection line (241), connect 4 piezoresistors (8) to form the first Wheatstone bridge (9), and connect 4 piezoresistors (8) to form the second Wheatstone bridge (10). Step 2.5): Perform photolithography, sputter Au, and strip on the upper surface of the first top layer (7) to form the first bonding pad (231) to the seventh bonding pad (237). Step 2.6): Bond the upper surfaces of the first intermediate layer (6) and the first top layer (7) by silicon-silicon dioxide bonding, and thin the first top layer (7) using the CMP process to obtain the first substrate (1), and completely form the first cavity (4). Step 2.7): Etch a groove across the first substrate (1) on the first top layer (7) to initially form the flow channel (3). Step 2.6): Bond the first top layer (7) of the first substrate (1) and the second top layer (14) of the second substrate (2) by silicon-silicon bonding to form the final flow channel (3), and the part between the flow channel (3) and the first cavity (4) forms the final membrane structure (22).
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