Linear lidar based analog front end receiver device
By designing a linear lidar analog front-end receiver that combines a transimpedance amplifier and a DC offset canceller, the requirements of the receiver circuit for traditional lidar to distinguish objects with different reflectivities and different ranging scenarios are solved. This achieves a high-bandwidth, low-noise receiver circuit, enabling detection capabilities to adapt to different ranging scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
- Filing Date
- 2023-04-06
- Publication Date
- 2026-05-08
AI Technical Summary
Traditional TOF lidar cannot distinguish between objects at the same distance but with different reflectivities. Linear mode lidar requires high-bandwidth receiving circuits to detect weak signals at long distances and strong signals at close distances, and different ranging scenarios have different requirements for the receiving circuits.
Design an analog front-end receiver based on linear lidar, combining a transimpedance amplifier, a DC offset canceller, and an equalizer. Achieve high gain and low noise through common-source feedforward and local negative feedback. Use DC coupling and adjustable resistors for gain switching to adapt to different ranging scenarios.
It implements a high-bandwidth, low-noise receiving circuit, supports long-distance weak signal detection and short-distance strong signal detection, increases the ranging range, has a short recovery time, high reliability, and is adaptable to different ranging scenarios.
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Figure CN116466329B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of pulsed lidar based on direct time-of-flight linear modes, and more specifically, to an analog front-end receiving device based on linear lidar. Background Technology
[0002] Pulsed laser detection and ranging achieves this by calculating the time of flight between the detector and the target. This technology is widely used in surveying, obstacle detection, and autonomous driving. However, traditional Time-of-Flight (TOF) lidar cannot directly distinguish objects at the same distance but with different reflectivities. Linear-mode lidar can obtain the amplitude information of the laser echo through a linearly biased avalanche photodiode (APD), simultaneously obtaining the distance and intensity information of the detected target. To extend the detection range and improve detection accuracy, narrow-pulse lasers are generally used as the emission source for linear lidar, but this also increases the bandwidth requirements of the receiving circuit front-end device. Furthermore, the requirements for the receiving circuit front-end device vary depending on the ranging scenario. For long-range ranging, to achieve weak signal detection, the receiving front-end device needs to maintain a high gain and low noise level; for short-range ranging, when the input current is large, a low-gain receiving front-end device is required to prevent saturation output.
[0003] Therefore, there is an urgent need to provide a receiver circuit analog front-end device that combines high bandwidth, low noise, and switchable gain with high-precision linear mode lidar, in terms of bandwidth and ranging range. Summary of the Invention
[0004] In view of the above problems, this application provides an analog front-end receiving device based on linear lidar, which improves the detection capability of lidar for weak signals at long distances, and supports gain switching to adapt to different ranging scenarios. It has the advantages of high bandwidth, low noise, large ranging range, short recovery time and high reliability.
[0005] This application discloses an analog front-end receiving device based on linear lidar, comprising: a transimpedance amplifier having an input terminal for a current signal; a single-ended to differential circuit, the output terminal of the transimpedance amplifier being connected to the input terminal of the single-ended to differential circuit; a DC offset canceller, a post-amplifier, and an equalizer, the DC offset canceller including a first DC offset canceller and a second DC offset canceller, the output terminal of the single-ended to differential circuit being connected to the input terminal of the equalizer after passing through the first DC offset canceller, the post-amplifier, and the second DC offset canceller in sequence; and an output buffer, the input terminal of which is connected to the output terminal of the equalizer, the output of which is a negative voltage VON and a positive voltage VOP in a differential voltage signal, wherein the equalizer is a two-stage source-level degenerate equalizer constructed as a differential pair structure with source-level parallel resistors and capacitors, the transimpedance amplifier is constructed as a resistor-parallel structure, and the transimpedance amplifier includes a common-source feedforward resistor, a local negative feedback resistor RF1, and a resistor RF2.
[0006] Furthermore, the transimpedance amplifier also includes a core amplifier, which is connected in parallel with a common-source feedforward resistor and a resistor RF2. The core amplifier is a three-stage cascaded inverter structure, including: an inverter in the first stage, a local negative feedback resistor RF1 in the second stage, and an inverter-type voltage amplifier in the third stage.
[0007] Furthermore, the transimpedance amplifier and the single-ended to differential circuit are DC coupled. The single-ended to differential circuit consists of a differential voltage amplifier and a first low-pass network. The input terminal of the differential pair in the differential voltage amplifier is connected to the output terminal of the transimpedance amplifier, and the output terminal of the differential pair in the differential voltage amplifier is connected to the first low-pass network.
[0008] Furthermore, the source-level parallel resistor and capacitor of the equalizer is an adjustable source-level degradation resistor and capacitor array.
[0009] Furthermore, the post-amplifier has a differential pair structure with source-level degradation resistors, and both the local negative feedback resistor RF1 and the source-level degradation resistor are adjustable resistors.
[0010] Furthermore, both the first DC offset canceller and the second DC offset canceller have a second low-pass network and a cross-feedback NMOS transistor. The first DC offset canceller is connected to the first low-pass network to eliminate the DC offset of the differential pair in the differential voltage amplifier, and the second DC offset canceller is connected to the differential pair in the post-amplifier to eliminate the DC offset of the differential pair in the post-amplifier.
[0011] Furthermore, the output buffer is constructed as a three-stage interconnected structure. The first stage is a third DC offset canceller connected to the input of the equalizer. The middle stage is a pre-buffer stage, which is constructed as a differential pair structure with source-level degradation resistors. The last stage is a buffer stage, which is constructed as a source-level degradation type equalization structure.
[0012] As can be seen from the above technical solution, this application has the following beneficial effects:
[0013] 1. By combining a transimpedance amplifier with an equalizer, the front-end transimpedance amplifier achieves high gain while maintaining phase margin through a combination of common-source feedforward and local negative feedback. The two-stage equalizer at the back end compensates for bandwidth while avoiding slow gain roll-off, ensuring bandwidth while suppressing high-frequency noise, thus achieving the high bandwidth and low noise characteristics of the overall device.
[0014] 2. By converting the single-ended output of the transimpedance amplifier into a differential signal through DC coupling, the long recovery time problem caused by the charging and discharging of the AC coupling capacitor is solved. Simultaneously, the first low-pass network, acting as a low-pass filter network, can filter out some low-frequency noise, achieving noise reduction.
[0015] 3. A DC offset canceller is used to eliminate the DC offset at the differential input terminal, so as to avoid the device saturation caused by the DC offset at the differential input terminal, ensure the normal operation of the overall device, and improve the reliability of the device.
[0016] 4. Gain switching is achieved by adjusting the resistance values of the negative feedback resistor in the transimpedance amplifier and the source degradation resistor in the post-amplifier to adapt to different ranging scenarios and increase the overall ranging range of the device. Simultaneously, the adjustable source degradation resistor-capacitor array of the equalizer enables dynamic adjustment of the compensation effect.
[0017] 5. The output buffer uses a pre-buffering stage to ensure gain, and the final output buffer stage uses a source-level degraded equalizer to compensate for channel loss, ensuring overall gain and bandwidth and improving the device's driving capability. Attached Figure Description
[0018] Other objects and advantages of this disclosure will become apparent from the following description of the disclosure with reference to the accompanying drawings, and will help to provide a comprehensive understanding of the disclosure.
[0019] Figure 1 This is a block diagram of an analog front-end receiving device based on linear lidar according to an embodiment of this application;
[0020] Figure 2 The circuit diagram of the transimpedance amplifier according to the embodiments of this application is shown below.
[0021] Figure 3The circuit diagram is shown below for a single-ended to differential circuit according to an embodiment of this application.
[0022] Figure 4 This is a circuit diagram of a post-amplifier with a source-level degradation resistor according to an embodiment of this application;
[0023] Figure 5 The circuit diagram is shown below for the DC offset canceller according to the embodiments of this application.
[0024] Figure 6 The circuit diagram of the source-level degraded equalizer according to the embodiments of this application is shown below.
[0025] Figure 7 This is a circuit diagram of the output buffer according to an embodiment of this application. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0027] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.
[0028] In this document, unless otherwise specified, directional terms such as "up," "down," "left," "right," "inner," and "outer" are used to indicate orientation or positional relationships based on the accompanying drawings, and are used only for the convenience of describing this disclosure, and are not intended to indicate or imply that the device, element, or component referred to must have a specific orientation, or be constructed or operated in a specific orientation. It should be understood that when the absolute position of the described object changes, the relative positional relationships they represent may also change accordingly. Therefore, these directional terms should not be construed as limitations on this disclosure.
[0029] Pulsed laser detection and ranging achieves this by calculating the time of flight between the detector and the target. This technology is widely used in surveying, obstacle detection, and autonomous driving. However, traditional Time-of-Flight (TOF) lidar cannot directly distinguish objects at the same distance but with different reflectivities. Linear-mode lidar can obtain the amplitude information of the laser echo through a linearly biased avalanche photodiode (APD), simultaneously obtaining the distance and intensity information of the detected target. To extend the detection range and improve detection accuracy, narrow-pulse lasers are generally used as the emission source for linear lidar, but this also increases the bandwidth requirements of the receiving circuit front-end device. Furthermore, the requirements for the receiving circuit front-end device vary depending on the ranging scenario. For long-range ranging, to achieve weak signal detection, the receiving front-end device needs to maintain a high gain and low noise level; for short-range ranging, when the input current is large, a low-gain receiving front-end device is required to prevent saturation output.
[0030] This application provides an analog front-end receiving device based on linear lidar, based on Figure 1 According to the embodiment of this application, the analog front-end receiving device based on linear lidar first inputs the photodiode into the transimpedance amplifier 1, which is then converted into a differential signal by the single-ended to differential circuit 2 and connected to the first DC offset canceller. After that, it is input into the two-stage equalizer 5 through the three-stage post-amplifier 4 and the second DC offset canceller, and finally connected to the buffer 6 mentioned above.
[0031] This device can improve the detection capability of weak signals at long distances by lidar, and supports gain switching to adapt to different ranging scenarios. For example, it can receive echo signals in the frequency range of 0.8MHz to 1.5GHz, with a gain switching range of 80dB Ω to 107dB Ω. In high-gain mode, it achieves a minimum equivalent input noise current of 0.45PA / √Hz to meet the requirements of long-distance ranging, and supports gain level switching for short-distance ranging, increasing the dynamic range of the front-end device. It has the advantages of high bandwidth, low noise, large ranging range, short recovery time, and high reliability.
[0032] As shown in Figure 1 Figure 1 The block diagram of the broadband low-noise analog front-end receiver for linear mode lidar provided in this application includes: a transimpedance amplifier 1, a single-ended to differential circuit 2, a DC offset canceller 3, a post-amplifier 4, an equalizer 5, and an output buffer 6.
[0033] The transimpedance amplifier 1 has an input terminal for a current signal, and its output terminal is connected to the input terminal of the single-ended to differential circuit 2. The DC offset canceller 3 includes a first DC offset canceller and a second DC offset canceller. The output terminal of the single-ended to differential circuit 2 passes through the first DC offset canceller, the post-amplifier 4, and the second DC offset canceller in sequence, and is then connected to the input terminal of the equalizer 5. The input terminal of the output buffer 6 is connected to the output terminal of the equalizer 5, and the output of the output buffer 5 is the negative voltage VON and the positive voltage VOP in the differential voltage signal.
[0034] Among them, equalizer 5 is a two-stage source-level degradation type equalizer, which is constructed as a differential pair structure with parallel resistors and capacitors at the source level. Transimpedance amplifier 1 is constructed as a resistor parallel type structure, which includes a common-source feedforward resistor, a local negative feedback resistor RF1, and a resistor RF2.
[0035] Transimpedance amplifier 1 converts the photocurrent generated by the photodiode into a voltage signal. The amplitude of its output voltage signal is proportional to the input current signal, and gain switching is achieved by adjusting the feedback resistor value. For long-distance weak signal detection, transimpedance amplifier 1 employs a high-gain mode for noise reduction; for short-distance strong signal detection, it uses a low-gain mode to prevent device saturation caused by large input signals. Simultaneously, in conjunction with common-source feedforward and local negative feedback, transimpedance amplifier 1 ensures sufficient phase margin, improving system stability.
[0036] In this embodiment, the transimpedance amplifier 1 uses a combination of common-source feedforward and local negative feedback to ensure phase margin, and achieves high gain and low noise by using a high feedback resistor value; the back end uses equalizer 5 to perform bandwidth compensation, and avoids slow bandwidth roll-off by two-stage equalization compensation, increasing bandwidth while suppressing high-frequency noise, thereby achieving the characteristics of high bandwidth and low noise of the overall device.
[0037] Figure 2This is a circuit diagram of the transimpedance amplifier according to an embodiment of this application. The transimpedance amplifier 1 is a resistor parallel structure, and the core amplifier is a three-stage cascaded inverter structure to improve the open-loop gain. The cascading effect causes the first-stage inverter to have a large impact on the noise of the transimpedance amplifier, so PMOS and NMOS with large gm values are selected. The second stage introduces a local negative feedback resistor RF1 for frequency compensation to improve system stability. The second-stage local negative feedback resistor improves stability while reducing the open-loop gain, and the cascaded third-stage inverter-type voltage amplifier stage ensures the open-loop gain. At the same time, a common-source stage feedforward is used to ensure phase margin and reduce the bandwidth reduction effect of the traditional capacitor-compensated structure. When the open-loop gain is large enough, the gain of the transimpedance amplifier 1 is approximately equal to the resistance value of the feedback resistor RF2. Under long-distance detection, the high-resistance RF setting is switched to achieve high gain and low noise of the transimpedance amplifier 1. Under short-distance detection, the low-resistance RF setting is switched to avoid the transimpedance amplifier from saturating due to large input current.
[0038] According to one embodiment of this application, a single-ended to differential circuit 2 is used to convert the single-ended voltage signal output by the transimpedance amplifier 1 into a differential signal for processing by subsequent circuits. The transimpedance amplifier 1 and the single-ended to differential circuit 2 are DC-coupled. The single-ended to differential circuit 2 consists of a differential voltage amplifier and a first low-pass network. The input terminal of the differential pair in the differential voltage amplifier is connected to the output terminal of the transimpedance amplifier 1, and the output terminal of the differential pair in the differential voltage amplifier is connected to the first low-pass network, which can realize the conversion of the signal from single-ended to differential and filter out low-frequency noise from the preceding stage.
[0039] In other words, while providing DC input to the back-end differential pair with the output of transimpedance amplifier 1, low-frequency noise can be filtered out. In addition, the output signal of transimpedance amplifier 1 is DC coupled to single-ended to differential circuit 2, which can convert the signal into a differential voltage signal, solving the problem of long recovery time caused by AC coupling.
[0040] Figure 3 This is a circuit diagram of the single-ended to differential circuit according to an embodiment of this application. One input end of the differential pair is directly connected to the output of transimpedance amplifier 1; the other end is connected to the low-pass filtered output signal of transimpedance amplifier 1, realizing single-ended to differential conversion while filtering out some low-frequency noise. At the same time, the DC coupling method avoids the long recovery time problem caused by the charging and discharging of the large capacitor in AC coupling, and the output of transimpedance amplifier 1 provides DC bias to the single-ended to differential circuit 2.
[0041] According to one embodiment of this application, the post-amplifier 4 has a differential pair structure with a source-level degradation resistor for further amplifying the previous stage differential signal. The source-level degradation resistor is an adjustable resistor, and gain switching is achieved by adjusting the value of the source-level degradation resistor.
[0042] Figure 4This is a circuit diagram of a post-amplifier with source-level degradation resistors according to an embodiment of this application. The cascaded post-amplifier 4 adopts a differential pair structure with source-level degradation resistors to further amplify the output differential voltage signal. Gain switching is achieved by adjusting the value of the source-level degradation resistors, thereby increasing the signal range that the device can detect.
[0043] According to one embodiment of this application, the negative feedback resistor of the transimpedance amplifier 1 and the source degradation resistor of the post-amplifier 4 are both set as adjustable resistors to provide gain switching under different ranging scenarios.
[0044] According to one embodiment of this application, the DC offset canceller 3 is used to eliminate DC offset at both ends of the differential stage, preventing the differential device from saturating due to DC offset. It is understood that the DC offset canceller 3 eliminates the DC offset of the preceding differential stage through a low-pass feedforward.
[0045] Figure 5 The circuit diagram is shown in the embodiment of this application for the DC offset canceller. A low-pass network and cross-feedback NMOS transistors MN10 and MN20 are used to eliminate the DC offset at the two input terminals, avoiding circuit saturation caused by DC offset at the differential input terminals and ensuring normal operation of the device.
[0046] According to one embodiment of this application, the equalizer 5 is a differential pair structure with parallel resistors and capacitors at the source stage, used to compensate for the bandwidth of the preceding stage. The compensation effect is adjusted by adjusting the values of the source stage degraded resistors and capacitors. The two-stage equalizer 5 provides high-frequency gain compensation bandwidth.
[0047] In one embodiment, the source-level parallel resistor and capacitor of the equalizer 5 is an adjustable source-level degradation resistor and capacitor array, which can dynamically adjust the compensation effect.
[0048] Figure 6 This is a circuit diagram of a source-level degraded equalizer according to an embodiment of this application. The source-level degraded equalizer 5 provides high-frequency gain compensation for the preceding signal through a resistor and capacitor connected in parallel at the source stage of the input transistor. The equalization compensation effect is adjusted by regulating the values of the source-level resistor and capacitor. This device uses two equalizers 5 for signal compensation, avoiding the slow roll-off of gain in the high-frequency band that degrades noise and improving the equalization compensation capability.
[0049] According to one embodiment of this application, the output buffer 6 is used to buffer the output signal of the analog front-end device, improve the driving capability of the device, and at the same time compensate for channel loss through a built-in source-level degradation equalizer to output the final differential voltage signal.
[0050] Figure 7This is a circuit diagram of the output buffer according to an embodiment of this application. The output buffer 6 is a three-stage interconnection. The first-stage DC offset canceller 7 eliminates the DC offset of the previous stage. The intermediate pre-buffer stage 8 uses a differential pair with source-level degradation resistors to provide gain. The final-stage buffer stage 9 uses a source-level degradation type equalization structure to compensate for output channel loss, ensure device bandwidth, and improve device driving capability.
[0051] based on Figures 1-7 The working steps of the simulated front-end receiving device in this application are as follows:
[0052] Step 1: The photodiode receives the echo signal and generates a photocurrent of corresponding amplitude. The photocurrent is input to transimpedance amplifier 1. For long-distance detection, a high-gain mode is used; for short-distance detection, a low-gain mode is switched. The current signal is then output as a single-ended voltage signal of corresponding amplitude by transimpedance amplifier 1.
[0053] Step 2: The single-ended to differential circuit 2 converts the single-ended voltage signal output by the transimpedance amplifier 1 into a differential signal through DC coupling, and the DC offset canceller 3 is connected to the back end to eliminate the DC offset of the differential structure.
[0054] Step 3: The three-stage post-amplifier 4 and DC offset canceller 3 further amplify the voltage signal, improving the overall gain. For long-distance detection, post-amplifier 4 operates in high-gain mode; for close-distance detection, it switches to low-gain mode.
[0055] Step 4: The differential voltage signal is input into the two-stage equalizer 5 for high-frequency gain compensation. The compensation effect is adjusted by adjusting the source resistor and capacitor values of the two-stage equalizer 5.
[0056] Step 5: The first stage of the output buffer 6 eliminates the DC offset at the differential input of the previous stage through the DC offset canceller 7; the pre-buffer stage 8 uses a differential pair 8 with a source-level degradation resistor to ensure gain; the final buffer stage 9 uses a source-level degradation type equalization structure to compensate for channel loss and outputs the final differential voltage signal.
[0057] The above steps can achieve the following beneficial effects:
[0058] 1. By combining a transimpedance amplifier with an equalizer, the front-end transimpedance amplifier achieves high gain while maintaining phase margin through a combination of common-source feedforward and local negative feedback. The two-stage equalizer at the back end compensates for bandwidth while avoiding slow gain roll-off, ensuring bandwidth while suppressing high-frequency noise, thus achieving the high bandwidth and low noise characteristics of the overall device.
[0059] 2. By converting the single-ended output of the transimpedance amplifier into a differential signal through DC coupling, the long recovery time problem caused by the charging and discharging of the AC coupling capacitor is solved. Simultaneously, the first low-pass network, acting as a low-pass filter network, can filter out some low-frequency noise, achieving noise reduction.
[0060] 3. A DC offset canceller is used to eliminate the DC offset at the differential input terminal, so as to avoid the device saturation caused by the DC offset at the differential input terminal, ensure the normal operation of the overall device, and improve the reliability of the device.
[0061] 4. Gain switching is achieved by adjusting the resistance values of the negative feedback resistor in the transimpedance amplifier and the source degradation resistor in the post-amplifier to adapt to different ranging scenarios and increase the overall ranging range of the device. Simultaneously, the adjustable source degradation resistor-capacitor array of the equalizer enables dynamic adjustment of the compensation effect.
[0062] 5. The output buffer uses a pre-buffering stage to ensure gain, and the final output buffer stage uses a source-level degraded equalizer to compensate for channel loss, ensuring overall gain and bandwidth and improving the device's driving capability.
[0063] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0064] While some embodiments based on the overall technical concept of this disclosure have been shown and described, those skilled in the art will understand that changes may be made to these embodiments without departing from the principles and spirit of the overall technical concept of this disclosure, the scope of which is defined by the claims and their equivalents.
Claims
1. An analog front-end receiving device based on linear lidar, characterized in that, include: A transimpedance amplifier (1) having an input terminal for a current signal; A single-ended to differential circuit (2) is provided, wherein the output terminal of the transimpedance amplifier (1) is connected to the input terminal of the single-ended to differential circuit (2); The DC offset canceller (3), the post-amplifier (4), and the equalizer (5) are provided. The DC offset canceller (3) includes a first DC offset canceller and a second DC offset canceller. The output of the single-ended to differential circuit (2) passes through the first DC offset canceller, the post-amplifier (4), and the second DC offset canceller in sequence, and is then connected to the input of the equalizer (5). An output buffer (6) is provided, the input of which is connected to the output of the equalizer (5). The output of the output buffer (6) is the negative voltage VON and the positive voltage VOP in the differential voltage signal. The equalizer (5) is a two-stage source-level degradation equalizer, constructed as a differential pair structure with parallel resistors and capacitors at the source level. The transimpedance amplifier (1) is constructed as a parallel resistor structure, and includes a common-source feedforward resistor, a local negative feedback resistor RF1, and a resistor RF2.
2. The analog front-end receiving device according to claim 1, characterized in that, The transimpedance amplifier (1) also includes a core amplifier, which is connected in parallel with a common-source feedforward resistor and a resistor RF2. The core amplifier is a three-stage cascaded inverter structure, including: an inverter in the first stage, a local negative feedback resistor RF1 in the second stage, and an inverter-type voltage amplifier in the third stage.
3. The analog front-end receiving device according to claim 2, characterized in that, The transimpedance amplifier (1) and the single-ended to differential circuit (2) are DC coupled. The single-ended to differential circuit (2) consists of a differential voltage amplifier and a first low-pass network. The input terminal of the differential pair in the differential voltage amplifier is connected to the output terminal of the transimpedance amplifier (1), and the output terminal of the differential pair in the differential voltage amplifier is connected to the first low-pass network.
4. The analog front-end receiving device according to claim 3, characterized in that, The source-level parallel resistor and capacitor of the equalizer (5) is an adjustable source-level degradation resistor and capacitor array.
5. The front-end receiving device according to claim 4, characterized in that, The post-amplifier (4) has a differential pair structure with a source-level degradation resistor, and both the local negative feedback resistor RF1 and the source-level degradation resistor are adjustable resistors.
6. The analog front-end receiving device according to claim 5, characterized in that, Both the first DC offset canceller and the second DC offset canceller have a second low-pass network and a cross-feedback NMOS transistor. The first DC offset canceller is connected to the first low-pass network to eliminate the DC offset of the differential pair in the differential voltage amplifier, and the second DC offset canceller is connected to the differential pair in the post amplifier (4) to eliminate the DC offset of the differential pair in the post amplifier (4).
7. The analog front-end receiving device according to claim 1, characterized in that, The output buffer (6) is constructed as a three-stage interconnected structure. The first stage is a third DC offset canceller (7), which is connected to the input of the equalizer (5). The intermediate stage is a pre-buffer stage (8), which is constructed as a differential pair structure with source-level degradation resistors. The last stage is a buffer stage (9), which is constructed as a source-level degradation type equalization structure.
Citation Information
Patent Citations
Linear / Geiger mode compatible gating sampling front-end circuit for laser radar
CN111060198A
Analog front-end circuit of optical receiver
CN112272061A