Control circuit of low-power low-dropout regulator and control method thereof

Abstract

The present invention provides a control circuit of a low-dropout regulator, the low-dropout regulator having a first voltage and a second voltage, the low-dropout regulator regulating a voltage difference between the first voltage and the second voltage according to a reference voltage. A current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detection signal. A bias current circuit generates a bias voltage and a reference current according to the detection signal, and the low-dropout regulator is controlled by the bias voltage to dynamically adjust a bias current of the low-dropout regulator, so that the bias current is positively correlated with the reference current. In this way, the detection signal is generated by the current load detector to dynamically adjust the bias current of the low-dropout regulator, thereby maintaining or increasing the response speed of the low-dropout regulator and saving power consumption.

Description

TECHNICAL FIELD

[0001] The present invention relates to a control circuit of a low dropout regulator and a control method thereof, and more particularly to a control circuit of a low power low dropout regulator and a control method thereof. BACKGROUND

[0002] Generally, a low dropout regulator (LDO) is used to input a specific voltage (e.g. VDDA) and output another specific voltage (e.g. VCSA), and the another specific voltage can be regulated by a reference voltage, and the voltage VCSA is less than the voltage VDD1. In the prior art, when the low dropout regulator enters a working mode, the reaction speed of the LDO will be slowed down due to the load; when the low dropout regulator enters a standby mode, the LDO will still consume a certain amount of power. Therefore, there is a lack of a control circuit of a low power low dropout regulator and a control method thereof which can avoid the reaction speed being slowed down and save power consumption in the market, and the related industries are seeking solutions. SUMMARY

[0003] Therefore, the purpose of the present invention is to provide a control circuit of a low power low dropout regulator and a control method thereof, which uses a current load detector to generate a detection signal to dynamically adjust the bias current of the low dropout regulator, thereby maintaining or increasing the reaction speed of the low dropout regulator and saving power consumption, to solve the problems of the prior art that the reaction speed of the low dropout regulator is slowed down in the working mode and the power consumption is too large in the standby mode.

[0004] According to an embodiment of the structure of the present invention, a control circuit of a low power low dropout regulator is provided for control according to a reference voltage. The control circuit of the low power low dropout regulator includes a low dropout regulator, a current load detector, and a bias current circuit. The low dropout regulator has a first transmission end and a second transmission end, the first transmission end is used to transmit a first voltage, and the second transmission end is used to transmit a second voltage. The low dropout regulator adjusts the voltage difference between the first voltage and the second voltage according to the reference voltage. The current load detector is electrically connected to the low dropout regulator, the current load detector detects the first voltage and the second voltage, and compares the reference voltage and the second voltage to generate a detection signal. The bias current circuit is electrically connected to the low dropout regulator and the current load detector, the bias current circuit generates a bias voltage and a reference current according to the detection signal, and the low dropout regulator is controlled by the bias voltage to dynamically adjust the bias current of the low dropout regulator, thereby making the bias current and the reference current positively correlated. When the low dropout regulator is in the working mode, the detection signal generated by the current load detector can be a low voltage level, and the reference current is increased to increase the bias current of the low dropout regulator.

[0005] Therefore, the control circuit of the low-power low-dropout regulator of the present application generates a detection signal by using the current load detector with fast response speed, and dynamically adjusts the bias current of the low-dropout regulator by the detection signal and the bias current circuit, so as to maintain or increase the response speed of the low-dropout regulator and save power consumption.

[0006] Other implementations of the foregoing embodiments include the following: the first voltage can be greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

[0007] Other implementations of the foregoing embodiments include the following: the low-dropout regulator can include a first transistor, a first comparator, and a second transistor. The first transistor is electrically connected between the first transmission end and the second transmission end. The first comparator is electrically connected to the first transmission end, the second transmission end, and the first transistor. The first comparator compares the reference voltage with the second voltage to generate a comparison signal. The comparison signal is electrically connected to the first transistor to adjust the voltage difference between the first voltage and the second voltage. The second transistor is electrically connected to the first comparator and the bias current circuit. The first transistor has a first source, a first gate, and a first drain. The first source, the first gate, and the first drain are electrically connected to the first voltage, the comparison signal, and the second voltage, respectively. The second transistor has a second source, a second gate, and a second drain. The second source, the second gate, and the second drain are electrically connected to the ground, the bias current circuit, and the first comparator, respectively.

[0008] Other implementations of the foregoing embodiments include the following: the current load detector can include a third transistor and a second comparator. The third transistor is electrically connected between the first transmission end and the second transmission end. The second comparator is electrically connected to the first transmission end, the second transmission end, and the third transistor. The second comparator compares the reference voltage with the second voltage to generate a detection signal. The detection signal is electrically connected to the third transistor. The third transistor has a third source, a third gate, and a third drain. The third source, the third gate, and the third drain are electrically connected to the first voltage, the detection signal, and the second voltage, respectively.

[0009] Other embodiments of the aforementioned implementation are as follows: The aforementioned bias current circuit may include a fourth transistor, a fifth transistor, and a resistor. The fourth transistor is electrically connected between the first transmission terminal and the second gate of the second transistor. The fourth transistor has a fourth source, a fourth gate, and a fourth drain, which are electrically connected to a first voltage, a detection signal, and the second gate, respectively. The fifth transistor is electrically connected to the fourth transistor and has a fifth source, a fifth gate, and a fifth drain, which are electrically connected to ground, the fifth drain, and the fourth drain, respectively. The resistor is electrically connected between the first transmission terminal and the second gate of the second transistor. Any of the first, third, and fourth transistors is a PMOS transistor, and any of the second and fifth transistors is an NMOS transistor.

[0010] Other embodiments of the aforementioned implementation are as follows: the area of ​​the aforementioned third transistor may be smaller than the area of ​​the first transistor.

[0011] Other embodiments of the aforementioned implementation are as follows: When the aforementioned low-dropout regulator is in standby mode, the detection signal generated by the current load detector can be at a high voltage level, and the reference current decreases, thereby reducing the bias current of the low-dropout regulator.

[0012] According to another embodiment of the structural form of the present invention, a control circuit for a low-power low-dropout regulator is provided, which controls a first voltage and a second voltage of the low-dropout regulator based on a reference voltage. The control circuit for the low-power low-dropout regulator includes a current load detector and a bias current circuit. The current load detector is electrically connected to the low-dropout regulator, detects the first voltage and the second voltage, and compares the reference voltage and the second voltage to generate a detection signal. The bias current circuit is electrically connected to the low-dropout regulator and the current load detector, and generates a bias voltage and a reference current based on the detection signal. The low-dropout regulator dynamically adjusts its bias current under the control of the bias voltage, thereby making the bias current positively correlated with the reference current. The current load detector has a faster response speed than the low-dropout regulator. When the aforementioned low-dropout regulator is in operating mode, the detection signal generated by the current load detector can be at a low voltage level, and an increase in the reference current causes an increase in the bias current of the low-dropout regulator.

[0013] Therefore, the control circuit of the low-power low-dropout regulator of the present invention uses a current load detector with a fast response speed to generate a detection signal, and dynamically adjusts the bias current of the low-dropout regulator by means of the detection signal and the bias current circuit, which can maintain or increase the response speed of the low-dropout regulator and save power consumption.

[0014] Other embodiments of the aforementioned implementation are as follows: the aforementioned first voltage may be greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

[0015] Other embodiments of the aforementioned implementation are as follows: The aforementioned low-dropout regulator may include a first transistor, a first comparator, and a second transistor. The first transistor is electrically connected between a first transmission terminal and a second transmission terminal. The first comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the first transistor. The first comparator compares a reference voltage with a second voltage to generate a comparison signal. The comparison signal is electrically connected to the first transistor to adjust the voltage difference between the first voltage and the second voltage. The second transistor is electrically connected to the first comparator and a bias current circuit. The first transistor has a first source, a first gate, and a first drain. The first source, the first gate, and the first drain are electrically connected to the first voltage, the comparison signal, and the second voltage, respectively. The second transistor has a second source, a second gate, and a second drain. The second source, the second gate, and the second drain are electrically connected to a ground terminal, a bias current circuit, and the first comparator, respectively.

[0016] Other embodiments of the aforementioned implementation are as follows: The aforementioned current load detector may include a third transistor and a second comparator. The third transistor is electrically connected between the first transmission terminal and the second transmission terminal. The second comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the third transistor. The second comparator compares a reference voltage with a second voltage to generate a detection signal, and the detection signal is electrically connected to the third transistor. The third transistor has a third source, a third gate, and a third drain, and the third source, third gate, and third drain are respectively electrically connected to the first voltage, the detection signal, and the second voltage.

[0017] Other embodiments of the aforementioned implementation are as follows: The aforementioned bias current circuit may include a fourth transistor, a fifth transistor, and a resistor. The fourth transistor is electrically connected between the first transmission terminal and the second gate of the second transistor. The fourth transistor has a fourth source, a fourth gate, and a fourth drain. The fourth source, fourth gate, and fourth drain are electrically connected to a first voltage, a detection signal, and the second gate, respectively. The fifth transistor is electrically connected to the fourth transistor. The fifth transistor has a fifth source, a fifth gate, and a fifth drain. The fifth source, fifth gate, and fifth drain are electrically connected to a ground terminal, a fifth drain, and a fourth drain, respectively. The resistor is electrically connected between the first transmission terminal and the second gate of the second transistor. Any of the first, third, and fourth transistors is a PMOS transistor, and any of the second and fifth transistors is an NMOS transistor.

[0018] Other embodiments of the aforementioned implementation are as follows: the area of ​​the aforementioned third transistor may be smaller than the area of ​​the first transistor.

[0019] Other embodiments of the aforementioned implementation are as follows: When the aforementioned low-dropout regulator is in standby mode, the detection signal generated by the current load detector can be at a high voltage level, and the reference current decreases, thereby reducing the bias current of the low-dropout regulator.

[0020] According to one embodiment of the present invention, a control method for a low-power low-dropout regulator is provided, which is used for control based on a reference voltage. The control method for the low-power low-dropout regulator includes the following steps: a voltage supply step, a voltage drop adjustment step, a current load detection step, and a bias current adjustment step. The voltage supply step includes providing a first voltage to the low-dropout regulator, a current load detector, and a bias current circuit. The voltage drop adjustment step includes driving the low-dropout regulator to generate a second voltage based on the first voltage, and adjusting the voltage difference between the first voltage at a first transmission terminal and the second voltage at a second transmission terminal based on the reference voltage. The current load detection step includes driving the current load detector to detect the first voltage and the second voltage, and comparing the reference voltage and the second voltage to generate a detection signal. The bias current adjustment step includes driving the bias current circuit to generate a bias voltage and a reference current based on the detection signal, and dynamically adjusting the bias current of the low-dropout regulator based on the bias voltage, thereby making the bias current positively correlated with the reference current. When the aforementioned low-dropout regulator is in operating mode, the detection signal generated by the current load detector can be at a low voltage level, and the increase in reference current will increase the bias current of the low-dropout regulator.

[0021] Therefore, the control method of the low-power low-dropout regulator of the present invention uses a current load detector with a fast response speed to generate a detection signal, and dynamically adjusts the bias current of the low-dropout regulator by means of the detection signal and the bias current circuit. This not only maintains or increases the response speed of the low-dropout regulator, but also saves power consumption.

[0022] Other embodiments of the aforementioned implementation are as follows: The response speed of the aforementioned current load detector can be faster than that of the low voltage drop regulator.

[0023] Other embodiments of the aforementioned implementation are as follows: the aforementioned first voltage may be greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

[0024] Other embodiments of the aforementioned implementation are as follows: The aforementioned low-dropout regulator may include a first transistor, a first comparator, and a second transistor. The first transistor is electrically connected between a first transmission terminal and a second transmission terminal. The first comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the first transistor. The second transistor is electrically connected to the first comparator and a bias current circuit. The current load detector may include a third transistor and a second comparator. The third transistor is electrically connected between the first transmission terminal and the second transmission terminal. The second comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the third transistor. The area of ​​the third transistor is smaller than the area of ​​the first transistor.

[0025] Other embodiments of the aforementioned implementation are as follows: When the aforementioned low-dropout regulator is in standby mode, the detection signal generated by the current load detector can be at a high voltage level, and the reference current decreases, thereby reducing the bias current of the low-dropout regulator. Attached Figure Description

[0026] Figure 1 This is a block diagram illustrating the control circuit of a low-power, low-dropout regulator according to a first embodiment of the present invention;

[0027] Figure 2 It is shown Figure 1 A circuit diagram of the control circuit of a low-power, low-dropout regulator, including the low-dropout regulator, current load detector, and bias current circuit.

[0028] Figure 3 It is shown Figure 2 A circuit diagram of a low-dropout regulator;

[0029] Figure 4 It is shown Figure 2 A circuit diagram of a current load detector;

[0030] Figure 5 It is shown Figure 2 A schematic diagram of the low-voltage drop regulator in operating mode;

[0031] Figure 6 It is shown Figure 2 A schematic diagram of the low-voltage drop regulator in standby mode;

[0032] Figure 7 This is a flowchart illustrating the control method of a low-power, low-dropout regulator according to a second embodiment of the present invention;

[0033] Figure 8 This is a circuit diagram of a low-dropout regulator, illustrating the control circuit of a low-power low-dropout regulator according to a third embodiment of the present invention.

[0034] Figure 9This is a circuit diagram illustrating the current load detector of the control circuit of the low-power low-dropout regulator according to the fourth embodiment of the present invention; and

[0035] Figure 10 This is a circuit diagram illustrating the bias current circuit of the control circuit of the low-power low-dropout regulator according to the fifth embodiment of the present invention.

[0036] Explanation of reference numerals in the attached figures:

[0037] 100: Control circuit for low-power, low-dropout regulator

[0038] 200, 200a: Low voltage drop regulator

[0039] 210: First transistor

[0040] 220: First comparator

[0041] 220a: Comparator

[0042] 230, 230a: Mirror bias current circuit

[0043] 232, 232a: Second transistor

[0044] 234,440,N11,N12,N13,N21,N22,N23,N31,N32,N41,N42,P11,P12,P13,P21,P22,P23,P31,P32,P41,P42,QN21,QN22,QN4: Transistors

[0045] 300, 300A: Current load detector

[0046] 310: Third transistor

[0047] 320, 320a: Second comparator

[0048] 400, 400A: Bias current circuit

[0049] 410, 410a: Fourth transistor

[0050] 420, 420a: Fifth transistor

[0051] 430, 430a, R1, R2, R3, R4: Resistors

[0052] 500: Control Methods for Low-Power, Low-Dropout Regulators

[0053] C1, C2, C3, C4: Capacitors

[0054] ENb: Start signal

[0055] I1,I2,Ifix,Idynamic,Ifix_act,Idynamic_act,Ifix_stby,Idynamic_stby: current

[0056] Iact, Istby: Bias current

[0057] Iref: Reference current

[0058] S2: Voltage supply procedure

[0059] S4: Voltage Drop Adjustment Steps

[0060] S6: Current Load Detection Procedure

[0061] S8: Bias Current Adjustment Steps

[0062] T1: First transmission end

[0063] T2: Second transmission end

[0064] VC: Detection signal

[0065] VCSA: Second Voltage

[0066] VDDA: First voltage

[0067] VN, Vnact, Vnstby: Bias voltage

[0068] Vpg: Comparison signal

[0069] VREF: Reference Voltage Detailed Implementation

[0070] Several embodiments of the present invention will now be described with reference to the accompanying drawings. For clarity, many practical details will be set forth in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not essential. Furthermore, for the sake of simplicity in the drawings, some conventionally used structures and elements will be shown in a simple schematic manner; and repeated elements may be denoted by the same reference numerals.

[0071] Furthermore, in this document, when a component (or unit or module, etc.) is "connected" to another component, it can mean that the component is directly connected to the other component, or that the component is indirectly connected to the other component, meaning that there is another component between the component and the other component. Only when it is explicitly stated that a component is "directly connected" to another component does it indicate that there is no other component between the component and the other component. The terms "first," "second," and "third" are only used to describe different components and do not limit the components themselves; therefore, "first component" can also be referred to as "second component." Moreover, the combinations of components / units / circuits in this document are not combinations generally known, conventional, or existing in this art. Whether the component / unit / circuit itself is existing cannot be used to determine whether its combination relationship is easily accomplished by a person skilled in the art.

[0072] Please see Figure 1 , Figure 1 This is a block diagram illustrating the control circuit 100 of a low-power low-dropout regulator according to a first embodiment of the present invention. The control circuit 100 of the low-power low-dropout regulator is used for control based on a reference voltage and includes a low-dropout regulator 200 (LDO), a current load detector 300, and a bias current circuit 400. The low-dropout regulator 200 has a first transmission terminal and a second transmission terminal. The first transmission terminal is used to transmit a first voltage VDDA, and the second transmission terminal is used to transmit a second voltage VCSA. The low-dropout regulator 200 adjusts the voltage difference between the first voltage VDDA and the second voltage VCSA according to the reference voltage. The current load detector 300 is electrically connected to the low-dropout regulator 200. The current load detector 300 detects the first voltage VDDA and the second voltage VCSA, and compares the reference voltage with the second voltage VCSA to generate a detection signal VC. The bias current circuit 400 is electrically connected to the low-dropout regulator 200 and the current load detector 300. The bias current circuit 400 generates a bias voltage (i.e., one of the bias voltages Vnact and Vnstby, which can be represented as "Vnact / Vnstby") and a reference current based on the detection signal VC. The low-dropout regulator 200 dynamically adjusts its bias current under the control of the bias voltage, thereby making the bias current positively correlated with the reference current. Thus, the control circuit 100 of the low-power low-dropout regulator of the present invention utilizes the fast-responding current load detector 300 to generate the detection signal VC, and dynamically adjusts the bias current of the low-dropout regulator 200 through the detection signal VC and the bias current circuit 400, thereby maintaining or increasing the response speed of the low-dropout regulator 200 and saving power consumption. The following detailed embodiments illustrate the details of the above structures.

[0073] Please refer to the following: Figure 1 , Figure 2 , Figure 3 andFigure 4 ,in Figure 2 It is shown Figure 1 A circuit diagram of the control circuit 100 of the low-power low-dropout regulator, including the low-dropout regulator 200, the current load detector 300, and the bias current circuit 400. Figure 3 It is shown Figure 2 A circuit diagram of the low-dropout regulator 200; and Figure 4 It is shown Figure 2 A circuit diagram of the current load detector 300 is shown. As shown, the control circuit 100 of the low-power low-dropout regulator can be applied to the power management of memory, but the present invention is not limited thereto.

[0074] The low-dropout regulator 200 has a first transmission terminal T1 and a second transmission terminal T2. The first transmission terminal T1 is used to transmit a first voltage VDDA, and the second transmission terminal T2 is used to transmit a second voltage VCSA. The low-dropout regulator 200 adjusts the voltage difference between the first voltage VDDA and the second voltage VCSA according to a reference voltage VREF. The first voltage VDDA is greater than the second voltage VCSA. In one embodiment, the first voltage VDDA is an external power voltage and equal to 1.35V, and the second voltage VCSA is an internal power voltage and equal to 0.94V, but the invention is not limited thereto. The low-dropout regulator 200 includes a first transistor 210, a first comparator 220, and a mirror bias current circuit 230.

[0075] The first transistor 210 is electrically connected between the first transmission terminal T1 and the second transmission terminal T2. The first transistor 210 has a first source, a first gate, and a first drain, which are electrically connected to a first voltage VDDA, a comparison signal Vpg, and a second voltage VCSA, respectively. The first transistor 210 is a PMOS transistor.

[0076] The first comparator 220 is electrically connected to the first transmission terminal T1, the second transmission terminal T2, and the first transistor 210. The first comparator 220 compares the reference voltage VREF with the second voltage VCSA to generate a comparison signal Vpg. The comparison signal Vpg is electrically connected to the first transistor 210 to adjust the voltage difference between the first voltage VDDA and the second voltage VCSA. Specifically, the first comparator 220 includes transistors P11, P12, P13, N11, N12, N13, capacitor C1, and resistor R1. Transistor N11 is electrically connected between transistor P11 and the mirror bias current circuit 230; transistor N12 is electrically connected between transistor P12 and the mirror bias current circuit 230; and transistor N13 is electrically connected between transistor P13 and the mirror bias current circuit 230. Transistors P11 and P12 are interconnected, and transistor P13 is electrically connected to transistors P11, N11, N13, and the first transistor 210. Transistor N11 is controlled by a second voltage VCSA; transistors N12 and N13 are controlled by a reference voltage VREF. Any of transistors P11, P12, and P13 is a PMOS transistor; any of transistors N11, N12, and N13 is an NMOS transistor. Capacitor C1 and resistor R1 are connected in series and electrically between the gate and drain of transistor P13 to achieve Miller compensation.

[0077] The mirror bias current circuit 230 includes a second transistor 232 and a transistor 234. Both second transistors 232 and 234 are electrically connected to the first comparator 220 and the bias current circuit 400. Specifically, the second transistor 232 has a second source, a second gate, and a second drain, which are electrically connected to ground (VSS), the bias current circuit 400, and the first comparator 220, respectively. The second transistor 232 is electrically connected to transistors N11 and N12, and the transistor 234 is electrically connected to transistor N13. Both second transistors 232 and 234 are controlled by a bias voltage (Vnact / Vnstby) to generate currents I1 and I2, respectively. The bias current (i.e., one of the bias currents Iact and Istby, which can be represented as "Iact / Istby") is equal to the sum of currents I1 and I2. Either second transistor 232 or transistor 234 is an NMOS transistor.

[0078] The current load detector 300 includes a third transistor 310 and a second comparator 320. The third transistor 310 is electrically connected between a first transmission terminal T1 and a second transmission terminal T2. The third transistor 310 has a third source, a third gate, and a third drain, which are electrically connected to a first voltage VDDA, a detection signal VC, and a second voltage VCSA, respectively. The third transistor 310 is a PMOS transistor. Furthermore, the second comparator 320 is electrically connected to the first transmission terminal T1, the second transmission terminal T2, and the third transistor 310. The second comparator 320 compares a reference voltage VREF with the second voltage VCSA to generate a detection signal VC, which is electrically connected to the third transistor 310. The circuit architecture of the current load detector 300 is the same as that of the low-dropout regulator 200. The area of ​​the third transistor 310 is smaller than that of the first transistor 210, resulting in a faster response speed for the current load detector 300 compared to the low-dropout regulator 200. The response speed of the low-dropout regulator 200 is proportional to the bias current (Iact / Istby) and inversely proportional to the load. In one embodiment, the current load detector 300 responds 20 times faster than the low-dropout regulator 200, but the invention is not limited thereto.

[0079] The second comparator 320 includes transistors P21, P22, P23, N21, N22, N23, QN21, QN22, capacitor C2, and resistor R2. Transistor N21 is electrically connected between transistor P21 and transistor QN21, transistor N22 is electrically connected between transistor P22 and transistor QN21, and transistor N23 is electrically connected between transistor P23 and transistor QN22. Transistors P21 and P22 are interconnected, and transistor P23 is electrically connected to transistors P21, N21, N23, and the third transistor 310. Transistor N21 is controlled by a second voltage VCSA; transistors N22 and N23 are controlled by a reference voltage VREF; and transistors QN21 and QN22 are controlled by another bias voltage VN. Any of transistors P21, P22, and P23 is a PMOS transistor; any of transistors N21, N22, N23, QN21, and QN22 is an NMOS transistor. Capacitor C2 and resistor R2 are connected in series and electrically connected between the gate and drain of transistor P23 to achieve Miller compensation.

[0080] The bias current circuit 400 includes a fourth transistor 410, a fifth transistor 420, and a resistor 430. The fourth transistor 410 is electrically connected between the first transmission terminal T1 and the second gate of the second transistor 232. The fourth transistor 410 has a fourth source, a fourth gate, and a fourth drain, which are electrically connected to the first voltage VDDA, the detection signal VC, and the second gate, respectively. The fifth transistor 420 is electrically connected to the fourth transistor 410. The fifth transistor 420 has a fifth source, a fifth gate, and a fifth drain, which are electrically connected to the ground terminal, the fifth drain, and the fourth drain, respectively. The resistor 430 is electrically connected between the first transmission terminal T1 and the second gate of the second transistor 232. The fourth transistor 410 is a PMOS transistor; the fifth transistor 420 is an NMOS transistor. Currents Ifix and Idynamic flow through the resistor 430 and the fourth transistor 410, respectively, with current Ifix being a fixed value. The reference current Iref flows through the fifth transistor 420. The reference current Iref is equal to the sum of the currents Ifix and Idynamic.

[0081] The bias current circuit 400 generates a bias voltage (Vnact / Vnstby) and a reference current Iref based on the detection signal VC. The mirror bias current circuit 230 of the low-dropout regulator 200 is controlled by the bias voltage (Vnact / Vnstby) to dynamically adjust the bias current (Iact / Istby) flowing through it, thereby making the bias current (Iact / Istby) positively correlated with the reference current Iref. In one embodiment, the bias current (Iact / Istby) of the low-dropout regulator 200 is equal to the reference current Iref of the bias current circuit 400, and the bias voltage (Vnact / Vnstby) can range from a threshold voltage (e.g., 0.2V) to a first voltage VDDA (e.g., 1.35V), but the invention is not limited thereto.

[0082] Please refer to the following: Figure 2 , Figure 5 and Figure 6 ,in Figure 5 It is shown Figure 2 A schematic diagram of the low-dropout regulator 200 in activation mode; and Figure 6 It is shown Figure 2The diagram illustrates the low-dropout regulator 200 in standby mode. As shown, when the low-dropout regulator 200 is in operating mode, the detection signal VC generated by the current load detector 300 is a low voltage level. The current Idynamic and the reference current Iref increase, causing the bias current Iact of the low-dropout regulator 200 to increase. That is, the bias current Iact, current Idynami, and reference current Iref are positively correlated. The bias current Iact is equal to the sum of the current Ifix_act and the current Idynamic_act. Conversely, when the low-dropout regulator 200 is in standby mode, the detection signal VC generated by the current load detector 300 is a high voltage level. The current Idynamic and the reference current Iref decrease, causing the bias current Istby of the low-dropout regulator 200 to decrease. That is, the bias current Istby, current Idynami, and reference current Iref are positively correlated. The bias current Istby is equal to the sum of the current Ifix_stby and the current Idynamic_stby. Therefore, the control circuit 100 of the low-power low-dropout regulator of the present invention utilizes a fast-responding current load detector 300 to generate a detection signal VC, and dynamically adjusts the bias current (Iact / Istby) of the low-dropout regulator 200 through the detection signal VC and the bias current circuit 400. When the low-dropout regulator 200 is in the operating mode, the low-voltage level detection signal VC increases the reference current Iref and the bias current Iact, thus maintaining or increasing the response speed of the low-dropout regulator 200; when the low-dropout regulator 200 is in the standby mode, the high-voltage level detection signal VC decreases the reference current Iref and the bias current Istby, thus significantly saving power consumption (for example, when the standby mode is IDD3P, 80% of power consumption can be saved).

[0083] Please refer to the following: Figure 1 , Figure 2 and Figure 7 ,in Figure 7 This is a schematic flowchart illustrating a control method 500 for a low-power, low-dropout regulator according to a second embodiment of the present invention. The control method 500 for the low-power, low-dropout regulator is used to control... Figure 2 The control circuit 100 of the low-power low-dropout regulator. The control method 500 of the low-power low-dropout regulator is used to control based on the reference voltage VREF. The control method 500 of the low-power low-dropout regulator includes the following steps: voltage supply step S2, voltage drop adjustment step S4, current load detection step S6, and bias current adjustment step S8.

[0084] Voltage supply step S2 includes providing a first voltage VDDA to the low-dropout regulator 200, the current load detector 300, and the bias current circuit 400. Voltage drop adjustment step S4 includes driving the low-dropout regulator 200 to generate a second voltage VCSA based on the first voltage VDDA, and adjusting the voltage difference between the first voltage VDDA at the first transmission terminal T1 and the second voltage VCSA at the second transmission terminal T2 based on the reference voltage VREF. Current load detection step S6 includes driving the current load detector 300 to detect the first voltage VDDA and the second voltage VCSA, and comparing the reference voltage VREF with the second voltage VCSA to generate a detection signal VC. The bias current adjustment step S8 includes driving the bias current circuit 400 to generate a bias voltage (Vnact / Vnstby) and a reference current Iref based on the detection signal VC, and controlling the low-dropout regulator 200 according to the bias voltage (Vnact / Vnstby) to dynamically adjust the bias current (Iact / Istby) of the low-dropout regulator 200, thereby making the bias current (Iact / Istby) positively correlated with the reference current Iref. Thus, the low-power low-dropout regulator control method 500 of the present invention utilizes a fast-responding current load detector 300 to generate a detection signal VC, and dynamically adjusts the bias current (Iact / Istby) of the low-dropout regulator 200 through the detection signal VC and the bias current circuit 400, which not only maintains or increases the response speed of the low-dropout regulator 200, but also saves power consumption.

[0085] Please refer to the following: Figure 2 , Figure 3 and Figure 8 ,in Figure 8This is a circuit diagram of a low-dropout regulator 200a, illustrating the control circuit of a low-power low-dropout regulator according to a third embodiment of the present invention. The low-dropout regulator 200a includes a first transistor 210, a comparator 220a, and a mirror bias current circuit 230a. The first transistor 210 is electrically connected between a first voltage VDDA and a second voltage VCSA. The first transistor 210 is a PMOS transistor and has a source, a gate, and a drain, which are electrically connected to the first voltage VDDA, a comparison signal Vpg, and the second voltage VCSA, respectively. The comparator 220a is electrically connected to the first voltage VDDA, the second voltage VCSA, the first transistor 210, and the mirror bias current circuit 230a. The comparator 220a compares a reference voltage VREF with the second voltage VCSA to generate a comparison signal Vpg. The comparison signal Vpg is electrically connected to the first transistor 210 to adjust the voltage difference between the first voltage VDDA and the second voltage VCSA. Comparator 220a includes transistors P31, P32, N31, and N32. Transistor N31 is electrically connected between transistor P31 and the mirror bias current circuit 230a, and transistor N32 is electrically connected between transistor P32 and the mirror bias current circuit 230a. Transistors P31 and P32 are interconnected. The mirror bias current circuit 230a is composed of a second transistor 232a. Transistors N31, N32, and the second transistor 232a are controlled by a second voltage VCSA, a reference voltage VREF, and a bias voltage (Vnact / Vnstby), respectively. Either transistor P31 or P32 is a PMOS transistor; any one of transistors N31, N32, and the second transistor 232a is an NMOS transistor. Additionally, the low-dropout regulator 200a includes a resistor R3 and a capacitor C3, which are electrically connected between the gate and drain of the first transistor 210.

[0086] Please refer to the following: Figure 2 , Figure 4 and Figure 9 ,in Figure 9This is a circuit diagram illustrating the current load detector 300a of the control circuit of a low-power, low-dropout regulator according to a fourth embodiment of the present invention. The current load detector 300a includes a third transistor 310 and a second comparator 320a. The third transistor 310 is electrically connected between a first voltage VDDA and a second voltage VCSA. The third transistor 310 is a PMOS transistor and has a third source, a third gate, and a third drain, which are electrically connected to the first voltage VDDA, a detection signal VC, and the second voltage VCSA, respectively. The second comparator 320a is electrically connected to the first voltage VDDA, the second voltage VCSA, and the third transistor 310. The second comparator 320a compares a reference voltage VREF with the second voltage VCSA to generate a detection signal VC, which is electrically connected to the third transistor 310. The second comparator 320a includes transistors P41, P42, N41, N42, and QN4. Transistor N41 is electrically connected between transistor P41 and transistor QN4, and transistor N42 is electrically connected between transistor P42 and transistor QN4. Transistors P41 and P42 are interconnected. Transistors N41, N42, and QN4 are controlled by a second voltage VCSA, a reference voltage VREF, and another bias voltage VN, respectively. Either transistor P41 or P42 is a PMOS transistor; any one of transistors N41, N42, and QN4 is an NMOS transistor. Furthermore, the current load detector 300a also includes a capacitor C4 and a resistor R4, which are connected in series and electrically connected between the gate and drain of the third transistor 310.

[0087] Please refer to the following: Figure 2 and Figure 10 ,in Figure 10 This is a circuit diagram illustrating the bias current circuit 400a of the control circuit of the low-power low-dropout regulator according to the fifth embodiment of the present invention. The bias current circuit 400a includes a fourth transistor 410a, a fifth transistor 420a, a resistor 430a, and a transistor 440. The structures of the fourth transistor 410a, the fifth transistor 420a, and the resistor 430a are respectively... Figure 2 The fourth transistor 410, the fifth transistor 420, and the resistor 430 have the same structure, so they will not be described in detail again. Figure 10 Transistor 440 is electrically connected between the first voltage VDDA and resistor 430a, and transistor 440 is controlled by a start signal ENb. Transistor 440 is a PMOS transistor used to control the current Ifix.

[0088] In other embodiments, the low-dropout regulator and current load detector may be circuits of various LDO architectures, but the present invention is not limited thereto.

[0089] As can be seen from the above embodiments, the present invention has the following advantages: First, by using a current load detector with a fast response speed to generate a detection signal, and dynamically adjusting the bias current of the low-dropout regulator through the detection signal, the response speed of the low-dropout regulator can be maintained or increased to achieve high voltage stability, while also saving power consumption, thus solving the problems of slow response speed in the working mode and excessive power consumption in the standby mode of existing low-dropout regulators. Second, when the low-dropout regulator is in the working mode, the low-voltage level detection signal increases the reference current and bias current, thereby maintaining or increasing the response speed of the low-dropout regulator. Third, when the low-dropout regulator is in the standby mode, the high-voltage level detection signal reduces the reference current and bias current, thus significantly saving power consumption (for example, when the standby mode is IDD3P, power consumption can be saved by 80%).

[0090] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the concept and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. A control circuit for a low-power, low-dropout regulator, used for control based on a reference voltage, characterized in that, The control circuit of this low-power, low-dropout regulator includes: A low-dropout regulator has a first transmission terminal and a second transmission terminal, the first transmission terminal being used to transmit a first voltage and the second transmission terminal being used to transmit a second voltage, the low-dropout regulator adjusting a voltage difference between the first voltage and the second voltage according to a reference voltage; A current load detector is electrically connected to the low-dropout regulator. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detection signal. as well as A bias current circuit is electrically connected to the low-dropout regulator and the current load detector. The bias current circuit generates a bias voltage and a reference current based on the detection signal. The low-dropout regulator is controlled by the bias voltage to dynamically adjust a bias current of the low-dropout regulator, thereby making the bias current positively correlated with the reference current. When the low-dropout regulator is in a working mode, the detection signal generated by the current load detector is a low voltage level, and the reference current increases, causing the bias current of the low-dropout regulator to increase. The low-voltage-drop regulator includes: A first transistor is electrically connected between the first transmission terminal and the second transmission terminal; A first comparator, electrically connected to the first transmission terminal, the second transmission terminal, and the first transistor, compares the reference voltage with the second voltage to generate a comparison signal. This comparison signal is electrically connected to the first transistor to adjust the voltage difference between the first voltage and the second voltage. A second transistor is electrically connected to the first comparator and the bias current circuit; The first transistor has a first source, a first gate, and a first drain, and the first source, the first gate, and the first drain are electrically connected to the first voltage, the comparison signal, and the second voltage, respectively. The second transistor has a second source, a second gate, and a second drain. The second source, the second gate, and the second drain are electrically connected to a ground terminal, the bias current circuit, and the first comparator, respectively. The current load detector includes: A third transistor is electrically connected between the first transmission terminal and the second transmission terminal; and A second comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the third transistor. The second comparator compares the reference voltage with the second voltage to generate the detection signal. The detection signal is electrically connected to the third transistor. The third transistor has a third source, a third gate and a third drain, and the third source, the third gate and the third drain are electrically connected to the first voltage, the detection signal and the second voltage, respectively. The area of ​​the third transistor is smaller than the area of ​​the first transistor.

2. The control circuit of the low-power, low-dropout regulator as described in claim 1, characterized in that, The first voltage is greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

3. The control circuit of the low-power, low-dropout regulator as described in claim 1, characterized in that, The bias current circuit includes: A fourth transistor is electrically connected between the first transmission terminal and the second gate of the second transistor. The fourth transistor has a fourth source, a fourth gate and a fourth drain. The fourth source, the fourth gate and the fourth drain are electrically connected to the first voltage, the detection signal and the second gate, respectively. A fifth transistor, electrically connected to the fourth transistor, the fifth transistor having a fifth source, a fifth gate, and a fifth drain, the fifth source, the fifth gate, and the fifth drain being electrically connected to the ground terminal, the fifth drain, and the fourth drain, respectively; and A resistor is electrically connected between the first transmission terminal and the second gate of the second transistor; In this transistor, any one of the first transistor, the third transistor, and the fourth transistor is a PMOS transistor, and any one of the second transistor and the fifth transistor is an NMOS transistor.

4. The control circuit of the low-power, low-dropout regulator as described in claim 1, characterized in that, When the low-dropout regulator is in a standby mode, the detection signal generated by the current load detector is a high voltage level, the reference current decreases, and the bias current of the low-dropout regulator decreases.

5. A control circuit for a low-power, low-dropout regulator, used to control a first voltage and a second voltage of the low-dropout regulator based on a reference voltage, characterized in that, The control circuit of this low-power, low-dropout regulator includes: A current load detector is electrically connected to the low-dropout regulator. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detection signal. as well as A bias current circuit is electrically connected to the low-dropout regulator and the current load detector. The bias current circuit generates a bias voltage and a reference current based on the detection signal. The low-dropout regulator is controlled by the bias voltage to dynamically adjust a bias current of the low-dropout regulator, thereby making the bias current positively correlated with the reference current. The current load detector has a faster response speed than the low dropout regulator. When the low dropout regulator is in a working mode, the detection signal generated by the current load detector is a low voltage level. The reference current increases, which in turn increases the bias current of the low dropout regulator. The low-voltage-drop regulator includes: A first transistor is electrically connected between a first transmission terminal and a second transmission terminal; A first comparator, electrically connected to the first transmission terminal, the second transmission terminal, and the first transistor, compares the reference voltage with the second voltage to generate a comparison signal. This comparison signal is electrically connected to the first transistor to adjust a voltage difference between the first voltage and the second voltage. A second transistor is electrically connected to the first comparator and the bias current circuit; The first transistor has a first source, a first gate, and a first drain, and the first source, the first gate, and the first drain are electrically connected to the first voltage, the comparison signal, and the second voltage, respectively. The second transistor has a second source, a second gate, and a second drain. The second source, the second gate, and the second drain are electrically connected to a ground terminal, the bias current circuit, and the first comparator, respectively. The current load detector includes: A third transistor is electrically connected between the first transmission terminal and the second transmission terminal; and A second comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the third transistor. The second comparator compares the reference voltage with the second voltage to generate the detection signal. The detection signal is electrically connected to the third transistor. The third transistor has a third source, a third gate and a third drain, and the third source, the third gate and the third drain are electrically connected to the first voltage, the detection signal and the second voltage, respectively. The area of ​​the third transistor is smaller than the area of ​​the first transistor.

6. The control circuit of the low-power, low-dropout regulator as described in claim 5, characterized in that, The first voltage is greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

7. The control circuit of the low-power, low-dropout regulator as described in claim 5, characterized in that, The bias current circuit includes: A fourth transistor is electrically connected between the first transmission terminal and the second gate of the second transistor. The fourth transistor has a fourth source, a fourth gate and a fourth drain. The fourth source, the fourth gate and the fourth drain are electrically connected to the first voltage, the detection signal and the second gate, respectively. A fifth transistor, electrically connected to the fourth transistor, the fifth transistor having a fifth source, a fifth gate, and a fifth drain, the fifth source, the fifth gate, and the fifth drain being electrically connected to the ground terminal, the fifth drain, and the fourth drain, respectively; and A resistor is electrically connected between the first transmission terminal and the second gate of the second transistor; In this transistor, any one of the first transistor, the third transistor, and the fourth transistor is a PMOS transistor, and any one of the second transistor and the fifth transistor is an NMOS transistor.

8. The control circuit of the low-power, low-dropout regulator as described in claim 5, characterized in that, When the low-dropout regulator is in a standby mode, the detection signal generated by the current load detector is a high voltage level, the reference current decreases, and the bias current of the low-dropout regulator decreases.

9. A control method for a low-power, low-dropout regulator, used for control based on a reference voltage, characterized in that, The control method for this low-power, low-dropout regulator includes the following steps: A voltage supply step includes providing a first voltage to a low-dropout regulator, a current load detector, and a bias current circuit. A voltage drop regulation step includes driving the low voltage drop regulator to generate a second voltage based on the first voltage, and adjusting a voltage difference between the first voltage at a first transmission terminal and the second voltage at a second transmission terminal based on the reference voltage. A current load detection step includes driving the current load detector to detect the first voltage and the second voltage, and comparing the reference voltage with the second voltage to generate a detection signal; as well as A bias current adjustment step includes driving the bias current circuit to generate a bias voltage and a reference current according to the detection signal, and controlling the low-dropout regulator according to the bias voltage to dynamically adjust the bias current of the low-dropout regulator, thereby making the bias current positively correlated with the reference current. When the low-dropout regulator is in a working mode, the detection signal generated by the current load detector is a low voltage level, and the reference current increases, causing the bias current of the low-dropout regulator to increase. The low-voltage-drop regulator includes: A first transistor is electrically connected between the first transmission terminal and the second transmission terminal; A first comparator, electrically connected to the first transmission terminal, the second transmission terminal, and the first transistor; and A second transistor is electrically connected to the first comparator and the bias current circuit; The current load detector includes: A third transistor is electrically connected between the first transmission terminal and the second transmission terminal; and A second comparator is electrically connected to the first transmission terminal, the second transmission terminal, and the third transistor; The area of ​​the third transistor is smaller than the area of ​​the first transistor.

10. The control method for the low-power, low-voltage-drop regulator as described in claim 9, characterized in that, The current load detector has a faster response time than the low-dropout regulator.

11. The control method for the low-power, low-voltage-drop regulator as described in claim 9, characterized in that, The first voltage is greater than the second voltage, and the bias current of the low-dropout regulator is equal to the reference current of the bias current circuit.

12. The control method for the low-power, low-voltage-drop regulator as described in claim 9, characterized in that, When the low-dropout regulator is in a standby mode, the detection signal generated by the current load detector is a high voltage level, the reference current decreases, and the bias current of the low-dropout regulator decreases.

Images