Capacitance variation measurement circuit

By switching the input potential and drive voltage polarity of the operational amplifier in the capacitance change measurement circuit, the problem of unstable scanning frequency under heavy load and high impedance is solved, and the output voltage can quickly reach the target potential under heavy load and high impedance conditions.

CN116626396BActive Publication Date: 2026-06-12RAYDIUM SEMICON

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
RAYDIUM SEMICON
Filing Date
2022-05-09
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

Under heavy load and high impedance conditions, traditional self-capacitance touch detection circuits struggle to maintain an ideal scanning frequency, and the time required for the output voltage to reach the target potential is too long.

Method used

By switching the coupling potential of the positive input terminal of the operational amplifier and matching it with the polarity of the driving voltage in the capacitance change measurement circuit, the input voltage state of the operational amplifier is controlled by a switching circuit, including the switching between normal state and overdrive state.

🎯Benefits of technology

Under heavy load and high impedance, the stabilization time required for the output voltage to reach the target potential is significantly reduced, ensuring the stability of the scanning frequency.

✦ Generated by Eureka AI based on patent content.

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Abstract

A capacitance change measurement circuit includes an operational amplifier, a switched capacitor circuit, an amplifier capacitor, and a reset switch. The operational amplifier has a first input, a second input, and an output and outputs an output voltage through the output. The switched capacitor circuit is coupled to the first input. The amplifier capacitor is coupled between the first input and the output. The reset switch is coupled between the first input and the output. The capacitance change measurement circuit operates in a first charging phase, a first transfer phase, a second charging phase, and a second transfer phase in sequence. When the capacitance change measurement circuit enters the first transfer phase from the first charging phase and enters the second transfer phase from the second charging phase, a potential coupled to the second input changes from a normal state to an overdrive state.
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Description

Technical Field

[0001] This invention relates to the measurement of capacitance changes, and in particular to a capacitance change measurement circuit capable of maintaining an ideal scanning frequency under heavy load and high impedance. Background Technology

[0002] like Figure 1 , Figure 2A and Figure 2B As shown, when the conventional self-capacitance touch detection circuit 1 operates in the charging phase, the detection capacitor CB is coupled to the input voltage VIN to store charge. When the conventional self-capacitance touch detection circuit 1 operates in the transfer phase, one end of the detection capacitor CB is coupled to the switching capacitor circuit 10. Because the operational amplifier OP in the switching capacitor circuit 10 changes the potential of one end of the detection capacitor CB to the common-mode voltage VCM, the charge stored in the detection capacitor CB is transferred to the switching capacitor circuit 10, resulting in an output with a target potential (e.g., ...). Figure 4 The output voltage VOUT of the VTAR shown.

[0003] like Figure 3 and Figure 4 As shown, once the capacitance value of the detection capacitor CB changes, for example, if the capacitance value of the detection capacitor CB increases, the charge stored in the detection capacitor CB during the charging phase also increases. During the transfer phase, the charge stored in the detection capacitor CB is transferred to the output voltage VOUT of the switching capacitor circuit 10, which will be lower than the target potential VTAR. The difference between the two is the detectable potential, and its change is inversely proportional to the capacitance value of the amplifier capacitor COP.

[0004] Since the ratio of the detection capacitor CB to the amplifier capacitor COP and the unity gain bandwidth (UGBD) of the operational amplifier OP both affect the conduction time of the front-end circuit, if the operational amplifier OP has a limited bandwidth and gain, under heavy load and high impedance (such as organic light-emitting diode OLED panels), the stabilization time τ required for the output voltage VOUT output by the switching capacitor circuit 10 to reach the target potential VTAR will be significantly longer, making it difficult to maintain the ideal scanning frequency.

[0005] In conclusion, the aforementioned problems encountered by existing technologies still urgently need to be addressed. Summary of the Invention

[0006] Therefore, this invention proposes a capacitance change measurement circuit to effectively solve the above-mentioned problems encountered in the prior art.

[0007] A preferred embodiment of the present invention provides a capacitance change measurement circuit. In this embodiment, the capacitance change measurement circuit includes an operational amplifier, a switched capacitor circuit, an amplifier capacitor, and a reset switch. The operational amplifier has a first input terminal, a second input terminal, and an output terminal, and outputs an output voltage through the output terminal. The switched capacitor circuit is coupled to the first input terminal. The amplifier capacitor is coupled between the first input terminal and the output terminal. The reset switch is coupled between the first input terminal and the output terminal. The capacitance change measurement circuit operates sequentially in a first charging stage, a first transfer stage, a second charging stage, and a second transfer stage. When the capacitance change measurement circuit moves from the first charging stage to the first transfer stage and from the second charging stage to the second transfer stage, the potential coupled to the second input terminal changes from a normal state to an overdriven state.

[0008] In one embodiment, the output voltage changes at a rate greater than the rate of change in the normal state than the output voltage changes at a rate greater than the rate of change in the normal state.

[0009] In one embodiment, when the capacitance change measurement circuit operates in the first transfer stage and the second transfer stage, the overdrive state will be maintained for a period of time before switching back to the normal state.

[0010] In one embodiment, the capacitance change measurement circuit is in normal operation during both the first charging phase and the second charging phase.

[0011] In one embodiment, when the capacitance change measurement circuit is in normal operation, the second input terminal is coupled to the same voltage.

[0012] In one embodiment, when the capacitance change measurement circuit is in normal operation, the second input terminal can be time-divisionally coupled to different voltages.

[0013] In one embodiment, when the capacitance change measurement circuit moves from the first charging stage to the first transfer stage, the second input terminal switches from being coupled to the first preset voltage to being coupled to the second preset voltage, thus changing from the normal state to the overdrive state.

[0014] In one embodiment, the second preset voltage is different from the first preset voltage.

[0015] In one embodiment, when the capacitance change measurement circuit is operating in the first transfer stage, the second input terminal is coupled to the second preset voltage for a period of time and then switched back to being coupled to the first preset voltage, thus transitioning from the overdrive state back to the normal state.

[0016] In one embodiment, when the capacitance change measurement circuit moves from the first transfer stage to the second charging stage, the second input terminal is coupled to the first preset voltage and remains in a normal state.

[0017] In one embodiment, when the capacitance change measurement circuit moves from the second charging stage to the second transfer stage, the second input terminal switches from being coupled to a first preset voltage to being coupled to a third preset voltage, thus changing from a normal state to an overdrive state.

[0018] In one embodiment, the third preset voltage is different from the first preset voltage.

[0019] In one embodiment, when the capacitance change measurement circuit is operating in the second transfer stage, the second input terminal is coupled to a third preset voltage for a period of time and then switched back to being coupled to the first preset voltage, thus transitioning from the overdrive state back to the normal state.

[0020] In one embodiment, when the capacitance change measurement circuit moves from the first transfer stage to the second charging stage, the second input terminal switches from being coupled to the first preset voltage to being coupled to the fourth preset voltage and remains in a normal state.

[0021] In one embodiment, when the capacitance change measurement circuit moves from the second charging stage to the second transfer stage, the second input terminal switches from being coupled to a fourth preset voltage to being coupled to a third preset voltage, thus changing from a normal state to an overdrive state.

[0022] In one embodiment, the third preset voltage is different from the fourth preset voltage.

[0023] In one embodiment, when the capacitance change measurement circuit is operating in the second transfer stage, the second input terminal is coupled to a third preset voltage for a period of time and then switched back to being coupled to a fourth preset voltage to switch from the overdrive state back to the normal state.

[0024] In one embodiment, the switched capacitor circuit includes a first switch, a second switch, a third switch, and a detection capacitor. The first switch and the detection capacitor are connected in series between a first input terminal and a ground terminal. One end of the second switch is coupled to a first voltage and the other end is coupled between the first switch and the detection capacitor. One end of the third switch is coupled to a second voltage and the other end is coupled between the first switch and the detection capacitor.

[0025] In one embodiment, during the first charging phase, the reset switch and the third switch are turned on while the first switch and the second switch are turned off, causing the detection capacitor to be coupled between the second voltage and the ground terminal, and the second input terminal to be coupled to the first preset voltage and in a normal state; when moving from the first charging phase to the first transfer phase, the first switch is turned on while the reset switch, the second switch and the third switch are turned off, causing the detection capacitor to be coupled between the first input terminal and the ground terminal, and the second input terminal to be coupled to the second preset voltage and in an overdriven state; after a period of time, the second input terminal will switch back to being coupled to the first preset voltage and switch back from the overdriven state to the normal state.

[0026] In one embodiment, during the second charging phase, the reset switch and the second switch are turned on while the first switch and the third switch are turned off, causing the detection capacitor to be coupled between the first voltage and the ground terminal, and the second input terminal to be coupled to the first preset voltage and in a normal state; when moving from the second charging phase to the second transfer phase, the first switch is turned on while the reset switch, the second switch and the third switch are turned off, causing the detection capacitor to be coupled between the first input terminal and the ground terminal, and the second input terminal to be coupled to the third preset voltage and in an overdriven state; after a period of time, the second input terminal will switch back to being coupled to the first preset voltage and switch back from the overdriven state to the normal state.

[0027] Compared to existing technologies, the capacitance change measurement circuit of the present invention can be applied to self-capacitance / mutual capacitance fingerprint recognition devices or touch sensing devices. By switching the potential level coupled to the positive input terminal of the operational amplifier and matching the polarity of the driving voltage, it can significantly reduce the stabilization time required for the output voltage of the operational amplifier to reach the target potential during the transition phase when performing self-capacitance / mutual capacitance detection under heavy load and high impedance, so as to maintain the ideal scanning frequency under heavy load and high impedance. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a traditional self-capacitance touch detection circuit.

[0029] Figure 2A and Figure 2B These are schematic diagrams showing the operation of a traditional self-capacitance touch detection circuit in the charging phase and the transfer phase, respectively.

[0030] Figure 3 This diagram illustrates how increasing the capacitance value of the detection capacitor in a traditional self-capacitance touch detection circuit reduces the output voltage of the switching capacitor circuit during the transition phase.

[0031] Figure 4 This is a timing diagram showing that when the capacitance value of the detection capacitor in a traditional self-capacitance touch detection circuit increases, the stabilization time required for the output voltage of the switching capacitor circuit to reach the target potential during the transition phase will become longer.

[0032] Figure 5 This is a schematic diagram of a capacitance change measurement circuit in a preferred embodiment of the present invention.

[0033] Figure 6 For when Figure 5 The timing diagram shows the potential change at the positive input terminal of the operational amplifier when the capacitance change measurement circuit operates sequentially in the first charging stage, the first transfer stage, the second charging stage, and the second transfer stage.

[0034] Figure 7A for Figure 5 A schematic diagram of the capacitance change measurement circuit operating in the first charging stage.

[0035] Figure 7B for Figure 5 The diagram shows the capacitance change measurement circuit operating in the first transfer stage (overdrive state).

[0036] Figure 7C for Figure 5 A schematic diagram of the capacitance change measurement circuit operating in the first transfer stage (normal state).

[0037] Figure 7D for Figure 5 A schematic diagram of the capacitance change measurement circuit operating in the second charging stage.

[0038] Figure 7E for Figure 5 The diagram shows the capacitance change measurement circuit operating in the second transfer stage (overdrive state).

[0039] Figure 7F for Figure 5 A schematic diagram of the capacitance change measurement circuit operating in the second transfer stage (normal state).

[0040] Figure 8A and Figure 8B Examples of conventional capacitance change measurement circuits and the capacitance change measurement circuit of the present invention are shown respectively.

[0041] Figure 9 This is a schematic diagram of a capacitance change measurement circuit in another preferred embodiment of the present invention.

[0042] Figure 10 For when Figure 9 The timing diagram shows the potential change at the second input terminal of the operational amplifier when the capacitance change measurement circuit operates sequentially in the first charging stage, the first transfer stage, the second charging stage, and the second transfer stage.

[0043] Explanation of key component symbols:

[0044] 1...Self-capacitance touch detection circuit

[0045] VIN...Input voltage

[0046] CB... Detecting Capacitor

[0047] 10... Switching capacitor circuit

[0048] OP...operational amplifier

[0049] VCM...common mode voltage

[0050] COP...Amplifier capacitor

[0051] VTAR...Target Potential

[0052] S1~S2… Switches

[0053] +…input terminal

[0054] -…input terminal

[0055] OUT… Output terminal

[0056] SRES…Reset Switch

[0057] CLK_RS…Reset clock signal

[0058] τ…Stability time

[0059] 5...Capacitance Change Measurement Circuit

[0060] 50...Switched capacitor circuit

[0061] OP...operational amplifier

[0062] OUT… Output terminal

[0063] +…Second input terminal

[0064] -…First input terminal

[0065] CC…capacitor

[0066] CB…Detection Capacitor

[0067] CM…capacitor

[0068] COP…Amplifier capacitor

[0069] SRES…Reset Switch

[0070] SC…First Switch

[0071] SH1…Second Switch

[0072] SL1…Third Switch

[0073] SCC… switch

[0074] SH2… switch

[0075] SL2… switch

[0076] SH3… switch

[0077] SL3… switch

[0078] SVCM… switch

[0079] SVCMH… switch

[0080] SVCML… switch

[0081] GND…Ground terminal

[0082] VOUT... Output voltage

[0083] VH(RX)...First voltage

[0084] VL(RX)...Second voltage

[0085] VH(TX)...Third voltage

[0086] VL(TX)... Fourth voltage

[0087] VCM…First preset voltage

[0088] VCMH…Second preset voltage

[0089] VCML…Third preset voltage

[0090] CLK_RS…Reset clock signal

[0091] T OD …overdrive time

[0092] T NOR …normal time

[0093] 8A...Capacitance Change Measurement Circuit

[0094] 8B…Capacitance Change Measurement Circuit

[0095] 9…Capacitance Change Measurement Circuit

[0096] SVH… switch

[0097] SVL… switch

[0098] SVHOD… switch

[0099] SVLOD… switch

[0100] VH…First preset voltage VHOD…Second preset voltage

[0101] VLOD…Third preset voltage

[0102] VL…Fourth preset voltage Detailed Implementation

[0103] A preferred embodiment of the present invention is a capacitance change measurement circuit. In this embodiment, the capacitance change measurement circuit can be applied to a self-capacitance or mutual capacitance fingerprint recognition device or a touch sensing device, but is not limited thereto.

[0104] Figure 5 This is a schematic diagram of the capacitance change measurement circuit in this embodiment. Figure 5 As shown, the capacitance change measurement circuit 5 includes a switched capacitor circuit 50, an operational amplifier OP, an amplifier capacitor COP, a reset switch SRES, a switch SVCM, a switch SVCMH, and a switch SVCML.

[0105] The operational amplifier OP has a first input terminal -, a second input terminal +, and an output terminal OUT. The operational amplifier OP outputs an output voltage VOUT through the output terminal OUT. A switched capacitor circuit 50 is coupled to the first input terminal - of the operational amplifier OP. An amplifier capacitor COP is coupled between the first input terminal - and the output terminal OUT of the operational amplifier OP. A reset switch SRES is coupled between the first input terminal - and the output terminal OUT of the operational amplifier OP. The reset switch SRES and the amplifier capacitor COP are connected in parallel. A switch SVCM is coupled between the second input terminal + of the operational amplifier OP and a first preset voltage VCM. A switch SVCMH is coupled between the second input terminal + of the operational amplifier OP and a second preset voltage VCMH. A switch SVCML is coupled between the second input terminal + of the operational amplifier OP and a third preset voltage VCML.

[0106] It should be noted that the first preset voltage VCM, the second preset voltage VCMH, and the third preset voltage VCML in this embodiment are different from each other. For example, the second preset voltage VCMH > the first preset voltage VCM > the third preset voltage VCML, but this is not a limitation.

[0107] In this embodiment, the switched capacitor circuit 50 includes a first switch SC, a second switch SH1, a third switch SL1, a fourth switch SCC, a fifth switch SH2, a sixth switch SL2, a seventh switch SH3, an eighth switch SL3, a detection capacitor CB, a capacitor CC, and a capacitor CM. The first switch SC and the detection capacitor CB are connected in series between the first input terminal of the operational amplifier OP and the ground terminal GND. One end of the capacitor CM is coupled to the first switch SC, and the other end is coupled between the fifth switch SH2 and the sixth switch SL2. One end of the second switch SH1 is coupled to a first voltage VH(RX), and the other end is coupled between the first switch SC and the detection capacitor CB. One end of the third switch SL1 is coupled to a second voltage VL(RX), and the other end is coupled between the first switch SC and the detection capacitor CB. One end of the fourth switch SCC is coupled between the first switch SC and the detection capacitor CB. The fifth switch SH2 and the sixth switch SL2 are connected in series between a third voltage VH(TX) and a fourth voltage VL(TX). The capacitor CC is coupled between the fourth switch SCC and the ground terminal GND. One end of the seventh switch SH3 is coupled between the fourth switch SCC and the capacitor CC, and the other end is coupled to the first voltage VH(RX). One end of the eighth switch SL3 is coupled between the fourth switch SCC and the capacitor CC, and the other end is coupled to the second voltage VL(RX).

[0108] Figure 6 For when Figure 5 The timing diagram shows the potential change at the second input terminal + of the operational amplifier when the capacitance change measurement circuit 5 operates sequentially in the first charging stage, the first transfer stage, the second charging stage, and the second transfer stage.

[0109] like Figure 6 As shown, the capacitance change measurement circuit 5 operates normally during both the first charging stage and the second charging stage. When the capacitance change measurement circuit 5 transitions from the first charging stage to the first transfer stage and from the second charging stage to the second transfer stage, the potential coupled to the second input terminal + of the operational amplifier OP changes, transitioning from the original normal state to an overdrive state. After the overdrive state is maintained for a period of time, it will transition back to the normal state. It should be noted that the output voltage VOUT changes faster in the overdrive state than it does in the normal state. When the capacitance change measurement circuit 5 is in the normal state, the second input terminal + of the operational amplifier OP is coupled to the same voltage, but this is not a limitation.

[0110] In detail, when the capacitance change measurement circuit 5 operates in the first charging stage, switch SVCM is turned on while switches SVCMH and SVCML are turned off, causing the second input terminal + of operational amplifier OP to be coupled to the first preset voltage VCM and in a normal state. When the capacitance change measurement circuit 5 moves from the first charging stage to the first transfer stage, switch SVCMH is turned on while switches SVCM and SVCML are turned off, causing the second input terminal + of operational amplifier OP to be coupled to the second preset voltage VCMH and transitioning from a normal state to an overdrive state. After a period of time, switch SVCM is turned on while switches SVCMH and SVCML are turned off, causing the second input terminal + of operational amplifier OP to switch back to being coupled to the first preset voltage VCM and transitioning from the overdrive state back to the normal state. When the capacitance change measurement circuit 5 moves from the first transfer stage to the second charging stage, switch SVCM remains turned on while switches SVCMH and SVCML remain turned off, causing the second input terminal + of operational amplifier OP to be coupled to the first preset voltage VCM and remain in a normal state. When the capacitance change measurement circuit 5 transitions from the second charging stage to the second transfer stage, switch SVCML is turned on while switches SVCM and SVCMH are turned off. This causes the second input terminal + of operational amplifier OP to be coupled to the second preset voltage VCML, transitioning from the normal state to the overdrive state. After a period of time, switch SVCM is turned on while switches SVCMH and SVCML are turned off, causing the second input terminal + of operational amplifier OP to switch back to being coupled to the first preset voltage VCM, transitioning from the overdrive state back to the normal state.

[0111] Please refer to Figures 7A to 7F , Figures 7A to 7F They are respectively Figure 5 The diagram shows the capacitance change measurement circuit 5 operating in the first charging stage, the first transfer stage (overdrive state), the first transfer stage (normal state), the second charging stage, the second transfer stage (overdrive state), and the second transfer stage (normal state).

[0112] like Figure 7A As shown, when the capacitance change measurement circuit 5 operates in the first charging stage, the detection capacitor CB is coupled between the second voltage VL(RX) and the ground terminal GND to charge the detection capacitor CB. The first input terminal - of the operational amplifier OP is coupled to its output terminal, and the second input terminal + of the operational amplifier OP is coupled to the first preset voltage VCM and is in a normal state.

[0113] like Figure 7BAs shown, when the capacitance change measurement circuit 5 enters the first transfer stage, the detection capacitor CB is coupled between the first input terminal - of the operational amplifier OP and the ground terminal GND. The first input terminal - of the operational amplifier OP is coupled to its output terminal through the amplifier capacitor COP. The second input terminal + of the operational amplifier OP is coupled to the second preset voltage VCMH and is in an overdrive state.

[0114] like Figure 7C As shown, when the overdrive state is maintained for a period of time (e.g., overdrive time T), OD After that, the second input terminal + of the operational amplifier OP will switch back to the first preset voltage VCM and transition from the overdriven state to the normal state. After a normal time T NOR After that, the output voltage VOUT will reach its target potential.

[0115] like Figure 7D As shown, when the capacitance change measurement circuit 5 operates in the second charging stage, the detection capacitor CB is coupled between the first voltage VH(RX) and the ground terminal GND to charge the detection capacitor CB. The first input terminal - of the operational amplifier OP is coupled to its output terminal, and the second input terminal + of the operational amplifier OP is coupled to the first preset voltage VCM and is in a normal state.

[0116] like Figure 7E As shown, when the capacitance change measurement circuit 5 enters the second transfer stage, the detection capacitor CB is coupled between the first input terminal of the operational amplifier OP and the ground terminal GND. The first input terminal of the operational amplifier OP is coupled to its output terminal through the amplifier capacitor COP. The second input terminal of the operational amplifier OP is coupled to the second preset voltage VCML and is in an overdriven state.

[0117] like Figure 7F As shown, when the overdrive state is maintained for a period of time (e.g., overdrive time T), OD After that, the second input terminal + of the operational amplifier OP will switch back to the first preset voltage VCM and transition from the overdriven state to the normal state. After a normal time T NOR After that, the output voltage VOUT will reach its target potential.

[0118] Please refer to Figure 8A and Figure 8B , Figure 8A and Figure 8B Examples of conventional capacitance change measurement circuit 8A and the capacitance change measurement circuit 8B of the present invention are shown respectively. Comparison Figure 8A and Figure 8B It can be later learned that: Figure 8A In the conventional capacitance change measurement circuit 8A shown, the second input terminal + of the operational amplifier OP is fixedly coupled to the first preset voltage VCM, while... Figure 8BIn the capacitance change measurement circuit 8B of the present invention, the second input terminal + of the operational amplifier OP can be selectively coupled to a first preset voltage VCM, a second preset voltage VCMH, or a third preset voltage VCML by turning on one of the switches SVCM, SVCMH, and SVCML, and the first preset voltage VCM, the second preset voltage VCMH, or the third preset voltage VCML are different from each other.

[0119] It should be noted that, Figure 8A and Figure 8B The following assumptions are made: first voltage VH(RX) = 2.5V + 10mV, second voltage VL(RX) = 2.5V - 10mV, detection capacitor CB = 500pF + 10pF, first preset voltage VCM = 2.5V, second preset voltage VCMH = 2.5V + 20mV, third preset voltage VCML = 2.5V - 20mV, amplifier capacitor COP = 5pF, and unity-gain bandwidth UGBW = 5.5MHz, but these are not limitations.

[0120] Next, please refer to Figure 9 and Figure 10 . Figure 9 This is a schematic diagram of the capacitance change measurement circuit 9 in another preferred embodiment of the present invention; Figure 10 For when Figure 9 The timing diagram shows the potential change at the second input terminal + of the operational amplifier OP when the capacitance change measurement circuit 9 operates sequentially in the first charging stage, the first transfer stage, the second charging stage, and the second transfer stage.

[0121] like Figure 9 As shown, in this embodiment, the capacitance change measurement circuit 9 includes switches SVH, SVL, SHUHOD, and SLVOD. Switch SVH is coupled between the second input terminal + of operational amplifier OP and a first preset voltage VH. Switch SHUHOD is coupled between the second input terminal + of operational amplifier OP and a second preset voltage VHOD. Switch SLVOD is coupled between the second input terminal + of operational amplifier OP and a third preset voltage VLOD. Switch SVL is coupled between the second input terminal + of operational amplifier OP and a fourth preset voltage VL.

[0122] It should be noted that in this embodiment, the first preset voltage VH, the second preset voltage VHOD, the third preset voltage VLOD, and the fourth preset voltage VL are different from each other. For example, the second preset voltage VHOD > the first preset voltage VH > the fourth preset voltage VL > the third preset voltage VLOD, but this is not a limitation.

[0123] like Figure 10As shown, when the capacitance change measurement circuit 9 operates in the first charging stage, switch SVH is turned on while switches SVL, SHUOD, and SGLOD are turned off, causing the second input terminal + of operational amplifier OP to be coupled to the first preset voltage VH and in a normal state. When the capacitance change measurement circuit 9 moves from the first charging stage to the first transition stage, switch SHUOD is turned on while switches SVH, SVL, and SGLOD are turned off, causing the second input terminal + of operational amplifier OP to switch from being coupled to the first preset voltage VH to being coupled to the second preset voltage VHOD, thus changing from the original normal state to an overdrive state. After the overdrive state is maintained for a period of time, switch SVH is turned on while switches SVL, SHUOD, and SGLOD are turned off, causing the second input terminal + of operational amplifier OP to be coupled to the first preset voltage VH and returning from the overdrive state to the normal state. It should be noted that the output voltage VOUT changes faster in the overdrive state than it does in the normal state.

[0124] When the capacitance change measurement circuit 9 operates in the second charging stage, switch SVL is turned on while switches SVH, SHUOD, and SLVOD are turned off, causing the second input terminal + of operational amplifier OP to be coupled to the fourth preset voltage VL and in a normal state. When the capacitance change measurement circuit 9 moves from the second charging stage to the second transfer stage, switch SLVOD is turned on while switches SVH, SVL, and SLVOD are turned off, causing the second input terminal + of operational amplifier OP to switch from being coupled to the fourth preset voltage VL to being coupled to the third preset voltage VLOD, thus changing from the original normal state to an overdrive state. After the overdrive state is maintained for a period of time, switch SVL is turned on while switches SVH, SLVOD, and SLVOD are turned off, causing the second input terminal + of operational amplifier OP to switch back to being coupled to the fourth preset voltage VL, thus changing from the overdrive state back to the normal state.

[0125] It should be noted that when the capacitance change measurement circuit 9 operates in the first charging stage and the first transfer stage, the second input terminal + of the operational amplifier OP is coupled to the first preset voltage VH and is in normal condition; when the capacitance change measurement circuit 9 operates in the second charging stage and the second transfer stage, the second input terminal + of the operational amplifier OP is coupled to the fourth preset voltage VL and is in normal condition. In other words, when the capacitance change measurement circuit 9 is in normal condition, the second input terminal + of the operational amplifier OP can be time-divisionally coupled to different voltages (such as the first preset voltage VH and the fourth preset voltage VL), but is not limited to this.

[0126] Compared to existing technologies, the capacitance change measurement circuit of the present invention can be applied to self-capacitance / mutual capacitance fingerprint recognition devices or touch sensing devices. By switching the potential level coupled to the positive input terminal of the operational amplifier and matching the polarity of the driving voltage, it can significantly reduce the stabilization time required for the output voltage of the operational amplifier to reach the target potential during the transition phase when performing self-capacitance / mutual capacitance detection under heavy load and high impedance, so as to maintain the ideal scanning frequency under heavy load and high impedance.

Claims

1. A capacitance change measurement circuit, characterized in that, include: An operational amplifier has a first input terminal, a second input terminal, and an output terminal, and outputs an output voltage through the output terminal; A switched capacitor circuit is coupled to the first input terminal; An amplifier capacitor is coupled between the first input terminal and the output terminal; and A reset switch is coupled between the first input terminal and the output terminal; The switched capacitor circuit includes a first switch, a second switch, a third switch, and a detection capacitor. The first switch and the detection capacitor are connected in series between a first input terminal and a ground terminal. One end of the second switch is coupled to a first voltage, and the other end is coupled to the first switch and the detection capacitor. One end of the third switch is coupled to a second voltage, and the other end is coupled to the first switch and the detection capacitor. The capacitance change measurement circuit operates sequentially in a first charging stage, a first transfer stage, a second charging stage, and a second transfer stage. In the first charging stage, the reset switch and the third switch are turned on, while the first switch and the second switch are turned off, causing the detection capacitor to be coupled between the second voltage and the ground terminal. The second input terminal is coupled to a first preset voltage and is in the normal state. When transitioning from the first charging stage to the first transfer stage, the first switch is turned on, while the reset switch, the second switch, and the third switch are turned off, causing... The detection capacitor is coupled between the first input terminal and the ground terminal, and the second input terminal is coupled to a second preset voltage and is in the overdrive state. After a period of time, the second input terminal will switch back to the first preset voltage and switch from the overdrive state back to the normal state. During the second charging stage, the reset switch and the second switch are turned on, while the first switch and the third switch are turned off, causing the detection capacitor to be coupled between the first voltage and the ground terminal, and the second input terminal to be coupled to the first preset voltage and switch in the normal state. When transitioning from the second charging stage to the second transfer stage, the first switch is turned on, while the reset switch, the second switch, and the third switch are turned off, causing the detection capacitor to be coupled between the first input terminal and the ground terminal, and the second input terminal to be coupled to a third preset voltage and switch from the overdrive state. After a period of time, the second input terminal will switch back to the first preset voltage and switch from the overdrive state back to the normal state.

2. The capacitance change measurement circuit as described in claim 1, characterized in that, The output voltage changes at a faster rate under the overdrive state than it changes at a faster rate under the normal state.

3. The capacitance change measurement circuit as described in claim 1, characterized in that, When the capacitance change measurement circuit operates in the first transfer stage and the second transfer stage, the overdrive state will be maintained for a period of time before switching back to the normal state.

4. The capacitance change measurement circuit as described in claim 1, characterized in that, The capacitance change measurement circuit is in normal condition when it is operating in both the first charging stage and the second charging stage.

5. The capacitance change measurement circuit as described in claim 1, characterized in that, When the capacitance change measurement circuit is in its normal state, the second input terminal is coupled to the same voltage.

6. The capacitance change measurement circuit as described in claim 1, characterized in that, When the capacitance change measurement circuit is in the normal state, the second input terminal can be time-divisionally coupled to different voltages.

7. The capacitance change measurement circuit as described in claim 1, characterized in that, When the capacitance change measurement circuit moves from the first charging stage to the first transfer stage, the second input terminal switches from being coupled to a first preset voltage to being coupled to a second preset voltage, thus changing from the normal state to the overdrive state.

8. The capacitance change measurement circuit as described in claim 7, characterized in that, The second preset voltage is different from the first preset voltage.

9. The capacitance change measurement circuit as described in claim 8, characterized in that, When the capacitance change measurement circuit is operating in the first transition phase, the second input terminal is coupled to the second preset voltage for a period of time and then switches back to being coupled to the first preset voltage, thus transitioning from the overdrive state back to the normal state.

10. The capacitance change measurement circuit as described in claim 9, characterized in that, When the capacitance change measurement circuit moves from the first transfer stage to the second charging stage, the second input terminal is coupled to the first preset voltage and maintained in the normal state.

11. The capacitance change measurement circuit as described in claim 10, characterized in that, When the capacitance change measurement circuit moves from the second charging stage to the second transfer stage, the second input terminal switches from being coupled to the first preset voltage to being coupled to a third preset voltage, thus changing from the normal state to the overdrive state.

12. The capacitance change measurement circuit as described in claim 11, characterized in that, The third preset voltage is different from the first preset voltage.

13. The capacitance change measurement circuit as described in claim 11, characterized in that, When the capacitance change measurement circuit operates in the second transition phase, the second input terminal is coupled to the third preset voltage for a period of time and then switches back to being coupled to the first preset voltage, thus transitioning from the overdrive state back to the normal state.

14. The capacitance change measurement circuit as described in claim 9, characterized in that, When the capacitance change measurement circuit moves from the first transfer stage to the second charging stage, the second input terminal switches from being coupled to the first preset voltage to being coupled to a fourth preset voltage and remains in the normal state.

15. The capacitance change measurement circuit as described in claim 14, characterized in that, When the capacitance change measurement circuit moves from the second charging stage to the second transfer stage, the second input terminal switches from being coupled to the fourth preset voltage to being coupled to a third preset voltage, thus changing from the normal state to the overdrive state.

16. The capacitance change measurement circuit as described in claim 15, characterized in that, The third preset voltage is different from the fourth preset voltage.

17. The capacitance change measurement circuit as described in claim 15, characterized in that, When the capacitance change measurement circuit operates in the second transition phase, the second input terminal is coupled to the third preset voltage for a period of time and then switches back to being coupled to the fourth preset voltage, thus transitioning from the overdrive state back to the normal state.