A method and system for optimizing vehicle communication based on AES-128 parallel transformation

By optimizing the AES-128 algorithm into parallel transformation processing, the problem of slow encryption speed of the traditional AES algorithm is solved, realizing real-time encryption of vehicle Ethernet communication, improving encryption speed and security, and making it suitable for vehicle communication systems.

CN116633528BActive Publication Date: 2025-12-02YANBIAN UNIV
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Patent Information

Application Number
CN202310615656.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-05-29
Publication Date
2025-12-02
Estimated Expiration
2043-05-29

AI Technical Summary

Technical Problem

Traditional AES algorithms are slow when encrypting large amounts of data, which cannot meet the real-time requirements of in-vehicle Ethernet communication and affects communication efficiency.

Method used

A parallel transformation method based on AES-128 is adopted to divide the plaintext data stream into multiple data blocks for parallel processing. Combined with byte replacement and line shift transformation processing, it is optimized into a parallel processing mode, including a data segmentation module, an optimization processing module, and a combination processing module, to achieve parallelization of the encryption process.

Benefits of technology

It significantly improves encryption speed, meets the real-time requirements of vehicle Ethernet communication, enhances the stability and security of encryption algorithms, overcomes the single point of failure problem of traditional algorithms, and has broad application prospects.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application relates to the field of information security technology, and in particular to a method and system for optimizing vehicle communication based on AES-128 parallel transformation. The method includes: segmenting a plaintext data stream to obtain data blocks to be processed; performing byte substitution processing on a row of bytes to be processed at the beginning of the byte substitution processing for the next row of bytes to be processed in the matrix, and performing row shift transformation processing on the row of bytes to be processed; repeatedly performing the above processing steps on all data blocks to be processed to obtain transformed data blocks; and sequentially combining the transformed data blocks to obtain a ciphertext data stream. This application divides the plaintext data stream into multiple data blocks to be processed and assigns them to different optimization processing modules for parallel processing. Furthermore, within each optimization processing module, byte substitution processing and row shift transformation processing are optimized and parallelized, significantly improving processing speed.
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Description

Technical Field

[0001] This application relates to the field of information security technology, and in particular to a method and system for optimizing vehicle communication based on AES-128 parallel transformation. Background Technology

[0002] In-vehicle Ethernet is a crucial component directly impacting vehicle active safety, therefore its real-time performance, reliability, and security must be guaranteed. With increasingly frequent information exchange between automotive electronic control systems and external mobile communication networks, the in-vehicle bus network faces significant security risks. While in-vehicle Ethernet enhances driving pleasure by connecting to smartphones, Bluetooth, and the Internet, it also introduces serious automotive cybersecurity issues such as hacking, data tampering, and security vulnerabilities, severely impacting safe driving, personal privacy, and even public safety. Therefore, the in-vehicle bus network system is no longer an independent and secure network system.

[0003] Automotive Ethernet, an organic combination of Ethernet technology and in-vehicle equipment, has garnered significant attention in the connected vehicle field due to its low complexity, high efficiency, and cost-effectiveness. Leveraging its gigabit-level bandwidth, support for multiple communication protocols, and strong scalability, automotive Ethernet is gradually becoming the mainstream communication technology for intelligent connected vehicles. However, in the automotive electronics field, automotive Ethernet communication is the primary method for data communication between various electronic systems within a vehicle, such as engine control systems, in-vehicle entertainment systems, and intelligent driving assistance systems. Because the data involved in automotive Ethernet communication may contain confidential information, such as vehicle status and location information, encryption is necessary to protect the security and confidentiality of the data.

[0004] Information security technology plays a crucial role in future industrial technologies, and encryption algorithms are an important means of ensuring information security. Among them, AES (Advanced Encryption Standard) is a widely used symmetric encryption algorithm. AES has advantages such as high encryption strength and simple implementation, thus it has been widely used in the security field. However, traditional AES algorithms are slow when encrypting large amounts of data, failing to meet the requirements of real-time encryption and affecting the communication efficiency of automotive Ethernet. Summary of the Invention

[0005] This application provides a vehicle communication optimization method and system based on AES-128 parallel transformation, which can solve the problem that the existing AES algorithm is slow when encrypting large amounts of data, and cannot meet the requirements of real-time encryption, thus affecting the communication efficiency of vehicle Ethernet.

[0006] The first technical solution of this application is a vehicle communication optimization method based on AES-128 parallel transformation, including:

[0007] S1: Obtain the plaintext data stream and perform segmentation processing on the plaintext data stream to obtain several data blocks to be processed; each data block to be processed includes several bytes to be processed arranged in a matrix in sequence.

[0008] S2: Based on the arrangement order of the several bytes to be processed in the data block to be processed, perform byte replacement processing on the row of bytes to be processed located at the front of the arrangement order, and obtain the row of replacement bytes for the current time.

[0009] Furthermore, at the start time of sequentially performing byte replacement processing on the next row of the matrix, a row shift transformation is performed on the current row of replacement bytes;

[0010] S3: Several data blocks to be processed are simultaneously executed repeatedly in step S2 until several bytes to be processed in each data block to be processed are processed, and several transformation processing data blocks are obtained accordingly.

[0011] S4: For several transformed data blocks, perform combined processing including row and column confusion transformation and round key addition transformation in sequence to obtain the ciphertext data stream.

[0012] The second technical solution of this application is a vehicle communication optimization system based on AES-128 parallel transformation, including: a data segmentation module, an optimization processing module and a combined processing module;

[0013] The data segmentation module is used to acquire plaintext data stream and segment the plaintext data stream to obtain several data blocks to be processed, and to transmit several data blocks to be processed to several different optimization processing modules.

[0014] Each of the data blocks to be processed includes a number of bytes to be processed arranged sequentially in a matrix;

[0015] The optimization processing module is used to perform byte replacement processing on a row of bytes to be processed that is located at the front of the arrangement order in the data block to be processed, based on the arrangement order of the several bytes to be processed in the data block to be processed, and thus obtain the row of replacement bytes for the current time.

[0016] Furthermore, it is also used to perform row shift transformation processing on the current row of replacement bytes at the starting time of the byte replacement processing sequentially for the next row of the matrix;

[0017] Furthermore, it is also used to simultaneously perform byte replacement processing and line shift transformation processing on several data blocks to be processed until several bytes to be processed in each data block to be processed are processed, thereby obtaining several transformed data blocks accordingly.

[0018] In addition, it is also used to transmit several transformation processing data blocks to the combined processing module;

[0019] The combined processing module is used to sequentially perform combined processing, including row and column confusion transformation processing and round key addition transformation processing, on several transformed data blocks to obtain a ciphertext data stream.

[0020] Optionally, the data segmentation module includes: a plaintext acquisition unit and a data grouping unit;

[0021] The plaintext acquisition unit is used to acquire the plaintext data stream and transmit the plaintext data stream to the data packet unit;

[0022] The data grouping unit is used to segment the plaintext data stream to obtain several data blocks to be processed, and to transmit the data blocks to several different optimization processing modules.

[0023] Optionally, the optimization processing module includes: a byte replacement processing unit and a line shift transformation processing unit, each with a set quantity of several.

[0024] The plurality of byte replacement processing units are used to perform byte replacement processing on the byte at the front of the arrangement order in the plurality of byte to be processed in the plurality of byte to be processed data blocks, based on the arrangement order of the plurality of byte to be processed data blocks, and thereby obtain the replacement byte for the current time.

[0025] Several row shift transformation processing units are used to simultaneously receive the replacement byte of the current time and perform row shift transformation processing on the replacement byte of the current time, until several data blocks to be processed are processed and several transformed data blocks are obtained accordingly.

[0026] In addition, it is also used to simultaneously transmit several transformation processing data blocks to the combined processing module (3).

[0027] Optionally, the optimization processing module further includes: several FIFO buffers;

[0028] Several FIFO buffers are used to simultaneously transmit the current replacement byte from the byte replacement processing unit to the row shift transformation processing unit.

[0029] Beneficial effects:

[0030] 1) Fast encryption speed; This application first divides the plaintext data stream into multiple data blocks to be processed and assigns them to different optimized processing modules for parallel processing. At the same time, byte substitution processing and line shift transformation processing are processed in parallel within the optimized processing modules, which greatly improves the processing speed. This not only overcomes the problem that the traditional serial processing method is slow and difficult to meet the real-time requirements because it needs to process each byte, but also overcomes the problem of sequential execution of byte substitution and line shift transformation in the traditional AES algorithm, which greatly improves the speed of the encryption algorithm and achieves a rapid increase in encryption speed.

[0031] 2) High security; Since the AES encryption algorithm provided in this application still has the same security and confidentiality, it has excellent encryption protection capabilities and can be widely used in various occasions that require security protection;

[0032] 3) High stability; This application improves the stability of the algorithm by allocating the data blocks to be encrypted in the plaintext to different processors for parallel computing, effectively avoiding the single point of failure problem of traditional algorithms, and ensuring the continuous stability and reliability of the encryption algorithm.

[0033] 4) High practicality; The encryption method, user equipment, storage medium and device provided in this application are highly operable, implementable and applicable, and can be used and deployed in various computer systems and devices, with broad application prospects;

[0034] In summary, the encryption technology presented in this application can be applied to in-vehicle Ethernet communication. Through hardware acceleration and parallel encryption optimization measures, real-time encryption is achieved, thus meeting the requirements for real-time encryption of in-vehicle Ethernet data. Therefore, it solves the problem that existing AES algorithms are slow when encrypting large amounts of data, failing to meet the needs of real-time encryption and consequently affecting the communication efficiency of in-vehicle Ethernet. Attached Figure Description

[0035] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a flowchart illustrating the vehicle communication optimization method based on AES-128 parallel transformation in the embodiments of this application.

[0037] Figure 2 This is a schematic diagram of the byte replacement process based on AES-128 in the existing technology;

[0038] Figure 3This is a schematic diagram of the existing technology for row shift transformation processing based on AES-128;

[0039] Figure 4 This is a schematic diagram showing the before and after optimization of byte replacement processing and line shift transformation processing in the embodiments of this application;

[0040] Figure 5 This is a schematic diagram showing the before and after optimization of the AES-128 algorithm in the embodiments of this application;

[0041] Figure 6 This is a schematic diagram of the vehicle communication optimization system based on AES-128 parallel transformation in the embodiments of this application;

[0042] In the diagram, 1-data segmentation module; 11-plaintext acquisition unit; 12-data grouping unit; 2-optimization processing module; 21-byte replacement processing unit; 22-line shift transformation processing unit; 3-combination processing module. Detailed Implementation

[0043] The embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below do not represent all embodiments consistent with this application. They are merely examples of systems and methods consistent with some aspects of this application as detailed in the claims.

[0044] Firstly, this application provides a vehicle communication optimization method based on AES-128 parallel transformation, including:

[0045] S1: Obtain the plaintext data stream and segment it to obtain several data blocks to be processed; each data block to be processed includes several bytes to be processed arranged in a matrix.

[0046] Specifically, the plaintext data stream is divided into several data blocks, and each data block is assigned to a different processor for processing. The plaintext data stream should be divided into fixed-length data blocks to be processed, such as 128 bits.

[0047] S2: Based on the arrangement order of several bytes to be processed in the data block to be processed, perform byte replacement processing on the row of bytes to be processed at the front of the arrangement order, and obtain the row of replacement bytes accordingly.

[0048] Furthermore, at the start of the byte replacement process for the next row of bytes to be processed in the matrix, a row shift transformation is performed on the byte to be replaced in the current row.

[0049] Specifically, such as Figure 2 , Figure 3 and Figure 4 As shown, Figure 2 This is a schematic diagram of the byte replacement process based on AES-128 in the existing technology. Figure 3 This is a schematic diagram of the existing technology for row shift transformation processing based on AES-128. Figure 4 This is a comparative diagram showing the process before and after optimization of byte replacement and line shift transformation in AES-128 in the embodiments of this application.

[0050] Traditional AES-128 encryption and decryption algorithms need to follow the rules as follows: Figure 1 and Figure 2 The steps are executed sequentially in a fixed order, but this method is time-consuming. To improve the algorithm's running speed, this application's embodiments employ parallel optimization steps to optimize the traditional AES-128 algorithm.

[0051] The embodiments of this application achieve parallelization of steps through cooperation between threads.

[0052] In the AES-128 encryption process, row shift transformation can be performed on each row of the verification matrix immediately after the byte replacement is completed, without waiting for all bytes in the verification matrix to be replaced.

[0053] This optimization method can improve the efficiency of the AES-128 algorithm, thereby speeding up encryption and decryption. Let the first row of the parity check matrix be byte-replaced with X1, and the row shift be Y1, and so on.

[0054] according to Figure 4 As shown, in encrypted data, byte substitution and line shift transformation can be performed in parallel because they do not interfere with each other. If parallel computation is used, byte substitution and line shift transformation can be performed simultaneously, thus reducing the total runtime of the encryption process. In serial computation, the two transformations take a total of (4a+4b) time units, while in parallel mode, only (4a+b) time units are needed, saving 3b of line shift processing time.

[0055] The above improvements can significantly increase the encryption speed and efficiency of the algorithm. By merging byte substitution and line shifting into parallel transformations, the number of operation steps and computation time in the algorithm is reduced. Therefore, these two steps can be performed simultaneously during encryption, thus greatly reducing encryption time.

[0056] S3: Step S2 is executed repeatedly for several data blocks to be processed simultaneously until several bytes to be processed in each data block are processed, resulting in several transformed data blocks.

[0057] Specifically, in this embodiment, the data block to be processed is assigned to different optimization processing modules 2, and several optimization processing modules 2 simultaneously perform byte substitution processing and line shift transformation processing. After the byte substitution processing is completed, the optimization processing module 2 directly performs the line shift transformation processing. Through parallel computing, this embodiment can effectively improve the encryption speed of the AES encryption algorithm.

[0058] Using a data stream parallel approach allows each optimized processing module 2 to simultaneously perform byte substitution and line shift transformation, achieving higher parallelism and faster encryption speed. Furthermore, it effectively handles dependencies between tasks to ensure the correctness and security of encryption.

[0059] S4: For several transformed data blocks, perform combined processing including row and column confusion transformation and round key addition transformation in sequence to obtain the ciphertext data stream.

[0060] Specifically, such as Figure 5 As shown, Figure 5 This illustration shows a comparison of the AES-128 algorithm before and after optimization in this application's embodiments. This application's embodiments combine byte substitution processing and line shift transformation processing into a single parallel transformation step, and optimize the four-step round transformation in the traditional algorithm into three steps. This improves encryption efficiency, thereby meeting the real-time requirements of in-vehicle Ethernet communication and ensuring data security and confidentiality. Experimental results show that the encryption and decryption speed of this application's embodiments is significantly improved compared to the traditional AES-128 algorithm without affecting communication quality and stability.

[0061] In summary, the embodiments of this application overcome traditional technical difficulties and biases. In traditional encryption algorithms, plaintext data packets to be encrypted are usually processed serially, which results in slow processing speed, low real-time performance, and vulnerability to external attacks. The technical solution of this application not only offers fast processing speed but also effectively improves data security and confidentiality, thereby overcoming the shortcomings of traditional encryption algorithms.

[0062] Secondly, this application provides an in-vehicle communication optimization system based on AES-128 parallel transformation, such as... Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of the vehicle communication optimization system based on AES-128 parallel transformation in the embodiments of this application, including: data segmentation module 1, optimization processing module 2 and combination processing module 3.

[0063] Data segmentation module 1 is used to acquire plaintext data streams and segment them to obtain several data blocks to be processed, and to transmit these data blocks to several different optimization processing modules 2. Each data block to be processed includes several bytes to be processed arranged sequentially in a matrix.

[0064] The data segmentation module 1 includes a plaintext acquisition unit 11 and a data grouping unit 12.

[0065] Plaintext acquisition unit 11 is used to acquire plaintext data stream and transmit plaintext data stream to data packet unit 12.

[0066] The data grouping unit 12 is used to segment the plaintext data stream to obtain several data blocks to be processed, and to transmit several data blocks to several different optimization processing modules 2.

[0067] Optimization module 2 is used to perform byte replacement processing on the first row of bytes to be processed in the order of the bytes to be processed in the data block to be processed, based on the arrangement order of the bytes to be processed in the data block to be processed, thereby obtaining the row of replaced bytes for that current operation. It is also used to perform row shift transformation processing on the row of replaced bytes at the start time of the byte replacement processing for the next row of bytes to be processed in the matrix. Furthermore, it is used to simultaneously perform byte replacement processing and row shift transformation processing on several data blocks to be processed until all the bytes to be processed in each data block have been processed, thereby obtaining several transformed data blocks.

[0068] In addition, it is also used to transmit several transformation processing data blocks to the combination processing module 3.

[0069] The optimization processing module 2 includes: a number of byte replacement processing units 21 and a number of line shift transformation processing units 22, as well as a number of FIFO buffers.

[0070] The byte replacement processing unit 21 is used to perform byte replacement processing on the byte at the front of the arrangement order in the data block to be processed, based on the arrangement order of the byte to be processed in the data block to be processed, and to obtain the replacement byte for the current time.

[0071] Several line shift transformation processing units 22 are used to simultaneously receive the replacement byte of the current time and perform line shift transformation processing on the replacement byte of the current time until several data blocks to be processed are processed, and several transformed data blocks are obtained accordingly. They are also used to simultaneously transmit several transformed data blocks to the combined processing module 3.

[0072] Several FIFO buffers are used to simultaneously transmit the current replacement byte from the byte replacement processing unit 21 to the line shift transformation processing unit 22.

[0073] Specifically, in each optimization processing module 2, two processing units can be set up: a byte replacement processing unit 21 for byte replacement and a row shift transformation processing unit 22 for row shift transformation. Data transmission and synchronization between the byte replacement processing unit 21 and the row shift transformation processing unit 22 can be performed through a FIFO buffer (first-in, first-out). The FIFO buffer is not shown in the attached figure.

[0074] In the byte replacement processing unit 21, the bytes in the data block to be processed are replaced with the bytes in the corresponding S-box.

[0075] In the row shift transformation processing unit 22, the data block to be processed is subjected to row shift transformation processing. During the processing, the row shift transformation processing unit 22 processes data from different rows simultaneously to achieve higher parallelism.

[0076] The combination processing module 3 is used to perform combination processing, including row and column confusion transformation processing and round key addition transformation processing, on several transformed data blocks in sequence to obtain ciphertext data stream.

[0077] Specifically, the byte substitution and line shift transformation processes in this embodiment employ the standard algorithm of the AES algorithm. When decrypting the ciphertext, the same optimized AES-128 decryption algorithm as the encryption algorithm is used, and the specific steps are similar to the encryption process.

[0078] The combined processing module 3 can send the encrypted data stream to the vehicle-mounted Ethernet communication module. The encrypted data stream can be transmitted and communicated through the vehicle-mounted Ethernet communication module. Highly efficient encryption algorithms such as AES are employed, combined with security measures such as hash algorithms and message authentication codes to ensure data integrity and reliability.

[0079] In some embodiments, components such as a encryption module, a key management module, and an access control module are added to the in-vehicle Ethernet communication to achieve data encryption, key management, and access control. The encryption module is used to store keys and perform encryption and decryption operations, the key management module is used to generate and distribute keys, and the access control module is used to control data access permissions.

[0080] In practical applications, to achieve hardware acceleration of encryption algorithms, it is necessary to select and design and optimize high-performance hardware platforms such as FPGAs or ASICs. Furthermore, techniques such as parallel encryption and pipelining can be used to improve encryption efficiency.

[0081] The embodiments of this application have been described in detail above, but the content is only a preferred embodiment of this application and should not be considered as limiting the scope of this application. All equivalent changes and improvements made within the scope of this application should still fall within the patent coverage of this application.

Claims

1. A method for optimizing vehicle communication based on AES-128 parallel transformation, characterized in that, include: S1: Obtain the plaintext data stream and perform segmentation processing on the plaintext data stream to obtain several data blocks to be processed; each data block to be processed includes several bytes to be processed arranged in a matrix in sequence. S2: Based on the arrangement order of the several bytes to be processed in the data block to be processed, perform byte replacement processing on the row of bytes to be processed located at the front of the arrangement order, and obtain the row of replacement bytes for the current time. Furthermore, at the start time of sequentially performing byte replacement processing on the next row of the matrix, a row shift transformation is performed on the current row of replacement bytes; S3: Several data blocks to be processed are simultaneously executed repeatedly in step S2 until several bytes to be processed in each data block to be processed are processed, and several transformation processing data blocks are obtained accordingly. S4: For several transformed data blocks, perform combined processing including row and column confusion transformation and round key addition transformation in sequence to obtain the ciphertext data stream; It can combine byte replacement processing and line shift transformation processing into a single parallel transformation step, and optimize the four-step round transformation in the traditional algorithm into three steps.

2. A vehicle communication optimization system based on AES-128 parallel transformation, characterized in that, include: Data segmentation module, optimization processing module, and combined processing module; The data segmentation module is used to acquire plaintext data stream and segment the plaintext data stream to obtain several data blocks to be processed, and to transmit several data blocks to be processed to several different optimization processing modules. Each of the data blocks to be processed includes a number of bytes to be processed arranged sequentially in a matrix; The optimization processing module is used to perform byte replacement processing on a row of bytes to be processed that is located at the front of the arrangement order in the data block to be processed, based on the arrangement order of the several bytes to be processed in the data block to be processed, and thus obtain the row of replacement bytes for the current time. Furthermore, it is also used to perform row shift transformation processing on the current row of replacement bytes at the starting time of the byte replacement processing sequentially for the next row of the matrix; Furthermore, it is also used to simultaneously perform byte replacement processing and line shift transformation processing on several data blocks to be processed until several bytes to be processed in each data block to be processed are processed, thereby obtaining several transformed data blocks accordingly. In addition, it is also used to transmit several transformation processing data blocks to the combined processing module; The combined processing module is used to sequentially perform combined processing including row and column confusion transformation processing and round key addition transformation processing on several transformed data blocks to obtain a ciphertext data stream. It can combine byte replacement processing and line shift transformation processing into a single parallel transformation step, and optimize the four-step round transformation in the traditional algorithm into three steps.

3. The vehicle communication optimization system based on AES-128 parallel transformation according to claim 2, characterized in that, The data segmentation module includes: a plaintext acquisition unit and a data grouping unit; The plaintext acquisition unit is used to acquire the plaintext data stream and transmit the plaintext data stream to the data packet unit; The data grouping unit is used to segment the plaintext data stream to obtain several data blocks to be processed, and to transmit the several data blocks to be processed to several different optimization processing modules.

4. The vehicle communication optimization system based on AES-128 parallel transformation according to claim 2, characterized in that, The optimization processing module includes: a byte replacement processing unit and a line shift transformation processing unit, each with a set quantity of several bytes; The plurality of byte replacement processing units are used to perform byte replacement processing on the byte at the front of the arrangement order in the plurality of byte to be processed in the plurality of byte to be processed data blocks, based on the arrangement order of the plurality of byte to be processed data blocks, and thereby obtain the replacement byte for the current time. Several row shift transformation processing units are used to simultaneously receive the replacement byte of the current time and perform row shift transformation processing on the replacement byte of the current time, until several data blocks to be processed are processed and several transformed data blocks are obtained accordingly. It is also used to simultaneously transmit several transformation processing data blocks to the combined processing module.

5. The vehicle communication optimization system based on AES-128 parallel transformation according to claim 4, characterized in that, The optimization processing module also includes: several FIFO buffers; Several FIFO buffers are used to simultaneously transmit the current replacement byte from the byte replacement processing unit to the row shift transformation processing unit.

Citation Information

Patent Citations

  • Field programmable gate array (FPGA)-based advanced encryption standard (AES) encryption and decryption network communication device and implementation method thereof

    CN102664729A

  • Cryptographic processing using a processor

    US20110231673A1