Time-of-flight sensor
By embedding light generation and receiving circuits in a resin layer within the time-of-flight sensor and utilizing stacked insulating layers and conductive rails for connection, the problems of non-compact sensor structure and circuit susceptibility to corrosion are solved, achieving a compact and durable sensor design.
Patent Information
- Application Number
- CN202310149113.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2023-02-21
- Filing Date
- 2023-02-22
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2043-02-22
AI Technical Summary
Existing time-of-flight sensors suffer from problems such as non-compact structure and circuitry susceptibility to corrosion.
The light generating and receiving circuits are embedded in a resin layer and covered by an insulating layer stack to ensure that the circuits are flush with the resin layer. Conductive tracks and vias are used to achieve electrical connections for the circuits. Resin-made components are used to cover the circuits for protection and a compact design.
This design achieves a compact sensor design and corrosion-resistant circuitry, while ensuring that the light emission and reception areas are coplanar, thus improving the sensor's reliability and durability.
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Figure CN116643286B_ABST
Abstract
Description
[0001] Priority requirements
[0002] This application claims priority to French patent application No. 2201571, filed on February 22, 2022, the contents of which are incorporated herein by reference in their entirety to the fullest extent permitted by law. Technical Field
[0003] This disclosure generally relates to electronic devices, and more specifically, to time-of-flight sensors and methods of manufacturing the same. Background Technology
[0004] Sensors operating on the time-of-flight principle (also known as time-of-flight sensors (TOF)) enable accurate distance measurements in real time. To achieve this, a TOF sensor illuminates the scene and the object being measured with a flash and calculates the time it takes for the flash to travel between the object and the sensor. The time of flight of the flash is proportional to the distance between the sensor and the object.
[0005] There is a need in the art to address the shortcomings of known time-of-flight sensors. Summary of the Invention
[0006] One embodiment provides a time-of-flight sensor, which includes a first light generating circuit and a second light receiving circuit, the first circuit and the second circuit being located in a first resin layer.
[0007] Another embodiment provides a method for manufacturing a time-of-flight sensor, the method comprising: forming a first light-generating circuit and a second light-receiving circuit in a first resin layer.
[0008] According to one embodiment, a first region of the first circuit configured to emit light and a second region of the second circuit configured to receive light are flush with the same first surface of the first layer.
[0009] According to one embodiment, the first surface is configured to point to the scene.
[0010] According to one embodiment, a first surface is covered with a first insulating layer stack having a first conductive track therein. The first stack includes a first opening and a second opening, the first opening at least partially exposing a first region and the second opening at least partially exposing a second region. At least some of the first tracks are in contact with a first circuit or a second circuit.
[0011] According to one embodiment, the sensor includes a component resting on a first stack, the component including a third opening and a fourth opening, inside which is an optical instrument located at least partially in front of the first region and the second region.
[0012] According to one embodiment, the component is made of resin, and each third and fourth opening includes an edge on which an optical instrument is attached.
[0013] According to one embodiment, the first opening also exposes a third region of the second circuit, which is configured to receive light. The third region is flush with the first surface of the first layer and is located in front of a portion of the component.
[0014] According to one embodiment, a second surface of the first layer is covered by a second insulating layer stack, the second insulating layer stack having a second conductive track located therein.
[0015] According to one embodiment, the first layer includes: conductive vias coupling a first conductive track and a second conductive track, and / or conductive vias coupling a first circuit or a second circuit and a second conductor track.
[0016] According to one embodiment, the method includes: incorporating a first circuit, a second circuit, and a via into a support.
[0017] According to one embodiment, the method includes forming a first resin layer around the first circuit and the second circuit, as well as around the via and on the support.
[0018] According to one embodiment, the first layer is formed by a panel-embedded package (PEP) type method. Attached Figure Description
[0019] In the remainder of the disclosure of the specific embodiments given by way of illustration rather than limitation with reference to the accompanying drawings, the foregoing features and advantages, as well as other features and advantages, will be described in detail, wherein:
[0020] Figure 1 An embodiment of the time-of-flight sensor is shown;
[0021] Figure 2 It shows Figure 1 A cross-sectional view of a manufacturing step in an embodiment;
[0022] Figure 3 It shows Figure 1 A cross-sectional view of another manufacturing step in an embodiment;
[0023] Figure 4 It shows Figure 1 A cross-sectional view of another manufacturing step of the embodiment; and
[0024] Figure 5 It shows Figure 1 A perspective view of another manufacturing step in an embodiment. Detailed Implementation
[0025] In the various figures, similar features have been indicated by similar reference numerals. Specifically, common structural and / or functional features in various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.
[0026] For clarity, only the steps and elements useful for understanding the embodiments described herein are described in detail.
[0027] Unless otherwise indicated, when referring to two elements connected together, it means a direct connection without any intermediate elements other than conductors, and when referring to two elements coupled together, it means that the two elements can be connected or they can be coupled via one or more other elements.
[0028] In the following disclosure, unless otherwise specified, reference is made to the orientation shown in the figure when referring to absolute positional modifiers (such as the terms “front,” “back,” “top,” “bottom,” “left,” “right,” etc.), relative positional modifiers (such as the terms “above,” “below,” “up,” and “down,” etc.), or directional modifiers (such as “horizontal,” “vertical,” etc.).
[0029] Unless otherwise specified, the expressions “about,” “approximately,” “substantially,” and “on the order of” mean within 10%, preferably within 5%.
[0030] Figure 1 An embodiment of the time-of-flight sensor 10 is shown. Figure 1 In this case, the main surface of the sensor that is expected to determine its distance is the lower surface. The main surface of the sensor is the surface that emits and receives light, and it is the surface located on the scene side (i.e., facing the scene).
[0031] Sensor 10 includes a light generating circuit 12, such as a laser generating circuit 12. Circuit 12 includes one or more diodes, such as one or more light-emitting diodes or one or more laser diodes. Circuit 12 includes a light generating region 13. In other words, the light generated by circuit 12 is emitted at the level of region 13.
[0032] Sensor 10 includes circuitry 14 for receiving the light generated by circuitry 12. Circuitry 14 includes a light-receiving region 16. Region 16 is configured to receive light generated by circuitry 12 and reflected by the scene. Circuitry 14 also includes another light-receiving region 18. Region 18 is configured to receive light generated by circuitry 12 and partially reflected by sensor 10.
[0033] Circuits 12 and 14 are located within resin layer 20 (i.e., embedded within resin layer 20). The resin is preferably suitable for panel-embedded packaging (PEP) technology. For example, the resin is a so-called "thermosetting" epoxy resin. For example, the resin is opaque to the wavelength of light emitted by circuit 12.
[0034] Layer 20 includes a (preferably planar) lower surface 20a and a (preferably planar) upper surface 20b. The lower surface 20a corresponds to the surface closest to (facing) the scene, that is, the surface closest to the side of the sensor that emits and receives light. The upper surface 20b corresponds to the surface farthest from (away from) the scene, that is, the surface farthest from the side of the sensor that emits and receives light.
[0035] Circuits 12 and 14 are located on the lower surface side of layer 20. A portion of each circuit 12, 14 is coplanar with surface 20a. In other words, circuits 12 and 14 are flush with the lower surface 20a of layer 20. More precisely, region 13 is flush with surface 20a and therefore not covered by layer 20. Similarly, regions 16 and 18 of circuit 14 are flush with surface 20a and therefore not covered by layer 20. Preferably, regions 13, 16, and 18 are coplanar.
[0036] The side walls of circuits 12 and 14 are at least partially, preferably completely, covered and in contact with the resin of layer 20. The upper walls of circuits 12 and 14 are at least partially covered and in contact with the resin of layer 20. Thus, chips 12 and 14 are held within layer 20. Circuits 12 and 14 are separated from each other, for example, through a portion of layer 20.
[0037] For example, the sensor may include one or more other circuits (not shown) in layer 20.
[0038] Sensor 10 also includes a conductive via 22. Figure 1 In the example, each via 22 includes, for example, a conductive core 22a made of metal and a sheath 22b made of an electrically insulating material. The sheath 22b of each via laterally surrounds the corresponding core 22a. Each via 22 includes an upper surface exposing the core 22a. The upper surfaces of the via 22 are preferably coplanar.
[0039] Some vias pass through layer 20. Specifically, the core 22a of the via extends from the lower surface of layer 20 to the upper surface of layer 20. Other vias (specifically, the core 22a of the via) extend from the upper surface of a circuit located in layer 20 to the upper surface of layer 20. Figure 1In the example, sensor 10 includes two vias 22 extending from the lower surface of layer 20 to the upper surface of layer 20 and one via 22 extending from the upper surface of circuit 12 to the upper surface of layer 20. The core of the via 22 extending from the upper surface of circuit 12 preferably contacts circuit 12, and preferably... Figure 1 The connection pads are not shown in the diagram.
[0040] Sensor 10 includes an insulating layer stack 24, which includes conductive tracks 26. The surface 20b of layer 20 is covered by the insulating layer stack 24. The stack 24 covers vias 22. Preferably, the stack 24 completely covers the upper surface of layer 20. Each via 22 contacts a track 26. Each via 22 is coupled to another via 22 via the track 26, or coupled to a track 26 exposed at a layer level on the upper surface of the stack 24. Therefore, the sensor can be coupled to external components via the tracks 26.
[0041] The sensor also includes an insulating layer stack 28, which includes conductive tracks 30. The stack 28 covers a surface 20a of layer 20. Specifically, the stack 28 covers a via 22 that extends to surface 20a. The stack 28 is located between layer 20 and the scene, emitting light toward the scene.
[0042] Stack 28 includes an opening 32 located in front of region 13, that is, perpendicularly aligned with region 13. The opening 32 extends through stack 28. In other words, the opening 32 extends from the upper surface of stack 28 to the lower surface of stack 28. The opening 32 partially exposes circuit 12. The opening 32 at least partially exposes region 13, preferably, completely exposes region 13. Preferably, at least a portion of circuit 12 is not exposed through the opening 32 and is covered by stack 28.
[0043] Preferably, a portion of circuit 12 (e.g., a portion of the lower surface of circuit 12, such as a connection pad not shown) contacts a conductive track 30 located in stack 28. For example, the track 30 is coupled directly or via another track 30 to via 22, or more precisely, to core 22a of via 22.
[0044] Therefore, the connection terminal of circuit 12 is coupled, for example, to the track 26 exposed at the layer level on the upper surface of the sensor via via 22 and track 26. Another connection terminal of circuit 12 is coupled, for example, to the track 26 exposed at the layer level on the upper surface of the sensor via one or more tracks 30, via 22, and track 26. Thus, circuit 12 can be electrically coupled to external components through the upper surface of sensor 10.
[0045] exist Figure 1In the example, opening 32 also extends in front of at least a portion of region 18 of circuit 14 (preferably, in front of the entire region 18). Therefore, opening 32 also covers a portion of layer 20 that separates circuits 12 and 14. Thus, regions 13 and 18 are exposed through the same opening.
[0046] Stack 28 includes another opening 34 located in front of region 16. Opening 34 extends through stack 28. In other words, opening 34 extends from the upper surface of stack 28 to the lower surface of stack 28. Opening 34 partially exposes circuit 14. Opening 34 at least partially exposes region 16, preferably, completely exposes region 16. Preferably, at least a portion of circuit 14 is not exposed through opening 34 and is covered by stack 28.
[0047] Preferably, a portion of circuit 14 (e.g., a portion of the lower surface of circuit 14, such as a connection pad not shown) contacts a conductive track 30 located in stack 28. For example, the track 30 is coupled directly or via another track 30 to via 22, or more precisely, to core 22a of via 22.
[0048] For example, the connection terminal 14 is coupled to the track 26 exposed at the layer on the upper surface of the sensor via one or more tracks 30, vias 22, and tracks 26. Thus, the circuit 12 can be electrically coupled to external components through the upper surface of the sensor 10.
[0049] Openings 32 and 34 are separated by a portion of stack 28. The material of stack 28 (specifically, the material located in the portion that separates openings 32 and 34) is opaque at least to the wavelength of light emitted by circuit 12.
[0050] Sensor 10 also includes a component 36 bonded to stack 28. More precisely, component 36 is bonded to the lower surface of stack 28. Component 36 is located between stack 28 and the scene. Component 36 is made of resin, for example, the same resin as layer 20. Preferably, component 36 is made of a material that is at least partially opaque, preferably completely opaque, to the wavelength emitted by circuit 12.
[0051] Component 36 includes openings 38 and 40. Each opening 38, 40 includes a first portion located on the side closest to stack 28 and a second portion located on the side furthest from stack 28. The horizontal dimension of the first portion of each opening 38, 40 (that is, the horizontal dimension in a plane parallel to the lower surface of layer 20) is greater than the horizontal dimension of the second portion of the same opening. Therefore, the horizontal dimension of the first portion of opening 38 is smaller than the horizontal dimension of the second portion of opening 38. Similarly, the horizontal dimension of the first portion of opening 40 is greater than the horizontal dimension of the second portion of opening 38. Therefore, openings 38 and 40 include edges 42 and 44, respectively.
[0052] Sensor 10 also includes optical instruments (e.g., optical elements) 46 and 47. Optical instruments 46 and 47 are, for example, filters. Instruments 46 and 47 are located in openings 38 and 40. More precisely, instrument 46 is located in opening 38, and more precisely, in the first portion of opening 38. Instrument 46 rests against edge 42. Preferably, instrument 46 is bonded to edge 42, for example, by an adhesive layer (not shown). Similarly, instrument 47 is located in opening 40, more precisely, in the first portion of opening 40. Instrument 47 rests against edge 44. Preferably, instrument 47 is bonded to edge 44, for example, by an adhesive layer (not shown).
[0053] Therefore, the horizontal dimensions of instruments 46 and 47 are less than or equal to the horizontal dimension of the first portion of the opening in which they are located. Therefore, the horizontal dimensions of instruments 46 and 47 are greater than the horizontal dimension of the second portion of the opening in which they are located. The thickness of instruments 46 and 47 is less than or equal to (preferably, less than) the height of the first portion of the opening in which they are located.
[0054] Opening 40 and instrument 47 are located in front of opening 34, preferably in front of the entire opening 34. In other words, opening 40 and instrument 47 are located in front of a portion of circuit 14, specifically in front of region 16. A first portion of opening 40 is preferably located in front of the entire region 16. Preferably, a second portion of opening 40 is located in front of the entire region 16.
[0055] Opening 38 and instrument 46 are located in front of at least a portion of opening 32. Opening 38 and instrument 46 are located in front of at least a portion of circuit 12, specifically in front of region 13. A first portion of opening 38 is preferably located in front of the entire region 13. Preferably, a second portion of opening 38 is located in front of the entire region 13. Preferably, opening 38 is not located in front of region 18. Therefore, region 18 is preferably located entirely in front of a portion of component 36.
[0056] During sensor operation, light is emitted by circuit 12, more specifically, by region 13 of circuit 12. A first portion of this light is reflected on component 36 and instrument 46, and received by region 18. A second portion of this light (preferably corresponding to the majority of the light) passes through opening 38 and instrument 46 to reach the scene. The second portion of the light is reflected on the scene and toward the sensor. The second portion of the light passes through opening 40 (and specifically, instrument 47) to reach region 16.
[0057] Figures 2 to 5 The diagram illustrates the manufacturing process. Figure 1 The steps of the method in the embodiment (preferably, successive steps). Although Figures 2 to 5 The illustration shows the formation of a single device, but multiple identical devices can be formed simultaneously (e.g., on the same wafer), and then the multiple identical devices can be separated from each other using a monomerization operation.
[0058] Figure 2 It shows Figure 1 A cross-sectional view of one manufacturing step of an embodiment.
[0059] During this step, circuits 12 and 14 are bonded to temporary substrate 48. Similarly, via 22 is bonded to support 48. Circuits 12, 14 and via 22 are bonded to support 48, for example, by an adhesive layer located on support 48.
[0060] Circuits 12, 14 and vias are placed in conjunction with them. Figure 1 The support 48 is located at a position corresponding to the arrangement of the sensor 10 on its lower surface. Therefore, circuits 12 and 14 are combined such that regions 13, 16, and 18 are positioned toward the support 48, preferably in contact with it. Further, with... Figure 1 The via 22 corresponding to the via 22 extending from the lower surface of layer 20 to the upper surface of layer 20 is coupled to the support 48, preferably in contact with the support 48. Figure 1 The vias 22 extending from the upper surface of layer 20 to the circuit (specifically, circuit 12) are connected to the circuit.
[0061] The support 48 is strong enough to hold the circuits 12, 14 and the via 22 in their placed positions.
[0062] Figure 3 It shows Figure 1 A cross-sectional view of another manufacturing step in an embodiment.
[0063] During this step, layer 20 is formed. Layer 20 is formed on the upper surface of the support 48, that is, on the surface where the via 22 and circuits 12 and 14 are combined. The upper surface of layer 20 is, for example, planar. The upper surface of layer 20 is located at the layer level of the upper surface of the via 22. Therefore, the upper surface of layer 20 and the upper surface of the via 22 are coplanar. Therefore, the upper surface of the via 22 (more precisely, the upper surface of the core 22a) is exposed. As previously described, layer 20 covers circuits 12 and 14 and covers the sidewalls of the via 33.
[0064] For example, layer 20 is formed using a panel embedded package (PEP) type method. For example, a panel (not shown) is placed... Figure 2 Structurally, the panel (not shown) contacts, for example, the upper surface of the through-hole 22. Therefore, the space between the panel (not shown) and the support 48 corresponds to the position of layer 20. The space between the panel (not shown) and the support 48 is then filled with resin (e.g., liquid resin). The resin is then heated to cure and takes the shape of layer 20. The panel (not shown) is then removed.
[0065] The presence of a panel (not shown) placed against the upper surface of the via 22 ensures that the upper surface of the via is not covered with resin.
[0066] Figure 4 It shows Figure 1 A cross-sectional view of another manufacturing step in an embodiment.
[0067] During this step, support 48 is removed, and stacks 24 and 28 are formed using tracks 26 and 30.
[0068] Stacks 24 and 28 are preferably formed independently. For example, Figure 4 The steps include: removing support member 48; forming one stack in the stack, for example, forming stack 24 and track 26; and then forming another stack, for example, forming stack 28 and track 30. As a variation, support member 48 may be removed after stack 24 is formed and before stack 28 is formed.
[0069] For example, forming stacks 24, 28 and corresponding conductive tracks 26, 30 includes: forming each layer of the stack; etching the layers at the locations of the tracks; and filling the locations with a conductive material (e.g., a metal).
[0070] As a variation, for example, forming stacks 24, 28 and corresponding conductive tracks 26, 30 includes: forming a hierarchy of conductive tracks, for example, by growing a metal; and then filling the hierarchy with an insulating material.
[0071] For example, after stack 28 is formed, openings 32 and 34 are formed in stack 28 by etching. As a variation, the locations of the openings can be filled with a temporary filler material that is selectively etched relative to the material of stack 28 (that is, the material of the stacked layers and the material of track 30). After stack 28 is formed, the temporary filler material is removed to expose the openings.
[0072] Figure 5 It shows Figure 1 A perspective view of another manufacturing step in an embodiment.
[0073] Figure 5 The steps illustrate the formation of component 36 and optical instruments 46 and 47. For example, this step is independent of... Figures 2 to 4 The steps are as follows. Therefore, Figure 5 The steps can be found in Figures 2 to 4 Before the steps, in Figures 2 to 4 This step can be performed after or simultaneously with the previous step.
[0074] During this step, component 36 is formed, for example, by molding resin. Therefore, component 36 is formed from a single molded resin block. Thus, component 36 is formed having openings 38 and 40, and edges 42 and 44 are formed.
[0075] Then, optical instruments 46 and 47 are placed and combined in openings 38 and 40, on edges 42 and 44.
[0076] exist Figures 2 to 5 Following the steps, the method includes the step of attaching component 36 to stack 28.
[0077] One advantage of the described embodiments is that they enable the light emitting and receiving regions 13 and 16, 18 to be coplanar.
[0078] Another advantage of the embodiment is that the sensor is compact and corrosion-resistant, and the circuitry is protected by resin.
[0079] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations can be combined, and other variations will occur to them. Specifically, the connections of circuits 12 and 14 can be different. For example, the connection of circuit 14 can be implemented through the upper surface of the circuit, that is, through via 22 and track 26, and can be implemented through vias in the chip without track 30.
[0080] Furthermore, component 36 can be replaced by another component that enables the closure of openings 32, 34 and enables the holding of the optical instrument. Component 36 can be replaced, for example, by a component made of another material.
[0081] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variations is within the capabilities of those skilled in the art.
Claims
1. A time-of-flight sensor, comprising: A light-generating circuit includes a first region configured to emit light; A light receiving circuit includes a second region configured to receive light. as well as A first resin layer encapsulates the light generating circuit and the light receiving circuit, the first resin layer having a first surface and a second surface opposite to the first surface; The first region and the second region are flush with the first surface of the first resin layer and exposed at the first surface of the first resin layer; and The first surface of the first resin layer is configured to point towards the scene.
2. The sensor according to claim 1, further comprising: A first insulating layer is stacked to cover the first surface of the first resin layer; as well as The first conductive track is located within the first insulating layer stack; The first insulating layer stack includes a first opening and a second opening; The first opening at least partially exposes the first region of the light generating circuit; The second opening at least partially exposes the second region of the light-receiving circuit; and The first conductive track is in contact with one or more circuits in the light generating circuit and the light receiving circuit.
3. The sensor according to claim 2, further comprising: The component rests against the first insulating layer stack; The component includes a third opening and a fourth opening; A first optical instrument is incorporated in the third opening and is positioned at least partially in front of the light-generating circuit; A second optical instrument is incorporated into the fourth opening and is positioned at least partially in front of the light-receiving circuit.
4. The sensor of claim 3, wherein the component is made of resin, and wherein each of the third opening and the fourth opening includes an edge, to which the first optical instrument and the second optical instrument are respectively attached.
5. The sensor of claim 4, wherein the light receiving circuit includes a third region configured to receive light, and wherein the first opening further exposes the third region, the third region being flush with the first surface of the first resin layer, and wherein a portion of the component extends over the third region.
6. The sensor according to claim 1, further comprising: A second insulating layer is stacked, covering the second surface of the first resin layer; as well as The second conductive track is located within the second insulating layer stack.
7. The sensor according to claim 6, further comprising: A conductive via is located within the first resin layer; A first insulating layer is stacked to cover the first surface of the first resin layer; as well as The first conductive track is located within the first insulating layer stack; The first insulating layer stack includes a first opening and a second opening; The first opening at least partially exposes the first region of the light generating circuit; The second opening at least partially exposes the second region of the light receiving circuit; The first conductive track is in contact with one or more circuits in the light generating circuit and the light receiving circuit; and The conductive via is electrically coupled between the first conductive track and the second conductive track.
8. The sensor according to claim 6, further comprising: A conductive via is located within the first resin layer; The conductive via electrically couples one or more circuits of the light generating circuit and the light receiving circuit to the second conductive track.
9. A method for manufacturing a time-of-flight sensor, comprising: The light generating circuit and the light receiving circuit are integrated onto the surface of the support component; The first region of the light-generating circuit is configured to emit light and face the surface. The second region of the light-receiving circuit is configured to receive light and face the surface. A first resin layer is formed on the support member, and the first resin layer encapsulates the light generating circuit and the light receiving circuit. Disassemble the support member to provide the first resin layer having a first surface and a second surface opposite to the first surface; The first region and the second region are flush with the first surface of the first resin layer and exposed at the first surface of the first resin layer; and The first surface of the first resin layer is configured to point towards the scene.
10. The method of claim 9, wherein forming the first resin layer comprises: It is formed using a panel-embedded packaging method.
11. The method of claim 9, further comprising: A first insulating layer stack is formed, the first insulating layer stack covering the first surface of the first resin layer, the first insulating layer stack including a first conductive track; A first opening is formed in the first insulating layer stack, the first opening at least partially exposing the first region of the light generating circuit; A second opening is formed in the first insulating layer stack, the second opening at least partially exposing the second region of the light receiving circuit; as well as The first conductive track is electrically connected to one or more of the light generating circuit and the light receiving circuit.
12. The method of claim 11, further comprising: A component is formed that rests against the first insulating layer stack; A third opening is formed in the component; A first optical instrument is installed in the third opening; The third opening is positioned at least partially in front of the light generating circuit; A fourth opening is formed in the component; as well as A second optical instrument is installed in the fourth opening; The fourth opening is positioned at least partially in front of the light receiving circuit.
13. The method of claim 12, wherein the component is made of resin.
14. The method of claim 12, wherein the third opening and the fourth opening each include an edge, and wherein mounting the first optical instrument and the second optical instrument comprises: The first optical instrument and the second optical instrument are respectively attached to the edges of the third opening and the fourth opening.
15. The method of claim 12, wherein forming the first opening further comprises: The first opening is extended to at least partially expose a third region of the light-receiving circuit, the third region being configured to receive light, and a portion of the component extends over the third region.
16. The method of claim 9, further comprising: A second insulating layer stack is formed, the second insulating layer stack covering the second surface of the first resin layer, the second insulating layer stack including a second conductive track.
17. The method of claim 16, further comprising: A first insulating layer stack is formed, the first insulating layer stack covering the first surface of the first resin layer, the first insulating layer stack including a first conductive track; A first opening is formed in the first insulating layer stack, the first opening at least partially exposing the first region of the light generating circuit; A second opening is formed in the first insulating layer stack, the second opening at least partially exposing the second region of the light receiving circuit; The first conductive track is electrically connected to one or more of the light generating circuit and the light receiving circuit; as well as A conductive via is formed within the first resin layer; The conductive via is coupled between the first conductive track and the second conductive track.
18. The method of claim 16, further comprising: A conductive via is formed within the first resin layer; The conductive via couples one or more circuits from the light generating circuit and the light receiving circuit to the second conductive track.
Citation Information
Patent Citations
FR2201571A1
Time-of-flight sensor
CN219641923U
Optical sensor package
US20210080547A1