Open channel gate control circuit

Abstract

This invention relates to the field of gate control technology and proposes a gate control circuit for open channels, including a gate opening detection circuit. The gate opening detection circuit includes an electromagnetic switch U1, an electromagnetic switch U2, a trigger U7, a NAND gate U8, a NAND gate U9, and a NAND gate U10. The output of electromagnetic switch U1 is connected to the input of trigger U7, the output of electromagnetic switch U2 is connected to the clock terminal of trigger U7, the input of trigger U7 is connected to the first input of NAND gate U8, the clock terminal of trigger U7 is connected to the first input of NAND gate U9, the non-inverting output of trigger U7 is connected to the second input of NAND gate U8, the inverting output of trigger U7 is connected to the second input of NAND gate U9, the output of NAND gate U8 is connected to the first input of NAND gate U10, the output of NAND gate U9 is connected to the second input of NAND gate U10, and the output of NAND gate U10 is connected to the main control unit. This technical solution solves the problem of inaccurate gate opening control in existing open channels.

Description

Technical Field

[0001] This invention relates to the field of gate control technology, specifically to open channel gate control circuits. Background Technology

[0002] In my country's water conservancy projects, water is diverted through specially constructed channels (open channels). We usually install gates on the open channel, which play a very important role. The gate opening can be controlled as needed to regulate the water level and flow rate upstream and downstream, thereby achieving benefits such as flood control, irrigation, water supply, and power generation. It can also be used to remove floating debris and silt. Therefore, accurate control of the gate opening is an important indicator for the operation and management of flood control, irrigation and other projects. The gate opening detection circuit used in existing projects has a complex structure and slow gate control response speed, resulting in inaccurate control of the open channel gate opening. Summary of the Invention

[0003] This invention proposes a control circuit for open channel gates, which solves the problem of inaccurate control of the opening degree of open channel gates in the prior art.

[0004] The technical solution of the present invention is as follows:

[0005] The open channel gate control circuit includes a motor U4, which controls the opening and closing of the gate. It also includes a gate opening detection circuit and a main control unit. The gate opening detection circuit is connected to the main control unit. The gate opening detection circuit includes a magnet, electromagnetic switches U1 and U2, a resistor R3, a switching transistor Q1, a NOT gate U5, a resistor R4, a switching transistor Q3, a NOT gate U6, a trigger U7, a NAND gate U8, a NAND gate U9, and a NAND gate U10.

[0006] The magnet is mounted on the non-rotating body. Electromagnetic switches U1 and U2 are mounted on the shaft of motor U4. The power supply terminal of electromagnetic switch U1 is connected to a 5V power supply. The output terminal of electromagnetic switch U1 is connected to the control terminal of switching transistor Q1 through resistor R3. The ground terminal of electromagnetic switch U1 is grounded. The first terminal of switching transistor Q1 is connected to the 5V power supply and the input terminal of NOT gate U5. The second terminal of switching transistor Q1 is grounded.

[0007] The power supply terminal of the electromagnetic switch U2 is connected to a 5V power supply. The output terminal of the electromagnetic switch U2 is connected to the control terminal of the switching transistor Q3 through the resistor R4. The ground terminal of the electromagnetic switch U2 is grounded. The first terminal of the switching transistor Q3 is connected to the 5V power supply and the input terminal of the NOT gate U6. The second terminal of the switching transistor Q3 is grounded.

[0008] The output of NOT gate U5 is connected to the input of flip-flop U7. The output of NOT gate U5 is connected to the first input of NAND gate U8. The output of NOT gate U6 is connected to the clock terminal of flip-flop U7. The output of NOT gate U6 is connected to the first input of NAND gate U9. The non-inverting output of flip-flop U7 is connected to the second input of NAND gate U8. The inverting output of flip-flop U7 is connected to the second input of NAND gate U9. The output of NAND gate U8 is connected to the first input of NAND gate U10. The output of NAND gate U9 is connected to the second input of NAND gate U10. The output of NAND gate U10 is connected to the first input of the main control unit.

[0009] Furthermore, the gate opening detection circuit in this invention also includes NOT gate U11 and NOT gate U13. The input terminal of NOT gate U11 is connected to the output terminal of NOT gate U5, the output terminal of NOT gate U11 is connected to the second input terminal of the main control unit, the input terminal of NOT gate U13 is connected to the output terminal of NOT gate U6, and the output terminal of NOT gate U13 is connected to the third input terminal of the main control unit.

[0010] Furthermore, the present invention also includes a motor control circuit, which includes switching transistors Q5, Q6, Q7, and Q8. The control terminal of switching transistor Q5 is connected to the first output terminal of the main control unit, the first terminal of switching transistor Q5 is connected to a 24V power supply, the second terminal of switching transistor Q5 is connected to the first terminal of the motor U4, the second terminal of switching transistor Q5 is connected to the first terminal of switching transistor Q6, the control terminal of switching transistor Q6 is connected to the second output terminal of the main control unit, and the second terminal of switching transistor Q6 is grounded.

[0011] The control terminal of the switch Q7 is connected to the third output terminal of the main control unit. The first terminal of the switch Q7 is connected to a 24V power supply. The second terminal of the switch Q7 is connected to the second terminal of the motor U4. The second terminal of the switch Q7 is connected to the first terminal of the switch Q8. The control terminal of the switch Q8 is connected to the fourth output terminal of the main control unit. The second terminal of the switch Q8 is grounded.

[0012] Furthermore, a drive circuit is provided between the motor control circuit and the main control unit in this invention. The drive circuit includes a resistor R5, a switching transistor Q2, a diode D1, a resistor R9, a switching transistor Q4, and a diode D2. The first end of the resistor R5 is connected to the first output terminal of the main control unit, and the second end of the resistor R5 is connected to the control terminal of the switching transistor Q2. The first end of the switching transistor Q2 is connected to a 9V power supply, and the second end of the switching transistor Q2 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the control terminal of the switching transistor Q5.

[0013] The first end of the resistor R9 is connected to the second output terminal of the main control unit, the second end of the resistor R9 is connected to the control terminal of the switching transistor Q4, the first end of the switching transistor Q4 is connected to a 9V power supply, the second end of the switching transistor Q4 is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the control terminal of the switching transistor Q6.

[0014] Furthermore, an isolation circuit is provided between the driving circuit and the main control unit in this invention. The isolation circuit includes resistor R12, switch Q9, resistor R11, optocoupler U3, resistor R13, resistor R14, switch Q10, and optocoupler U12. The first end of resistor R12 is connected to the first output terminal of the main control unit. The first end of resistor R12 is connected to the control terminal of switch Q10 through resistor R13. The second end of resistor R12 is connected to the first terminal of switch Q9 and the first input terminal of optocoupler U3. The second terminal of switch Q9 is grounded, and the second input terminal of optocoupler U3 is grounded. The first output terminal of optocoupler U3 is connected to a 5V power supply, and the second output terminal of optocoupler U3 is connected to the first end of resistor R5.

[0015] The first end of resistor R14 is connected to the second output terminal of the main control unit. The first end of resistor R14 is connected to the control terminal of switch Q9 through resistor R11. The second end of resistor R14 is connected to the first input terminal of optocoupler U12. The second end of resistor R14 is connected to the first terminal of switch Q10. The second terminal of switch Q10 is grounded. The second input terminal of optocoupler U12 is grounded. The first output terminal of optocoupler U12 is connected to a 5V power supply. The second output terminal of optocoupler U12 is connected to the first end of resistor R9.

[0016] The working principle and beneficial effects of this invention are as follows:

[0017] In this invention, the gate opening detection circuit is used to detect the gate opening degree. The gate is opened or closed by the forward and reverse rotation of the motor U4. Electromagnetic switches U1 and U2 are set on the rotating shaft of the motor U4, and the magnet is set on the non-rotating body near the electromagnetic switches U1 and U2. When the rotating shaft of the motor U4 rotates, the electromagnetic switches U1 and U2 pass by the magnet one after another. When the electromagnetic switches U1 and U2 pass by the magnet, a pulse signal is generated and sent to the main control unit. The main control unit can determine the gate opening degree by the number of pulses received.

[0018] Assuming that during the opening process of the open channel gate in this embodiment, electromagnetic switch U1 passes through the magnet first, followed by electromagnetic switch U2, the working principle of the gate opening detection circuit is as follows: When electromagnetic switch U1 passes through the magnet, it first outputs a high-level pulse signal to the control terminal of switch Q1, turning on switch Q1 and making the input terminal of trigger U7 high. Subsequently, electromagnetic switch U2 passes through the magnet, outputting a positive pulse signal to the control terminal of switch Q3, turning on switch Q3 and making the clock terminal of trigger U7 high. Therefore, the non-inverting output terminal of trigger U7 becomes high, NAND gate U8 outputs a low-level signal, and NAND gate U10 outputs a high-level signal. As the shaft of motor U4 rotates, electromagnetic switch U1 first moves away from the magnet. Electromagnetic switch U1 outputs a low-level signal to the control terminal of switching transistor Q1, causing Q1 to turn off. The input of trigger U7 changes from high to low. Since the clock terminal of trigger U7 is still high, the non-inverting output of trigger U7 becomes low, and the inverting output is high. Therefore, NAND gate U9 outputs a low level, and NAND gate U10 outputs a high level. When electromagnetic switch U2 moves away from the magnet, electromagnetic switch U2 outputs a low level, switching transistor Q3 turns off, and NOT gate U6 outputs a low level. At this time, both NAND gates U8 and U9 output high levels, so NAND gate U10 outputs a low level. The main control unit receives a pulse signal at this time. As the shaft of motor U4 continues to rotate, the number of pulses received by the main control unit accumulates, and the opening degree of the open channel gate is determined based on the number of pulses.

[0019] Compared to traditional gate opening detection circuits, the opening detection circuit of this invention is a digital processing circuit with a simple circuit structure. At the same time, the detection signal is a digital signal, and the processing speed of digital signals is fast. Therefore, the response speed of the circuit is improved, the control response speed of the gate is increased, and thus the opening control of the open channel gate is more accurate.

[0020] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0021] Figure 1 This is a circuit diagram of the gate opening detection circuit in this invention;

[0022] Figure 2 The waveform diagram is shown for the gate opening detection circuit in this invention.

[0023] Figure 3 This is a circuit diagram of the motor control circuit in this invention;

[0024] Figure 4 This is a circuit diagram of the driving circuit in this invention;

[0025] Figure 5This is a circuit diagram of the isolation circuit in this invention. Detailed Implementation

[0026] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0027] Example 1

[0028] like Figure 1 As shown, this embodiment proposes a control circuit for an open channel gate, including a motor U4, which controls the opening or closing of the gate. It also includes a gate opening detection circuit and a main control unit. The gate opening detection circuit is connected to the main control unit. The gate opening detection circuit includes a magnet, electromagnetic switches U1 and U2, a resistor R3, a switching transistor Q1, a NOT gate U5, a resistor R4, a switching transistor Q3, a NOT gate U6, a trigger U7, a NAND gate U8, a NAND gate U9, and a NAND gate U10. The magnet is mounted on a non-rotating body. Electromagnetic switches U1 and U2 are mounted on the shaft of motor U4. The power supply terminal of electromagnetic switch U1 is connected to a 5V power supply. The output terminal of electromagnetic switch U1 is connected to the control terminal of switching transistor Q1 through resistor R3. The ground terminal of electromagnetic switch U1 is grounded. The first terminal of switching transistor Q1 is connected to a 5V power supply and the first terminal of switching transistor Q1 is connected to the input terminal of NOT gate U5. The second terminal of switching transistor Q1 is grounded. The power supply terminal of switch U2 is connected to a 5V power supply. The output terminal of electromagnetic switch U2 is connected to the control terminal of switch transistor Q3 through resistor R4. The ground terminal of electromagnetic switch U2 is grounded. The first terminal of switch transistor Q3 is connected to a 5V power supply. The first terminal of switch transistor Q3 is connected to the input terminal of NOT gate U6. The second terminal of switch transistor Q3 is grounded. The output terminal of NOT gate U5 is connected to the input terminal of flip-flop U7. The output terminal of NOT gate U5 is connected to the first input terminal of NAND gate U8. The output terminal of NOT gate U6 is connected to the clock terminal of flip-flop U7. The output terminal of NOT gate U6 is connected to the first input terminal of NAND gate U9. The non-inverting output terminal of flip-flop U7 is connected to the second input terminal of NAND gate U8. The inverting output terminal of flip-flop U7 is connected to the second input terminal of NAND gate U9. The output terminal of NAND gate U8 is connected to the first input terminal of NAND gate U10. The output terminal of NAND gate U9 is connected to the second input terminal of NAND gate U10. The output terminal of NAND gate U10 is connected to the first input terminal of the main control unit.

[0029] In this embodiment, the gate opening detection circuit is used to detect the gate opening degree. The gate is opened or closed by the forward and reverse rotation of the motor U4. Electromagnetic switches U1 and U2 are set on the rotating shaft of the motor U4, and the magnet is set on the non-rotating body near the electromagnetic switches U1 and U2. When the rotating shaft of the motor U4 rotates, the electromagnetic switches U1 and U2 pass by the magnet one after another. When the electromagnetic switches U1 and U2 pass by the magnet, a pulse signal is generated and sent to the main control unit. The main control unit can determine the gate opening degree by the number of pulses received.

[0030] Assuming that in this embodiment, during the opening process of the open channel gate, electromagnetic switch U1 passes through the magnet first, followed by electromagnetic switch U2, the specific working principle of the gate opening detection circuit is as follows: When the gate opens, the motor shaft drives electromagnetic switches U1 and U2 to rotate. When electromagnetic switch U1 passes through the magnet, it first outputs a high-level pulse signal to the control terminal of switch Q1, turning on switch Q1. The input terminal of NOT gate U5 is low, and the output terminal of NOT gate U5 becomes high. Therefore, trigger U... When the input of 7 is high, electromagnetic switch U2 passes through the magnet and outputs a positive pulse signal to the control terminal of switch Q3, turning on switch Q3. The input of NOT gate U6 is low, and the output of NOT gate U6 is high. The clock terminal of flip-flop U7 becomes high, so the non-inverting output of flip-flop U7 becomes high. At this time, the first input and the second input of NAND gate U8 are both high, and NAND gate U8 outputs a low-level signal, while NAND gate U10 outputs a high-level signal.

[0031] As the shaft of motor U4 rotates, electromagnetic switch U1 first moves away from the magnet. Electromagnetic switch U1 outputs a low-level signal to the control terminal of switching transistor Q1, turning off switching transistor Q1. The input terminal of NOT gate U5 becomes high-level, and the output of NOT gate U5 becomes low-level. The input terminal of flip-flop U7 changes from high-level to low-level. Since the clock terminal of flip-flop U7 is still high-level at this time, the non-inverting output terminal of flip-flop U7 becomes low-level, and the inverting output terminal of flip-flop U7 becomes high-level. Therefore, NAND gate U9 outputs low-level, and NAND gate U10 outputs high-level. When electromagnetic switch U2 moves away from the magnet, electromagnetic switch U2 outputs low-level, switching transistor Q3 turns off, and NOT gate U6 outputs low-level. At this time, both NAND gates U8 and U9 output high-level, so NAND gate U10 outputs low-level. At this time, the main control unit receives a pulse signal. As the shaft of motor U4 continues to rotate, the number of pulses received by the main control unit accumulates, and the opening degree of the open channel gate is determined based on the number of pulses.

[0032] Compared to traditional gate opening detection circuits, the circuit structure in this embodiment is simpler, and the detection signal is a digital signal. Digital signals have a faster processing speed, thus improving the circuit's response speed and making the opening control of the open channel gate more precise. To further improve the accuracy of the gate opening, the number of magnets can be appropriately increased.

[0033] In this embodiment, NPN transistors are used as switches Q1 and Q3. The base of the NPN transistor is the control terminal of switches Q1 and Q3, the collector of the NPN transistor is the first terminal of switches Q1 and Q3, and the emitter of the NPN transistor is the second terminal of switches Q1 and Q3. A D flip-flop is used as flip-flop U7. The input terminal of the D flip-flop is the D pin of flip-flop U7, and the clock terminal of the D flip-flop is the CLK pin of flip-flop U7.

[0034] like Figure 1 As shown, the gate opening detection circuit in this embodiment also includes NOT gate U11 and NOT gate U13. The input terminal of NOT gate U11 is connected to the output terminal of NOT gate U5, the output terminal of NOT gate U11 is connected to the second input terminal of the main control unit, the input terminal of NOT gate U13 is connected to the output terminal of NOT gate U6, and the output terminal of NOT gate U13 is connected to the third input terminal of the main control unit.

[0035] Assuming that motor U4 rotates forward when electromagnetic switch U1 passes the magnet first, and motor U4 rotates in reverse when electromagnetic switch U2 passes the magnet first, the direction of motor U4 rotation can be determined by judging the relationship between the output pulse signals of electromagnetic switches U1 and U2.

[0036] During forward rotation, NOT gate U5 outputs a high level first, therefore NOT gate U11 outputs a low level signal to the main control unit first. At this time, NOT gate U16 outputs a low level, and NOT gate U13 outputs a high level to the main control unit. Subsequently, NOT gate U13 changes from a high level to a low level signal to the main control unit. During reverse rotation, NOT gate U6 outputs a high level first, therefore NOT gate U13 outputs a low level signal to the main control unit first. At this time, NOT gate U5 outputs a low level, and NOT gate U11 outputs a high level to the main control unit. Subsequently, NOT gate U11 changes from a high level to a low level signal to the main control unit.

[0037] Therefore, the main control unit determines whether the motor U4 is rotating forward or backward based on the order in which it receives the high-level signals from NOT gate U11 and NOT gate U13, thus ensuring the reliable operation of motor U4.

[0038] like Figure 3As shown, this embodiment also includes a motor control circuit, which includes switching transistors Q5, Q6, Q7, and Q8. The control terminal of switching transistor Q5 is connected to the first output terminal of the main control unit, and the first terminal of switching transistor Q5 is connected to a 24V power supply. The second terminal of switching transistor Q5 is connected to the first terminal of motor U4. The second terminal of switching transistor Q5 is connected to the first terminal of switching transistor Q6. The control terminal of switching transistor Q6 is connected to the second output terminal of the main control unit, and the second terminal of switching transistor Q6 is grounded. The control terminal of switching transistor Q7 is connected to the third output terminal of the main control unit, and the first terminal of switching transistor Q7 is connected to a 24V power supply. The second terminal of switching transistor Q7 is connected to the second terminal of motor U4. The second terminal of switching transistor Q7 is connected to the first terminal of switching transistor Q8. The control terminal of switching transistor Q8 is connected to the fourth output terminal of the main control unit, and the second terminal of switching transistor Q8 is grounded.

[0039] In this embodiment, the motor control circuit controls the forward and reverse rotation of motor U4, thereby realizing the opening and closing of the open channel gate. Switches Q5, Q6, Q7, and Q8 form an H-bridge. When motor U4 rotates forward, the main control unit outputs two identical PWM control signals, which are respectively applied to the control terminals of switches Q5 and Q8. When the PWM control signal is high, both switches Q5 and Q8 are turned on, and the 24V voltage reaches ground through switches Q5, motor U4, and switches Q8, energizing motor U4 and causing it to start rotating forward. When the PWM control signal is low, both switches Q5 and Q8 are turned off. When the gate is de-energized, motor U4 remains in forward rotation due to the inertia of its rotor. When the PWM control signal goes high again, motor U4 is energized again, thus forming a cycle. Similarly, when motor U4 reverses, the main control unit outputs two identical PWM control signals, which are applied to the control terminals of switching transistors Q7 and Q6 respectively. When the PWM control signal is high, both switching transistors Q7 and Q6 are turned on, and the 24V voltage reaches ground through switching transistor Q7, motor U4, and switching transistor Q6, energizing motor U4 and causing it to reverse. When the gate opening reaches the designed set value, the main control unit stops outputting the PWM control signal.

[0040] like Figure 4As shown, in this embodiment, a drive circuit is also provided between the motor control circuit and the main control unit. The drive circuit includes a resistor R5, a switch Q2, a diode D1, a resistor R9, a switch Q4, and a diode D2. The first end of the resistor R5 is connected to the first output terminal of the main control unit, and the second end of the resistor R5 is connected to the control terminal of the switch Q2. The first end of the switch Q2 is connected to a 9V power supply, and the second end of the switch Q2 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the control terminal of the switch Q5. The first end of the resistor R9 is connected to the second output terminal of the main control unit, and the second end of the resistor R9 is connected to the control terminal of the switch Q4. The first end of the switch Q4 is connected to a 9V power supply, and the second end of the switch Q4 is connected to the anode of the diode D2. The cathode of the diode D2 is connected to the control terminal of the switch Q6.

[0041] In this embodiment, because the driving capability of the PWM control signal is weak and cannot directly drive the switching transistors forming the H-bridge, a driving circuit is added to improve the driving capability of the PWM control signal. This embodiment includes four driving circuits with identical circuit structures, used to drive switching transistors Q5, Q6, Q7, and Q8 respectively. Taking the driving circuit for switching transistors Q5 and Q6 as an example, when motor U4 rotates forward, the main control unit outputs a PWM control signal through resistor R5 to the control terminal of switching transistor Q2, turning on Q2. The 9V power supply is then applied to the control terminal of switching transistor Q5 through switching transistor Q2 and diode D1, while switching transistor Q4 is turned off. Therefore, the control terminal of switching transistor Q6 is at a low level. Similarly, when motor U4 rotates in reverse, switching transistor Q2 is turned off, and switching transistor Q4 is turned on.

[0042] like Figure 5 As shown, in this embodiment, an isolation circuit is also provided between the drive circuit and the main control unit. The isolation circuit includes resistor R12, switch Q9, resistor R11, optocoupler U3, resistor R13, resistor R14, switch Q10, and optocoupler U12. The first end of resistor R12 is connected to the first output terminal of the main control unit. The first end of resistor R12 is connected to the control terminal of switch Q10 through resistor R13. The second end of resistor R12 is connected to the first terminal of switch Q9 and the first input terminal of optocoupler U3. The second terminal of switch Q9 is grounded, and the second input terminal of optocoupler U3 is grounded. The first output terminal of optocoupler U3 is connected to a 5V power supply. The second output terminal of optocoupler U3 is connected to the first terminal of resistor R5. The first terminal of resistor R14 is connected to the second output terminal of the main control unit. The first terminal of resistor R14 is connected to the control terminal of switch Q9 through resistor R11. The second terminal of resistor R14 is connected to the first input terminal of optocoupler U12. The second terminal of resistor R14 is connected to the first terminal of switch Q10. The second terminal of switch Q10 is grounded. The second input terminal of optocoupler U12 is grounded. The first output terminal of optocoupler U12 is connected to a 5V power supply. The second output terminal of optocoupler U12 is connected to the first terminal of resistor R9.

[0043] In practical applications, the electrical signal at the control terminal of motor U4 may interfere with the main control unit, preventing the main control unit from working properly. Since the operating voltage of motor U4 is high, this high voltage signal may damage the main control unit. To prevent mutual interference between signals, an isolation circuit is added in this embodiment.

[0044] The specific working principle of the isolation circuit is as follows: When motor U4 rotates forward, the main control unit outputs a PWM control signal to the first terminal of switching transistor Q9, and simultaneously applies it to the control terminal of switching transistor Q10. Switching transistor Q10 is turned on, and the first and second input terminals of optocoupler U12 are grounded. Therefore, optocoupler U12 is turned off, switching transistor Q9 is turned off, the PWM control signal is applied to the first input terminal of optocoupler U3, optocoupler U3 is turned on, and optocoupler U3 outputs a high-level signal to the first terminal of resistor R5.

[0045] When motor U4 rotates forward, the main control unit outputs a PWM control signal to the first terminal of switching transistor Q10 and simultaneously to the control terminal of switching transistor Q9. Switching transistor Q9 is turned on, and both the first and second input terminals of optocoupler U3 are grounded. Therefore, optocoupler U3 is turned off, switching transistor Q10 is turned off, and the PWM control signal is applied to the first input terminal of optocoupler U12. Optocoupler U12 is turned on, and optocoupler U12 outputs a high-level signal to the first terminal of resistor R9.

[0046] The isolation circuit in this embodiment can play an interlocking role. When the motor U4 rotates forward, it ensures that the optocoupler U3 is on and the optocoupler U12 is off. When the motor U4 rotates in reverse, it ensures that the optocoupler U3 is off and the optocoupler U12 is on, thus preventing the motor U4 from performing both forward and reverse rotation at the same time.

[0047] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A control circuit for an open channel gate, including a motor U4, wherein the motor U4 is used to control the opening or closing of the gate, characterized in that, It also includes a gate opening detection circuit and a main control unit. The gate opening detection circuit is connected to the main control unit. The gate opening detection circuit includes a magnet, electromagnetic switches U1 and U2, resistor R3, switching transistor Q1, NOT gate U5, resistor R4, switching transistor Q3, NOT gate U6, trigger U7, NAND gate U8, NAND gate U9, and NAND gate U10. The magnet is mounted on the non-rotating body. Electromagnetic switches U1 and U2 are mounted on the shaft of motor U4. The power supply terminal of electromagnetic switch U1 is connected to a 5V power supply. The output terminal of electromagnetic switch U1 is connected to the control terminal of switching transistor Q1 through resistor R3. The ground terminal of electromagnetic switch U1 is grounded. The first terminal of switching transistor Q1 is connected to the 5V power supply and the input terminal of NOT gate U5. The second terminal of switching transistor Q1 is grounded. The power supply terminal of the electromagnetic switch U2 is connected to a 5V power supply. The output terminal of the electromagnetic switch U2 is connected to the control terminal of the switching transistor Q3 through the resistor R4. The ground terminal of the electromagnetic switch U2 is grounded. The first terminal of the switching transistor Q3 is connected to the 5V power supply and the input terminal of the NOT gate U6. The second terminal of the switching transistor Q3 is grounded. The output of NOT gate U5 is connected to the input of flip-flop U7, the output of NOT gate U5 is connected to the first input of NAND gate U8, the output of NOT gate U6 is connected to the clock terminal of flip-flop U7, the output of NOT gate U6 is connected to the first input of NAND gate U9, the non-inverting output of flip-flop U7 is connected to the second input of NAND gate U8, the inverting output of flip-flop U7 is connected to the second input of NAND gate U9, the output of NAND gate U8 is connected to the first input of NAND gate U10, the output of NAND gate U9 is connected to the second input of NAND gate U10, and the output of NAND gate U10 is connected to the first input of the main control unit. The gate opening detection circuit also includes NOT gate U11 and NOT gate U13. The input terminal of NOT gate U11 is connected to the output terminal of NOT gate U5, the output terminal of NOT gate U11 is connected to the second input terminal of the main control unit, the input terminal of NOT gate U13 is connected to the output terminal of NOT gate U6, and the output terminal of NOT gate U13 is connected to the third input terminal of the main control unit.

2. The open channel gate control circuit according to claim 1, characterized in that, It also includes a motor control circuit, which comprises switching transistors Q5, Q6, Q7, and Q8. The control terminal of switching transistor Q5 is connected to the first output terminal of the main control unit, and the first terminal of switching transistor Q5 is connected to a 24V power supply. The second terminal of switching transistor Q5 is connected to the first terminal of motor U4, and the second terminal of switching transistor Q5 is connected to the first terminal of switching transistor Q6. The control terminal of switching transistor Q6 is connected to the second output terminal of the main control unit, and the second terminal of switching transistor Q6 is grounded. The control terminal of the switch Q7 is connected to the third output terminal of the main control unit. The first terminal of the switch Q7 is connected to a 24V power supply. The second terminal of the switch Q7 is connected to the second terminal of the motor U4. The second terminal of the switch Q7 is connected to the first terminal of the switch Q8. The control terminal of the switch Q8 is connected to the fourth output terminal of the main control unit. The second terminal of the switch Q8 is grounded.

3. The open channel gate control circuit according to claim 2, characterized in that, A drive circuit is also provided between the motor control circuit and the main control unit. The drive circuit includes a resistor R5, a switching transistor Q2, a diode D1, a resistor R9, a switching transistor Q4, and a diode D2. The first end of resistor R5 is connected to the first output terminal of the main control unit, and the second end of resistor R5 is connected to the control terminal of the switching transistor Q2. The first end of the switching transistor Q2 is connected to a 9V power supply, and the second end of the switching transistor Q2 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the control terminal of the switching transistor Q5. The first end of the resistor R9 is connected to the second output terminal of the main control unit, the second end of the resistor R9 is connected to the control terminal of the switching transistor Q4, the first end of the switching transistor Q4 is connected to a 9V power supply, the second end of the switching transistor Q4 is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the control terminal of the switching transistor Q6.

4. The open channel gate control circuit according to claim 3, characterized in that, An isolation circuit is also provided between the drive circuit and the main control unit. This isolation circuit includes resistor R12, switch Q9, resistor R11, optocoupler U3, resistor R13, resistor R14, switch Q10, and optocoupler U12. The first end of resistor R12 is connected to the first output terminal of the main control unit. The first end of resistor R12 is connected to the control terminal of switch Q10 through resistor R13. The second end of resistor R12 is connected to the first terminal of switch Q9 and the first input terminal of optocoupler U3. The second terminal of switch Q9 is grounded, and the second input terminal of optocoupler U3 is grounded. The first output terminal of optocoupler U3 is connected to a 5V power supply, and the second output terminal of optocoupler U3 is connected to the first end of resistor R5. The first end of resistor R14 is connected to the second output terminal of the main control unit. The first end of resistor R14 is connected to the control terminal of switch Q9 through resistor R11. The second end of resistor R14 is connected to the first input terminal of optocoupler U12. The second end of resistor R14 is connected to the first terminal of switch Q10. The second terminal of switch Q10 is grounded. The second input terminal of optocoupler U12 is grounded. The first output terminal of optocoupler U12 is connected to a 5V power supply. The second output terminal of optocoupler U12 is connected to the first end of resistor R9.

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