Marine low speed diesel engine rotation speed simulation device

By combining the speed generation module and the absolute encoder signal generation module, the problems of high cost and low accuracy in the existing technology are solved, and high-precision simulation of multiple speed signals is realized, which meets the needs of marine low-speed electromechanical control systems, reduces manufacturing costs and improves system safety.

CN116643596BActive Publication Date: 2025-11-04CSSC POWER INST CO LTD +1
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Patent Information

Application Number
CN202310801561.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-30
Publication Date
2025-11-04
Estimated Expiration
2043-06-30

AI Technical Summary

Technical Problem

In the existing technology, marine engine speed simulation devices are costly and have dimensional deviations in their mechanical structure, which cannot meet the requirements for multiple high-level speed outputs, and general-purpose signal generators cannot output 24V speed signals.

Method used

By employing a speed generation module and an absolute encoder signal generation module, and controlling the output of multiple speed signals through a control module, the simulation of multiple speed signals is achieved, avoiding mechanical structures and reducing costs.

Benefits of technology

It achieves high-precision simulation of multiple speed signals, meets the requirements of marine low-speed electromechanical control systems, reduces manufacturing costs, and improves signal accuracy and system safety.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the present application discloses a kind of marine low-speed diesel engine speed simulation device.The marine low-speed diesel engine speed simulation device includes at least two speed generation modules, at least one absolute value encoder signal generation module and control module;Speed generation module and absolute value encoder signal generation module are connected with control module, control module is used to control the first running signal of speed generation module simulation low-speed diesel engine after starting, control module is also used to control the second running signal of absolute value encoder signal generation module simulation low-speed diesel engine during starting process.Compared with prior art, the marine low-speed diesel engine speed simulation device proposed in the present scheme has no mechanical structure, low manufacturing cost, can meet the demand of marine electromechanical control system test to multiple speed signals, and is easy to realize.
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Description

Technical Field

[0001] The present invention relates to the field of marine engine speed measurement technology, and in particular to a marine low-speed diesel engine speed simulation device. Background Technology

[0002] Hardware-in-the-loop (HIL) simulation testing is a necessary step in the development of marine low-speed electromechanical control systems. After the software and hardware development of the marine engine electronic control system is completed, before conducting actual engine testing, the control system's functions and performance can be tested on a HIL simulation test platform. This includes extreme condition tests that cannot be performed on a real engine, such as overload and fault simulation. Compared to actual engine testing, it offers higher safety, reliability, and economy. The HIL test platform is a semi-physical engine simulation platform, where simulating engine speed and phase is a crucial aspect of HIL testing.

[0003] Current technology uses an engine speed measurement system with a toothed sprocket to simulate engine speed. This technology is costly and has inherent dimensional deviations in its mechanical structure. Alternatively, a commercially available signal generator can be used to simulate engine speed signals. However, this generator can only output one pulse-width modulation signal with a maximum level of 10V, which cannot meet the requirement of marine engine speed measurement for four high-level 24V speed outputs. Summary of the Invention

[0004] This invention provides a marine low-speed diesel engine speed simulation device to reduce the testing cost of marine engine electronic control systems and meet the testing requirements of marine electromechanical control systems for multiple speed signals.

[0005] In a first aspect, embodiments of the present invention provide a marine low-speed diesel engine speed simulation device, which includes at least two speed generation modules, at least one absolute encoder signal generation module, and a control module.

[0006] Both the speed generating module and the absolute encoder signal generating module are connected to the control module. The control module is used to control the speed generating module to simulate the first operating signal after the low-speed diesel engine starts. The control module is also used to control the absolute encoder signal generating module to simulate the second operating signal during the low-speed diesel engine startup process.

[0007] Optionally, the speed generating module includes a first switching unit, a second switching unit, and a first load terminal;

[0008] The control module is connected to the first switch unit, and the control module is used to control the first switch unit to generate a first control signal; the first switch unit is connected to the second switch unit, and the second switch unit is used to generate a first operating signal according to the first control signal; the second switch unit is connected to the first load terminal, and the first load terminal is connected to the marine low-speed electromechanical control system, and the first load terminal is used to transmit the first operating signal to the marine low-speed electromechanical control system.

[0009] Optionally, the first switching unit includes a first resistor, a second resistor, and a first transistor;

[0010] The first end of the first resistor is connected to the control module, the second end of the first resistor and the first end of the second resistor are both connected to the base of the first transistor, the second end of the second resistor is grounded with the emitter of the first transistor, and the collector of the first transistor is connected to the second switching unit.

[0011] Optionally, the second switching unit includes a third resistor, a fourth resistor, a second transistor, and a fifth resistor;

[0012] The first end of the third resistor is connected to the first switching unit. The second end of the third resistor and the first end of the fourth resistor are both connected to the base of the second transistor. The second end of the fourth resistor and the emitter of the second transistor are connected to a first fixed potential. The collector of the second transistor is connected to the first end of the fifth resistor. The second end of the fifth resistor is grounded.

[0013] Optionally, the absolute encoder signal generation module includes a digital-to-analog conversion unit, a data processing unit, a current loop transmission unit, and a second load terminal;

[0014] The digital-to-analog converter (DAC) is connected to the control module, which sends a first digital data signal to the DAC. The DAC converts the first data signal into a second analog data signal. The DAC is also connected to the current loop transmitter, which supplies power to the DAC. A first and second terminal of the data processing unit are connected to the DAC. The data processing unit processes the second data signal to obtain a third data signal. The first and third terminals of the data processing unit are connected to the current loop transmitter, which processes the third data signal to obtain a second operating signal. The current loop transmitter is connected to a second load terminal, which is connected to the marine low-speed electromechanical control system. The second load terminal transmits the second operating signal to the marine low-speed electromechanical control system.

[0015] Optionally, the digital-to-analog conversion unit includes a digital-to-analog conversion chip;

[0016] The digital-to-analog converter chip includes a power supply terminal, a digital data input terminal, a reference voltage terminal, an analog data output terminal, and a data feedback terminal;

[0017] The power supply terminal of the digital-to-analog converter chip is connected to the current loop transmitting unit, the digital data input terminal of the digital-to-analog converter chip is connected to the control module, the reference voltage terminal of the digital-to-analog converter chip is connected to the first terminal of the data processing unit, and the analog data output terminal and data feedback terminal of the digital-to-analog converter chip are both connected to the second terminal of the data processing unit.

[0018] Optionally, the data processing unit includes a sixth resistor, a seventh resistor, a first capacitor, and an eighth resistor;

[0019] The first end of the seventh resistor is connected to the first end of the first capacitor and serves as the first end of the data processing unit; the first end of the sixth resistor serves as the second end of the data processing unit; the second end of the first capacitor is connected to the first end of the eighth resistor, and the second ends of the sixth resistor and the seventh resistor are both connected to the second end of the eighth resistor and serve as the third end of the data processing unit.

[0020] Optionally, the current loop transmitting unit includes a current loop transmitting chip and a third transistor;

[0021] The current loop transmitting chip includes a power supply terminal, a reference voltage terminal, an input terminal, a power supply terminal, a base terminal, a transmitter terminal, and an output terminal.

[0022] The power supply terminal of the current loop transmitting chip is connected to the power supply terminal of the digital-to-analog converter chip. The reference voltage terminal of the digital-to-analog converter chip and the first terminal of the data processing unit are both connected to the reference voltage terminal of the current loop transmitting chip. The input terminal of the current loop transmitting chip is connected to the third terminal of the data processing unit. The power supply terminal of the current loop transmitting chip and the collector of the third transistor are both connected to the second fixed potential. The base terminal of the current loop transmitting chip is connected to the base of the third transistor. The emitter terminal of the current loop transmitting chip is connected to the emitter of the third transistor. The output terminal of the current loop transmitting chip is connected to the second load terminal.

[0023] Optionally, the absolute encoder signal generation module further includes a protection unit;

[0024] The power supply terminal of the current loop transmitting chip and the collector of the third transistor are both connected to the first terminal of the protection unit. The output terminal of the current loop transmitting chip is connected to the second terminal of the protection unit, and the third terminal of the protection unit is connected to the second load terminal.

[0025] The protection unit is used to filter out noise signals doped into the second operating signal and to prevent external electrostatic input.

[0026] Optionally, the protection unit includes a rectifier bridge, a first ferrite bead, a second ferrite bead, a second capacitor, and a transient suppression diode;

[0027] The first pin of the rectifier bridge serves as the first terminal of the protection unit, the second pin of the rectifier bridge serves as the second terminal of the protection unit, the third pin of the rectifier bridge is connected to the first terminal of the first ferrite bead, the fourth pin of the rectifier bridge is connected to the first terminal of the second ferrite bead, the second terminal of the first ferrite bead and the first terminal of the second capacitor are both connected to the first terminal of the transient suppression diode, and the second terminal of the second ferrite bead, the second terminal of the second capacitor and the second terminal of the transient suppression diode are both connected to the second terminal of the transient suppression diode and serve as the third terminal of the protection unit.

[0028] The marine low-speed diesel engine speed simulation device proposed in this embodiment employs a control module that can control the speed generation module to output a first operating signal simulating the start-up of the low-speed diesel engine, and control the absolute encoder signal generation module to output a second operating signal simulating the start-up process of the low-speed diesel engine. Therefore, compared to existing technologies, the marine low-speed diesel engine speed simulation device proposed in this solution has no mechanical structure, resulting in low manufacturing costs and ease of implementation. Furthermore, the marine low-speed diesel engine speed simulation device has multiple speed generation modules, which can meet the requirements of marine low-speed electromechanical control systems for multiple first operating signals. The first operating signal output by the speed generation module for simulating the start-up of the low-speed diesel engine and the second operating signal output by the absolute encoder signal generation module for simulating the start-up process of the low-speed diesel engine have higher accuracy than the operating signals of low-speed diesel engines simulated by mechanical structures in existing technologies. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the structure of a marine low-speed diesel engine speed simulation device provided in an embodiment of the present invention;

[0031] Figure 2 This is a schematic diagram of the structure of a speed generating module provided in an embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of another speed generating module provided in an embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram of the structure of an absolute encoder signal generation module provided in an embodiment of the present invention;

[0034] Figure 5 This is a schematic diagram of another absolute encoder signal generation module provided in an embodiment of the present invention;

[0035] Figure 6 This is a schematic diagram of another absolute encoder signal generation module provided in an embodiment of the present invention. Detailed Implementation

[0036] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0037] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0038] This invention provides a device for simulating the speed of a marine low-speed diesel engine. Figure 1 This is a schematic diagram of a marine low-speed diesel engine speed simulation device provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the marine low-speed diesel engine speed simulation device includes at least two speed generation modules 110, at least one absolute encoder signal generation module 120, and a control module 130.

[0039] The speed generating module 110 and the absolute encoder signal generating module 120 are both connected to the control module 130. The control module 130 is used to control the speed generating module 110 to simulate the first operating signal after the low-speed diesel engine starts. The control module 130 is also used to control the absolute encoder signal generating module 120 to simulate the second operating signal during the low-speed diesel engine start-up process.

[0040] The control module 130 is the core control component of the marine low-speed diesel engine speed simulation device, and it can be an industrial-grade microcontroller. The speed generation module 110 and the absolute encoder signal generation module 120 are the execution components of the device. The speed generation module 110 simulates the engine speed signal output by the Hall sensor in the engine speed measurement system. Any two speed generation modules 110 form a group, and speed generation modules in different groups are redundant. The absolute encoder signal generation module 120 simulates the engine speed and phase output by the absolute encoder in the engine speed measurement system during the engine start-up process.

[0041] Specifically, the control module 130 can be connected to the speed generation module 110 via general-purpose input / output pins or timing pins, enabling the speed generation module 110 to simulate the first operating signal generated after the low-speed diesel engine starts under the control of the control module 130. The first operating signal includes the speed, phase, and direction of rotation of the low-speed diesel engine after startup, and is a pulse signal group with a missing tooth information within a period. The control module 130 can also be connected to the absolute encoder signal generation module 120 via a serial peripheral interface, enabling the absolute encoder signal generation module 120 to simulate the second operating signal generated during the low-speed diesel engine startup process under the control of the control module 130. The second operating signal includes the speed, phase, and direction of rotation of the low-speed diesel engine during startup.

[0042] Based on the above connection relationships, the process of using a marine low-speed diesel engine speed simulation device to test the marine low-speed electromechanical control system is as follows: Two speed generation modules 110 are randomly selected and connected to the marine low-speed electromechanical control system. The control module 130 sends engine speed signals with a 1 / 4 phase difference to the speed generation modules 110, controlling the two speed generation modules 110 to generate first operating signals with a 1 / 4 phase difference. The marine low-speed electromechanical control system receives the two first operating signals with a 1 / 4 phase difference and calculates the speed, phase, and direction of rotation of the low-speed diesel engine after startup based on these signals. One absolute encoder signal generation module 120 is randomly selected and connected to the marine low-speed electromechanical control system. The control module 130 controls the absolute encoder signal generation module 120 to simulate a second operating signal during the low-speed diesel engine startup process and sends it to the low-speed electromechanical control system. The low-speed electromechanical control system can calculate the speed, phase, and direction of rotation of the low-speed diesel engine during startup based on the second operating signal.

[0043] The control module 130 of the marine low-speed diesel engine speed simulation device proposed in this embodiment can control the speed generation module 110 to output a first operating signal simulating the start-up of the low-speed diesel engine, and control the absolute encoder signal generation module 120 to output a second operating signal simulating the start-up process of the low-speed diesel engine. Therefore, compared with the prior art, the marine low-speed diesel engine speed simulation device proposed in this solution has no mechanical structure, low manufacturing cost, and is easy to implement. In addition, the marine low-speed diesel engine speed simulation device has a multi-channel speed generation module 110, which can meet the requirements of the marine low-speed electromechanical control system for multiple first operating signals. The first operating signal output by the speed generation module 110 for simulating the start-up of the low-speed diesel engine and the second operating signal output by the absolute encoder signal generation module 120 for simulating the start-up process of the low-speed diesel engine have higher accuracy than the operating signals of the low-speed diesel engine simulated by the mechanical structure in the prior art.

[0044] Figure 2 This is a schematic diagram of the structure of a speed generating module provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the speed generating module 110 includes a first switching unit 111, a second switching unit 112, and a first load terminal 113;

[0045] The control module 130 is connected to the first switch unit 111, and the control module 130 is used to control the first switch unit 111 to generate a first control signal; the first switch unit 111 is connected to the second switch unit 112, and the second switch unit 112 is used to generate a first operating signal according to the first control signal; the second switch unit 112 is connected to the first load terminal 113, and the first load terminal 113 is connected to the marine low-speed electromechanical control system 200, and the first load terminal 113 is used to transmit the first operating signal to the marine low-speed electromechanical control system 200.

[0046] Exemplarily, based on the above embodiments, Figure 3 This is a schematic diagram of another speed generating module 110 provided in an embodiment of the present invention, as shown below. Figure 3 As shown, the first switching unit 111 includes a first resistor R1, a second resistor R2, and a first transistor Q1; the second switching unit 112 includes a third resistor R3, a fourth resistor R4, a second transistor Q2, and a fifth resistor R5.

[0047] The first end of the first resistor R1 is connected to the control module 130. The second end of the first resistor R1 and the first end of the second resistor R2 are both connected to the base of the first transistor. The second end of the second resistor R2 is grounded with the emitter of the first transistor Q1. The collector of the first transistor Q1 is connected to the second switching unit 112.

[0048] The first end of the third resistor R3 is connected to the first switching unit 111. The second end of the third resistor R3 and the first end of the fourth resistor R4 are both connected to the base of the second transistor Q2. The second end of the fourth resistor R4 and the emitter of the second transistor Q2 are connected to the first fixed potential 210. The collector of the second transistor Q2 is connected to the first end of the fifth resistor R5. The second end of the fifth resistor R5 is grounded.

[0049] Figure 3In this circuit, the first resistor R1 is a current-limiting resistor, which limits the current flowing into the base of the first transistor Q1 to prevent excessive current from burning out Q1. The second resistor R2 is a pull-down resistor, which pulls the potential of the base of the first transistor Q1 low when there is no input signal. The third resistor R3 is a current-limiting resistor, which limits the current flowing into the base of the second transistor Q2 to prevent excessive current from burning out Q2. The fourth resistor R4 is a pull-up resistor, which pulls the potential of the base of the second transistor Q2 high when the first transistor Q1 is not conducting. The fifth resistor R5 is a current-limiting resistor, which limits the current flowing through the emitter and collector of the second transistor Q2 when the emitter and collector are conducting to prevent excessive current from burning out Q2.

[0050] Based on the above connection relationship, the operation of the speed generating module 110 is as follows: The low-speed electromechanical control system is connected between the two terminals of the first load terminal 113. When the control module 130 outputs a high level, the first transistor Q1 is turned on, and then the second transistor Q2 is turned on, so the end of the first load terminal 113 connected to the collector of the second transistor Q2 is at a high level. When the control module 130 outputs a low level, the first transistor Q1 is turned off, and then the second transistor Q2 is turned off, so the end of the first load terminal 113 connected to the collector of the second transistor Q2 is at a low level.

[0051] Exemplarily, based on the above embodiments, Figure 4 This is a schematic diagram of the structure of an absolute encoder signal generation module provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the absolute encoder signal generation module 120 includes a digital-to-analog conversion unit 121, a data processing unit 122, a current loop transmission unit 123, and a second load terminal 124.

[0052] The analog-to-digital converter 121 is connected to the control module 130, which sends a first digital data signal to the converter 121. The converter 121 converts the first data signal into a second analog data signal. The converter 121 is also connected to a current loop transmitter 123, which supplies power to the converter. The first and second terminals of the data processing unit 122 are connected to the converter 121. The data processing unit 122 processes the second data signal to obtain a third data signal. The first and third terminals of the data processing unit 122 are connected to the current loop transmitter 123, which processes the third data signal to obtain a second operating signal. The current loop transmitter 123 is connected to a second load terminal 124, which is connected to the marine low-speed electromechanical control system 200. The second load terminal 124 transmits the second operating signal to the marine low-speed electromechanical control system 200.

[0053] Exemplarily, based on the above embodiments, Figure 5 This is a schematic diagram of another absolute encoder signal generation module provided in an embodiment of the present invention, as shown below. Figure 5 The digital-to-analog converter unit 121 shown includes a digital-to-analog converter chip U1; the digital-to-analog converter chip U1 includes a power supply terminal A, a digital data input terminal B, a reference voltage terminal C, an analog data output terminal D, and a data feedback terminal E;

[0054] The power supply terminal A of the digital-to-analog converter chip U1 is connected to the current loop transmitting unit 123, the digital data input terminal B of the digital-to-analog converter chip U1 is connected to the control module 130, the reference voltage terminal C of the digital-to-analog converter chip U1 is connected to the first terminal of the data processing unit 122, and the analog data output terminal D and the data feedback terminal E of the digital-to-analog converter chip U1 are both connected to the second terminal of the data processing unit 122.

[0055] The digital data input terminal B includes a serial peripheral interface enable signal terminal B1, a serial peripheral interface clock signal terminal B2, and a serial peripheral interface digital input signal terminal B3.

[0056] Based on the above embodiments, optionally, refer to the following: Figure 5 The data processing unit 122 includes a sixth resistor R6, a seventh resistor R7, a first capacitor C1, and an eighth resistor R8.

[0057] The first end of the seventh resistor R7 is connected to the first end of the first capacitor C1 and serves as the first end of the data processing unit 122; the first end of the sixth resistor R6 serves as the second end of the data processing unit 122; the second end of the first capacitor C1 is connected to the first end of the eighth resistor R8; the second ends of the sixth resistor R6 and the second ends of the seventh resistor R7 are both connected to the second ends of the eighth resistor R8 and serve as the third end of the data processing unit 122.

[0058] Among them, the sixth resistor R6 and the seventh resistor R7 function as voltage dividers, which can divide the second data signal output by the digital-to-analog converter chip U1. The first capacitor C1 and the eighth resistor R8 function as filters, which can filter the voltage divided by the seventh resistor R7 to obtain the third data signal.

[0059] Based on the above embodiments, optionally, refer to the following: Figure 5 The current loop transmitting unit 123 includes a current loop transmitting chip U2 and a third transistor Q3; the current loop transmitting chip U2 includes a power supply terminal L1, a reference voltage terminal L2, an input terminal L3, a power supply terminal L4, a base terminal L5, an emitter terminal L6, and an output terminal L7.

[0060] The power supply terminal L1 of the current loop transmitting chip U2 is connected to the power supply terminal A of the digital-to-analog converter chip U1. The reference voltage terminal C of the digital-to-analog converter chip U1 and the first terminal of the data processing unit 122 are both connected to the reference voltage terminal of L2U2. The input terminal L3 of the current loop transmitting chip U2 is connected to the third terminal of the data processing unit 122. The power supply terminal L4 of the current loop transmitting chip U2 and the collector of the third transistor Q3 are both connected to the second fixed potential 220. The base terminal L5 of the current loop transmitting chip U2 is connected to the base of the third transistor Q3. The emitter terminal L6 of the current loop transmitting chip U2 is connected to the emitter of the third transistor Q3. The output terminal L7 of the current loop transmitting chip U2 is connected to the second load terminal 124.

[0061] Based on the above connection relationship, the operation process of the absolute encoder signal generation module 120 is as follows: the control module 130 sends a digital first data signal to the digital-to-analog converter chip U1, which converts the first data signal into an analog second data signal; the sixth resistor R6 and the seventh resistor R7 divide the second data signal output by the digital-to-analog converter chip U1, and the first capacitor C1 and the eighth resistor R8 filter the voltage divided by the seventh resistor R7 to obtain a third data signal. The current loop transmitting chip U2 and the third transistor Q3 process the third data signal to obtain a second operating signal. The second load terminal 124 transmits the second operating signal to the marine low-speed electromechanical control system 200.

[0062] Exemplarily, based on the above embodiments, Figure 6This is a schematic diagram of another absolute encoder signal generation module provided in an embodiment of the present invention, as shown below. Figure 6 As shown, the marine low-speed diesel engine speed simulation device is characterized in that the absolute encoder signal generation module 120 further includes a protection unit 125.

[0063] The power supply terminal L4 of the current loop transmitting chip U2 and the collector of the third transistor Q3 are both connected to the first terminal of the protection unit 125. The output terminal L7 of the current loop transmitting chip U2 is connected to the second terminal of the protection unit 125. The third terminal of the protection unit 125 is connected to the second load terminal 124. The protection unit 125 is used to filter out noise signals doped in the second operating signal and prevent external electrostatic input.

[0064] Based on the above embodiments, optionally, refer to the following: Figure 6 The protection unit 125 includes a rectifier bridge BR1, a first ferrite bead M1, a second ferrite bead M2, a second capacitor C2, and a transient suppression diode D1;

[0065] The first pin 1 of the rectifier bridge BR1 serves as the first terminal of the protection unit 125, the second pin 2 of the rectifier bridge BR1 serves as the second terminal of the protection unit 125, the third pin 3 of the rectifier bridge BR1 is connected to the first terminal of the first ferrite bead M1, the fourth pin 4 of the rectifier bridge BR1 is connected to the first terminal of the second ferrite bead M2, the second terminal of the first ferrite bead M1 and the first terminal of the second capacitor C2 are both connected to the first terminal of the transient suppression diode D1, and the second terminal of the second ferrite bead M2, the second terminal of the second capacitor C2 and the second terminal of the transient suppression diode D1 are both connected to the second terminal of the transient suppression diode D1 and serve as the third terminal of the protection unit 125.

[0066] The rectifier bridge BR1 rectifies the second operating signal, making it more stable and increasing its accuracy. The first magnetic bead M1, the second magnetic bead M2, and the second capacitor C2 filter the second operating signal, further eliminating noise or interference signals and increasing its accuracy. The transient suppression diode D1 suppresses external static electricity input, preventing damage to the absolute encoder signal generation module 120 from electrostatic discharge and improving the safety of the marine low-speed diesel engine speed simulation device.

[0067] Assume a marine low-speed diesel engine speed simulation device simulates the speed of a low-speed diesel engine with a 120-tooth gear, one missing tooth, and an angle of 3 degrees between the edges of two adjacent teeth. The phase of the first control signal input to the first speed generation module 110 is set to lead the phase of the first control signal input to the second speed generation module 110, with a phase difference of 1 / 4 tooth. One cycle is defined as 120 tooth rotations of the speed measuring gear. The missing tooth position is the 0-phase position of the gear, corresponding to a low-level speed signal; the positions of the remaining teeth are pulse signals. The position containing the missing tooth information in the first operating signal represents the 0-phase of the engine. The length of the first operating signal cycle indicates the engine speed. When the phase of the first operating signal output by the first speed generation module 110 leads the phase of the first operating signal output by the second speed generation module 110, it indicates the engine is rotating forward; when the phase of the first operating signal output by the first speed generation module 110 lags the phase of the first operating signal output by the second speed generation module 110, it indicates the engine is rotating in reverse.

[0068] The absolute encoder signal can output a current ranging from 4mA to 20mA. When the absolute encoder is set to 4mA, the gear plate rotates to the 0° position, representing the engine in phase 0. When the absolute encoder is set to 20mA, the gear plate rotates to the 359.99° position, representing the engine in phase 360. The rate of change of the absolute encoder output signal corresponds to the engine speed; a positive rate of change indicates forward rotation, and a negative rate of change indicates reverse rotation.

[0069] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0070] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A marine low-speed diesel engine speed simulation device, characterized in that, The system includes at least two speed generating modules, at least one absolute encoder signal generating module, and a control module. Both the speed generating modules and the absolute encoder signal generating module are connected to the control module. The speed generating modules simulate the engine speed signal output by the Hall sensor in the engine speed measurement system. Any two speed generating modules form a group, and speed generating modules in different groups are redundant. The absolute encoder signal generating module simulates the speed and phase output by the absolute encoder in the engine speed measurement system during the engine start-up process. The control module controls the speed generating modules to simulate the first operating signal after the low-speed diesel engine starts. The first operating signal type is a pulse signal group with a missing tooth information within a period. The control module is also used to control the absolute encoder signal generation module to simulate the second operating signal during the low-speed diesel engine startup process; The process of testing a marine low-speed electromechanical control system using a marine low-speed diesel engine speed simulation device is as follows: Two speed generation modules are randomly selected and connected to the marine low-speed electromechanical control system. The control module sends engine speed signals with a 1 / 4 phase difference to the speed generation modules, controlling the two speed generation modules to generate first operating signals with a 1 / 4 phase difference. The marine low-speed electromechanical control system receives the two first operating signals with a 1 / 4 phase difference and calculates the speed, phase, and direction of rotation of the low-speed diesel engine after startup based on these signals. An absolute encoder signal generation module is randomly selected and connected to the marine low-speed electromechanical control system. The control module controls the absolute encoder signal generation module to simulate the second operating signal during the low-speed diesel engine startup process and sends it to the low-speed electromechanical control system. The low-speed electromechanical control system calculates the speed, phase, and direction of rotation of the low-speed diesel engine during startup based on the second operating signal.

2. The marine low-speed diesel engine speed simulation device according to claim 1, characterized in that, The speed generating module includes a first switching unit, a second switching unit, and a first load terminal; the control module is connected to the first switching unit and is used to control the first switching unit to generate a first control signal; the first switching unit is connected to the second switching unit and is used to generate a first operating signal according to the first control signal; the second switching unit is connected to the first load terminal and the first load terminal is connected to the marine low-speed electromechanical control system and is used to transmit the first operating signal to the marine low-speed electromechanical control system.

3. The marine low-speed diesel engine speed simulation device according to claim 2, characterized in that, The first switching unit includes a first resistor, a second resistor, and a first transistor; the first end of the first resistor is connected to the control module, the second end of the first resistor and the first end of the second resistor are both connected to the base of the first transistor, the second end of the second resistor is grounded with the emitter of the first transistor, and the collector of the first transistor is connected to the second switching unit.

4. The marine low-speed diesel engine speed simulation device according to claim 2, characterized in that, The second switching unit includes a third resistor, a fourth resistor, a second transistor, and a fifth resistor; the first end of the third resistor is connected to the first switching unit, the second end of the third resistor and the first end of the fourth resistor are both connected to the base of the second transistor, the second end of the fourth resistor and the emitter of the second transistor are connected to a first fixed potential, the collector of the second transistor is connected to the first end of the fifth resistor, and the second end of the fifth resistor is grounded.

5. The marine low-speed diesel engine speed simulation device according to claim 1, characterized in that, The absolute encoder signal generation module includes a digital-to-analog converter (DAC), a data processing unit, a current loop transmitter, and a second load terminal. The DAC is connected to the control module, which sends a first digital data signal to the DAC. The DAC converts the first data signal into a second analog data signal. The DAC is also connected to the current loop transmitter, which supplies power to the DAC. The data processing unit has a first and a second terminal connected to the DAC, which processes the second data signal to obtain a third data signal. The data processing unit also has a first and a third terminal connected to the current loop transmitter, which processes the third data signal to obtain a second operating signal. The current loop transmitter is connected to the second load terminal, which is connected to the marine low-speed electromechanical control system. The second load terminal transmits the second operating signal to the marine low-speed electromechanical control system.

6. The marine low-speed diesel engine speed simulation device according to claim 5, characterized in that, The digital-to-analog conversion unit includes a digital-to-analog conversion chip; the digital-to-analog conversion chip includes a power supply terminal, a digital data input terminal, a reference voltage terminal, an analog data output terminal, and a data feedback terminal; the power supply terminal of the digital-to-analog conversion chip is connected to the current loop transmitting unit, the digital data input terminal of the digital-to-analog conversion chip is connected to the control module, the reference voltage terminal of the digital-to-analog conversion chip is connected to the first terminal of the data processing unit, and the analog data output terminal and the data feedback terminal of the digital-to-analog conversion chip are both connected to the second terminal of the data processing unit.

7. The marine low-speed diesel engine speed simulation device according to claim 6, characterized in that, The data processing unit includes a sixth resistor, a seventh resistor, a first capacitor, and an eighth resistor; the first end of the seventh resistor is connected to the first end of the first capacitor and serves as the first end of the data processing unit; the first end of the sixth resistor serves as the second end of the data processing unit; the second end of the first capacitor is connected to the first end of the eighth resistor, and the second ends of the sixth resistor and the seventh resistor are both connected to the second end of the eighth resistor and serve as the third end of the data processing unit.

8. The marine low-speed diesel engine speed simulation device according to claim 6, characterized in that, The current loop transmitting unit includes a current loop transmitting chip and a third transistor. The current loop transmitting chip includes a power supply terminal, a reference voltage terminal, an input terminal, a power supply terminal, a base terminal, an emitter terminal, and an output terminal. The power supply terminal of the current loop transmitting chip is connected to the power supply terminal of the digital-to-analog converter chip. The reference voltage terminal of the digital-to-analog converter chip and the first terminal of the data processing unit are both connected to the reference voltage terminal of the current loop transmitting chip. The input terminal of the current loop transmitting chip is connected to the third terminal of the data processing unit. The power supply terminal of the current loop transmitting chip and the collector of the third transistor are both connected to a second fixed potential. The base terminal of the current loop transmitting chip is connected to the base of the third transistor. The emitter terminal of the current loop transmitting chip is connected to the emitter of the third transistor. The output terminal of the current loop transmitting chip is connected to the second load terminal.

9. The marine low-speed diesel engine speed simulation device according to claim 8, characterized in that, The absolute encoder signal generation module also includes a protection unit; the power supply terminal of the current loop transmitting chip and the collector of the third transistor are both connected to the first terminal of the protection unit, the output terminal of the current loop transmitting chip is connected to the second terminal of the protection unit, and the third terminal of the protection unit is connected to the second load terminal. The protection unit is used to filter out noise signals doped in the second operating signal and prevent external electrostatic input.

10. The marine low-speed diesel engine speed simulation device according to claim 9, characterized in that, The protection unit includes a rectifier bridge, a first ferrite bead, a second ferrite bead, a second capacitor, and a transient voltage suppressor diode. The first pin of the rectifier bridge serves as the first terminal of the protection unit, the second pin of the rectifier bridge serves as the second terminal of the protection unit, the third pin of the rectifier bridge is connected to the first terminal of the first ferrite bead, the fourth pin of the rectifier bridge is connected to the first terminal of the second ferrite bead, the second terminal of the first ferrite bead and the first terminal of the second capacitor are both connected to the first terminal of the transient voltage suppressor diode, and the second terminal of the second ferrite bead, the second terminal of the second capacitor and the third terminal of the transient voltage suppressor diode are both connected to the second terminal of the transient voltage suppressor diode and serve as the third terminal of the protection unit.

Citation Information

Patent Citations

  • Speed measurement system and method for marine engine

    CN115389777A

  • Ship diesel engine comprehensive signal simulator

    CN204255654U

  • Practical circuit for simulating signals of diesel magneto-electric sensor

    CN209787136U