Disk failure simulation test method, test device and electronic equipment

Abstract

Embodiments of the present application provide a disk fault simulation test method, a test device and electronic equipment, wherein the method comprises: receiving a simulation error injection test instruction issued in a fault simulation environment; creating a bare disk stress test process for a target disk according to the simulation error injection test instruction; generating a simulation error injection instruction corresponding to the bare disk stress test process; executing the simulation error injection instruction on the bare disk stress test process to generate an error injection test result. Through the present application, the problem that various faults in the disk IO process cannot be reproduced in the prior art is solved, the effect of simulating disk faults is achieved, and the target disk hardware is not really damaged, without the need for recompiling the kernel, installing the kernel, installing the test tool, and restarting the system, etc., which is convenient and flexible, and greatly improves the test efficiency.

Description

Technical Field

[0001] This application relates to the field of computer technology, and more specifically, to a disk failure simulation test method, a disk failure simulation test device, a storage medium, and an electronic device. Background Technology

[0002] In modern computer systems, compared to the processor and memory, the disk system is the slowest, most prone to performance bottlenecks, and most vulnerable device in a computer system because the hard drive is furthest from the processor and accessing the disk involves mechanical operations such as spindle rotation and track seeking. Mechanical components are prone to failure.

[0003] During application and system development and testing, it is sometimes necessary to perform fault tests simulating various disk read / write processes (IO processes), including error codes, disk IO latency, and disk failures, to ensure the reliability of the applications and systems in case of problems. Existing technologies, to avoid affecting the overall stability and robustness of the system due to abnormal disk states and reducing overall system fault tolerance, provide disk status monitoring during system operation. This can be achieved through the disk's SMART (Self-Monitoring, Analysis and Reporting Technology) feature, using tools like smartmontools to monitor hard drive usage, health status, and other parameters, and even provide early warnings. However, there is no complete simulation testing mechanism for various disk IO process errors, disk IO timeouts, and even disk failures. These types of faults are generally hardware-related, highly random, and difficult to reproduce reliably. Therefore, simulating disk faults is a pressing issue that needs to be addressed. Summary of the Invention

[0004] The main objective of this application is to provide a disk failure simulation testing method, a disk failure simulation testing device, a storage medium, and an electronic device, so as to at least solve the problem that various failures in the disk I / O process cannot be reproduced in the prior art.

[0005] To achieve the above objectives, according to one aspect of this application, a method for simulating disk failure testing is provided, comprising the following steps: receiving a simulated error injection test instruction issued by a failure simulation environment; creating a raw disk stress test process for the target disk according to the simulated error injection test instruction; generating a simulated error injection instruction corresponding to the raw disk stress test process; executing the simulated error injection instruction on the raw disk stress test process to generate an error injection test result.

[0006] In one exemplary embodiment, the method further includes: collecting disk device information corresponding to the target disk and reporting the disk device information to the fault simulation environment.

[0007] In one exemplary embodiment, the target disk includes multiple disks, and receiving simulated error injection test instructions issued under the fault simulation environment includes: receiving multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, and the multiple simulated error injection test instructions constitute a simulated error injection test instruction library.

[0008] In one exemplary embodiment, generating a simulated error injection instruction corresponding to the raw disk stress testing process includes: obtaining the access status of the target disk to the target function; determining a simulated fault code based on the access status and disk device information; and injecting the simulated fault code into the target function to generate a simulated error injection instruction corresponding to the raw disk stress testing process.

[0009] In an exemplary embodiment, when a simulated fault code indicates that the target disk is a bad disk, injecting the simulated fault code into the target function includes: injecting a first simulated fault code into the target function, wherein the first simulated fault code indicates that the raw disk stress testing process is in at least one of the following situations: the raw disk stress testing process is suspended, the raw disk stress testing process is blocked, and the raw disk stress testing process times out and does not respond.

[0010] In one exemplary embodiment, when a simulated fault code indicates that an error has occurred on the target disk, injecting the simulated fault code into the target function includes: injecting a second simulated fault code into the target function, wherein the second simulated fault code is the target return value of the target disk, and the target return value is the return value generated by the target disk in the event of an abnormal error.

[0011] In one exemplary embodiment, when a simulated fault code characterizes a delayed response of the target disk, injecting a simulated fault code into the target function includes: injecting a third simulated fault code into the target function, wherein the third simulated fault code characterizes a delayed response in the raw disk stress test process.

[0012] In one exemplary embodiment, the method includes: reporting error-checking test results to a fault simulation environment.

[0013] According to another embodiment of this application, an apparatus for simulating disk failure testing is provided, comprising: a receiving module for receiving simulated error injection test instructions issued in a failure simulation environment; a creation module for creating a raw disk stress test process for a target disk according to the simulated error injection test instructions; a generation module for generating simulated error injection instructions corresponding to the raw disk stress test process; and an execution module for executing the simulated error injection instructions on the raw disk stress test process to generate error injection test results.

[0014] According to another embodiment of this application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is executed by a device at runtime, performing the steps of any of the above method embodiments.

[0015] According to another embodiment of this application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0016] This application addresses the issue that the simulated error injection instruction includes simulated error injection content for testing the target disk. By receiving the simulated error injection test instruction from the fault simulation environment, and after the client creates a raw disk stress testing process for the target disk based on this instruction, the client can generate simulated error injection instructions. Since the simulated error injection instruction corresponds to the raw disk stress testing process, and the target disk corresponds to the raw disk stress testing process, the simulated error injection instruction corresponds to the target disk. Therefore, after injecting the simulated error injection instruction into the raw disk stress testing process, the process can execute the simulated error injection instruction, thereby simulating an error injection test result on the target disk that matches the preset result of the instruction. This solves the problem of various faults in the disk I / O process being unreproducible in existing technologies, achieving the effect of simulating disk faults without actually damaging the target disk hardware. Furthermore, it eliminates the need for recompiling the kernel, installing the kernel, installing testing tools, and restarting the system, making it convenient, flexible, and significantly improving testing efficiency. Attached Figure Description

[0017] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0018] Figure 1 A hardware structure block diagram of a mobile terminal for performing a disk failure simulation test method according to an embodiment of this application is shown;

[0019] Figure 2 A schematic flowchart of a disk failure simulation test method according to an embodiment of this application is shown;

[0020] Figure 3 A flowchart illustrating a disk failure simulation test method according to another embodiment of this application is shown;

[0021] Figure 4 A schematic flowchart of a disk failure simulation test method according to another embodiment of this application is shown;

[0022] Figure 5 A structural block diagram of a disk failure simulation testing apparatus provided according to an embodiment of this application is shown. Detailed Implementation

[0023] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0024] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0025] The methods and embodiments provided in this application can be executed on a mobile terminal, computer terminal, or similar computing device. Taking running on a mobile terminal as an example, Figure 1 This is a hardware structure block diagram of a mobile terminal for a disk failure simulation testing method according to an embodiment of this application. Figure 1 As shown, a mobile terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. The mobile terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the mobile terminal described above. For example, the mobile terminal may also include components that are more... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0026] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the disk failure simulation test method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thus implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0027] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the mobile terminal's communication provider. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0028] This embodiment provides a disk failure simulation test method running on the aforementioned mobile terminal. Figure 2 This is a flowchart of a disk failure simulation test method according to an embodiment of this application. Figure 2 As shown, the process includes the following steps:

[0029] Step S201: Receive the simulated error injection test command sent from the fault simulation environment;

[0030] Specifically, the device under test (DUT) is first connected to a pre-deployed fault simulation environment. To perform fault simulation testing on the DUT's disk, it is first necessary to generate instructions to control the DUT to execute the fault simulation test, and then send these instructions to the DUT. Thus, in step S201, the DUT first receives the instructions sent from the fault simulation environment, namely, the simulated error injection test instructions. Specifically, these simulated error injection test instructions correspond to the target disk of the DUT.

[0031] Step S202: Create a raw disk stress test process for the target disk according to the simulated error injection test instructions;

[0032] Specifically, in order to ensure that the simulated error injection test command does not affect the file system, I / O scheduling, and driver processing of the device under test, after receiving the simulated error injection test command issued in the fault simulation environment, the device under test first creates a raw disk stress test process for the target disk of the device under test. That is, it performs stress test on the raw disk corresponding to the target disk of the device under test. This allows the stress test process to skip the cache, directly read and write the target disk of the device under test, and bypass the file system layer processing and be unaffected by kernel I / O scheduling related functions. It can directly perform I / O data stress test on the created raw disk device.

[0033] Step S203: Generate simulated error injection instructions corresponding to the bare disk stress testing process;

[0034] Specifically, since the target disks of the device under test may have different disk types, interface types, connection methods, manufacturers, models, and capacities, the device under test needs to generate different simulated error injection instructions for target disks with different disk types, interface types, connection methods, manufacturers, models, and capacities according to the pre-configuration of the fault simulation environment during the creation of the above-mentioned raw disk stress test process. The generated simulated error injection instructions correspond to the raw disk stress test process.

[0035] Step S204: Execute simulated error injection commands on the bare disk stress test process to generate error injection test results.

[0036] Specifically, after generating the simulated error injection command corresponding to the raw disk stress test process, in order to enable the target disk of the device under test to simulate an abnormal situation consistent with the simulated error injection command, the generated simulated error injection test command is injected into the raw disk stress test process, so that the device under test executes the simulated error injection command on the raw disk stress test process, thereby obtaining the error injection test result, which corresponds to the simulated error injection command.

[0037] In this embodiment, since the simulated error injection instruction includes simulated error injection content for simulating error injection tests on the target disk, the device under test (DUT) can generate simulated error injection instructions based on the simulated test instructions after receiving the simulated error injection test instructions from the fault simulation environment and creating a raw disk stress test process for the target disk according to the simulated error injection test instructions. Since the simulated error injection instructions correspond to the raw disk stress test process, and the target disk corresponds to the raw disk stress test process, the simulated error injection instructions correspond to the target disk. Therefore, after injecting the simulated error injection instructions into the raw disk stress test process, the raw disk stress test process can execute the simulated error injection instructions, thereby simulating an error injection test result on the target disk that is consistent with the preset result of the aforementioned error injection instructions. This solves the problem of various faults in the disk I / O process being unreproducible in the prior art, achieving the effect of simulating disk faults without actually damaging the target disk hardware. Furthermore, it eliminates the need for recompiling the kernel, installing the kernel, installing test tools, and restarting the system, making it convenient, flexible, and greatly improving testing efficiency.

[0038] The entities that perform the above steps can be servers, terminals, etc., but are not limited to these.

[0039] In a specific implementation, in an exemplary embodiment, the method further includes: collecting disk device information corresponding to the target disk and reporting the disk device information to the fault simulation environment.

[0040] In the above embodiments, such as Figure 3As shown, in order for the fault simulation environment to issue corresponding simulated error injection test commands for different target disks of the device under test (DUT), after the DUT (client) is started, it collects the disk device information corresponding to the target disk, thereby obtaining and detecting the disk configuration corresponding to the target disk (i.e., collecting and detecting disk configuration). After reporting the disk device information to the fault simulation environment, the DUT sends a request to the fault simulation environment. Since the fault simulation environment has a pre-deployed simulation test method, it can issue targeted simulated error injection test commands to the DUT (client) according to the pre-configured simulation test method. This allows the DUT (client) to generate and execute simulated error injection commands. After executing the simulated error injection commands, a simulated error injection test result is generated. This simulated error injection test result can be obtained during the process of collecting and detecting disk configuration, and then reported to the fault simulation environment during the process of reporting disk device information.

[0041] In one exemplary embodiment, the target disk includes multiple disks, and receiving simulated error injection test instructions issued under the fault simulation environment includes: receiving multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, and the multiple simulated error injection test instructions constitute a simulated error injection test instruction library.

[0042] In the above embodiments, when there are multiple target disks, since different target disks may have different disk device information, the fault simulation test methods for different target disks will also differ when performing fault simulation tests on the target disks. Therefore, different target disks correspond to different simulated error injection test instructions. Since multiple target disks have corresponding disk device information, when it is necessary to perform fault simulation tests on multiple different target disks, by receiving multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, it is possible to achieve the purpose of performing targeted fault simulation tests on multiple target disks.

[0043] For example, in order to better accommodate more devices under test (DUTs), the models and configurations of DUTs will vary greatly. Regarding disk configurations, there will be different disk types, such as HDDs (Hard Disk Drives), SSDs (Solid State Drives), and hybrid drives. The disk interface types will also vary, such as SATA, SCSI, SAS, M.2, PCI-E, and U.2. The disk connection methods will also vary, such as onboard, RAID card connection, and SAS card connection. Moreover, disks from different manufacturers, models, and capacities may also have significant differences. Therefore, the fault simulation test methods for different target disks will also differ. It is necessary to establish a test command library to generate different simulated error injection content for different identified target disks and issue different simulated error injection test commands, so that different target disks of the DUT can receive different simulated error injection test commands.

[0044] In one exemplary embodiment, generating a simulated error injection instruction corresponding to the raw disk stress testing process includes: obtaining the access status of the target disk to the target function; determining a simulated fault code based on the access status and disk device information; and injecting the simulated fault code into the target function to generate a simulated error injection instruction corresponding to the raw disk stress testing process.

[0045] In the above embodiments, the raw disk stress testing process of the target disk can access specific target functions. In order to operate on the raw disk stress testing process, that is, to generate corresponding simulated error injection instructions in the raw disk stress testing process, the access status of the target disk to the target function in the raw disk stress testing process is first obtained. Based on the access status and the pre-configuration of the fault simulation environment, the simulated fault code for the specific target disk can be determined. Then, after injecting the fault simulation code into the corresponding target function, the simulated error injection instructions corresponding to the raw disk stress testing process can be generated, so that the raw disk stress testing process of the target disk can access the target function injected with the fault simulation code.

[0046] In an exemplary embodiment, when a simulated fault code indicates that the target disk is a bad disk, injecting the simulated fault code into the target function includes: injecting a first simulated fault code into the target function, wherein the first simulated fault code indicates that the raw disk stress testing process is in at least one of the following situations: the raw disk stress testing process is suspended, the raw disk stress testing process is blocked, and the raw disk stress testing process times out and does not respond.

[0047] Based on the target disk's disk device information, the simulated error messages generated by the fault simulation environment may include one of the following: the target disk is faulty, the target disk has an error, or the target disk has a delayed response. Specifically, the simulated fault code corresponding to a faulty target disk is designated as the first simulated fault code, the simulated fault code corresponding to an error on the target disk is designated as the second simulated fault code, and the simulated fault code for a delayed response on the target disk is designated as the third simulated fault code.

[0048] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a bad disk, that is, when the simulated fault code to be injected represents that the target disk is a bad disk, the first simulated fault code corresponding to the target disk being a bad disk is injected into the target function to generate a simulated fault instruction with the first simulated fault code, thereby causing the raw disk stress test process corresponding to the target disk to execute the simulated fault instruction with the first simulated fault code.

[0049] For example, injecting the result of the process being busy waiting into a specific function in the kernel I / O process can simulate the phenomenon of disk I / O being stuck and unresponsive, such as the scsi_dispatch_cmd function in the scsi_mod module of the scsi layer; optionally, the simulation result may cause the stress test process to hang, block, or time out and become unresponsive.

[0050] In one exemplary embodiment, when a simulated fault code indicates that an error has occurred on the target disk, injecting the simulated fault code into the target function includes: injecting a second simulated fault code into the target function, wherein the second simulated fault code is the target return value of the target disk, and the target return value is the return value generated by the target disk in the event of an abnormal error.

[0051] For example, specific functions used for reading and writing disk files during kernel I / O processes can be injected with return values ​​of disk exceptions to simulate various disk error scenarios. These return values ​​correspond to predefined error codes in the kernel.

[0052]

[0053]

[0054] The simulation results will report the disk error code specified in the simulation during the raw disk stress test process:

[0055] write fail,errno:26,err:Text file busy

[0056] write fail,errno:28,err:No space left on device

[0057] write fail,errno:30,err:Read-only file system

[0058] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a disk error, that is, when the simulated fault code to be injected represents an error in the target disk, the second simulated fault code corresponding to the error in the target disk is injected into the target function to generate a simulated fault instruction with the second simulated fault code, thereby causing the raw disk stress test process corresponding to the target disk to execute the simulated fault instruction with the second simulated fault code.

[0059] In one exemplary embodiment, when a simulated fault code characterizes a delayed response of the target disk, injecting a simulated fault code into the target function includes: injecting a third simulated fault code into the target function, the third simulated fault code characterizing a delayed response in the stress test process.

[0060] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a disk latency response, that is, when the simulated fault code to be injected is characterized as the target disk latency response, the third simulated fault code corresponding to the target disk latency response is injected into the target function to generate a simulated fault instruction with the third simulated fault code, thereby causing the raw disk stress test process corresponding to the target disk to execute the simulated fault instruction with the third simulated fault code.

[0061] For example, injecting the result of the process busy waiting into a specific function used for reading and writing disk files in the kernel I / O process, such as mdelay(300), will simulate the phenomenon of a disk response delay of 300ms. Optionally, the simulation result can be reflected in the results of disk I / O performance monitoring, such as the average wait time r_await / w_await for each read / write I / O request in the system performance monitoring tool iostat.

[0062] In one exemplary embodiment, the method includes: reporting error-checking test results to a fault simulation environment.

[0063] In the above implementation, after generating the simulated error injection test command, in order for the fault simulation environment to generate a complete error injection test report, the device under test (DUT) needs to report the error injection test results to the fault simulation environment after generating the error injection test results, thereby achieving the purpose of the fault simulation environment generating a complete test report based on the collected simulated error injection test results of the target disk of the DUT.

[0064] Furthermore, after reporting the above error-injection test results to the fault simulation environment, the device under test ends the test and automatically shuts down.

[0065] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0066] To enable those skilled in the art to better understand the technical solution of this application, the implementation process of the disk failure simulation test method of this application will be described in detail below with reference to specific embodiments.

[0067] This embodiment relates to a specific disk failure simulation test method, such as... Figure 4 As shown, it includes the following steps:

[0068] Step S1: The fault simulation environment generates simulated error injection content for the disk under test (target disk) and sends hardware simulated error injection test instructions (fault simulation test instructions) to the client (device under test);

[0069] Step S2: If there are multiple target disks, send multiple fault simulation test commands to the corresponding target disks respectively;

[0070] Step S3: The client (device under test) creates a corresponding raw disk stress test process for each target disk. The target disk and the raw disk stress test process correspond one-to-one, and the raw disk stress test process corresponds one-to-one with the above-mentioned fault simulation test command.

[0071] Step S4: The client (device under test) generates simulated error injection instructions for each raw disk stress test process. These simulated error injection instructions include simulated bad disk error injection instructions, simulated disk error code error injection instructions, and simulated disk delay error injection instructions.

[0072] Step S5: The client (device under test) executes a simulated error injection command to the corresponding bare disk stress test process, generates the error injection test result, and sends the simulated error injection test result back to the fault simulation environment. Then the test ends and the device automatically shuts down.

[0073] This embodiment also provides a disk failure simulation testing device, which is used to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0074] The disk failure simulation testing device provided in the embodiments of this application is described below.

[0075] Figure 5 This is a structural block diagram of a disk failure simulation testing apparatus according to an embodiment of this application. Figure 5 As shown, the device includes:

[0076] Receiver module 10 is used to receive simulated error injection test commands sent from the fault simulation environment;

[0077] Specifically, the device under test (DUT) is first connected to a pre-deployed fault simulation environment. To perform fault simulation testing on the DUT's disk, instructions to control the DUT to execute the fault simulation test must first be generated and then sent to the DUT. In this step, the DUT first receives the instructions sent from the fault simulation environment, namely, the simulated error injection test instructions. Specifically, these simulated error injection test instructions correspond to the target disk of the DUT.

[0078] Create module 20, which is used to create a raw disk stress test process on the target disk according to the simulated error injection test instructions;

[0079] Specifically, in order to ensure that the simulated error injection test command does not affect the file system, I / O scheduling, and driver processing of the device under test, after receiving the simulated error injection test command sent in the fault simulation environment, the device under test first creates a raw disk stress test process for the target of the device under test. That is, it performs stress test on the raw disk corresponding to the target disk of the device under test. This allows the stress test process to skip the cache, directly read and write the target disk of the device under test, and bypass the file system layer processing. It is not affected by kernel I / O scheduling related functions and can directly perform I / O data stress test on the created raw disk device.

[0080] The generation module 30 is used to generate simulated error injection instructions corresponding to the raw disk stress testing process. Specifically, since the disk types, interface types, connection methods, manufacturers, models, and capacities of different target disks of the device under test may differ, the device under test needs to generate different simulated error injection instructions for target disks with different disk types, interface types, connection methods, manufacturers, models, and capacities according to the pre-configuration of the fault simulation environment during the creation of the above-mentioned raw disk stress testing process. The generated simulated error injection instructions correspond to the raw disk stress testing process.

[0081] Execution module 40 is used to execute simulated error injection instructions on the bare disk stress test process and generate error injection test results.

[0082] Specifically, after generating the simulated error injection command corresponding to the raw disk stress test process, in order to enable the target disk of the device under test to simulate an abnormal situation consistent with the simulated error injection command, the generated simulated error injection test command is injected into the raw disk stress test process, so that the device under test executes the simulated error injection command on the raw disk stress test process, thereby obtaining the error injection test result, which corresponds to the simulated error injection command.

[0083] In this embodiment, since the simulated error injection instruction includes simulated error injection content for simulating error injection tests on the target disk, the client can generate simulated error injection instructions based on the simulated error injection test instructions received from the fault simulation environment. Since the simulated error injection instructions correspond to the raw disk stress testing process, and the target disk corresponds to the raw disk stress testing process, the simulated error injection instructions correspond to the target disk. Therefore, after injecting the simulated error injection instructions into the raw disk stress testing process, the raw disk stress testing process can execute the simulated error injection instructions, thereby simulating an error injection test result on the target disk that matches the preset result of the aforementioned error injection instructions. This solves the problem of various faults in the disk I / O process being unreproducible in the prior art, achieving the effect of simulating disk faults without actually damaging the target disk hardware. Furthermore, it eliminates the need for recompiling and installing the kernel, installing testing tools, and restarting the system, making it convenient, flexible, and greatly improving testing efficiency.

[0084] In a specific implementation, in one exemplary embodiment, the device further includes: a first processing module, used to collect disk device information corresponding to the target disk and report the disk device information to the fault simulation environment.

[0085] In the above embodiments, in order for the fault simulation environment to issue corresponding simulated error injection test commands for different target disks of the device under test, the device under test first needs to collect the disk device information corresponding to the target disk, thereby obtaining the disk configuration corresponding to the target disk, and then report the disk configuration to the fault simulation environment. Since the fault simulation environment has a pre-deployed simulation test method, the fault simulation environment can issue targeted simulated error injection test commands for different disk configurations based on the collected data and the pre-configured simulation test method.

[0086] In one exemplary embodiment, the target disk includes multiple disks, and the receiving module includes: a second processing module, configured to receive multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, the multiple simulated error injection test instructions constituting a simulated error injection test instruction library.

[0087] In the above embodiments, when there are multiple target disks, since different target disks may have different disk device information, the fault simulation test methods for different target disks will also differ when performing fault simulation tests on the target disks. Therefore, different target disks correspond to different simulated error injection test instructions. Since multiple target disks have corresponding disk device information, when it is necessary to perform fault simulation tests on multiple different target disks, by receiving multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, it is possible to achieve the purpose of performing targeted fault simulation tests on multiple target disks.

[0088] For example, to better accommodate a wider range of devices under test (DUTs), the models and configurations of these DUTs can vary considerably. Regarding disk configurations, different disk types will emerge, such as HDDs (Hard Disk Drives), SSDs (Solid State Drives), and hybrid drives. Disk interface types will also differ, including SATA, SCSI, SAS, M.2, PCI-E, and U.2. Disk connection methods will vary, including onboard, RAID card, and SAS card connections. Furthermore, disks from different manufacturers, models, and capacities may exhibit significant differences. Therefore, the fault simulation testing methods for different target disks will also differ. A test command library needs to be established to generate different simulated error injection content for different identified target disks and issue different simulated error injection test commands, enabling the DUT to receive these commands.

[0089] In one exemplary embodiment, the generation module includes: a third processing module for obtaining the access status of the target disk to the target function; a fourth processing module for determining a simulated fault code based on the access status and disk device information; and a fifth processing module for injecting the simulated fault code into the target function to generate a simulated error injection instruction corresponding to the bare disk stress testing process.

[0090] In the above embodiments, the raw disk stress testing process of the target disk can access specific target functions. In order to operate on the raw disk stress testing process, that is, to generate corresponding simulated error injection instructions in the raw disk stress testing process, the access status of the target disk to the target function in the raw disk stress testing process is first obtained. Based on the access status and the pre-configuration of the fault simulation environment, the simulated fault code for the specific target disk can be determined. Then, after injecting the fault simulation code into the corresponding target function, the simulated error injection instructions corresponding to the raw disk stress testing process can be generated, so that the raw disk stress testing process of the target disk can access the target function injected with the fault simulation code.

[0091] In an exemplary embodiment, when the simulated fault code indicates that the target disk is a bad disk, the fifth processing module includes: a first processing submodule, configured to inject a first simulated fault code into the target function, wherein the first simulated fault code indicates that the raw disk stress test process is in at least one of the following situations: the raw disk stress test process is suspended, the raw disk stress test process is blocked, and the raw disk stress test process times out and does not respond.

[0092] Based on the target disk's disk device information, the simulated error messages generated by the fault simulation environment may include one of the following: the target disk is faulty, the target disk has an error, or the target disk has a delayed response. Specifically, the simulated fault code corresponding to a faulty target disk is designated as the first simulated fault code, the simulated fault code corresponding to an error on the target disk is designated as the second simulated fault code, and the simulated fault code for a delayed response on the target disk is designated as the third simulated fault code.

[0093] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a bad disk, that is, when the simulated fault code to be injected represents that the target disk is a bad disk, the first simulated fault code corresponding to the target disk being a bad disk is injected into the target function to generate a simulated fault instruction with the first simulated fault code, thereby causing the raw disk stress test process corresponding to the target disk to execute the simulated fault instruction with the first simulated fault code.

[0094] For example, injecting a return value indicating that the process is busy waiting into a specific function in the kernel I / O process can simulate the phenomenon of disk I / O freezing and becoming unresponsive, such as the scsi_dispatch_cmd function in the scsi_mod module of the scsi layer; the simulation result will cause the stress test process to hang, block, or time out and become unresponsive.

[0095] In an exemplary embodiment, when a simulated fault code indicates an error in the target disk, the fifth processing module includes: a second processing submodule, configured to inject a second simulated fault code into the target function, wherein the second simulated fault code is the target return value of the target disk, and the target return value is the return value generated by the target disk in the event of an abnormal error.

[0096] For example, specific functions used for reading and writing disk files during kernel I / O processes can be injected with return values ​​of disk exceptions to simulate various disk error scenarios. These return values ​​correspond to predefined error codes in the kernel.

[0097]

[0098]

[0099] The simulation results will report the disk error code specified in the simulation during the raw disk stress test process:

[0100] write fail,errno:26,err:Text file busy

[0101] write fail,errno:28,err:No space left on device

[0102] write fail,errno:30,err:Read-only file system

[0103] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a disk error, that is, when the simulated fault code to be injected represents an error in the target disk, the second simulated fault code corresponding to the target disk error is injected into the target function to generate a simulated fault instruction with the second simulated fault code, thereby causing the bare disk stress test process corresponding to the target disk to execute the simulated fault instruction with the second simulated fault code.

[0104] In an exemplary embodiment, when simulating fault codes to characterize the delayed response of the target disk, the fifth processing module includes: a third processing submodule for injecting a third simulated fault code into the target function, the third simulated fault code characterizing the delayed response of the stress test process.

[0105] In the above implementation, when the simulated error injection content involved in the fault simulation test instruction is a disk latency response, that is, when the simulated fault code to be injected is characterized as the target disk latency response, the third simulated fault code corresponding to the target disk latency response is injected into the target function to generate a simulated fault instruction with the third simulated fault code, thereby causing the raw disk stress test process corresponding to the target disk to execute the simulated fault instruction with the third simulated fault code.

[0106] For example, injecting the result of the process busy waiting into a specific function used for reading and writing disk files in the kernel I / O process, such as mdelay(300), will simulate the phenomenon of a disk response delay of 300ms. The simulation result can be reflected in the results of disk I / O performance monitoring, such as the average wait time r_await / w_await for each read / write I / O request in the system performance monitoring tool iostat.

[0107] In one exemplary embodiment, the apparatus includes a reporting module for reporting error injection test results to a fault simulation environment.

[0108] In the above implementation, after generating the simulated error injection test command, in order for the fault simulation environment to generate a complete error injection test report, the device under test (DUT) needs to report the error injection test results to the fault simulation environment after generating the error injection test results, thereby achieving the purpose of the fault simulation environment generating a complete test report based on the collected simulated error injection test results of the target disk of the DUT.

[0109] Furthermore, after reporting the above error-injection test results to the fault simulation environment, the device under test ends the test and automatically shuts down.

[0110] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0111] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0112] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0113] Specifically, disk failure simulation testing methods include:

[0114] Step S201: Receive the simulated error injection test command sent from the fault simulation environment;

[0115] Specifically, the device under test (DUT) is first connected to a pre-deployed fault simulation environment. To perform fault simulation testing on the DUT's disk, instructions to control the DUT to execute the fault simulation test must first be generated and then sent to the DUT. In step S201, the DUT first receives the instructions sent from the fault simulation environment, namely, the simulated error injection test instructions. Specifically, these simulated error injection test instructions correspond to the target disk of the DUT.

[0116] Step S202: Create a raw disk stress test process for the target disk according to the simulated error injection test instructions;

[0117] Specifically, in order to ensure that the simulated error injection test command does not affect the file system, I / O scheduling, and driver processing of the device under test, after receiving the simulated error injection test command sent in the fault simulation environment, the device under test first creates a raw disk stress test process for the target of the device under test. That is, it performs stress test on the raw disk corresponding to the target disk of the device under test. This allows the stress test process to skip the cache, directly read and write the target disk of the device under test, and bypass the file system layer processing. It is not affected by kernel I / O scheduling related functions and can directly perform I / O data stress test on the created raw disk device.

[0118] Step S203: Generate simulated error injection instructions corresponding to the raw disk stress test process. Specifically, since the target disks of the device under test may have different disk types, interface types, connection methods, manufacturers, models, and capacities, the device under test needs to generate different simulated error injection instructions for target disks with different disk types, interface types, connection methods, manufacturers, models, and capacities according to the pre-configuration of the fault simulation environment during the creation of the above-mentioned raw disk stress test process. The generated simulated error injection instructions correspond to the raw disk stress test process.

[0119] Step S204: Execute simulated error injection commands on the bare disk stress test process to generate error injection test results.

[0120] Specifically, after generating the simulated error injection command corresponding to the raw disk stress testing process, in order to enable the target disk of the device under test to simulate an abnormal situation consistent with the simulated error injection command, the generated simulated error injection test command is injected into the raw disk stress testing process. This causes the device under test to execute the simulated error injection command in the raw disk stress testing process, thereby obtaining the error injection test result, which corresponds to the simulated error injection command. Optionally, the method further includes: collecting disk device information corresponding to the target disk and reporting the disk device information to the fault simulation environment.

[0121] In one exemplary embodiment, the target disk includes multiple disks, and receiving simulated error injection test instructions issued under the fault simulation environment includes: receiving multiple simulated error injection test instructions that correspond one-to-one with the multiple disk device information, and the multiple simulated error injection test instructions constitute a simulated error injection test instruction library.

[0122] In one exemplary embodiment, generating a simulated error injection instruction corresponding to the raw disk stress testing process includes: obtaining the access status of the target disk to the target function; determining a simulated fault code based on the access status and disk device information; and injecting the simulated fault code into the target function to generate a simulated error injection instruction corresponding to the raw disk stress testing process.

[0123] In an exemplary embodiment, when a simulated fault code indicates that the target disk is a bad disk, injecting the simulated fault code into the target function includes: injecting a first simulated fault code into the target function, wherein the first simulated fault code indicates that the raw disk stress testing process is in at least one of the following situations: the raw disk stress testing process is suspended, the raw disk stress testing process is blocked, and the raw disk stress testing process times out and does not respond.

[0124] In one exemplary embodiment, when a simulated fault code indicates that an error has occurred on the target disk, injecting the simulated fault code into the target function includes: injecting a second simulated fault code into the target function, wherein the second simulated fault code is the target return value of the target disk, and the target return value is the return value generated by the target disk in the event of an abnormal error.

[0125] In one exemplary embodiment, when a simulated fault code characterizes a delayed response of the target disk, injecting a simulated fault code into the target function includes: injecting a third simulated fault code into the target function, the third simulated fault code characterizing a delayed response in the stress test process.

[0126] In one exemplary embodiment, the method includes: reporting error-checking test results to a fault simulation environment.

[0127] Embodiments of this application provide an apparatus including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the method embodiments described above.

[0128] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0129] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0130] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0131] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for simulating disk failure testing, characterized in that, Includes the following steps: Receive simulated error injection test commands sent from the fault simulation environment; A raw disk stress test process is created on the target disk according to the simulated error injection test instructions; Generate simulated error injection instructions corresponding to the bare disk stress testing process; The simulated error injection command is executed on the bare disk stress test process to generate error injection test results.

2. The method according to claim 1, characterized in that, The method further includes: Collect the disk device information corresponding to the target disk and report the disk device information to the fault simulation environment.

3. The method according to claim 2, characterized in that, The target disks include multiple disks, and the receiving of simulated error injection test commands from the fault simulation environment includes: The system receives multiple simulated error injection test instructions that correspond one-to-one with the information of multiple disk devices, and the multiple simulated error injection test instructions constitute a simulated error injection test instruction library.

4. The method according to claim 2 or 3, characterized in that, The generation of simulated error injection instructions corresponding to the bare disk stress testing process includes: Obtain the access status of the target disk to the target function; Based on the access status and the disk device information, a simulated fault code is determined; The simulated fault code is injected into the target function to generate simulated error injection instructions corresponding to the bare disk stress testing process.

5. The method according to claim 4, characterized in that, When the simulated fault code indicates that the target disk is faulty, injecting the simulated fault code into the target function includes: Inject a first simulated fault code into the target function. The first simulated fault code indicates that the raw disk stress testing process has at least one of the following conditions: the raw disk stress testing process is suspended, the raw disk stress testing process is blocked, and the raw disk stress testing process times out and does not respond.

6. The method according to claim 4, characterized in that, When the simulated fault code indicates an error in the target disk, injecting the simulated fault code into the target function includes: A second simulated fault code is injected into the target function. The second simulated fault code is the target return value of the target disk, which is the return value generated by the target disk in the event of an abnormal error.

7. The method according to claim 4, characterized in that, When the simulated fault code characterizes the target disk latency response, injecting the simulated fault code into the target function includes: A third simulated fault code is injected into the target function, the third simulated fault code representing a delayed response in the bare disk stress test process.

8. The method according to any one of claims 1 to 3, characterized in that, The method includes: The error test results are reported to the fault simulation environment.

9. An apparatus for simulating disk failure testing, characterized in that, include: The receiving module is used to receive simulated error injection test commands sent from the fault simulation environment; A module is created to create a raw disk stress test process for the target disk according to the simulated error injection test instructions. The generation module is used to generate simulated error injection instructions corresponding to the bare disk stress testing process; The execution module is used to execute the simulated error injection instructions on the bare disk stress test process and generate error injection test results.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device containing the computer-readable storage medium to perform the disk failure simulation test method according to any one of claims 1 to 8.

11. An electronic device, characterized in that, include: One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs including a method for performing a disk failure simulation test as described in any one of claims 1 to 8.

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