A data transmission configuration device and configuration method

By counting and prioritizing data transmissions in the hardware device, the network congestion problem in digital integrated circuit (IC) design is solved, system resource utilization is improved, and resource consumption by software management is avoided.

CN116684356BActive Publication Date: 2026-05-26太初(无锡)电子科技有限公司
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
太初(无锡)电子科技有限公司
Filing Date
2023-06-14
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

In digital integrated circuit (IC) design, due to the large number of on-chip network chips, the number of DMA/DMC requests may exceed the processing capacity of the DME device, leading to network congestion and affecting the normal operation of the network.

Method used

A data transmission configuration device is provided, which counts and prioritizes data transmission in a hardware device, monitors data transmission using an on-chip network chip, and controls the data transmission rate and priority by decreasing and increasing the count value to avoid network congestion.

Benefits of technology

By configuring data transmission in the hardware device, the network congestion problem is solved, the effective utilization rate of system resources is improved, and the resource consumption caused by software management is avoided.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN116684356B_ABST
    Figure CN116684356B_ABST
Patent Text Reader

Abstract

This application discloses a data transmission configuration device and method, specifically relating to the field of data transmission technology. The data transmission configuration device includes an on-chip network chip (Chip-on-Chip) and a digital multimedia extender (DME). The Chip-on-Chip is located in a mesh network and is used to transmit data to the DME via the mesh network. The DME is connected to the edge of the mesh network and is used to receive data via the mesh network. The Chip-on-Chip also counts the data transmissions. The count value in the Chip-on-Chip indicates the data transmission priority of the Chip-on-Chip. When the Chip-on-Chip sends a data transmission request to the DME, the count value decreases; when the Chip-on-Chip receives a signal returned by the DME, the count value increases. This solution enables data transmission configuration in a hardware device, resolving network congestion issues.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of data transmission technology, specifically to a data transmission configuration device and configuration method. Background Technology

[0002] In digital integrated circuit (IC) design, there is DMA / DMC type communication between on-chip network chips and network edge DME devices.

[0003] DMA / DMC requests are initiated by the core in the on-chip network chip, forwarded to the network (mesh) by the chip's on-chip network control unit (NoCControl), and finally sent to the DME device connected at the network edge. Upon receiving the DMA / DMC request, the DME device will perform data transfer operations between the on-chip network and main memory or between main memory devices accordingly.

[0004] Due to the large number of on-chip network chips, the number of DMA / DMC requests may exceed the processing capacity of the DME device. In this case, the excess unprocessed requests will remain in the mesh, causing network congestion and affecting normal network operation. Summary of the Invention

[0005] This application provides a data transmission configuration device and method, which enables data transmission configuration in a hardware device, thus solving the network congestion problem. The technical solution is as follows.

[0006] On the one hand, a data transmission configuration device is provided, the device including an on-chip network chip and a digital multimedia extender (DME);

[0007] The on-chip network chip is located in the mesh network and is used to transmit data to the Digital Multimedia Extender (DME) via the mesh network.

[0008] The Digital Multimedia Extender (DME) is connected to the edge of the mesh network for receiving data through the mesh network;

[0009] The on-chip network chip is also used to count data transmissions; the count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip.

[0010] When the on-chip network chip sends a data transmission request to the Digital Multimedia Extender (DME), the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases.

[0011] In one possible implementation, the step of decreasing the count value when the on-chip network chip sends a data transmission request to the Digital Multimedia Extender (DME) and increasing the count value when the on-chip network chip receives a signal returned by the DME includes:

[0012] When the on-chip network chip sends a data transmission request to the digital multimedia extender (DME), the counter value decreases by the first value.

[0013] When the on-chip network chip receives a signal returned by the Digital Multimedia Extender (DME), the count value increases by a second value.

[0014] In one possible implementation, the first value is equal to the second value;

[0015] Alternatively, the first value is greater than the second value;

[0016] Alternatively, the first value is less than the second value.

[0017] In one possible implementation, the mesh network includes multiple intersecting network lines, with an on-chip network chip located at each intersection of the multiple network lines.

[0018] In one possible implementation, a Digital Multimedia Extender (DME) is connected to the end of each network line in the first direction;

[0019] Each Digital Multimedia Extender (DME) is used to receive data transmitted from various on-chip network chips on the network line it is connected to.

[0020] In one possible implementation, the on-chip network chip includes a core and an on-chip network control unit (NoC Control).

[0021] The core is electrically connected to the on-chip network control unit and is used to send data transmission requests to the on-chip network control unit according to instructions;

[0022] The on-chip network control unit is used to forward data transmission requests to the mesh network.

[0023] In one possible implementation, the on-chip network chip further includes DiscreteStorage; the DiscreteStorage is electrically connected to the on-chip network control unit and is used to provide local storage for the on-chip network chip.

[0024] In one possible implementation, the data transfer includes Dynamic Memory Detection Transfer (DMC) and Direct Memory Access Transfer (DMA).

[0025] When data transfer is performed as a direct memory access transfer (DMA), data is transferred between the discrete storage of the on-chip network chip and main memory.

[0026] When data transmission is performed as Dynamic Memory Detection (DMC), data is transferred between the on-chip network chip's main memory and main memory.

[0027] In one possible implementation, the data transmission request includes a descriptor; the descriptor includes the source address, destination address, and transmission length of the data transmission.

[0028] In another aspect, a data transmission configuration method is provided, which is applied to a data transmission configuration device, the device including an on-chip network chip and a digital multimedia extender (DME); the on-chip network chip is located in a mesh network and is used to transmit data to the DME through the mesh network; the DME is connected to the edge of the mesh network and is used to receive data through the mesh network; the on-chip network chip is also used to count the data transmissions; the count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip; when the on-chip network chip sends a data transmission request to the DME, the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases; the method is executed by the on-chip network chip.

[0029] The method includes:

[0030] Monitor data transmission and count data based on the transmission status;

[0031] When a data transmission request is sent to the Digital Multimedia Extender (DME), the count value decreases; when a signal is received from the DME, the count value increases.

[0032] Data transmission stops when the count reaches the first threshold.

[0033] The technical solution provided in this application may include the following beneficial effects:

[0034] The data transmission configuration device provided in this application includes an on-chip network chip and a digital multimedia extender (DME). The on-chip network chip is located in a mesh network and is used to transmit data to the DME via the mesh network. The DME is connected to the edge of the mesh network and is used to receive data via the mesh network. The on-chip network chip is also used to count data transmissions. The count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip. When the on-chip network chip sends a data transmission request to the DME, the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases. This solution, by using the on-chip network chip to count data transmissions and indicate the data transmission priority, enables data transmission configuration in the hardware device, thus solving the network congestion problem. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of the structure of a data transmission configuration device according to an exemplary embodiment.

[0037] Figure 2 This is a flowchart illustrating a data transmission configuration method according to an exemplary embodiment. Detailed Implementation

[0038] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] Figure 1 This is a schematic diagram illustrating the structure of a data transmission configuration apparatus according to an exemplary embodiment. For example... Figure 1 As shown, the device includes an on-chip network chip and a digital multimedia extender (DME).

[0040] The on-chip network chip is located in the mesh network and is used to transmit data to the Digital Multimedia Extender (DME) via the mesh network.

[0041] The Digital Multimedia Extender (DME) connects to the edge of the mesh network to receive data over the mesh network;

[0042] The on-chip network chip is also used to count data transmissions; the count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip.

[0043] When the on-chip network chip sends a data transmission request to the Digital Multimedia Extender (DME), the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases.

[0044] In digital integrated circuit (IC) design, there is DMA (Dynamic Memory Check) / DMC (Direct Memory Access) type communication between on-chip network chips and DME (Digital Media Extender) devices located at the edge of the mesh network.

[0045] DMA / DMC requests are initiated by the core of the on-chip network chip, forwarded to the mesh network by the chip's on-chip network control unit (NoC Control), and finally sent to the DME device connected to the edge of the mesh network. Upon receiving the DMA / DMC request, the DME device will perform data transfer operations between the on-chip network and main memory or between main memory devices accordingly.

[0046] Since the number of DMA / DMC requests may exceed the processing capacity of the DME device, the excess unprocessed requests will remain in the mesh network, causing congestion and affecting normal network operation. Related technologies address network congestion through software management, i.e., real-time monitoring and management of DMA / DMC requests issued by each on-chip network chip in the mesh network and requests processed by the DME device, to avoid network congestion. However, using software to monitor and manage DMA / DMC requests in the mesh network can lead to memory consumption, resource depletion, and reduced system resource utilization.

[0047] Therefore, this application provides a data transmission configuration device that enables data transmission configuration in a hardware device, thereby solving the network congestion problem.

[0048] Figure 1 The working principle of the data transmission configuration device shown is as follows:

[0049] Network on Chip (NoC) is a network-based communication subsystem implemented on an integrated circuit, typically between modules within a System-on-a-Chip (SoC). The core idea is to port computer networking technology to chip design, fundamentally solving the problems caused by bus architecture. NoC can be defined as a network-based multiprocessor system implemented on a single chip, and it's a method for designing communication subsystems between IP cores and the system chip. An IP core, short for Semiconductor Intellectual Property Core, refers to a reusable module provided by a third party that has passed design verification. Designers using IP cores as a basis for design can shorten the design cycle.

[0050] Computers and other devices connected to the Internet are located at the edge of the Internet, hence the term network edge. The network edge includes hosts and applications (clients and servers). A DME (Digital Media Extender) device, located at the network edge, can connect hosts and applications, such as traditional media devices like televisions and stereos, to the Internet, enabling functions such as watching online videos and listening to online music.

[0051] The on-chip network chip is installed in the computer. When the user inputs a command or the computer system generates a command during operation, the on-chip network chip transmits the data to the mesh network according to the command. After receiving the transmission signal, the mesh network forwards the data to the Digital Multimedia Extender (DME).

[0052] The on-chip network chip monitors data transmission. When data is sent from the on-chip network chip to the Digital Multimedia Extender (DME), the count value is decreased; when the on-chip network chip receives a signal from the DME, indicating that the DME has processed the previous instructions, the count value is increased.

[0053] In one possible implementation, when the on-chip network chip sends a data transmission request to the digital multimedia extender (DME), the count value decreases by a first value;

[0054] When the on-chip network chip receives a signal returned by the Digital Multimedia Extender (DME), the count value increases by a second value.

[0055] Optionally, an initial count value and a first threshold can be set according to actual needs (e.g., based on the transmission capacity of the mesh network). Based on the initial count value, when the on-chip network chip sends a data transmission request to the Digital Multimedia Extender (DME), the count value decreases by a first value; when the on-chip network chip receives a signal returned by the DME, the count value increases by a second value.

[0056] Data transmission proceeds normally when the count value exceeds the first threshold; data transmission stops when the count value decreases to the first threshold; and data transmission resumes when the count value exceeds the first threshold again.

[0057] Optionally, the count value is used to control the data transmission frequency of the on-chip network chip. When the count value is greater than the second threshold, the data transmission frequency of the on-chip network chip is unrestricted; when the count value is less than the first and second thresholds but greater than the third threshold, the data transmission frequency of the on-chip network chip is less than the first frequency; when the count value is less than or equal to the third threshold but greater than the first threshold, the data transmission frequency of the on-chip network chip is less than the second frequency. Wherein, the second threshold > the third threshold > the first threshold; and the first frequency > the second frequency. The second threshold, the third threshold, the first frequency, and the second frequency can all be set according to actual needs.

[0058] For example, a first threshold is set to 0, meaning that data transmission stops when the count value decreases to 0.

[0059] Optionally, the first and second values ​​can be set according to actual needs to control the data transmission rate.

[0060] In one possible implementation, the first value is equal to the second value;

[0061] Alternatively, the first value is greater than the second value;

[0062] Alternatively, the first value is less than the second value.

[0063] When the first value equals the second value, the on-chip network chip sends data transmission requests to the Digital Multimedia Extender (DME) at a speed consistent with the speed at which the DME processes instructions. When the first value is greater than the second value, the count value is more likely to decrease to the first threshold, meaning data transmission is more likely to stop, thus suppressing the data transmission rate and reducing the number of data transmissions in the same amount of time. When the first value is less than the second value, the count value is less likely to decrease to the first threshold, meaning data transmission is more likely to stop, thus increasing the data transmission rate and increasing the number of data transmissions in the same amount of time.

[0064] Furthermore, since the count value may be negative and unable to recover to a positive value, or the count value may be very large, when the first value is greater than the second value or less than the second value, the count value can be reset at regular intervals. Optionally, the count value of the on-chip network chip can be reset (i.e., reset to the initial count value) every first time interval.

[0065] Furthermore, the first and second values ​​can be dynamically changed. For example, when the number of commands is normal, the first value is set to equal the second value; when there are many commands, which may cause network congestion, the first value is set to be greater than the second value, so that data transmission stops from time to time to prevent congestion; when there are few commands, the first value is set to be less than the second value, so that data transmission continues and maintains normal transmission.

[0066] In one possible implementation, the mesh network includes multiple intersecting network lines, with an on-chip network chip located at each intersection of the multiple network lines.

[0067] Optionally, multiple network lines can intersect vertically, meaning that multiple network lines can be divided into horizontal lines and vertical lines.

[0068] In one possible implementation, a Digital Multimedia Extender (DME) is connected to the end of each network line in the first direction;

[0069] Each Digital Multimedia Extender (DME) is used to receive data transmitted from various on-chip network chips on the network line it is connected to.

[0070] For example, a Digital Multimedia Extender (DME) is connected to the end of each network line in the vertical direction.

[0071] Optionally, the count value is used to control the priority of data transmission among the on-chip network chips on each network line. Optionally, each on-chip network chip notifies each other of its count value through the mesh network. Optionally, the count values ​​of each on-chip network chip are sorted by size, and the on-chip network chips with count values ​​ranking higher in the first proportion are given priority for data transmission. The first proportion can be set according to actual needs; for example, setting it to 50% will prioritize the on-chip network chips with count values ​​ranking in the top 50% for data transmission.

[0072] Optionally, the frequency of the on-chip network chips whose count values ​​are ranked after the second ratio can be controlled to be lower than the first frequency. The second ratio can be set according to actual needs. For example, if it is set to 2 / 3, the on-chip network chips whose count values ​​are ranked after 2 / 3 (that is, the on-chip network chips in the last 1 / 3) will be given priority for data transmission.

[0073] In one possible implementation, the on-chip network chip includes a core and an on-chip network control unit, NoCControl.

[0074] This core is electrically connected to the on-chip network control unit and is used to send data transmission requests to the on-chip network control unit according to instructions;

[0075] The on-chip network control unit is used to forward data transmission requests to the mesh network.

[0076] In one possible implementation, the on-chip network chip also includes discrete storage; the discrete storage is electrically connected to the on-chip network control unit and is used to provide local storage for the on-chip network chip.

[0077] Memory is used to store programs and data. Discrete memory is the local storage of on-chip network chips. Data transfer may occur between the discrete memories of different on-chip network chips, or between discrete memory and main memory. Main memory is the computer system's RAM.

[0078] In one possible implementation, the data transfer includes Dynamic Memory Detection Transfer (DMC) and Direct Memory Access Transfer (DMA).

[0079] When data transfer is performed as a direct memory access transfer (DMA), data is transferred between the discrete storage of the on-chip network chip and main memory.

[0080] When data transmission is performed as Dynamic Memory Detection (DMC), data is transferred between the on-chip network chip's main memory and main memory.

[0081] The Digital Multimedia Extender (DME) is responsible for DMA / DMC transfers across all on-chip network chips on its line. DMA and DMC are both data transfer operations controlled and executed by the DME. DMA refers to data transfer between discrete memory and main memory within the on-chip network chip, while DMC refers to data transfer between main memory modules.

[0082] In one possible implementation, the data transfer request includes a descriptor; the descriptor includes the source address, destination address, and transfer length of the data transfer.

[0083] Optionally, the on-chip network chip also includes a counter, Credit Cnt (credit count), which is used by the on-chip network chip to count data transmissions. This counter is a small module within the on-chip network control unit NoCControl, implemented using circuit structures in related technologies, and electrically connected to the on-chip network control unit NoCControl. The counter stores an initially set credit value (i.e., an initial count value).

[0084] Each time the on-chip network control unit (NoC Control) forwards a DMA / DMC request to the mesh network, the credit value in the credit counter decreases. When the digital multimedia extender (DME) sends a signal back through the mesh network indicating that the DMA / DMC request previously sent by the on-chip network chip has been processed, the credit value in the credit counter increases. If the credit value of the on-chip network chip decreases to the first threshold, the on-chip network chip will no longer be able to send DMA / DMC requests to the mesh network until the credit value is restored.

[0085] Therefore, by using a hardware device (i.e., a counter) to set an upper limit on the number of DMA / DMC requests sent by each on-chip network chip, the number of DMA / DMC requests in the network is kept at a controllable level, avoiding mesh network congestion. At this point, the software in the computer only needs to access the counter in the on-chip network chip to obtain information about the DMA / DMC requests sent by that chip.

[0086] In summary, the data transmission configuration device provided in this application includes an on-chip network chip and a digital multimedia extender (DME). The on-chip network chip is located in a mesh network and is used to transmit data to the DME via the mesh network. The DME is connected to the edge of the mesh network and is used to receive data via the mesh network. The on-chip network chip is also used to count data transmissions. The count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip. When the on-chip network chip sends a data transmission request to the DME, the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases. This solution, by using the on-chip network chip to count data transmissions and indicate the data transmission priority, enables data transmission configuration in the hardware device, thus solving the network congestion problem.

[0087] Figure 2 This is a flowchart illustrating a data transmission configuration method according to an exemplary embodiment. For example... Figure 2 As shown, the method is applied to Figure 1 The data transmission configuration apparatus shown is wherein the method is executed by an on-chip network chip;

[0088] The method includes the following steps:

[0089] Step 201: Monitor data transmission and count data based on the transmission status.

[0090] Step 202: When a data transmission request is sent to the Digital Multimedia Extender (DME), the count value is decreased; when a signal is received from the DME, the count value is increased.

[0091] Optionally, an initial count value and a first threshold can be set according to actual needs (e.g., based on the transmission capacity of the mesh network). Based on the initial count value, when the on-chip network chip sends a data transmission request to the Digital Multimedia Extender (DME), the count value decreases by a first value; when the on-chip network chip receives a signal returned by the DME, the count value increases by a second value. Data transmission proceeds normally when the count value exceeds the first threshold.

[0092] Step 203: When the count value is the first threshold, stop data transmission.

[0093] Optionally, data transmission is stopped when the count value decreases to the first threshold; data transmission is resumed when the count value exceeds the first threshold again.

[0094] In summary, the data transmission configuration device provided in this application includes an on-chip network chip and a digital multimedia extender (DME). The on-chip network chip is located in a mesh network and is used to transmit data to the DME via the mesh network. The DME is connected to the edge of the mesh network and is used to receive data via the mesh network. The on-chip network chip is also used to count data transmissions. The count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip. When the on-chip network chip sends a data transmission request to the DME, the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases. This solution, by using the on-chip network chip to count data transmissions and indicate the data transmission priority, enables data transmission configuration in the hardware device, thus solving the network congestion problem.

[0095] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0096] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A data transmission configuration device, characterized in that, The device includes an on-chip network chip and a digital multimedia extender (DME). The on-chip network chip is located in the mesh network and is used to transmit data to the Digital Multimedia Extender (DME) through the mesh network; the mesh network includes multiple intersecting network lines, and each intersection of the multiple network lines is provided with one of the on-chip network chips; The Digital Multimedia Extender (DME) is connected to the edge of the mesh network for receiving data through the mesh network; The on-chip network chip is also used to count data transmissions; the count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip; when the count value is greater than a second threshold, the data transmission frequency of the on-chip network chip is unrestricted; when the count value is less than the second threshold but greater than a third threshold, the data transmission frequency of the on-chip network chip is less than a first frequency; when the count value is less than or equal to the third threshold but greater than the first threshold, the data transmission frequency of the on-chip network chip is less than the second frequency; wherein, the second threshold > the third threshold > the first threshold; and the first frequency > the second frequency. When the on-chip network chip sends a data transmission request to the digital multimedia extender (DME), the count value decreases; when the on-chip network chip receives a signal returned by the DME, the count value increases. The count value decreases when the on-chip network chip sends a data transmission request to the digital multimedia extender (DME); and increases when the on-chip network chip receives a signal returned by the DME, including: When the on-chip network chip sends a data transmission request to the digital multimedia extender (DME), the counter value decreases by the first value. When the on-chip network chip receives a signal returned by the Digital Multimedia Extender (DME), the counter value increases by a second value; the first value is equal to the second value. Alternatively, the first value is greater than the second value; Alternatively, the first value is less than the second value; When the first value equals the second value, the speed at which the on-chip network chip sends data transmission requests to the Digital Multimedia Extender (DME) is consistent with the speed at which the DME processes instructions; when the first value is greater than the second value, the number of data transmissions in the same amount of time decreases; when the first value is less than the second value, the number of data transmissions in the same amount of time increases.

2. The apparatus according to claim 1, characterized in that, Each network line in the vertical direction is connected to a Digital Multimedia Extender (DME) at its end; Each Digital Multimedia Extender (DME) is used to receive data transmitted from various on-chip network chips on the network line it is connected to.

3. The apparatus according to claim 1 or 2, characterized in that, The on-chip network chip includes a core and a network control unit (NoC Control). The core is electrically connected to the on-chip network control unit and is used to send data transmission requests to the on-chip network control unit according to instructions; The on-chip network control unit is used to forward data transmission requests to the mesh network.

4. The apparatus according to claim 3, characterized in that, The on-chip network chip also includes discrete storage; the discrete storage is electrically connected to the on-chip network control unit and is used to provide local storage for the on-chip network chip.

5. The apparatus according to claim 4, characterized in that, The data transmission includes Dynamic Memory Detection Transfer (DMC) and Direct Memory Access Transfer (DMA). When data transfer is performed as a direct memory access transfer (DMA), data is transferred between the discrete storage of the on-chip network chip and main memory. When data transmission is performed as Dynamic Memory Detection (DMC), data is transferred between the on-chip network chip's main memory and main memory.

6. The apparatus according to claim 1, characterized in that, The data transmission request includes a descriptor; the descriptor includes the source address, destination address, and transmission length of the data transmission.

7. A data transmission configuration method, characterized in that, The method is applied to a data transmission configuration device, which includes an on-chip network chip and a digital multimedia extender (DME). The on-chip network chip is located in a mesh network and is used to transmit data to the DME via the mesh network. The DME is connected to the edge of the mesh network and is used to receive data via the mesh network. The on-chip network chip is also used to count the data transmissions. The count value in the on-chip network chip is used to indicate the data transmission priority of the on-chip network chip. When the on-chip network chip sends a data transmission request to the DME, the count value decreases. When the on-chip network chip receives a signal returned by the Digital Multimedia Extender (DME), the count value increases; the method is executed by the on-chip network chip. The method includes: Monitor data transmission and count data based on the transmission status; When a data transmission request is sent to the Digital Multimedia Extender (DME), the count value decreases; when a signal is received from the DME, the count value increases. Data transmission stops when the count reaches the first threshold.