A filtered dual-polarized phased array antenna unit

Abstract

The application discloses a filtering dual-polarized phased array antenna unit, which comprises a parasitic patch layer, a driven patch layer and a feed layer arranged in sequence from top to bottom. The feed layer is used for connecting two signals inputted from outside. Based on the two signals, two equal-amplitude and in-phase signals are generated. After filtering, two filtering signals are outputted to the driven patch layer. Based on the two filtering signals, the driven patch layer generates orthogonal polarization signals corresponding to horizontal polarization direction and vertical polarization direction, which are radiated to free space. The parasitic patch layer is used for expanding the working bandwidth of the filtering dual-polarized phased array antenna unit, so that the filtering dual-polarized phased array antenna unit has wide bandwidth and improved out-of-band suppression characteristics. The filtering dual-polarized phased array antenna unit has the advantages of filtering function and dual polarization.

Description

TECHNICAL FIELD

[0001] The present application relates to an antenna unit, in particular to a filtering dual-polarized phased array antenna unit. BACKGROUND

[0002] With the development of new generation wireless communication technology, phased array antennas are widely used in radar, satellite communication and 5th generation (5G) millimeter wave mobile communication due to their flexible beamforming, high integration and fast beam agility. On the one hand, with the substantial increase in the density of antenna arrays, the problem of near coupling needs to be solved. When two phased array antennas of adjacent frequency bands work at a very small distance, the radiation electric field of one phased array antenna is necessarily strongly affected by the radiation electric field of the other phased array antenna. In the traditional communication system design, filters are used as the active link of the antenna and the phased array antenna in cascade due to their good out-of-band rejection capability. However, the size and performance pressure of the entire communication system will increase dramatically. An effective solution is to integrate the filtering function into the phased array antenna to improve the integration of the active link and the phased array antenna. On the other hand, in the field of satellite communication, the phased array antenna with filtering characteristics can help reduce out-of-band interference signals from other sources, such as other on-orbit satellites, ground transmitters, and even atmospheric noise, especially for Ku-band satellites with high distribution density and considerable resources in low earth orbit. Therefore, introducing the filtering function into the phased array antenna has considerable application scenarios and research significance.

[0003] A filtering phased array antenna is formed by a plurality of filtering phased array antenna units arranged in an array. At present, in the research of filtering antenna units, the traditional filtering antenna unit is usually affected by its large size and is not suitable for being used as a filtering phased array antenna unit (which requires the distance between filtering phased array antenna units to be less than 0.5 wavelength). Some researchers have designed a filtering phased array antenna unit whose size is reduced by half in one dimension by using the mirror theory, which realizes a one-dimensional scanning filtering phased array antenna. However, this design scheme can only produce single-polarized radiation and cannot meet the demand of wireless communication systems with orthogonal linear polarization. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a filtering dual-polarized phased array antenna unit which has filtering function and can realize dual polarization.

[0005] The technical scheme adopted by the present application to solve the above technical problems is: a filtering dual-polarized phased array antenna unit, comprising a parasitic patch layer, a driven patch layer and a feed layer arranged in order from top to bottom, the feed layer is used for accessing two externally input signals, and two equal-amplitude in-phase signals are generated based on the two signals respectively, then the two signals are filtered to obtain two filtered signal outputs to the driven patch layer, the driven patch layer generates orthogonal polarization signals corresponding to horizontal polarization direction and vertical polarization direction based on two groups of filtered signals, and the orthogonal polarization signals are radiated to the free space, and the parasitic patch layer is used for expanding the operating bandwidth of the filtering dual-polarized phased array antenna unit, so that the filtering dual-polarized phased array antenna unit has a wide bandwidth and improves the out-of-band suppression characteristic.

[0006] The parasitic patch layer comprises a first dielectric substrate and a cross-shaped metal patch attached to the upper surface of the first dielectric substrate, the first dielectric substrate is a square plate, the length direction of the first dielectric substrate is defined as the left-right direction, the width direction of the first dielectric substrate is defined as the front-rear direction, and the height direction of the first dielectric substrate is defined as the up-down direction, and the length of the first dielectric substrate is equal to its width; the cross-shaped metal patch comprises a first rectangular patch, a second rectangular patch and a third rectangular patch, the center of the first rectangular patch is located on the central axis of the first dielectric substrate, the front end surface of the first rectangular patch is parallel to the plane where the front end surface of the first dielectric substrate is located, the second rectangular patch is located on the front side of the first rectangular patch, the distance from the left end surface of the second rectangular patch to the right end surface thereof is equal to the distance from the front end surface of the first rectangular patch to the rear end surface thereof, the rear end surface of the second rectangular patch is connected with the front end surface of the first rectangular patch in a state of adhesion, the third rectangular patch is located on the rear side of the first rectangular patch, the third rectangular patch is front-rear symmetric with the second rectangular patch relative to the first rectangular patch, the first rectangular patch, the second rectangular patch and the third rectangular patch are all left-right symmetric relative to the symmetry plane of the first dielectric substrate in the front-rear direction, and the first rectangular patch, the second rectangular patch and the third rectangular patch form a cross shape; the length of the first rectangular patch in the left-right direction is less than the side length of the first dielectric substrate, and the length of the first rectangular patch in the left-right direction is equal to the distance between the front end surface of the second rectangular patch and the rear end surface of the third rectangular patch.

[0007] The driving patch layer comprises a second dielectric substrate, a square driving patch and a square ring patch, the second dielectric substrate is located below the first dielectric substrate, the second dielectric substrate is a square plate, the front end surface of the second dielectric substrate is aligned with the front end surface of the first dielectric substrate, the back end surface of the second dielectric substrate is aligned with the back end surface of the first dielectric substrate, the left end surface of the second dielectric substrate is aligned with the left end surface of the first dielectric substrate, the right end surface of the second dielectric substrate is aligned with the right end surface of the first dielectric substrate, the square driving patch and the square ring patch are attached to the upper surface of the second dielectric substrate, the center of the square driving patch is located on the central axis of the second dielectric substrate, the front end surface of the square driving patch is parallel to the plane where the front end surface of the second dielectric substrate is located, and the side length of the square driving patch is smaller than the side length of the second dielectric substrate; the square ring patch surrounds the square driving patch, the center of the square ring patch is located on the central axis of the second dielectric substrate, the front end surface of the outer circle of the square ring patch is parallel to the plane where the front end surface of the second dielectric substrate is located, the outer circle side length of the square ring patch is smaller than the length of the second dielectric substrate, the inner circle side length of the square ring patch is greater than the side length of the square driving patch, and a square ring gap is formed between the square ring patch and the square driving patch, which is referred to as a first square ring gap; the square ring patch is provided with a first rectangular gap, a second rectangular gap, a third rectangular gap and a fourth rectangular gap, the front end surface of the first rectangular gap is located in the same plane as the front end surface of the outer circle of the square ring patch, the back end surface is located in the same plane as the front end surface of the inner circle of the square ring patch, the distance from the left end surface of the first rectangular gap to the left end surface of the outer circle of the square ring patch is equal to the distance from the right end surface of the first rectangular gap to the right end surface of the outer circle of the square ring patch, the width of the first rectangular gap in the left-right direction is 1 / 8-1 / 10 of the length of the first rectangular gap in the front-back direction, the second rectangular gap is front-back symmetric with the first rectangular gap with respect to the symmetry plane of the square ring patch in the left-right direction, the third rectangular gap will be completely coincided with the first rectangular gap if it is rotated 90 degrees clockwise with the central axis of the second dielectric substrate as the axis, and the fourth rectangular gap will be completely coincided with the second rectangular gap if it is rotated 90 degrees clockwise with the central axis of the second dielectric substrate as the axis, the first rectangular gap, the second rectangular gap, the third rectangular gap and the fourth rectangular gap divide the square ring patch into four identical L-shaped metal patches, so as to introduce the zero point of the lower side band of the filter response.

[0008] The feeding layer comprises a cross-shaped slit layer, a first feeding layer, a second feeding layer, a first feeding via, a second feeding via, a first metal via group, a second metal via group, a third metal via group, a fourth metal via group and a fifth metal via group, the cross-shaped slit layer, the first feeding layer and the second feeding layer are stacked from top to bottom; the cross-shaped slit layer comprises a third dielectric substrate and a first metal layer attached to the upper surface of the third dielectric substrate and a cross-shaped slit opened on the first metal layer, the third dielectric substrate is below the second dielectric substrate, the third dielectric substrate is a square plate, the front end surface of the third dielectric substrate is aligned with the front end surface of the second dielectric substrate, the rear end surface of the third dielectric substrate is aligned with the rear end surface of the second dielectric substrate, the left end surface of the third dielectric substrate is aligned with the left end surface of the second dielectric substrate, and the right end surface of the third dielectric substrate is aligned with the right end surface of the second dielectric substrate; the first metal layer is square, the center of the first metal layer is on the central axis of the third dielectric substrate, the front end surface of the first metal layer is aligned with the front end surface of the third dielectric substrate, the rear end surface of the first metal layer is aligned with the rear end surface of the third dielectric substrate, the left end surface of the first metal layer is aligned with the left end surface of the third dielectric substrate, the right end surface of the first metal layer is aligned with the right end surface of the third dielectric substrate, the upper surface of the third dielectric substrate is exposed at the cross-shaped slit, the cross-shaped slit comprises a first rectangular horizontal slit, a second rectangular horizontal slit and a third rectangular horizontal slit, the center of the first rectangular horizontal slit is on the central axis of the third dielectric substrate, the front end surface of the first rectangular horizontal slit is parallel to the front end surface of the first metal layer, the second rectangular horizontal slit is located on the front side of the first rectangular horizontal slit, the front end surface of the second rectangular horizontal slit is parallel to the front end surface of the first metal layer and has a distance therebetween, the rear end surface of the second rectangular horizontal slit is connected to the front end surface of the first rectangular horizontal slit in a fitted state, the distance from the left end surface of the second rectangular horizontal slit to the right end surface thereof is equal to the width of the first rectangular horizontal slit in the front-rear direction, the third rectangular horizontal slit is located on the rear side of the first rectangular horizontal slit, the third rectangular horizontal slit and the second rectangular horizontal slit are front-rear symmetric with respect to the first rectangular horizontal slit, the first rectangular horizontal slit, the second rectangular horizontal slit and the third rectangular horizontal slit are left-right symmetric with respect to the front-rear symmetric plane of the first metal layer, and the first rectangular horizontal slit, the second rectangular horizontal slit and the third rectangular horizontal slit form a cross shape; the length of the first rectangular horizontal slit in the left-right direction is less than the side length of the first metal layer,The length of the first rectangular horizontal slit along the left-right direction is equal to the distance between the front end surface of the second rectangular horizontal slit and the rear end surface of the third rectangular horizontal slit; the first feeding layer comprises a fourth dielectric substrate and a first Y-shaped feeding line attached to the upper surface of the fourth dielectric substrate, the first Y-shaped feeding line is realized by a strip line and has one input end and two output ends, the fourth dielectric substrate is located below the third dielectric substrate, the fourth dielectric substrate is a square plate, the front end surface of the fourth dielectric substrate is aligned with the front end surface of the third dielectric substrate in the up-down direction, the rear end surface of the fourth dielectric substrate is aligned with the rear end surface of the third dielectric substrate in the up-down direction, the left end surface of the fourth dielectric substrate is aligned with the left end surface of the third dielectric substrate in the up-down direction, and the right end surface of the fourth dielectric substrate is aligned with the right end surface of the third dielectric substrate in the up-down direction; the first Y-shaped feeding line comprises a first T-shaped power divider, a first curved feeding line, a first output feeding line and a second output feeding line, the first curved feeding line extends along the front-rear direction, the starting end of the first curved feeding line is located near the left front corner of the fourth dielectric substrate and serves as the input end of the first Y-shaped feeding line, the first T-shaped power divider has one input end and two output ends, the input end of the first T-shaped power divider is connected to the terminal end of the first curved feeding line in a fitted manner, the two output ends of the first T-shaped power divider are connected to one end of the first output feeding line and one end of the second output feeding line in a fitted manner, respectively, the first output feeding line and the second output feeding line serve as the two output ends of the first Y-shaped feeding line, respectively, the input end of the first Y-shaped feeding line is used for accessing an external input signal, when the signal is input from the input end of the first Y-shaped feeding line, the signal is input into the first T-shaped power divider through the first curved feeding line, the first T-shaped power divider uniformly distributes the signal output thereto to the first output feeding line and the second output feeding line, and the first output feeding line and the second output feeding line output the distributed signal correspondingly; the first output feeding line and the second output feeding line are in front-rear symmetry with the symmetry plane of the fourth dielectric substrate along the left-right direction, the first output feeding line comprises a first rectangular feeding line, a first open-circuit stub, a second open-circuit stub, a third open-circuit stub, a fourth open-circuit stub and a first F-shaped filter stub, the front end surface of the first rectangular feeding line is parallel to the plane in which the front end surface of the fourth dielectric substrate lies, the length direction of the first rectangular feeding line is along the left-right direction, and the width direction of the first rectangular feeding line is along the front-rear direction, the left end surface of the first rectangular feeding line is one end of the first output feeding line, the first F-shaped filter stub comprises a first rectangular strip, a second rectangular strip and a third rectangular strip, the front end surface of the first rectangular strip is parallel to the front end surface of the first rectangular feeding line, the length direction of the first rectangular strip is along the front-rear direction, and the width direction of the first rectangular strip is along the left-right direction,The rear end surface of the first rectangular strip is connected with the front end surface of the first rectangular feed line in a close manner, the front end surface of the second rectangular strip is in the same plane with the front end surface of the first rectangular strip, the length direction of the second rectangular strip is along the left-right direction, the width direction is along the front-rear direction, the left end surface of the second rectangular strip is connected with the right end surface of the first rectangular strip in a close manner, the third rectangular strip is located at the rear side of the second rectangular strip and the front side of the first rectangular feed line, the third rectangular strip is parallel to the second rectangular strip, the left end surface of the third rectangular strip is connected with the right end surface of the first rectangular strip in a close manner, there is a distance between the rear end surface of the second rectangular strip and the front end surface of the third rectangular strip, there is a distance between the rear end surface of the third rectangular strip and the front end surface of the first rectangular feed line, the right end surface of the third rectangular strip is located at the left side of the plane where the right end surface of the second rectangular strip is located, the right end surface of the second rectangular strip is located at the left side of the plane where the right end surface of the first rectangular feed line is located, the first open stub is a rectangular metal patch, the front end surface of the first open stub is parallel to the front end surface of the first rectangular feed line, the length direction of the first open stub is along the front-rear direction, the width direction is along the left-right direction, the first open stub is located at the front side of the first rectangular feed line and the left side of the first rectangular strip, the rear end surface of the first open stub is connected with the front end surface of the first rectangular feed line in a close manner, the length of the first open stub is smaller than the distance between the rear end surface of the third rectangular strip and the front end surface of the first rectangular feed line, the second open stub is a rectangular metal patch, the front end surface of the second open stub is parallel to the front end surface of the first rectangular feed line, the length direction of the second open stub is along the left-right direction, the width direction is along the front-rear direction, the second open stub is located at the rear side of the first rectangular feed line, the front end surface of the second open stub is connected with the rear end surface of the first rectangular feed line in a close manner, the width of the first open stub is equal to the length of the second open stub, the left end surface of the first open stub is in the same plane with the left end surface of the second open stub, the first open stub and the third open stub are left-right symmetrical with the plane where the right end surface of the first rectangular strip is located, the right end surface of the third open stub is located at the left side of the plane where the right end surface of the third rectangular strip is located, the second open stub and the fourth open stub are left-right symmetrical with the plane where the right end surface of the first rectangular strip is located, the second feed layer comprises a fifth dielectric substrate, a second Y-shaped feed line attached to the upper surface of the fifth dielectric substrate and a second metal layer attached to the lower surface of the fifth dielectric substrate, the fifth dielectric substrate is located below the fourth dielectric substrate, the fifth dielectric substrate is a square plate, the front end surface of the fifth dielectric substrate is vertically aligned with the front end surface of the fourth dielectric substrate,The rear end face of the fifth dielectric substrate is vertically aligned with the rear end face of the fourth dielectric substrate, the left end face of the fifth dielectric substrate is vertically aligned with the left end face of the fourth dielectric substrate, and the right end face of the fifth dielectric substrate is vertically aligned with the right end face of the fourth dielectric substrate. The second Y-type feed line is implemented using a stripline and has one input terminal and two output terminals. The second Y-type feed line includes a second T-type power divider, a second curved feed line, a third output feed line, and a fourth output feed line. The second curved feed line extends in the left-right direction, and its starting end is located near the right rear corner of the fifth dielectric substrate, serving as the input terminal of the second Y-type feed line. The second T-type power divider has a... The second T-type power divider has one input terminal and two output terminals. The input terminal of the second T-type power divider is connected to the end of the second curved feeder and is in a close-fitting state. The two output terminals of the second T-type power divider are respectively connected to one end of the third output feeder and one end of the fourth output feeder and are in a close-fitting state. The third output feeder and the fourth output feeder serve as the two output terminals of the second Y-type feeder. The input terminal of the second Y-type feeder is used to input an external signal. When the external signal is input from the input terminal of the second Y-type feeder, it is input to the second T-type power divider through the second curved feeder. The second T-type power divider evenly distributes the signal output thereto to the third output feeder. The third and fourth output feed lines will output the signals allocated to them respectively; the third and fourth output feed lines are symmetrical about the plane of symmetry of the fifth dielectric substrate along the front-back direction; the third output feed line includes a second rectangular feed line, a fifth open-circuit stub, a sixth open-circuit stub, a seventh open-circuit stub, an eighth open-circuit stub, and a second F-type filter stub; the front end face of the second rectangular feed line is parallel to the plane containing the front end face of the fifth dielectric substrate; the length direction of the second rectangular feed line is along the front-back direction, and the width direction is along the left-right direction; the rear end face of the second rectangular feed line is one end of the third output feed line; the second F-type filter... The stub includes a fourth rectangular strip, a fifth rectangular strip, and a sixth rectangular strip. The front end face of the fourth rectangular strip is parallel to the front end face of the second rectangular feed line. The length direction of the fourth rectangular strip is along the left-right direction, and the width direction is along the front-back direction. The right end face of the fourth rectangular strip is connected to and in contact with the left end face of the second rectangular feed line. The left end face of the fifth rectangular strip is on the same plane as the left end face of the fourth rectangular strip. The length direction of the fifth rectangular strip is along the front-back direction, and the width direction is along the left-right direction. The rear end face of the fifth rectangular strip is connected to and in contact with the front end face of the fourth rectangular strip. The sixth rectangular strip is located to the right of the fifth rectangular strip and to the left of the second rectangular feed line.The sixth rectangular strip is parallel to the fifth rectangular strip, the rear end surface of the sixth rectangular strip is connected to the front end surface of the fourth rectangular strip in a close-fitting manner, there is a distance between the right end surface of the fifth rectangular strip and the left end surface of the sixth rectangular strip, there is a distance between the right end surface of the sixth rectangular strip and the left end surface of the second rectangular feeder, the front end surface of the sixth rectangular strip is located at the rear side of the plane on which the front end surface of the fifth rectangular strip is located, the front end surface of the fifth rectangular strip is located at the rear side of the plane on which the front end surface of the second rectangular feeder is located, the fifth open-circuit stub is a rectangular metal patch, the left end surface of the fifth open-circuit stub is parallel to the left end surface of the second rectangular feeder, and the length direction thereof is along the left-right direction and the width direction thereof is along the front-rear direction, the fifth open-circuit stub is located at the left side of the second rectangular feeder and the rear side of the fourth rectangular strip, the right end surface of the fifth open-circuit stub is connected to the left end surface of the second rectangular feeder in a close-fitting manner, the length of the fifth open-circuit stub is smaller than the distance between the right end surface of the sixth rectangular strip and the left end surface of the second rectangular feeder, the sixth open-circuit stub is a rectangular metal patch, the right end surface of the fifth open-circuit stub is parallel to the right end surface of the second rectangular feeder, and the length direction thereof is along the front-rear direction and the width direction thereof is along the left-right direction, the sixth open-circuit stub is located at the right side of the second rectangular feeder, the left end surface of the sixth open-circuit stub is connected to the right end surface of the second rectangular feeder in a close-fitting manner, the width of the fifth open-circuit stub is equal to the length of the sixth open-circuit stub, the rear end surface of the fifth open-circuit stub is located on the same plane as the rear end surface of the sixth open-circuit stub, the fifth open-circuit stub and the seventh open-circuit stub are front-rear symmetric with respect to the plane on which the front end surface of the fourth rectangular strip is located, the front end surface of the seventh open-circuit stub is located at the rear side of the plane on which the front end surface of the sixth rectangular strip is located, the sixth open-circuit stub and the eighth open-circuit stub are front-rear symmetric with respect to the plane on which the front end surface of the fourth rectangular strip is located, the second metal layer is attached to the lower surface of the fifth dielectric substrate, the second metal layer is square, the center of the second metal layer is located on the central axis of the fifth dielectric substrate, the front end surface of the second metal layer is vertically aligned with the front end surface of the fifth dielectric substrate, the rear end surface of the second metal layer is vertically aligned with the rear end surface of the fifth dielectric substrate, the left end surface of the second metal layer is vertically aligned with the left end surface of the fifth dielectric substrate, and the right end surface of the second metal layer is vertically aligned with the right end surface of the fifth dielectric substrate, the first feeding via sequentially penetrates the fifth dielectric substrate, the fourth dielectric substrate, the starting end of the first Y-shaped feeder and the first metal layer from the plane on which the lower end surface of the second metal layer is located, the first feeding via is a metalized through hole, and the cross section thereof is circular,The first feed-through hole is connected with the starting end of the first curved feed line, but is not connected with the second metal layer and the first metal layer, the second feed-through hole sequentially penetrates the fifth dielectric substrate, the starting end of the second Y-shaped feed line, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the second feed-through hole is a metalized through hole, and the cross section thereof is circular, the axis of which is perpendicular to the fifth dielectric substrate, the second feed-through hole is connected with the starting end of the second curved feed line, but is not connected with the second metal layer and the first metal layer, the first metal through hole group comprises a plurality of first metalized through holes, the plurality of first metalized through holes are distributed around the first feed-through hole at intervals, each first metalized through hole sequentially penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the cross section of each first metalized through hole in the first metal through hole group is circular, the axis of which is perpendicular to the fifth dielectric substrate, the second metal through hole group comprises a plurality of second metalized through holes, the plurality of second metalized through holes are distributed around the second feed-through hole at intervals, each second metalized through hole sequentially penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the cross section of each second metalized through hole in the second metal through hole group is circular, the axis of which is perpendicular to the fifth dielectric substrate, the third metal through hole group comprises eight third metalized through holes, the eight third metalized through holes are distributed around the cross-shaped gap at intervals, the third metal through hole group sequentially penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the cross section of each third metalized through hole in the third metal through hole group is circular, the axis of which is perpendicular to the fifth dielectric substrate, the fourth metal through hole group comprises four fourth metalized through holes, the four fourth metalized through holes are distributed in the interval surrounded by the third metal through hole group and are located near the cross-shaped gap, the fourth metal through hole group sequentially penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the cross section of each fourth metalized through hole in the fourth metal through hole group is circular, the axis of which is perpendicular to the fifth dielectric substrate, a plurality of fifth metalized through holes which are uniformly and regularly arranged and surround a square area with a square cross section are arranged at the four peripheral edges of the feed layer, the cross section of each fifth metalized through hole is semicircular,The distance between each two adjacent fifth metallized via centers is less than twice the diameter of the fifth metallized via, each fifth metallized via sequentially penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer from the plane where the lower end surface of the second metal layer is located, the central axis of the fifth metallized via is perpendicular to the fifth dielectric substrate, and the central axis of each fifth metallized via is located on the plane where the front end surface, the rear end surface, the left end surface and the right end surface of the fifth dielectric substrate are located respectively; the first Y-type feeder, the second Y-type feeder, the cross-shaped slot, the first metal via group, the second metal via group, the third metal via group and the fourth metal via group are all located in the square area.

[0009] The second metal layer and the first metal layer are respectively provided with annular gaps around the first feeding via, so that the first feeding via is not connected with the second metal layer and the first metal layer; the second metal layer and the first metal layer are also provided with annular gaps around the second feeding via, so that the second feeding via is not connected with the second metal layer and the first metal layer.

[0010] The first dielectric substrate and the second dielectric substrate are provided with a sixth dielectric substrate, the sixth dielectric substrate is a square foam board, the sixth dielectric substrate is fixedly connected with the first dielectric substrate and the second dielectric substrate respectively, the front end surface of the sixth dielectric substrate is aligned with the front end surface of the first dielectric substrate up and down, the rear end surface of the sixth dielectric substrate is aligned with the rear end surface of the first dielectric substrate up and down, the left end surface of the sixth dielectric substrate is aligned with the left end surface of the first dielectric substrate up and down, the right end surface of the sixth dielectric substrate is aligned with the right end surface of the first dielectric substrate up and down, the second dielectric substrate and the third dielectric substrate are provided with a seventh dielectric substrate, the seventh dielectric substrate is a square foam board, the seventh dielectric substrate is fixedly connected with the second dielectric substrate and the third dielectric substrate respectively, the front end surface of the seventh dielectric substrate is aligned with the front end surface of the second dielectric substrate up and down, the rear end surface of the seventh dielectric substrate is aligned with the rear end surface of the second dielectric substrate up and down, the left end surface of the seventh dielectric substrate is aligned with the left end surface of the second dielectric substrate up and down, and the right end surface of the seventh dielectric substrate is aligned with the right end surface of the second dielectric substrate up and down. In this structure, the sixth dielectric substrate and the seventh dielectric substrate can increase the bandwidth and reduce the dielectric loss,

[0011] Compared with the prior art, the filter dual-polarized phased array antenna unit has the advantages that the filter dual-polarized phased array antenna unit is composed of a parasitic patch layer, a driven patch layer and a feed layer arranged in a top-to-bottom order, the feed layer accesses two signals input from outside, generates two equal-amplitude in-phase signals based on the two signals respectively, filters the two signals to obtain two filtered signals, and outputs the two filtered signals to the driven patch layer, the driven patch layer generates orthogonal polarized signals corresponding to horizontal polarization and vertical polarization directions based on the two groups of filtered signals, and the parasitic patch layer expands the working bandwidth of the filter dual-polarized phased array antenna unit, so that the filter dual-polarized phased array antenna unit has a wide bandwidth and improved out-of-band suppression characteristics, and thus the filter dual-polarized phased array antenna unit can realize dual polarization while having a filtering function. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 It is an exploded view of the filter dual-polarized phased array antenna unit of the present application.

[0013] Figure 2 It is a structural schematic view of the parasitic patch layer of the filter dual-polarized phased array antenna unit of the present application.

[0014] Figure 3 It is a structural schematic view of the driven patch layer of the filter dual-polarized phased array antenna unit of the present application.

[0015] Figure 4 It is a structural schematic view of the cross-shaped slot layer of the feed layer of the filter dual-polarized phased array antenna unit of the present application.

[0016] Figure 5 It is a structural schematic view of the first feed layer of the feed layer of the filter dual-polarized phased array antenna unit of the present application.

[0017] Figure 6 It is a structural schematic view of the second feed layer of the feed layer of the filter dual-polarized phased array antenna unit of the present application.

[0018] Figure 7 It is a bottom view of the fifth dielectric substrate of the feed layer of the filter dual-polarized phased array antenna unit of the present application.

[0019] Figure 8 It is a structural schematic view of a filter dual-polarized phased array antenna composed of the filter dual-polarized phased array antenna unit of the present application.

[0020] Figure 9(a) is a S parameter simulation diagram of the filter dual-polarized phased array antenna unit of the present application.

[0021] Figure 9(b) is a gain curve simulation diagram of the filter dual-polarized phased array antenna unit of the present application. DETAILED DESCRIPTION

[0022] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0023] Example 1: As Figure 1 As shown, a filtered dual-polarized phased array antenna element includes a parasitic patch layer 1, a driving patch layer 2, and a feeding layer 3 arranged in a top-to-bottom order. The feeding layer 3 is used to receive two externally input signals and first generates two signals of equal amplitude and in phase based on the two signals. Then, the two signals are filtered to obtain two filtered signals, which are output to the driving patch layer 2. The driving patch layer 2 generates orthogonal polarization signals in the corresponding horizontal and vertical polarization directions based on the two sets of filtered signals and radiates them into free space. The parasitic patch layer 1 is used to extend the operating bandwidth of the filtered dual-polarized phased array antenna element, so that the filtered dual-polarized phased array antenna element has a wide bandwidth and improves out-of-band suppression characteristics.

[0024] Example 2: This example is basically the same as Example 1, except that: in this example, as Figure 2 As shown, the parasitic patch layer 1 includes a first dielectric substrate 4 and a cross-shaped metal patch attached to the upper surface of the first dielectric substrate 4. The first dielectric substrate 4 is a square plate. The length direction of the first dielectric substrate 4 is defined as the left-right direction, the width direction as the front-back direction, and the height direction as the up-down direction. The length of the first dielectric substrate 4 is equal to its width. The cross-shaped metal patch includes a first rectangular patch 5, a second rectangular patch 6, and a third rectangular patch 7. The center of the first rectangular patch 5 is located on the central axis of the first dielectric substrate 4, and the front end face of the first rectangular patch 5 is parallel to the plane containing the front end face of the first dielectric substrate 4. The second rectangular patch 6 is located in front of the first rectangular patch 5, and the distance from the left end face to the right end face of the second rectangular patch 6 is equal to the distance from the first rectangular patch 5 to the first rectangular patch 6. The distance from the front end face to the rear end face of the rectangular patch 5; the rear end face of the second rectangular patch 6 is connected to and in a bonded state with the front end face of the first rectangular patch 5; the third rectangular patch 7 is located behind the first rectangular patch 5; the third rectangular patch 7 and the second rectangular patch 6 are symmetrical about the front and back of the first rectangular patch 5; the first rectangular patch 5, the second rectangular patch 6 and the third rectangular patch 7 are all symmetrical about the front and back symmetry plane of the first dielectric substrate 4; the first rectangular patch 5, the second rectangular patch 6 and the third rectangular patch 7 form a cross shape; the length of the first rectangular patch 5 in the left and right direction is less than the side length of the first dielectric substrate 4; the length of the first rectangular patch 5 in the left and right direction is equal to the distance between the front end face of the second rectangular patch 6 and the rear end face of the third rectangular patch 7.

[0025] Example 3: This example is basically the same as Example 1, except that: in this example, as Figure 3As shown, the driving patch layer 2 comprises a second dielectric substrate 8, a square driving patch 9 and a square ring patch 10. The second dielectric substrate 8 is located below the first dielectric substrate 4. The second dielectric substrate 8 is a square plate. The front end surface of the second dielectric substrate 8 is aligned with the front end surface of the first dielectric substrate 4. The back end surface of the second dielectric substrate 8 is aligned with the back end surface of the first dielectric substrate 4. The left end surface of the second dielectric substrate 8 is aligned with the left end surface of the first dielectric substrate 4. The right end surface of the second dielectric substrate 8 is aligned with the right end surface of the first dielectric substrate 4. The square driving patch 9 and the square ring patch 10 are attached to the upper surface of the second dielectric substrate 8. The center of the square driving patch 9 is located on the central axis of the second dielectric substrate 8. The front end surface of the square driving patch 9 is parallel to the plane where the front end surface of the second dielectric substrate 8 is located. The side length of the square driving patch 9 is smaller than the side length of the second dielectric substrate 8. The square ring patch 10 surrounds the square driving patch 9. The center of the square ring patch 10 is located on the central axis of the second dielectric substrate 8. The front end surface of the outer circle of the square ring patch 10 is parallel to the plane where the front end surface of the second dielectric substrate 8 is located. The outer circle side length of the square ring patch 10 is smaller than the length of the second dielectric substrate 8. The inner circle side length of the square ring patch 10 is larger than the side length of the square driving patch. A square ring gap is formed between the square ring patch 10 and the square driving patch 9. This square ring gap is referred to as the first square ring gap 11. The square ring patch 10 is provided with a first rectangular gap 12, a second rectangular gap 13, a third rectangular gap 14 and a fourth rectangular gap 15. The front end surface of the first rectangular gap 12 is located in the same plane as the front end surface of the outer circle of the square ring patch 10. The back end surface of the first rectangular gap 12 is located in the same plane as the front end surface of the inner circle of the square ring patch 10. The distance from the left end surface of the first rectangular gap 12 to the left end surface of the outer circle of the square ring patch 10 is equal to the distance from the right end surface of the first rectangular gap 12 to the right end surface of the outer circle of the square ring patch 10. The width of the first rectangular gap 12 in the left-right direction is 1 / 8-1 / 10 of the length of the first rectangular gap 12 in the front-back direction. The second rectangular gap 13 is front-back symmetric with the first rectangular gap 12 with respect to the left-right symmetric plane of the square ring patch 10. If the third rectangular gap 14 is rotated 90 degrees clockwise about the central axis of the second dielectric substrate 8, the third rectangular gap 14 will completely coincide with the first rectangular gap 12. If the fourth rectangular gap 15 is rotated 90 degrees clockwise about the central axis of the second dielectric substrate 8, the fourth rectangular gap 15 will completely coincide with the second rectangular gap 13. The first rectangular gap 12, the second rectangular gap 13, the third rectangular gap 14 and the fourth rectangular gap 15 divide the square ring patch 10 into four identical L-shaped metal patches, thereby introducing the zero point of the lower side band of the filter response.

[0026] Embodiment four: This embodiment is basically the same as embodiment one, except that in this embodiment, as shown in FIG. 4, the first dielectric substrate 4 is provided with a square ring gap 16. The square ring gap 16 is located below the square driving patch 9. The square ring gap 16 is a square ring gap. The front end surface of the outer circle of the square ring gap 16 is parallel to the plane where the front end surface of the first dielectric substrate 4 is located. The outer circle side length of the square ring gap 16 is smaller than the length of the first dielectric substrate 4. The inner circle side length of the square ring gap 16 is larger than the side length of the square driving patch 9. The square ring gap 16 is formed between the square driving patch 9 and the first dielectric substrate 4. This square ring gap is referred to as the second square ring gap 17. The square ring gap 16 is provided with a first rectangular gap 18, a second rectangular gap 19, a third rectangular gap 20 and a fourth rectangular gap 21. The front end surface of the first rectangular gap 18 is located in the same plane as the front end surface of the outer circle of the square ring gap 16. The back end surface of the first rectangular gap 18 is located in the same plane as the front end surface of the inner circle of the square ring gap 16. The distance from the left end surface of the first rectangular gap 18 to the left end surface of the outer circle of the square ring gap 16 is equal to the distance from the right end surface of the first rectangular gap 18 to the right end surface of the outer circle of the square ring gap 16. The width of the first rectangular gap 18 in the left-right direction is 1 / 8-1 / 10 of the length of the first rectangular gap 18 in the front-back direction. The second rectangular gap 19 is front-back symmetric with the first rectangular gap 18 with respect to the left-right symmetric plane of the square ring gap 16. If the third rectangular gap 20 is rotated 90 degrees clockwise about the central axis of the first dielectric substrate 4, the third rectangular gap 20 will completely coincide with the first rectangular gap 18. If the fourth rectangular gap 21 is rotated 90 degrees clockwise about the central axis of the first dielectric substrate 4, the fourth rectangular gap 21 will completely coincide with the second rectangular gap 19. The first rectangular gap 18, the second rectangular gap 19, the third rectangular gap 20 and the fourth rectangular gap 21 divide the square ring gap 16 into four identical L-shaped metal patches, thereby introducing the zero point of the lower side band of the filter response. Figure 4 to Figure 7As shown, the feed layer 3 comprises a cross-shaped slot layer 16, a first feed layer 17, a second feed layer 18, a first feed via 19, a second feed via 20, a first metal via group, a second metal via group, a third metal via group, a fourth metal via group and a fifth metal via group, the cross-shaped slot layer 16, the first feed layer 17 and the second feed layer 18 are stacked from top to bottom; the cross-shaped slot layer 16 comprises a third dielectric substrate 21, a first metal layer 22 attached to the upper surface of the third dielectric substrate 21 and a cross-shaped slot opened on the first metal layer 22, the third dielectric substrate 21 is located below the second dielectric substrate 8, the third dielectric substrate 21 is a square plate, the front end surface of the third dielectric substrate 21 is aligned with the front end surface of the second dielectric substrate 8, the back end surface of the third dielectric substrate 21 is aligned with the back end surface of the second dielectric substrate 8, the left end surface of the third dielectric substrate 21 is aligned with the left end surface of the second dielectric substrate 8, and the right end surface of the third dielectric substrate 21 is aligned with the right end surface of the second dielectric substrate 8; the first metal layer 22 is a square, the center of the first metal layer 22 is located on the central axis of the third dielectric substrate 21, the front end surface of the first metal layer 22 is aligned with the front end surface of the third dielectric substrate 21, the back end surface of the first metal layer 22 is aligned with the back end surface of the third dielectric substrate 21, the left end surface of the first metal layer 22 is aligned with the left end surface of the third dielectric substrate 21, and the right end surface of the first metal layer 22 is aligned with the right end surface of the third dielectric substrate 21, the upper surface of the third dielectric substrate 21 is exposed at the cross-shaped slot, the cross-shaped slot comprises a first rectangular horizontal slot 23, a second rectangular horizontal slot 24 and a third rectangular horizontal slot 25, the center of the first rectangular horizontal slot 23 is located on the central axis of the third dielectric substrate 21, the front end surface of the first rectangular horizontal slot 23 is parallel to the front end surface of the first metal layer 22, the second rectangular horizontal slot 24 is located on the front side of the first rectangular horizontal slot 23, the front end surface of the second rectangular horizontal slot 24 is parallel to the front end surface of the first metal layer 22 and there is a distance between them, the back end surface of the second rectangular horizontal slot 24 is connected with the front end surface of the first rectangular horizontal slot 23 and is in a state of adhesion, the distance from the left end surface of the second rectangular horizontal slot 24 to the right end surface thereof is equal to the width of the first rectangular horizontal slot 23 in the front-back direction, the third rectangular horizontal slot 25 is located on the rear side of the first rectangular horizontal slot 23, the third rectangular horizontal slot 25 and the second rectangular horizontal slot 24 are front-back symmetric relative to the first rectangular horizontal slot 23, the first rectangular horizontal slot 23, the second rectangular horizontal slot 24 and the third rectangular horizontal slot 25 are left-right symmetric relative to the front-back symmetric plane of the first metal layer 22, the first rectangular horizontal slot 23, the second rectangular horizontal slot 24 and the third rectangular horizontal slot 25 form a cross shape; the length of the first rectangular horizontal slot 23 in the left-right direction is less than the side length of the first metal layer 22, and the length of the first rectangular horizontal slot 23 in the left-right direction is equal to the distance between the front end surface of the second rectangular horizontal slot 24 and the back end surface of the third rectangular horizontal slot 25;

[0027] The first feeding layer 17 comprises a fourth dielectric substrate 26 and a first Y-shaped feeding line attached to the upper surface of the fourth dielectric substrate 26, the first Y-shaped feeding line is realized by a strip line and has one input end and two output ends, the fourth dielectric substrate 26 is located below the third dielectric substrate 21, the fourth dielectric substrate 26 is a square plate, the front end surface of the fourth dielectric substrate 26 is aligned with the front end surface of the third dielectric substrate 21 in an up-down manner, the rear end surface of the fourth dielectric substrate 26 is aligned with the rear end surface of the third dielectric substrate 21 in an up-down manner, the left end surface of the fourth dielectric substrate 26 is aligned with the left end surface of the third dielectric substrate 21 in an up-down manner, and the right end surface of the fourth dielectric substrate 26 is aligned with the right end surface of the third dielectric substrate 21 in an up-down manner; the first Y-shaped feeding line comprises a first T-shaped power divider 27, a first curved feeding line 28, a first output feeding line 29 and a second output feeding line 30, the first curved feeding line 28 extends along the front-rear direction, the starting end of the first curved feeding line 28 is located near the left front corner of the fourth dielectric substrate 26 and serves as the input end of the first Y-shaped feeding line, the first T-shaped power divider 27 has one input end and two output ends, the input end of the first T-shaped power divider 27 is connected with the terminal end of the first curved feeding line 28 in a fitted manner, the two output ends of the first T-shaped power divider 27 are connected with one end of the first output feeding line 29 and one end of the second output feeding line 30 in a fitted manner, and the first output feeding line 29 and the second output feeding line 30 serve as the two output ends of the first Y-shaped feeding line respectively, the input end of the first Y-shaped feeding line is used for inputting an external signal, when the signal is input from the input end of the first Y-shaped feeding line, the signal is input into the first T-shaped power divider 27 through the first curved feeding line 28, the first T-shaped power divider 27 uniformly distributes the signal output thereto to the first output feeding line 29 and the second output feeding line 30, and the first output feeding line 29 and the second output feeding line 30 output the distributed signals correspondingly; the first output feeding line 29 and the second output feeding line 30 are in a front-rear symmetrical relationship with the symmetry plane of the fourth dielectric substrate 26 along the left-right direction, the first output feeding line 29 comprises a first rectangular feeding line 31, a first open stub 32, a second open stub 33, a third open stub 34, a fourth open stub 35 and a first F-shaped filter stub, the front end surface of the first rectangular feeding line 31 is parallel to the plane in which the front end surface of the fourth dielectric substrate 26 lies, the length direction of the first rectangular feeding line 31 is along the left-right direction, and the width direction of the first rectangular feeding line 31 is along the front-rear direction, the left end surface of the first rectangular feeding line 31 is one end of the first output feeding line 29, the first F-shaped filter stub comprises a first rectangular strip 36, a second rectangular strip 37 and a third rectangular strip 38, the front end surface of the first rectangular strip 36 is parallel to the front end surface of the first rectangular feeding line 31, the length direction of the first rectangular strip 36 is along the front-rear direction, and the width direction of the first rectangular strip 36 is along the left-right direction, the rear end surface of the first rectangular strip 36 is connected with the front end surface of the first rectangular feeding line 31 in a fitted manner, the front end surface of the second rectangular strip 37 is located in the same plane as the front end surface of the first rectangular strip 36, the length direction of the second rectangular strip 37 is along the left-right direction, and the width direction of the second rectangular strip 37 is along the front-rear direction,The left end surface of the second rectangular strip 37 is connected with the right end surface of the first rectangular strip 36 in a close manner, the third rectangular strip 38 is located at the rear side of the second rectangular strip 37 and the front side of the first rectangular feed line 31, the third rectangular strip 38 is parallel to the second rectangular strip 37, the left end surface of the third rectangular strip 38 is connected with the right end surface of the first rectangular strip 36 in a close manner, there is a distance between the rear end surface of the second rectangular strip 37 and the front end surface of the third rectangular strip 38, there is a distance between the rear end surface of the third rectangular strip 38 and the front end surface of the first rectangular feed line 31, the right end surface of the third rectangular strip 38 is located at the left side of the plane where the right end surface of the second rectangular strip 37 is located, the right end surface of the second rectangular strip 37 is located at the left side of the plane where the right end surface of the first rectangular feed line 31 is located, the first open circuit stub 32 is a rectangular metal patch, the front end surface of the first open circuit stub 32 is parallel to the front end surface of the first rectangular feed line 31, the length direction of the first open circuit stub 32 is along the front-rear direction, the width direction of the first open circuit stub 32 is along the left-right direction, the first open circuit stub 32 is located at the front side of the first rectangular feed line 31 and the left side of the first rectangular strip 36, the rear end surface of the first open circuit stub 32 is connected with the front end surface of the first rectangular feed line 31 in a close manner, the length of the first open circuit stub 32 is less than the distance between the rear end surface of the third rectangular strip 38 and the front end surface of the first rectangular feed line 31, the second open circuit stub 33 is a rectangular metal patch, the front end surface of the second open circuit stub 33 is parallel to the front end surface of the first rectangular feed line 31, the length direction of the second open circuit stub 33 is along the left-right direction, the width direction of the second open circuit stub 33 is along the front-rear direction, the second open circuit stub 33 is located at the rear side of the first rectangular feed line 31, the front end surface of the second open circuit stub 33 is connected with the rear end surface of the first rectangular feed line 31 in a close manner, the width of the first open circuit stub 32 is equal to the length of the second open circuit stub 33, the left end surface of the first open circuit stub 32 and the left end surface of the second open circuit stub 33 are located at the same plane, the first open circuit stub 32 and the third open circuit stub 34 are left-right symmetrical with the plane where the right end surface of the first rectangular strip 36 is located, the right end surface of the third open circuit stub 34 is located at the left side of the plane where the right end surface of the third rectangular strip 38 is located; the second open circuit stub 33 and the fourth open circuit stub 35 are left-right symmetrical with the plane where the right end surface of the first rectangular strip 36 is located,

[0028] The second feeding layer 18 comprises a fifth dielectric substrate 39, a second Y-shaped feeding line attached to the upper surface of the fifth dielectric substrate 39, and a second metal layer 40 attached to the lower surface of the fifth dielectric substrate 39, the fifth dielectric substrate 39 is located below the fourth dielectric substrate 26, the fifth dielectric substrate 39 is a square plate, the front end surface of the fifth dielectric substrate 39 is aligned with the front end surface of the fourth dielectric substrate 26 in the up-down direction, the rear end surface of the fifth dielectric substrate 39 is aligned with the rear end surface of the fourth dielectric substrate 26 in the up-down direction, the left end surface of the fifth dielectric substrate 39 is aligned with the left end surface of the fourth dielectric substrate 26 in the up-down direction, the right end surface of the fifth dielectric substrate 39 is aligned with the right end surface of the fourth dielectric substrate 26 in the up-down direction, the second Y-shaped feeding line is realized by a strip line and has one input end and two output ends, the second Y-shaped feeding line comprises a second T-shaped power divider 41, a second curved feeding line 42, a third output feeding line 43, and a fourth output feeding line 44, the second curved feeding line 42 extends along the left-right direction, the starting end of the second curved feeding line 42 is located near the right rear corner of the fifth dielectric substrate 39 and serves as the input end of the second Y-shaped feeding line, the second T-shaped power divider has one input end and two output ends, the input end of the second T-shaped power divider is connected to the terminal end of the second curved feeding line 42 in a fitted manner, the two output ends of the second T-shaped power divider are respectively connected to one end of the third output feeding line 43 and one end of the fourth output feeding line 44 in a fitted manner, the third output feeding line 43 and the fourth output feeding line 44 serve as the two output ends of the second Y-shaped feeding line, the input end of the second Y-shaped feeding line is used for inputting an external signal, when the external signal is input from the input end of the second Y-shaped feeding line, the signal is input into the second T-shaped power divider through the second curved feeding line 42, the second T-shaped power divider uniformly distributes the signal input thereto to the third output feeding line 43 and the fourth output feeding line 44, and the third output feeding line 43 and the fourth output feeding line 44 correspondingly output the signal distributed thereto; the third output feeding line 43 and the fourth output feeding line 44 are left-right symmetric with respect to the symmetry plane of the fifth dielectric substrate 39 along the front-rear direction, the third output feeding line 43 comprises a second rectangular feeding line 45, a fifth open stub 46, a sixth open stub 47, a seventh open stub 48, an eighth open stub 49, and a second F-shaped filter stub, the front end surface of the second rectangular feeding line 45 is parallel to the plane in which the front end surface of the fifth dielectric substrate 39 lies, the length direction of the second rectangular feeding line 45 is along the front-rear direction, and the width direction of the second rectangular feeding line 45 is along the left-right direction, the rear end surface of the second rectangular feeding line 45 is one end of the third output feeding line 43, the second F-shaped filter stub comprises a fourth rectangular strip 50, a fifth rectangular strip 51, and a sixth rectangular strip 52, the front end surface of the fourth rectangular strip 50 is parallel to the front end surface of the second rectangular feeding line 45, the length direction of the fourth rectangular strip 50 is along the left-right direction, and the width direction of the fourth rectangular strip 50 is along the front-rear direction, the right end surface of the fourth rectangular strip 50 is connected to the left end surface of the second rectangular feeding line 45 in a fitted manner, the left end surface of the fifth rectangular strip 51 is located in the same plane as the left end surface of the fourth rectangular strip 50, the length direction of the fifth rectangular strip 51 is along the front-rear direction, and the width direction of the fifth rectangular strip 51 is along the left-right direction,The rear end surface of the fifth rectangular strip 51 is connected with the front end surface of the fourth rectangular strip 50 and is in close contact, the sixth rectangular strip 52 is located at the right side of the fifth rectangular strip 51 and at the left side of the second rectangular feeder 45, the sixth rectangular strip 52 is parallel to the fifth rectangular strip 51, the rear end surface of the sixth rectangular strip 52 is connected with the front end surface of the fourth rectangular strip 50 and is in close contact, there is a distance between the right end surface of the fifth rectangular strip 51 and the left end surface of the sixth rectangular strip 52, there is a distance between the right end surface of the sixth rectangular strip 52 and the left end surface of the second rectangular feeder 45, the front end surface of the sixth rectangular strip 52 is located at the rear side of the plane where the front end surface of the fifth rectangular strip 51 is located, the front end surface of the fifth rectangular strip 51 is located at the rear side of the plane where the front end surface of the second rectangular feeder 45 is located, the fifth open stub 46 is a rectangular metal patch, the left end surface of the fifth open stub 46 is parallel to the left end surface of the second rectangular feeder 45, and the length direction of the fifth open stub 46 is along the left-right direction and the width direction is along the front-rear direction, the fifth open stub 46 is located at the left side of the second rectangular feeder 45 and at the rear side of the fourth rectangular strip 50, the right end surface of the fifth open stub 46 is connected with the left end surface of the second rectangular feeder 45 and is in close contact, the length of the fifth open stub 46 is less than the distance between the right end surface of the sixth rectangular strip 52 and the left end surface of the second rectangular feeder 45, the sixth open stub 47 is a rectangular metal patch, the right end surface of the fifth open stub 46 is parallel to the right end surface of the second rectangular feeder 45, and the length direction of the fifth open stub 46 is along the front-rear direction and the width direction is along the left-right direction, the sixth open stub 47 is located at the right side of the second rectangular feeder 45, the left end surface of the sixth open stub 47 is connected with the right end surface of the second rectangular feeder 45 and is in close contact, the width of the fifth open stub 46 is equal to the length of the sixth open stub 47, the rear end surface of the fifth open stub 46 and the rear end surface of the sixth open stub 47 are located on the same plane, the fifth open stub 46 and the seventh open stub 48 are front-rear symmetric with the plane where the front end surface of the fourth rectangular strip 50 is located, the front end surface of the seventh open stub 48 is located at the rear side of the plane where the front end surface of the sixth rectangular strip 52 is located; the sixth open stub 47 and the eighth open stub 49 are front-rear symmetric with the plane where the front end surface of the fourth rectangular strip 50 is located; the second metal layer 40 is attached to the lower surface of the fifth dielectric substrate 39, the second metal layer 40 is square, the center of the second metal layer 40 is located on the central axis of the fifth dielectric substrate 39, the front end surface of the second metal layer 40 is aligned with the front end surface of the fifth dielectric substrate 39 up and down, the rear end surface of the second metal layer 40 is aligned with the rear end surface of the fifth dielectric substrate 39 up and down, the left end surface of the second metal layer 40 is aligned with the left end surface of the fifth dielectric substrate 39 up and down, and the right end surface of the second metal layer 40 is aligned with the right end surface of the fifth dielectric substrate 39 up and down,

[0029] The first feeding via 19 penetrates the fifth dielectric substrate 39, the fourth dielectric substrate 26, the starting end of the first Y-shaped feed line and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, the first feeding via 19 is a metalized via hole, and the cross section thereof is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39, the first feeding via 19 is connected with the starting end of the first curved feed line 28, but is not connected with the second metal layer 40 and the first metal layer 22, the second feeding via 20 penetrates the fifth dielectric substrate 39, the starting end of the second Y-shaped feed line, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, the second feeding via 20 is a metalized via hole, and the cross section thereof is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39, the second feeding via 20 is connected with the starting end of the second curved feed line 42, but is not connected with the second metal layer 40 and the first metal layer 22, the first metal via group includes a plurality of first metalized vias 53, the plurality of first metalized vias 53 are distributed around the first feeding via 19 at intervals, each first metalized via 53 penetrates the second metal layer 40, the fifth dielectric substrate 39, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, in the first metal via group, the cross section of each first metalized via 53 is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39, the second metal via group includes a plurality of second metalized vias 54, the plurality of second metalized vias 54 are distributed around the second feeding via 20 at intervals, each second metalized via 54 penetrates the second metal layer 40, the fifth dielectric substrate 39, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, in the second metal via group, the cross section of each second metalized via 54 is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39, the third metal via group includes eight third metalized vias 55, the eight third metalized vias 55 are distributed around the cross-shaped gap at intervals, the third metal via group penetrates the second metal layer 40, the fifth dielectric substrate 39, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, in the third metal via group, the cross section of each third metalized via 55 is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39, the fourth metal via group includes four fourth metalized vias 56, the four fourth metalized vias 56 are distributed in the interval surrounded by the third metal via group and are located near the cross-shaped gap, the fourth metal via group penetrates the second metal layer 40, the fifth dielectric substrate 39, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane where the lower end surface of the second metal layer 40 is located upwards, in the fourth metal via group, the cross section of each fourth metalized via 56 is circular, wherein the axis is perpendicular to the fifth dielectric substrate 39.The fifth metalized via 57 is arranged at the edge of the feeding layer 3 in a uniform interval, and forms a square area with a square cross section. The cross section of each fifth metalized via 57 is semicircular. The distance between the centers of each two adjacent fifth metalized vias 57 is less than twice the diameter of the fifth metalized via 57. Each fifth metalized via 57 penetrates the second metal layer 40, the fifth dielectric substrate 39, the fourth dielectric substrate 26 and the first metal layer 22 in sequence from the plane of the lower end surface of the second metal layer 40. The central axis of the fifth metalized via 57 is perpendicular to the fifth dielectric substrate 39. The central axis of each fifth metalized via 57 is located on the plane of the front end surface, the rear end surface, the left end surface and the right end surface of the fifth dielectric substrate 39, respectively. The first Y-type feeder, the second Y-type feeder, the cross-shaped slot, the first metal via group, the second metal via group, the third metal via group and the fourth metal via group are located in the square area.

[0030] In the embodiment, annular gaps 60 are formed around the first feeding via 19 on the second metal layer 40 and the first metal layer 22, so that the first feeding via 19 is not connected to the second metal layer 40 and the first metal layer 22. Annular gaps 61 are also formed around the second feeding via 20 on the second metal layer 40 and the first metal layer 22, so that the second feeding via 20 is not connected to the second metal layer 40 and the first metal layer 22.

[0031] In the embodiment, the sixth dielectric substrate 58 is arranged between the first dielectric substrate 4 and the second dielectric substrate 8. The sixth dielectric substrate 58 is a square foam board. The sixth dielectric substrate 58 is fixedly connected to the first dielectric substrate 4 and the second dielectric substrate 8, respectively. The front end surface of the sixth dielectric substrate 58 is aligned with the front end surface of the first dielectric substrate 4. The rear end surface of the sixth dielectric substrate 58 is aligned with the rear end surface of the first dielectric substrate 4. The left end surface of the sixth dielectric substrate 58 is aligned with the left end surface of the first dielectric substrate 4. The right end surface of the sixth dielectric substrate 58 is aligned with the right end surface of the first dielectric substrate 4. The seventh dielectric substrate 59 is arranged between the second dielectric substrate 8 and the third dielectric substrate 21. The seventh dielectric substrate 59 is a square foam board. The seventh dielectric substrate 59 is fixedly connected to the second dielectric substrate 8 and the third dielectric substrate 21, respectively. The front end surface of the seventh dielectric substrate 59 is aligned with the front end surface of the second dielectric substrate 8. The rear end surface of the seventh dielectric substrate 59 is aligned with the rear end surface of the second dielectric substrate 8. The left end surface of the seventh dielectric substrate 59 is aligned with the left end surface of the second dielectric substrate 8. The right end surface of the seventh dielectric substrate 59 is aligned with the right end surface of the second dielectric substrate 8.

[0032] The first group of metalized vias 53 and the first feed vias 19 realize the transition structure of the first coaxial probe to the vertical stripline, and the second group of metalized vias 54 and the second feed vias 20 realize the transition structure of the second coaxial probe to the vertical stripline; when two signals for different polarizations are introduced by the coaxial feeding mode, the transition structure of the two coaxial probes to the vertical stripline is transmitted to the first Y-type feeder and the second Y-type feeder in one-to-one correspondence, and since the first feed vias 19 and the second feed vias 20 are not connected with the second metal layer 40 and the first metal layer 22, there are annular gaps between the first feed vias 19 and the second feed vias 20 and the second metal layer 40 and the first metal layer 22, respectively, which are equivalent to capacitors and play the role of impedance matching, and the transition structure of the two coaxial probes to the vertical stripline can minimize the reflection of the input signal energy, one of the signals is transmitted to the input end of the first T-type power divider 27 through the first curved feeder 28, the first T-type power divider 27 performs power division on the signal to generate two equal-amplitude and in-phase signals which are output to the first output feeder 29 and the second output feeder 30 in one-to-one correspondence, the first output feeder 29 and the second output feeder 30 perform band-pass filtering and impedance matching on the signals output thereto to obtain a group of filtered signals as vertical polarization signals, which are transmitted upward to the driven patch layer 2 through the second rectangular transverse slot 24 and the third rectangular transverse slot 25; the other signal is transmitted to the input end of the second T-type power divider through the second curved feeder 42, the second T-type power divider performs power division on the signal to generate two equal-amplitude and in-phase signals which are output to the third output feeder 43 and the fourth output feeder 44 in one-to-one correspondence, the third output feeder 43 and the fourth output feeder 44 perform band-pass filtering and impedance matching on the signals output thereto to obtain a group of filtered signals as horizontal polarization signals, which are transmitted upward to the driven patch layer 2 through the first rectangular transverse slot 23; when the orthogonal polarization signals composed of the horizontal polarization signals and the vertical polarization signals reach the driven patch layer 2, the square driven patch 9 realizes effective radiation of the orthogonal polarization signals in the working frequency band, the four rectangular slots formed in the square loop patch 10 are used to introduce the zero point of the lower sideband of the filter passband, the cross-shaped metal patch of the parasitic patch layer 1 serves as a parasitic patch, the increased filter response bandwidth and the introduced zero point of the upper sideband of the filter passband expand the working bandwidth of the filter dual-polarized phased array antenna unit, and the orthogonal polarization signals radiated have a wide bandwidth, and the introduction of the above-mentioned lower sideband zero point improves the out-of-band suppression characteristic.

[0033] The filter dual-polarized phased array antenna unit of the present application is a multi-layer structure, has a small size, and can meet the requirements of phased array assembly. Figure 8As shown, when the filter dual-polarized phased array antenna unit adopting the application is used to form a filter dual-polarized phased array antenna, the filter dual-polarized phased array antenna unit is one-dimensional or two-dimensional translation with a period of 0.5λ (the free space wavelength at the center frequency of the filter dual-polarized phased array antenna unit) to form an array structure, and the phase control of each filter dual-polarized phased array antenna unit can realize high-gain beam pointing control, thereby meeting the application of the new generation of wireless communication systems. At the same time, the fifth metallized via hole 57 group arranged around the feed layer 3 of the filter dual-polarized phased array antenna unit can increase the isolation between the filter dual-polarized phased array antenna units, so as to reduce the mutual influence between the filter dual-polarized phased array antenna units when forming the filter dual-polarized phased array antenna.

[0034] To verify the performance of the filter dual-polarized phased array antenna unit of the application, the filter dual-polarized phased array antenna unit of the application is simulated, wherein the S parameter simulation diagram of the filter dual-polarized phased array antenna unit of the application is shown in FIG. 9(a), and the gain curve simulation diagram of the filter dual-polarized phased array antenna unit of the application is shown in FIG. 9(b).

[0035] When two signals of different polarizations are introduced into the filter dual-polarized phased array antenna unit of the application by a coaxial feeding mode, one coaxial probe for introducing a vertical polarization signal is inserted into the first feed via hole 19 to form a unit port 1, and another coaxial probe for introducing a horizontal polarization signal is inserted into the second feed via hole to form a unit port 2.

[0036] In FIG. 9(a), |S 11 | is the reflection coefficient of the unit port 1 corresponding to the vertical polarization (V-pol), |S 22 | is the reflection coefficient of the unit port 2 corresponding to the horizontal polarization (H-pol), |S 21 | is the isolation of the unit port 1 and the unit port 2. As can be seen from FIG. 9(a), |S 11 | The working frequency band with |S 22 | less than -10 dB is 12.3 GHz to 15.5 GHz. The overlapping relative bandwidth of the unit port 1 and the unit port 2 is 23%. The isolation of the unit port 1 and the unit port 2 is less than -16 dB in the working frequency band, which indicates that the unit port 1 and the unit port 2 have good isolation.

[0037] In Fig. 9(b), V-pol corresponds to the gain curve of the vertical polarization signal, and H-pol corresponds to the gain curve of the horizontal polarization signal. As can be seen from Fig. 9(b), in the passband of the two polarization signals, the maximum gain of the simulation is between 0.1dBi and 4.4dBi. At the same time, multiple radiation zeros are generated at the upper and lower edges of the passband of the two polarization signals, and at 7.8GHz and 20GHz, the radiation gain of the two polarization signals is reduced by more than 20.7dB, showing high selectivity.

[0038] Therefore, the filter dual-polarized phased array antenna unit of the present application has wideband filtering and good out-of-band suppression characteristics while radiating dual polarization.

Claims

1. A filtered dual-polarized phased array antenna unit, characterized by The filter dual-polarized phased array antenna unit comprises a parasitic patch layer, a driven patch layer and a feed layer arranged in sequence from top to bottom, the feed layer is used for accessing two signals inputted from outside, and two signals with equal amplitude and in phase are generated based on the two signals respectively, then two-way filtered signals are obtained by filtering the two-way signals and outputted to the driven patch layer, the driven patch layer introduces a radiation zero point in the lower side band based on two groups of filtered signals, and generates orthogonal polarized signals corresponding to horizontal polarization direction and vertical polarization direction to radiate to free space, the parasitic patch layer is used for expanding the working bandwidth of the filter dual-polarized phased array antenna unit, and introducing a radiation zero point in the upper side band, so that the filter dual-polarized phased array antenna unit has wide bandwidth and improves the out-of-band suppression characteristic; The parasitic patch layer comprises a first dielectric substrate and a cross-shaped metal patch attached to the upper surface of the first dielectric substrate, the first dielectric substrate is a square plate, the length direction of the first dielectric substrate is defined as the left-right direction, the width direction is defined as the front-rear direction, and the height direction is defined as the up-down direction, and the length of the first dielectric substrate is equal to its width; the cross-shaped metal patch comprises a first rectangular patch, a second rectangular patch and a third rectangular patch, the center of the first rectangular patch is located on the central axis of the first dielectric substrate, the front end surface of the first rectangular patch is parallel to the plane where the front end surface of the first dielectric substrate is located, the second rectangular patch is located on the front side of the first rectangular patch, the distance from the left end surface of the second rectangular patch to the right end surface thereof is equal to the distance from the front end surface of the first rectangular patch to the rear end surface thereof, the rear end surface of the second rectangular patch is connected with the front end surface of the first rectangular patch in a state of adhesion, the third rectangular patch is located on the rear side of the first rectangular patch, the third rectangular patch is front-rear symmetric with the second rectangular patch relative to the first rectangular patch, the first rectangular patch, the second rectangular patch and the third rectangular patch are all left-right symmetric relative to the front-rear symmetric plane of the first dielectric substrate, and the first rectangular patch, the second rectangular patch and the third rectangular patch form a cross shape; the length of the first rectangular patch in the left-right direction is less than the side length of the first dielectric substrate, and the length of the first rectangular patch in the left-right direction is equal to the distance between the front end surface of the second rectangular patch and the rear end surface of the third rectangular patch. The driving patch layer comprises a second dielectric substrate, a square driving patch and a square ring patch, the second dielectric substrate is located below the first dielectric substrate, the second dielectric substrate is a square plate, the front end surface of the second dielectric substrate is aligned with the front end surface of the first dielectric substrate, the back end surface of the second dielectric substrate is aligned with the back end surface of the first dielectric substrate, the left end surface of the second dielectric substrate is aligned with the left end surface of the first dielectric substrate, the right end surface of the second dielectric substrate is aligned with the right end surface of the first dielectric substrate, the square driving patch and the square ring patch are attached to the upper surface of the second dielectric substrate, the center of the square driving patch is located on the central axis of the second dielectric substrate, the front end surface of the square driving patch is parallel to the plane where the front end surface of the second dielectric substrate is located, and the side length of the square driving patch is smaller than the side length of the second dielectric substrate; the square ring patch surrounds the square driving patch, the center of the square ring patch is located on the central axis of the second dielectric substrate, the front end surface of the outer circle of the square ring patch is parallel to the plane where the front end surface of the second dielectric substrate is located, the outer circle side length of the square ring patch is smaller than the length of the second dielectric substrate, the inner circle side length of the square ring patch is greater than the side length of the square driving patch, and a square ring gap is formed between the square ring patch and the square driving patch, which is referred to as a first square ring gap; the square ring patch is provided with a first rectangular gap, a second rectangular gap, a third rectangular gap and a fourth rectangular gap, the front end surface of the first rectangular gap is located in the same plane as the front end surface of the outer circle of the square ring patch, the back end surface is located in the same plane as the front end surface of the inner circle of the square ring patch, the distance from the left end surface of the first rectangular gap to the left end surface of the outer circle of the square ring patch is equal to the distance from the right end surface of the first rectangular gap to the right end surface of the outer circle of the square ring patch, the width of the first rectangular gap in the left-right direction is 1 / 8-1 / 10 of the length of the first rectangular gap in the front-back direction, the second rectangular gap is front-back symmetric with the first rectangular gap with respect to the symmetry plane of the square ring patch in the left-right direction, the third rectangular gap will be completely coincided with the first rectangular gap if it is rotated 90 degrees clockwise with the central axis of the second dielectric substrate as the axis, and the fourth rectangular gap will be completely coincided with the second rectangular gap if it is rotated 90 degrees clockwise with the central axis of the second dielectric substrate as the axis, the first rectangular gap, the second rectangular gap, the third rectangular gap and the fourth rectangular gap divide the square ring patch into four identical L-shaped metal patches, so as to introduce the zero point of the lower side band of the filter response.

2. The filtered dual-polarized phased array antenna element of claim 1, wherein The feeding layer comprises a cross-shaped slit layer, a first feeding layer, a second feeding layer, a first feeding via, a second feeding via, a first metal via group, a second metal via group, a third metal via group, a fourth metal via group and a fifth metal via group, the cross-shaped slit layer, the first feeding layer and the second feeding layer are stacked from top to bottom; the cross-shaped slit layer comprises a third dielectric substrate and a first metal layer attached to the upper surface of the third dielectric substrate and a cross-shaped slit opened on the first metal layer, the third dielectric substrate is below the second dielectric substrate, the third dielectric substrate is a square plate, the front end surface of the third dielectric substrate is aligned with the front end surface of the second dielectric substrate, the back end surface of the third dielectric substrate is aligned with the back end surface of the second dielectric substrate, the left end surface of the third dielectric substrate is aligned with the left end surface of the second dielectric substrate, and the right end surface of the third dielectric substrate is aligned with the right end surface of the second dielectric substrate; the first metal layer is square, the center of the first metal layer is on the central axis of the third dielectric substrate, the front end surface of the first metal layer is aligned with the front end surface of the third dielectric substrate, the back end surface of the first metal layer is aligned with the back end surface of the third dielectric substrate, the left end surface of the first metal layer is aligned with the left end surface of the third dielectric substrate, the right end surface of the first metal layer is aligned with the right end surface of the third dielectric substrate, the upper surface of the third dielectric substrate is exposed at the cross-shaped slit, the cross-shaped slit comprises a first rectangular horizontal slit, a second rectangular horizontal slit and a third rectangular horizontal slit, the center of the first rectangular horizontal slit is on the central axis of the third dielectric substrate, the front end surface of the first rectangular horizontal slit is parallel to the front end surface of the first metal layer, the second rectangular horizontal slit is located in front of the first rectangular horizontal slit, the front end surface of the second rectangular horizontal slit is parallel to the front end surface of the first metal layer and has a distance therebetween, the back end surface of the second rectangular horizontal slit is connected to the front end surface of the first rectangular horizontal slit and is in a fitted state, the distance from the left end surface of the second rectangular horizontal slit to the right end surface thereof is equal to the width of the first rectangular horizontal slit in the front-back direction, the third rectangular horizontal slit is located behind the first rectangular horizontal slit, the third rectangular horizontal slit and the second rectangular horizontal slit are front-back symmetric with respect to the first rectangular horizontal slit, the first rectangular horizontal slit, the second rectangular horizontal slit and the third rectangular horizontal slit are left-right symmetric with respect to the front-back symmetric plane of the first metal layer, and the first rectangular horizontal slit, the second rectangular horizontal slit and the third rectangular horizontal slit form a cross shape; the length of the first rectangular horizontal slit in the left-right direction is less than the side length of the first metal layer, and the length of the first rectangular horizontal slit in the left-right direction is equal to the distance between the front end surface of the second rectangular horizontal slit and the back end surface of the third rectangular horizontal slit. The first feeding layer comprises a fourth dielectric substrate and a first Y-shaped feeding line attached to the upper surface of the fourth dielectric substrate, the first Y-shaped feeding line is realized by a strip line and has one input end and two output ends, the fourth dielectric substrate is located below the third dielectric substrate, the fourth dielectric substrate is a square plate, the front end surface of the fourth dielectric substrate is aligned with the front end surface of the third dielectric substrate, the rear end surface of the fourth dielectric substrate is aligned with the rear end surface of the third dielectric substrate, the left end surface of the fourth dielectric substrate is aligned with the left end surface of the third dielectric substrate, and the right end surface of the fourth dielectric substrate is aligned with the right end surface of the third dielectric substrate; the first Y-shaped feeding line comprises a first T-shaped power divider, a first curved feeding line, a first output feeding line and a second output feeding line, the first curved feeding line extends in the front-rear direction, the starting end of the first curved feeding line is located near the left front corner of the fourth dielectric substrate and serves as the input end of the first Y-shaped feeding line, the first T-shaped power divider has one input end and two output ends, the input end of the first T-shaped power divider is connected with the terminal end of the first curved feeding line in a fitted manner, the two output ends of the first T-shaped power divider are connected with one end of the first output feeding line and one end of the second output feeding line in a fitted manner, the first output feeding line and the second output feeding line serve as the two output ends of the first Y-shaped feeding line respectively, the input end of the first Y-shaped feeding line is used for inputting an external signal, when the signal is input from the input end of the first Y-shaped feeding line, the signal is input into the first T-shaped power divider through the first curved feeding line, the first T-shaped power divider uniformly distributes the signal output thereto to the first output feeding line and the second output feeding line, and the first output feeding line and the second output feeding line output the distributed signal correspondingly; the first output feeding line and the second output feeding line are in front-rear symmetry with the symmetry plane of the fourth dielectric substrate along the left-right direction, the first output feeding line comprises a first rectangular feeding line, a first open-circuit stub, a second open-circuit stub, a third open-circuit stub, a fourth open-circuit stub and a first F-shaped filter stub, the front end surface of the first rectangular feeding line is parallel to the plane in which the front end surface of the fourth dielectric substrate is located, the length direction of the first rectangular feeding line is along the left-right direction, and the width direction of the first rectangular feeding line is along the front-rear direction, the left end surface of the first rectangular feeding line is one end of the first output feeding line, the first F-shaped filter stub comprises a first rectangular strip, a second rectangular strip and a third rectangular strip, the front end surface of the first rectangular strip is parallel to the front end surface of the first rectangular feeding line, the length direction of the first rectangular strip is along the front-rear direction, and the width direction of the first rectangular strip is along the left-right direction, the rear end surface of the first rectangular strip is connected with the front end surface of the first rectangular feeding line in a fitted manner, the front end surface of the second rectangular strip is located in the same plane as the front end surface of the first rectangular strip,The length direction of the second rectangular strip is along the left-right direction, the width direction is along the front-back direction, the left end surface of the second rectangular strip is connected with the right end surface of the first rectangular strip and is in a close state, the third rectangular strip is located at the back side of the second rectangular strip and the front side of the first rectangular feeder, the third rectangular strip is parallel to the second rectangular strip, the left end surface of the third rectangular strip is connected with the right end surface of the first rectangular strip and is in a close state, there is a distance between the back end surface of the second rectangular strip and the front end surface of the third rectangular strip, there is a distance between the back end surface of the third rectangular strip and the front end surface of the first rectangular feeder, the right end surface of the third rectangular strip is located at the left side of the plane where the right end surface of the second rectangular strip is located, the right end surface of the second rectangular strip is located at the left side of the plane where the right end surface of the first rectangular feeder is located, the first open-circuit stub is a rectangular metal patch, the front end surface of the first open-circuit stub is parallel to the front end surface of the first rectangular feeder, the length direction of the first open-circuit stub is along the front-back direction, the width direction is along the left-right direction, the first open-circuit stub is located at the front side of the first rectangular feeder and the left side of the first rectangular strip, the back end surface of the first open-circuit stub is connected with the front end surface of the first rectangular feeder and is in a close state, the length of the first open-circuit stub is smaller than the distance between the back end surface of the third rectangular strip and the front end surface of the first rectangular feeder, the second open-circuit stub is a rectangular metal patch, the front end surface of the second open-circuit stub is parallel to the front end surface of the first rectangular feeder, the length direction of the second open-circuit stub is along the left-right direction, the width direction is along the front-back direction, the second open-circuit stub is located at the back side of the first rectangular feeder, the front end surface of the second open-circuit stub is connected with the back end surface of the first rectangular feeder and is in a close state, the width of the first open-circuit stub is equal to the length of the second open-circuit stub, the left end surface of the first open-circuit stub and the left end surface of the second open-circuit stub are located in the same plane, the first open-circuit stub and the third open-circuit stub are left-right symmetrical with the plane where the right end surface of the first rectangular strip is located, the right end surface of the third open-circuit stub is located at the left side of the plane where the right end surface of the third rectangular strip is located, the second open-circuit stub and the fourth open-circuit stub are left-right symmetrical with the plane where the right end surface of the first rectangular strip is located. The second feeding layer comprises a fifth dielectric substrate, a second Y-shaped feeding line attached to the upper surface of the fifth dielectric substrate, and a second metal layer attached to the lower surface of the fifth dielectric substrate, the fifth dielectric substrate is located below the fourth dielectric substrate, the fifth dielectric substrate is a square plate, the front end surface of the fifth dielectric substrate is aligned with the front end surface of the fourth dielectric substrate, the rear end surface of the fifth dielectric substrate is aligned with the rear end surface of the fourth dielectric substrate, the left end surface of the fifth dielectric substrate is aligned with the left end surface of the fourth dielectric substrate, the right end surface of the fifth dielectric substrate is aligned with the right end surface of the fourth dielectric substrate, the second Y-shaped feeding line is realized by a strip line and has one input end and two output ends, the second Y-shaped feeding line comprises a second T-shaped power divider, a second curved feeding line, a third output feeding line and a fourth output feeding line, the second curved feeding line extends along the left-right direction, the starting end of the second curved feeding line is located near the right rear corner of the fifth dielectric substrate and serves as the input end of the second Y-shaped feeding line, the second T-shaped power divider has one input end and two output ends, the input end of the second T-shaped power divider is connected to the terminal end of the second curved feeding line in a fitted manner, the two output ends of the second T-shaped power divider are respectively connected to one end of the third output feeding line and one end of the fourth output feeding line in a fitted manner, the third output feeding line and the fourth output feeding line serve as the two output ends of the second Y-shaped feeding line, the input end of the second Y-shaped feeding line is used for inputting an external signal, when an external signal is input from the input end of the second Y-shaped feeding line, the external signal is input into the second T-shaped power divider through the second curved feeding line, the second T-shaped power divider uniformly distributes the signal input thereto to the third output feeding line and the fourth output feeding line, and the third output feeding line and the fourth output feeding line correspondingly output the signal distributed thereto; the third output feeding line and the fourth output feeding line are in a left-right symmetrical relationship with the symmetry plane of the fifth dielectric substrate along the front-rear direction, the third output feeding line comprises a second rectangular feeding line, a fifth open stub, a sixth open stub, a seventh open stub, an eighth open stub and a second F-shaped filter stub, the front end surface of the second rectangular feeding line is parallel to the plane in which the front end surface of the fifth dielectric substrate is located, the length direction of the second rectangular feeding line is along the front-rear direction, and the width direction of the second rectangular feeding line is along the left-right direction, the rear end surface of the second rectangular feeding line is one end of the third output feeding line, the second F-shaped filter stub comprises a fourth rectangular strip, a fifth rectangular strip and a sixth rectangular strip, the front end surface of the fourth rectangular strip is parallel to the front end surface of the second rectangular feeding line, the length direction of the fourth rectangular strip is along the left-right direction, and the width direction of the fourth rectangular strip is along the front-rear direction, the right end surface of the fourth rectangular strip is connected to the left end surface of the second rectangular feeding line in a fitted manner,The left end surface of the fifth rectangular strip is located in the same plane as the left end surface of the fourth rectangular strip, the length direction of the fifth rectangular strip is along the front-back direction, the width direction is along the left-right direction, the rear end surface of the fifth rectangular strip is connected with the front end surface of the fourth rectangular strip and is in close contact, the sixth rectangular strip is located at the right side of the fifth rectangular strip and the left side of the second rectangular feeder, the sixth rectangular strip is parallel to the fifth rectangular strip, the rear end surface of the sixth rectangular strip is connected with the front end surface of the fourth rectangular strip and is in close contact, there is a distance between the right end surface of the fifth rectangular strip and the left end surface of the sixth rectangular strip, there is a distance between the right end surface of the sixth rectangular strip and the left end surface of the second rectangular feeder, the front end surface of the sixth rectangular strip is located at the rear side of the plane where the front end surface of the fifth rectangular strip is located, the front end surface of the fifth rectangular strip is located at the rear side of the plane where the front end surface of the second rectangular feeder is located, the fifth open-circuit stub is a rectangular metal patch, the left end surface of the fifth open-circuit stub is parallel to the left end surface of the second rectangular feeder, and the length direction is along the left-right direction and the width direction is along the front-back direction, the fifth open-circuit stub is located at the left side of the second rectangular feeder and the rear side of the fourth rectangular strip, the right end surface of the fifth open-circuit stub is connected with the left end surface of the second rectangular feeder and is in close contact, the length of the fifth open-circuit stub is smaller than the distance between the right end surface of the sixth rectangular strip and the left end surface of the second rectangular feeder, the sixth open-circuit stub is a rectangular metal patch, the right end surface of the fifth open-circuit stub is parallel to the right end surface of the second rectangular feeder, and the length direction is along the front-back direction and the width direction is along the left-right direction, the sixth open-circuit stub is located at the right side of the second rectangular feeder, the left end surface of the sixth open-circuit stub is connected with the right end surface of the second rectangular feeder and is in close contact, the width of the fifth open-circuit stub is equal to the length of the sixth open-circuit stub, the rear end surface of the fifth open-circuit stub is located in the same plane as the rear end surface of the sixth open-circuit stub, the fifth open-circuit stub and the seventh open-circuit stub are front-back symmetric with the plane where the front end surface of the fourth rectangular strip is located, the front end surface of the seventh open-circuit stub is located at the rear side of the plane where the front end surface of the sixth rectangular strip is located; the sixth open-circuit stub and the eighth open-circuit stub are front-back symmetric with the plane where the front end surface of the fourth rectangular strip is located; the second metal layer is attached to the lower surface of the fifth dielectric substrate, the second metal layer is square, the center of the second metal layer is located on the central axis of the fifth dielectric substrate, the front end surface of the second metal layer is vertically aligned with the front end surface of the fifth dielectric substrate, the rear end surface of the second metal layer is vertically aligned with the rear end surface of the fifth dielectric substrate, the left end surface of the second metal layer is vertically aligned with the left end surface of the fifth dielectric substrate,The right end surface of the second metal layer is aligned with the right end surface of the fifth dielectric substrate. The first feeding via penetrates the fifth dielectric substrate, the fourth dielectric substrate, the starting end of the first Y-shaped feed line and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the first feeding via is a metalized via hole, and the cross section thereof is circular with the axis perpendicular to the fifth dielectric substrate, the first feeding via is connected with the starting end of the first curved feed line but not connected with the second metal layer and the first metal layer, the second feeding via penetrates the fifth dielectric substrate, the starting end of the second Y-shaped feed line, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the second feeding via is a metalized via hole, and the cross section thereof is circular with the axis perpendicular to the fifth dielectric substrate, the second feeding via is connected with the starting end of the second curved feed line but not connected with the second metal layer and the first metal layer, the first metal via group comprises a plurality of first metalized via holes, the plurality of first metalized via holes are distributed around the first feeding via at intervals, each first metalized via hole penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the cross section of each first metalized via hole in the first metal via group is circular with the axis perpendicular to the fifth dielectric substrate, the second metal via group comprises a plurality of second metalized via holes, the plurality of second metalized via holes are distributed around the second feeding via at intervals, each second metalized via hole penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the cross section of each second metalized via hole in the second metal via group is circular with the axis perpendicular to the fifth dielectric substrate, the third metal via group comprises eight third metalized via holes, the eight third metalized via holes are distributed around the cross-shaped gap at intervals, the third metal via group penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the cross section of each third metalized via hole in the third metal via group is circular with the axis perpendicular to the fifth dielectric substrate.The fourth metal via group includes four fourth metallized vias, which are distributed in the interval surrounded by the third metal via group and are located near the cross-shaped slot, and the fourth metal via group penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, and the cross section of each fourth metallized via in the fourth metal via group is circular, and the axis is perpendicular to the fifth dielectric substrate; the feeding layer is provided with a plurality of fifth metallized vias which are uniformly arranged around the four edges and surround a square area with a square cross section, the cross section of each fifth metallized via is semicircular, the distance between the centers of each two adjacent fifth metallized vias is less than twice the diameter, each fifth metallized via penetrates the second metal layer, the fifth dielectric substrate, the fourth dielectric substrate and the first metal layer in sequence from the plane where the lower end surface of the second metal layer is located, the central axis of the fifth metallized via is perpendicular to the fifth dielectric substrate, and the central axis of each fifth metallized via is located on the plane where the front end surface, the rear end surface, the left end surface and the right end surface of the fifth dielectric substrate are located respectively; the first Y-type feeder, the second Y-type feeder, the cross-shaped slot, the first metal via group, the second metal via group, the third metal via group and the fourth metal via group are all located in the square area.

3. The filtered dual-polarized phased array antenna element of claim 2, wherein The second metal layer and the first metal layer are respectively provided with annular gaps surrounding the first feeding via hole, so that the first feeding via hole is not connected with the second metal layer and the first metal layer; the second metal layer and the first metal layer are also provided with annular gaps surrounding the second feeding via hole, so that the second feeding via hole is not connected with the second metal layer and the first metal layer.

4. The filtered dual-polarized phased array antenna element of claim 2, wherein The sixth medium substrate is a square foam plate, and is fixedly connected with the first medium substrate and the second medium substrate respectively; the front end surface of the sixth medium substrate is aligned with the front end surface of the first medium substrate in the up-down direction, the rear end surface of the sixth medium substrate is aligned with the rear end surface of the first medium substrate in the up-down direction, the left end surface of the sixth medium substrate is aligned with the left end surface of the first medium substrate in the up-down direction, and the right end surface of the sixth medium substrate is aligned with the right end surface of the first medium substrate in the up-down direction; the seventh medium substrate is a square foam plate, and is fixedly connected with the second medium substrate and the third medium substrate respectively; the front end surface of the seventh medium substrate is aligned with the front end surface of the second medium substrate in the up-down direction, the rear end surface of the seventh medium substrate is aligned with the rear end surface of the second medium substrate in the up-down direction, the left end surface of the seventh medium substrate is aligned with the left end surface of the second medium substrate in the up-down direction, and the right end surface of the seventh medium substrate is aligned with the right end surface of the second medium substrate in the up-down direction.

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