Scanning driving circuit, display panel and display device

Abstract

The present application relates to a scan driving circuit, a display panel and a display device. The scan driving circuit includes a plurality of cascaded driving units, and each driving unit includes: a first pull-up node, a second pull-up node, a first control module and a first output module connected to the first pull-up node, and a second control module and a second output module connected to the second pull-up node; wherein, the first control module is configured to control the first pull-up node to be in a pull-up enabled state at a first moment, the second control module is configured to control the second pull-up node to be in a pull-up enabled state at a second moment, the first moment and the second moment are adjacent moments, the controlled states of the first pull-up node and the second pull-up node are opposite at the same moment, and when the first pull-up node or the second pull-up node is in a non-pull-up enabled state, the gate voltage cannot be provided continuously. The present application solves the technical problem that the video signal for outputting the H-LINE picture needs to continuously switch between high and low levels, resulting in high power consumption and easy damage to the display panel.

Description

Technical Field

[0001] The present application relates to the technical field of liquid crystal display, and in particular, to a scanning drive circuit, a display panel, and a display device. Background Art

[0002] Liquid Crystal Displays (LCDs) have many advantages such as a thin body, power saving, and no radiation, and thus have been widely used. For example, liquid crystal TVs, mobile phones, personal digital assistants (PDAs), digital cameras, computer screens, or laptop computer screens, etc., dominate the flat panel display field. TFT (Thin Film Transistor) - type liquid crystal displays usually use GDL (Gate Driver less) technology as the drive for horizontal scan lines. On the same scan line in the horizontal direction, the gates of all TFTs are connected together, so the applied voltage is linked. When a sufficiently large positive voltage is applied to the scan line, all TFTs on this scan line are turned on. At this time, the pixel electrodes on this scan line will be connected to the data lines in the vertical direction, and the corresponding video signals are sent in by the vertical data lines to charge the pixel electrodes to an appropriate voltage. Then, a sufficiently large negative voltage is applied to the scan line to turn off the TFTs until the signal is rewritten again next time. During this period, the charge is stored on the liquid crystal capacitors; at this time, the next horizontal scan line is started, and the corresponding video signal is sent in to complete the sequential scanning line by line. However, when the video signal data is at a high level, the pixel electrodes of the nth row are charged and the nth row is bright. When the video signal data is at a low level, the pixel electrodes of the (n + 1)th row are not charged and the (n + 1)th row is dark. And so on, the (n + 2)th row is bright, the (n + 3)th row is dark... Therefore, by switching the high and low levels of the data signal, a bright - dark alternating picture, that is, an H - LINE picture, is output. So at this time, because the data signal needs to continuously switch between high and low levels, relatively high power consumption will be generated, the temperature will rise, and it is easy to damage the display panel.

[0003] Aiming at the problem that the video signal for outputting the H - LINE picture needs to continuously switch between high and low levels, resulting in relatively high power consumption and being easy to damage the display panel, no effective solution has been proposed yet. Summary of the Invention

[0004] The present application provides a scanning drive circuit, a display panel, and a display device to solve the technical problem that the video signal for outputting the H - LINE picture needs to continuously switch between high and low levels, resulting in relatively high power consumption and being easy to damage the display panel.

[0005] According to one aspect of the embodiments of the present application, the present application provides a scan driving circuit, which includes a plurality of cascaded driving units. The driving unit includes: a first pull-up node, a second pull-up node, a first control module and a first output module connected to the first pull-up node, and a second control module and a second output module connected to the second pull-up node. Wherein: the first control module is configured to control the first pull-up node to be in a pull-up enabled state at a first moment, the first pull-up node is configured to provide a gate voltage to the first output module in the pull-up enabled state, and the first output module is configured to output a first scan signal according to the gate voltage and a first clock signal; the second control module is configured to control the second pull-up node to be in a pull-up enabled state at a second moment, the second pull-up node is configured to provide a gate voltage to the second output module in the pull-up enabled state, and the second output module is configured to output a second scan signal according to the gate voltage and a second clock signal; the first moment and the second moment are adjacent moments, and the controlled states of the first pull-up node and the second pull-up node are opposite at the same moment. When the first pull-up node or the second pull-up node is in a non-pull-up enabled state, the gate voltage cannot be provided continuously; the first clock signal and the second clock signal are both provided by a timing control circuit, and the timing control circuit is connected to the scan driving circuit through a clock signal line; the first scan signal and the second scan signal are used to drive two adjacent rows of pixel units to emit light.

[0006] Optionally, the first control module includes a first thin film transistor. The source of the first thin film transistor is connected to the first pull-up node, the drain of the first thin film transistor is connected to a low-level output terminal, and the gate of the first thin film transistor is connected to a first control terminal. Wherein: the first control terminal is configured to output a target low level to turn off the first thin film transistor, so as to disconnect the first pull-up node from the low-level output terminal and make the first pull-up node in a pull-up enabled state; or, the first control terminal is configured to output a target high level to turn on the first thin film transistor, so as to connect the first pull-up node to the low-level output terminal and make the first pull-up node in a non-pull-up enabled state.

[0007] Optionally, the second control module includes a second thin film transistor. The source of the second thin film transistor is connected to the second pull-up node, the drain of the second thin film transistor is connected to the low-level output terminal, and the gate of the second thin film transistor is connected to the second control terminal. Wherein: the second control terminal is used to output a target high level to turn on the second thin film transistor, so as to connect the second pull-up node to the low-level output terminal, and make the second pull-up node in a non-pull-up state; or, the second control terminal is used to output a target low level to turn off the second thin film transistor, so as to disconnect the second pull-up node from the low-level output terminal, and make the second pull-up node in a pull-up state.

[0008] Optionally, the rising edge of the second clock signal is after the rising edge of the first clock signal, and the falling edge of the first clock signal is before the falling edge of the second clock signal.

[0009] Optionally, the driving unit further includes: a first pull-up module and a second pull-up module; wherein: the first pull-up module is connected to the first pull-up node, and the first pull-up module is used to pre-charge the first pull-up node according to the first-stage transmission signal; the second pull-up module is connected to the second pull-up node, and the second pull-up module is used to pre-charge the second pull-up node according to the second-stage transmission signal, and the high level of the first-stage transmission signal precedes the high level of the second-stage transmission signal.

[0010] Optionally, the driving unit further includes: a first pull-up control module, a first pull-down maintenance module, a second pull-up control module, a second pull-down maintenance module, a first pull-down node and a second pull-down node; wherein: both the first pull-up control module and the first pull-down maintenance module are connected to the first pull-down node, the first pull-up control module is used to control the level of the first pull-down node according to the third-stage transmission signal, and the first pull-down maintenance module is used to control the level of the first pull-down node according to the first power supply signal; both the second pull-up control module and the second pull-down maintenance module are connected to the second pull-down node, the second pull-up control module is used to control the level of the second pull-down node according to the third-stage transmission signal, and the second pull-down maintenance module is used to control the level of the second pull-down node according to the second power supply signal; the high-level signal of the third-stage transmission signal precedes the first-stage transmission signal and the second-stage transmission signal, and both the first power supply signal and the second power supply signal are provided by the timing control circuit, and the level signals of the first power supply signal and the second power supply signal are opposite.

[0011] Optionally, the driving unit further includes: a first pull-down module, a second pull-down module, a third pull-down module, and a fourth pull-down module; wherein: the first pull-down module and the fourth pull-down module are both connected to the first pull-down node; the second pull-down module and the third pull-down module are both connected to the second pull-down node; the first pull-down module and the second pull-down module are used to pull down the output signal of the first output module, and the third pull-down module and the fourth pull-down module are used to pull down the output signal of the second output module.

[0012] Optionally, the driving unit further includes: a first pull-down control module, a second pull-down control module, a first reset module, and a second reset module; wherein: the first pull-down control module is connected to the first pull-up node, and the first pull-down control module is used to pull down the first pull-up node according to the fourth-stage transmission signal; the second pull-down control module is connected to the second pull-up node, and the second pull-down control module is used to pull down the second pull-up node according to the fifth-stage transmission signal, and the high level of the fourth-stage transmission signal precedes the high level of the fifth-stage transmission signal; the first reset module is connected to the first pull-up node, and the first reset module is used to reset the first pull-up node; the second reset module is connected to the second pull-up node, and the second reset module is used to reset the second pull-up node.

[0013] According to another aspect of the embodiments of the present application, the present application provides a display panel, including an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate, and the array substrate has the above-mentioned scanning driving circuit.

[0014] According to still another aspect of the embodiments of the present application, the present application provides a display device, including a backlight module and the above-mentioned display panel, and the backlight module is disposed on the backlight side of the array substrate for providing a light source to the display panel.

[0015] The above technical solutions provided by the embodiments of the present application have the following advantages compared with the related technologies:

[0016] The present application provides a scan driving circuit. The scan driving circuit includes a plurality of cascaded driving units. Each driving unit includes: a first pull-up node, a second pull-up node, a first control module and a first output module connected to the first pull-up node, and a second control module and a second output module connected to the second pull-up node. Wherein, the first control module is configured to control the first pull-up node to be in a pull-up enabled state at a first moment. The first pull-up node is configured to provide a gate voltage to the first output module when in the pull-up enabled state. The first output module is configured to output a first scan signal according to the gate voltage and a first clock signal. The second control module is configured to control the second pull-up node to be in a pull-up enabled state at a second moment. The second pull-up node is configured to provide a gate voltage to the second output module when in the pull-up enabled state. The second output module is configured to output a second scan signal according to the gate voltage and a second clock signal. The first moment and the second moment are adjacent moments. The controlled states of the first pull-up node and the second pull-up node are opposite at the same moment. When the first pull-up node or the second pull-up node is in a non-pull-up enabled state, the gate voltage cannot be provided continuously. The first clock signal and the second clock signal are both provided by a timing control circuit. The timing control circuit is connected to the scan driving circuit through a clock signal line. The first scan signal and the second scan signal are used to drive two adjacent rows of pixel units to emit light. By controlling the voltages of the first pull-up node and the second pull-up node, the present application can cancel the high-low switching of the video signal in the H-LINE picture, so that the video signal can always remain at a high level, reducing the power consumption of the panel in the H-line, and solving the technical problem that the video signal for outputting the H-LINE picture needs to continuously switch between high and low levels, resulting in high power consumption and easy damage to the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings herein are incorporated into the specification and form a part of the specification, showing embodiments consistent with the present application and used together with the specification to explain the principles of the present application.

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0019] Figure 1 FIG. [X] is a block diagram of an optional scan driving circuit module provided by an embodiment of the present application;

[0020] Figure 2 FIG. [Y] is a schematic diagram of an optional scan driving circuit provided by an embodiment of the present application;

[0021] Figure 3 It is a timing diagram corresponding to an optional scan driving circuit provided by an embodiment of the present application;

[0022] Figure 4 It is a schematic structural diagram of an optional display panel provided by an embodiment of the present application;

[0023] Figure 5 It is a schematic structural diagram of an optional display device provided by an embodiment of the present application.

[0024] Reference numerals: 1 First control module; 2, First output terminal; 3, Second control module; 4, Second output terminal; 5, First pull-up module; 6, Second pull-up module; 7, First pull-up control module; 8, First pull-down maintenance module; 9, Second pull-up control module; 10, Second pull-down maintenance module; 11, First pull-down module; 12, Second pull-down module; 13, Third pull-down module; 14, Fourth pull-down module; 15, First pull-down control module; 16, Second pull-down control module; 17, First reset module; 18, Second reset module; 100, Array substrate; 200, Backlight module; 300, Color filter substrate; 400, Liquid crystal layer. Detailed implementation manners

[0025] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0026] In subsequent descriptions, the suffixes such as "module", "component", or "unit" used to represent elements are only for the convenience of description of the present application, and they have no specific meaning in themselves. Therefore, "module" and "component" can be used interchangeably.

[0027] In the related art, on the same scan line in the horizontal direction, the gates of all TFTs are connected together, so the applied voltage is linked. When a sufficiently large positive voltage is applied to the scan line, all the TFTs on this scan line are turned on. At this time, the pixel electrodes on this scan line will be connected to the data lines in the vertical direction, and the corresponding video signals will be sent by the vertical data lines to charge the pixel electrodes to an appropriate voltage. Then, a sufficiently large negative voltage is applied to the scan line to turn off the TFTs until the signal is rewritten again next time. During this period, the charge is stored on the liquid crystal capacitor; at this time, the next horizontal scan line is started, and the corresponding video signal is sent to complete the progressive sequential scan. However, when the video signal data is at a high level, the pixel electrodes of the nth row are charged and the nth row is lit. When the video signal data is at a low level, the pixel electrodes of the (n + 1)th row are not charged and the (n + 1)th row is dark. And so on, the (n + 2)th row is lit and the (n + 3)th row is dark... Therefore, by switching the high and low levels of the data signal, an H-LINE image is output. So at this time, because the data signal needs to continuously switch between high and low levels, relatively high power consumption will be generated, the temperature will rise, and it is easy to damage the display panel.

[0028] To solve the problems mentioned in the background art, according to one aspect of the embodiments of the present application, an embodiment of a scan driving circuit is provided. As Figure 1 and Figure 2 shown, the scan driving circuit includes a plurality of cascaded driving units. The driving unit includes: a first pull-up node Q(N), a second pull-up node Q(N + 1), a first control module 1 connected to the first pull-up node Q(N), and a first output module 2, a second control module 3 connected to the second pull-up node Q(N + 1), and a second output module 4; wherein,

[0029] The first control module 1 is configured to control the first pull-up node Q(N) to be in a pull-upable state at a first moment. The first pull-up node Q(N) is configured to provide a gate voltage to the first output module 2 in the pull-upable state. The first output module 2 is configured to output a first scan signal Gount(n) according to the gate voltage and a first clock signal CLK(N);

[0030] The second control module 3 is configured to control the second pull-up node Q(N + 1) to be in a pull-upable state at a second moment. The second pull-up node Q(N + 1) is configured to provide a gate voltage to the second output module 4 in the pull-upable state. The second output module 4 is configured to output a second scan signal Gount(n + 1) according to the gate voltage and a second clock signal CLK(N + 1);

[0031] The first moment and the second moment are adjacent moments, and the controlled states of the first pull-up node Q(N) and the second pull-up node Q(N+1) are opposite at the same moment. When the first pull-up node Q(N) or the second pull-up node Q(N+1) is in a non-pull-up state, the gate voltage cannot be provided continuously;

[0032] The first clock signal CLK(N) and the second clock signal CLK(N+1) are both provided by a timing control circuit, and the timing control circuit is connected to the scan driving circuit through a clock signal line; the first scan signal Gount(n) and the second scan signal Gount(n+1) are used to drive two adjacent pixel units to emit light.

[0033] In an optional embodiment, the first control module 1 includes a first thin film transistor. The source of the first thin film transistor is connected to the first pull-up node Q(N), the drain of the first thin film transistor is connected to the low-level output terminal Vss2, and the gate of the first thin film transistor is connected to the first control terminal Vgh1, where,

[0034] The first control terminal Vgh1 is used to output a target low level to turn off the first thin film transistor, so as to disconnect the first pull-up node Q(N) from the low-level output terminal Vss2, and make the first pull-up node Q(N) in a pull-up state;

[0035] Alternatively, the first control terminal Vgh1 is used to output a target high level to turn on the first thin film transistor, so as to connect the first pull-up node Q(N) to the low-level output terminal Vss2, and make the first pull-up node Q(N) in a non-pull-up state.

[0036] In an optional embodiment, the second control module 3 includes a second thin film transistor. The source of the second thin film transistor is connected to the second pull-up node Q(N+1), the drain of the second thin film transistor is connected to the low-level output terminal Vss2, and the gate of the second thin film transistor is connected to the second control terminal Vgh2, where,

[0037] The second control terminal Vgh2 is used to output a target high level to turn on the second thin film transistor, so as to connect the second pull-up node Q(N+1) to the low-level output terminal Vss2, and make the second pull-up node Q(N+1) in a non-pull-up state;

[0038] Alternatively, the second control terminal Vgh2 is used to output a target low level to turn off the second thin film transistor, so as to disconnect the second pull-up node Q(N+1) from the low level output terminal Vss2, and make the second pull-up node Q(N+1) in a pull-upable state.

[0039] In the related art, when outputting an H-LINE screen, the video signal data needs to continuously switch between high and low levels, which will generate relatively high power consumption and an increase in temperature, making it easy to damage the display panel.

[0040] In the embodiment of the present application, by setting the first control module 1 corresponding to the first thin film transistor and the second control module 3 corresponding to the second thin film transistor, the first pull-up node Q(N) can be in a pull-upable state at the first moment, and the second pull-up node Q(N+1) can be in a non-pull-upable state at the first moment. Thus, the first pull-up node Q(N) can continuously provide a gate voltage for the first output terminal 2, while at this time the second pull-up node Q(N+1) cannot provide a gate voltage for the second output module. Then, as Figure 3 shown, when the video signal data is at a high level, the first output terminal 2 can output a first scan signal Gount(n) according to the gate voltage and the first clock signal CLK(N), and the pixel power supply connected to the first output terminal 2 emits light. Since the second output terminal 4 does not receive the gate voltage, even if the video signal data is always at a high level, the second output terminal 4 cannot output a second scan signal Gount(n+1), and the pixel power supply connected to the second output terminal 4 does not emit light. Similarly, at the next moment of the first moment, that is, at the second moment, the first control module 1 and the second control module 3 can make the first pull-up node Q(N) in a non-pull-upable state at the second moment, and the second pull-up node Q(N+1) in a pull-upable state at the second moment. Thus, the first pull-up node Q(N) cannot provide a gate voltage for the first output terminal 2, while at this time the second pull-up node Q(N+1) can continuously provide a gate voltage for the second output module. Then, when the video signal data is at a high level, since the first output terminal 2 does not receive the gate voltage, even if the video signal data is always at a high level, the first output terminal 2 cannot output a first scan signal Gount(n), and the pixel power supply connected to the first output terminal 2 does not emit light. The second output terminal 4 can output a second scan signal Gount(n+1) according to the gate voltage and the second clock signal CLK(N+1), and the pixel power supply connected to the second output terminal 4 emits light.

[0041] Therefore, by controlling the voltages of the first pull-up node and the second pull-up node in this application, the high-low switching of the video signal during the H-LINE screen can be cancelled, enabling the video signal to always remain at a high level, reducing the power consumption of the panel during H-line, and solving the technical problem that the video signal for outputting the H-LINE screen needs to continuously switch between high and low levels, resulting in high power consumption and being prone to damaging the display panel.

[0042] In an optional embodiment, the rising edge of the second clock signal CLK(N + 1) is after the rising edge of the first clock signal CLK(N), and the falling edge of the first clock signal CLK(N) is before the falling edge of the second clock signal CLK(N + 1).

[0043] In the embodiment of this application, the timing of the first clock signal CLK(N) and the second clock signal CLK(N + 1) output by the timing control circuit can be adjusted, and based on the control signals output by the first control terminal Vgh1 and the second control terminal Vgh2, the timing relationship among the first clock signal CLK(N), the second clock signal CLK(N + 1), and the first control terminal Vgh1 and the second control terminal Vgh2 satisfies Figure 3 the shown timing relationship. In this way, as Figure 3 shown, when the first control terminal Vgh1 continuously outputs a target low level and the second control terminal Vgh2 continuously outputs a target high level, when the rising edge of the first clock signal CLK(N) arrives, the voltage of the first pull-up node Q(N) can be pulled up, and then under the action of the first pull-up module 5, a gate voltage is provided for the first output module 2. Then, the first output module 2 can output the first scan signal Gout(n) according to the gate voltage and the video signal data. Even when the rising edge of the second clock signal CLK(N + 1) arrives, since the second pull-up node Q(N + 1) is connected to Vss2 and cannot be pulled up, even under the action of the second pull-up module 6, the second pull-up node Q(N + 1) cannot provide a gate voltage for the second output terminal 4. Then, even when the video signal data is always at a high level, the second output module 2 cannot output the second scan signal Gout(n + 1).

[0044] In an optional embodiment, the driving unit further includes: a first pull-up module 5 and a second pull-up module 6;

[0045] wherein, the first pull-up module 5 is connected to the first pull-up node Q(N), and the first pull-up module 5 is used to pre-charge the first pull-up node Q(N) according to the first-stage transmission signal;

[0046] The second pull-up module 6 is connected to the second pull-up node Q(N + 1). The second pull-up module 6 is used to pre-charge the second pull-up node Q(N + 1) according to the second-stage transmission signal, and the high level of the first-stage transmission signal precedes the high level of the second-stage transmission signal.

[0047] In the embodiment of the present application, the first pull-up node Q(N) can be pre-charged by the first pull-up module 5 and the first-stage transmission signal. Specifically, when the first-stage transmission signal outputs a high level, the thin-film transistor in the first pull-up module 5 can be turned on, and then the first pull-up node Q(N) is pre-charged. Similarly, the second pull-up node Q(N + 1) can be pre-charged by the second pull-up module 6 and the second-stage transmission signal. Specifically, when the second-stage transmission signal outputs a high level, the thin-film transistor in the second pull-up module 6 can be turned on, and then the second pull-up node Q(N + 1) is pre-charged.

[0048] In this way, after the first pull-up node Q(N) and the second pull-up node Q(N + 1) enter the pre-charge state, with the input of the clock signal, the voltages of the first pull-up node Q(N) and the second pull-up node Q(N + 1) can enter the high-level state through coupling, and then control the corresponding output module to output a scan signal.

[0049] In an optional embodiment, the driving unit further includes: a first pull-up control module 7, a first pull-down maintaining module 8, a second pull-up control module 9, a second pull-down maintaining module 10, a first pull-down node Qb(N), and a second pull-down node Qb(N + 1);

[0050] Wherein, the first pull-up control module 7 and the first pull-down maintaining module 8 are both connected to the first pull-down node Qb(N). The first pull-up control module 7 is used to control the level of the first pull-down node Qb(N) according to the third-stage transmission signal, and the first pull-down maintaining module 8 is used to control the level of the first pull-down node Qb(N) according to the first power supply signal VDD_O;

[0051] The second pull-up control module 9 and the second pull-down maintaining module 10 are both connected to the second pull-down node Qb(N + 1). The second pull-up control module 9 is used to control the level of the second pull-down node Qb(N + 1) according to the third-stage transmission signal, and the second pull-down maintaining module 10 is used to control the level of the second pull-down node Qb(N + 1) according to the second power supply signal VDD_E;

[0052] The high-level signal of the third-stage transmission signal precedes the first-stage transmission signal and the second-stage transmission signal. Both the first power supply signal and the second power supply signal are provided by the timing control circuit, and the level signals of the first power supply signal and the second power supply signal are opposite to each other.

[0053] In the embodiment of the present application, the level of the first pull-down node Qb(N) can be controlled by the first pull-up control module 7 and the first pull-down maintenance module 8, and the level of the second pull-down node Qb(N + 1) can be controlled by the second pull-up control module 9 and the second pull-down maintenance module 10. Specifically, when the high-level signals of the third-stage transmission signal are simultaneously input to the first pull-up control module 7 and the second pull-up control module 9, the thin-film transistors in the first pull-up control module 7 and the second pull-up control module 9 are turned on, so that the levels of the first pull-down node Qb(N) and the second pull-down node Qb(N + 1) are pulled down to VSS2. In this way, the pull-down modules connected to the first pull-down node Qb(N) and the second pull-down node Qb(N + 1) do not work, ensuring that the subsequent first pull-up module 5 and second pull-up module 6 can output normally, and the corresponding two output modules can also output normally. When the first power supply signal or the second power supply signal outputs a high level, the first pull-down node Qb(N) or the second pull-down node Qb(N + 1) can obtain a high level to start the corresponding pull-down module to work, so as to achieve the function of pull-down maintenance.

[0054] In an alternative embodiment, the driving unit further includes: a first pull-down module 11, a second pull-down module 12, a third pull-down module 13, and a fourth pull-down module 14;

[0055] Wherein, the first pull-down module 11 and the fourth pull-down module 14 are both connected to the first pull-down node Qb(N);

[0056] The second pull-down module 12 and the third pull-down module 13 are both connected to the second pull-down node Qb(N + 1);

[0057] The first pull-down module 11 and the second pull-down module 12 are used to pull down the output signal of the first output module 2, and the third pull-down module 13 and the fourth pull-down module 14 are used to pull down the output signal of the second output module 4.

[0058] In the embodiments of the present application, the above-mentioned first power signal and second power signal alternately output high levels. That is, when the first power signal outputs a high level, the second power signal outputs a low level; when the first power signal outputs a low level, the second power signal outputs a high level. Since both the first pull-down module 11 and the fourth pull-down module 14 are connected to the first pull-down node Qb(N), and both the second pull-down module 12 and the third pull-down module 13 are connected to the second pull-down node Qb(N+1), whether the first power signal is at a high level or the second power signal is at a high level, the output signals of the first output module 2 and the second output module 4 can be pulled down, thereby realizing the pull-down function of each output signal. The reason for setting the first power signal and the second power signal to alternately output high levels is to avoid burning out the first pull-down maintenance module 8 or the second pull-down maintenance module 10 due to the first power signal or the second power signal outputting a high level for a long time.

[0059] In the actual circuit operation, after the first scan signal Gount(n) and the second scan signal Gount(n+1) are output, assuming that the second power signal is output at a high level, at this time, the second pull-down maintenance module 10 continues to work, keeping the second pull-down node Qb(N+1) at a high level. At this time, the second pull-down module 12 and the fourth pull-down module 14 work normally, and can continuously pull down the voltages of the first scan signal Gount(n), the second scan signal Gount(n+1), the first pull-up node Q(N), and the second pull-up node Q(N+1) to VSS1 / VSS2. Before the first pull-up node Q(N) and the second pull-up node Q(N+1) are pre-charged, the third-stage transfer signal can be input as the pull-up control signal. At this time, the second pull-up control module 9 will pull down the signal of the second pull-down node Qb(N+1) to VSS2. At this time, the corresponding second pull-down module 12 and fourth pull-down module 14 do not work, and since the first power signal is at a low level, the first pull-down module 11 and the third pull-down module 13 also do not work. This can ensure that the subsequent first pull-up module 5 and second pull-up module 6 can output normally, and the corresponding two output modules can also output normally.

[0060] In an optional embodiment, the driving unit further includes: a first pull-down control module 15, a second pull-down control module 16, a first reset module 17, and a second reset module 18;

[0061] Among them, the first pull-down control module 15 is connected to the first pull-up node Q(N), and the first pull-down control module 15 is used to perform a pull-down control on the first pull-up node Q(N) according to the fourth-stage transfer signal;

[0062] The second pull-down control module 16 is connected to the second pull-up node Q(N+1). The second pull-down control module 16 is configured to pull down the second pull-up node Q(N+1) according to the fifth-stage transmission signal, and the high level of the fourth-stage transmission signal precedes the high level of the fifth-stage transmission signal.

[0063] The first reset module 17 is connected to the first pull-up node Q(N). The first reset module 17 is configured to reset the first pull-up node Q(N).

[0064] The second reset module 18 is connected to the second pull-up node Q(N+1). The second reset module 18 is configured to reset the second pull-up node Q(N+1).

[0065] In the embodiment of the present application, the voltage of the first pull-up node Q(N) can also be controlled by the first pull-down control module 15, and the voltage of the second pull-up node Q(N+1) can be controlled by the second pull-down control module 16. Specifically, when the fourth-stage transmission signal outputs a high level, the thin-film transistor in the first pull-down control module 15 can be turned on, so that the first pull-up node Q(N) can be pulled down to VSS2 through the first pull-down control module 15. Similarly, when the fifth-stage transmission signal outputs a high level, the thin-film transistor in the second pull-down control module 16 can be turned on, so that the second pull-up node Q(N+1) can be pulled down to VSS2 through the second pull-down control module 16. In this way, the first pull-up node Q(N) and the second pull-up node Q(N+1) can be pulled down to avoid leakage current aggregation in the circuit.

[0066] By controlling the voltages of the first pull-up node and the second pull-up node in the present application, the high-low switching of the video signal in the H-LINE picture can be cancelled, so that the video signal can always remain at a high level, reducing the power consumption of the panel in the H-line, and solving the technical problem that the video signal outputting the H-LINE picture needs to continuously switch between high and low levels, resulting in high power consumption and easy damage to the display panel.

[0067] According to one aspect of the embodiment of the present application, an embodiment of a display panel is provided, as Figure 4 shown. The display panel includes an array substrate 100, a color filter substrate 300, and a liquid crystal layer 400 disposed between the array substrate 100 and the color filter substrate 300. The array substrate has the above-described scanning drive circuit.

[0068] According to another aspect of the embodiment of the present application, the present application provides a display device, as Figure 5 shown. The display device includes a backlight module 200 and the above-described liquid crystal panel. The backlight module 200 is disposed on the backlight side of the array substrate 100 and is configured to provide a light source to the liquid crystal panel.

[0069] The above are only specific embodiments of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but rather will be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A scanning driving circuit, characterized in that, The scanning driving circuit includes a plurality of cascaded driving units, and each driving unit includes: a first pull-up node, a second pull-up node, a first control module and a first output module connected to the first pull-up node, and a second control module and a second output module connected to the second pull-up node; wherein: The first control module is configured to control the first pull-up node to be in a pull-up enabled state at a first moment, the first pull-up node is configured to provide a gate voltage to the first output module in the pull-up enabled state, and the first output module is configured to output a first scanning signal according to the gate voltage and a first clock signal; The second control module is configured to control the second pull-up node to be in a pull-up enabled state at a second moment, the second pull-up node is configured to provide a gate voltage to the second output module in the pull-up enabled state, and the second output module is configured to output a second scanning signal according to the gate voltage and a second clock signal; The first moment and the second moment are adjacent moments, and the controlled states of the first pull-up node and the second pull-up node are opposite at the same moment. When the first pull-up node or the second pull-up node is in a non-pull-up enabled state, the gate voltage cannot be provided continuously; The first clock signal and the second clock signal are both provided by a timing control circuit, and the timing control circuit is connected to the scanning driving circuit through a clock signal line; the first scanning signal and the second scanning signal are used to drive two adjacent pixel units to emit light; The first control module includes a first thin film transistor, the source electrode of the first thin film transistor is connected to the first pull-up node, the drain electrode of the first thin film transistor is connected to a low-level output terminal, and the gate electrode of the first thin film transistor is connected to a first control terminal, wherein: The first control terminal is configured to output a target low level to turn off the first thin film transistor, so as to disconnect the first pull-up node from the low-level output terminal and make the first pull-up node in a pull-up enabled state; Alternatively, the first control terminal is configured to output a target high level to turn on the first thin film transistor, so as to connect the first pull-up node to the low-level output terminal and make the first pull-up node in a non-pull-up enabled state.

2. The circuit according to claim 1, wherein The second control module includes a second thin film transistor, the source electrode of the second thin film transistor is connected to the second pull-up node, the drain electrode of the second thin film transistor is connected to a low-level output terminal, and the gate electrode of the second thin film transistor is connected to a second control terminal, wherein: The second control terminal is configured to output a target high level to turn on the second thin film transistor, so as to connect the second pull-up node to the low-level output terminal and make the second pull-up node in a non-pull-up enabled state; Alternatively, the second control terminal is configured to output a target low level to turn off the second thin film transistor, so as to disconnect the second pull-up node from the low-level output terminal and make the second pull-up node in a pull-up enabled state.

3. The scanning driving circuit according to claim 1, wherein The rising edge of the second clock signal is after the rising edge of the first clock signal, and the falling edge of the first clock signal is before the falling edge of the second clock signal.

4. The scanning drive circuit according to claim 1, wherein The driving unit further includes: a first pull-up module and a second pull-up module; wherein: The first pull-up module is connected to the first pull-up node, and the first pull-up module is used to pre-charge the first pull-up node according to the first-stage transmission signal. The second pull-up module is connected to the second pull-up node, and the second pull-up module is used to pre-charge the second pull-up node according to the second-stage transmission signal, and the high level of the first-stage transmission signal precedes the high level of the second-stage transmission signal.

5. The scanning drive circuit according to claim 4, wherein, The driving unit further includes: a first pull-up control module, a first pull-down maintenance module, a second pull-up control module, a second pull-down maintenance module, a first pull-down node, and a second pull-down node; wherein: Both the first pull-up control module and the first pull-down maintenance module are connected to the first pull-down node. The first pull-up control module is used to control the level of the first pull-down node according to the third-stage transmission signal, and the first pull-down maintenance module is used to control the level of the first pull-down node according to the first power supply signal. Both the second pull-up control module and the second pull-down maintenance module are connected to the second pull-down node. The second pull-up control module is used to control the level of the second pull-down node according to the third-stage transmission signal, and the second pull-down maintenance module is used to control the level of the second pull-down node according to the second power supply signal. The high-level signal of the third-stage transmission signal precedes the first-stage transmission signal and the second-stage transmission signal. Both the first power supply signal and the second power supply signal are provided by the timing control circuit, and the level signals of the first power supply signal and the second power supply signal are opposite.

6. The scanning drive circuit according to claim 5, wherein, The driving unit further includes: a first pull-down module, a second pull-down module, a third pull-down module, and a fourth pull-down module; wherein: Both the first pull-down module and the fourth pull-down module are connected to the first pull-down node; Both the second pull-down module and the third pull-down module are connected to the second pull-down node; The first pull-down module and the second pull-down module are used to pull down the output signal of the first output module, and the third pull-down module and the fourth pull-down module are used to pull down the output signal of the second output module.

7. The scanning driving circuit according to claim 1, wherein The driving unit further includes: a first pull-down control module, a second pull-down control module, a first reset module, and a second reset module; wherein: The first pull-down control module is connected to the first pull-up node, and the first pull-down control module is used to pull down the first pull-up node according to the fourth-stage transmission signal. The second pull-down control module is connected to the second pull-up node, and the second pull-down control module is used to pull down the second pull-up node according to the fifth-stage transmission signal, and the high level of the fourth-stage transmission signal precedes the high level of the fifth-stage transmission signal. The first reset module is connected to the first pull-up node, and the first reset module is configured to reset the first pull-up node; The second reset module is connected to the second pull-up node, and the second reset module is configured to reset the second pull-up node.

8. A display panel, comprising an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate, wherein, The array substrate has the scan driving circuit according to any one of claims 1 to 7.

9. A display device, characterized in that, It includes a backlight module and the display panel according to claim 8, and the backlight module is disposed on the backlight side of the array substrate for providing a light source to the display panel.

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