A power line protection system

Abstract

The present application relates to the field of power transmission line safety, and particularly relates to a power transmission line protection system; the power transmission line comprises a main power transmission line and multiple branch power transmission lines, and comprises a background monitoring device and protection devices installed on the main power transmission line and the multiple branch power transmission lines; a topological graph marked with position information of each protection device and a SIM card number of a wireless communication device connected to the protection device is set in the background monitoring device; when the protection device detects a fault of the power transmission line, not only can the power transmission line be timely cut off to avoid danger, but also an alarm information can be sent to the background monitoring device through the wireless communication device; based on the SIM card number of the wireless communication device sending the alarm information, the background monitoring device can mark the position of the fault in the topological graph, thereby avoiding manual screening and improving the repair efficiency to a certain extent.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power transmission line safety, in particular to a power transmission line protection system. BACKGROUND

[0002] In recent years, with the continuous improvement of economic level and the continuous progress of society, various types of pillar energy enterprises have become increasingly large, and electricity, as a member of energy pillar enterprises, has always maintained the trend of developing itself faster than social development. In recent years, the latest data and information technology has been applied to the power grid, and the power grid development has shown a trend of scale and optimized resource allocation. However, with the increasingly close network of the power grid and the increasingly complex network frame, short circuits, grounding, overload and broken lines often occur in the power transmission line, which has serious consequences.

[0003] At present, when the power transmission line fails, it can only rely on manual screening, which requires technical personnel to have strong professional skills and a wide range of professional knowledge, so that the training period of technical personnel is long. However, the development of the power grid is extremely fast, and the training of technical personnel cannot keep up with the demand of the development of the power grid. Moreover, manual screening undoubtedly delays a large amount of fault handling time, and even misses the most ideal accident handling opportunity. In addition, manual screening often brings the risk of wrong screening and missed screening, which may increase the risk of operation of the power grid due to wrong screening and missed screening.

[0004] Therefore, it is one of the urgent problems to provide a system that can timely cut off the power transmission line when the power transmission line fails, avoid danger, and monitor the fault location. SUMMARY

[0005] The purpose of the present application is to provide a power transmission line protection system that can timely cut off the power transmission line to avoid danger when the power transmission line fails, and can timely monitor the fault location.

[0006] The specific technical scheme provided by the present application is as follows: a power transmission line protection system, the power transmission line includes a main power transmission line and a plurality of branch power transmission lines, comprising a background monitoring device and a protection device installed on the main power transmission line and the plurality of branch power transmission lines;

[0007] Each protection device is connected with a wireless communication device; each wireless communication device is provided with a SIM card, and each SIM card number is fixed and unique;

[0008] The background monitoring device is provided with a protection device topology, and each protection device in the protection device topology is marked with the position information of the protection device and the SIM card number of the wireless communication device connected therewith;

[0009] The background monitoring device is in communication connection with the protection device through the wireless communication device, when the protection device detects the fault of the power transmission line and the protection device makes the power transmission line power off, the protection device sends an alarm information to the background monitoring device at the same time, the background monitoring device marks the protection device sending the alarm information in the topological graph based on the SIM card number of the wireless communication device sending the alarm information;

[0010] The background monitoring device is connected with a first alarm device, when receiving the alarm information, the alarm device is controlled to alarm.

[0011] Further, the protection device comprises a voltage acquisition circuit, a current acquisition circuit, a signal conditioning circuit, a signal conversion circuit, a processor, an execution circuit and an FPGA control chip.

[0012] The voltage acquisition circuit is used for acquiring the phase voltage signal of the power transmission line; the current acquisition circuit is used for acquiring the phase current signal of the power transmission line.

[0013] The signal conditioning circuit is connected with the voltage acquisition circuit and the current acquisition circuit, and is used for conditioning the acquired phase voltage signal and phase current signal.

[0014] The signal conversion circuit is connected with the signal conditioning circuit, and converts the conditioned phase voltage signal and phase current signal into phase voltage digital quantity and phase current digital quantity respectively.

[0015] The FPGA control chip is connected with the signal conversion circuit and the signal conditioning circuit, and performs logic control on the signal conditioning circuit and the signal conversion circuit.

[0016] The processor is connected with the signal conversion circuit, and receives the phase voltage digital quantity and the phase current digital quantity.

[0017] The processor is connected with the execution circuit, when the received phase voltage digital quantity exceeds the preset phase voltage threshold range or the received phase current digital quantity exceeds the preset phase current threshold range, the execution circuit is controlled to perform the disconnection action, so that the power transmission line is powered off.

[0018] Further, the execution circuit comprises a first resistor R1 and a third resistor R3.

[0019] The first end of the first resistor R1 is connected with the first output pin of the processor; the second end of the first resistor R1 is connected with the base of the first triode Q1.

[0020] The first end of the third resistor R3 is connected with the third output pin of the processor; the second end of the third resistor R3 is connected with the base of the third triode Q3.

[0021] The emitter of the third triode Q is connected with the second output pin of the processor.

[0022] The collector of the third transistor Q3 is connected to the first end of the second resistor R2; the second end of the second resistor R2 is connected to the base of the second transistor Q2.

[0023] The emitter of the second transistor Q2 is connected to the first power supply V1;

[0024] The collector of the second transistor Q2 is connected to the second power supply V2;

[0025] The emitter of the first transistor Q1 is grounded;

[0026] The collector of the first transistor Q1 is connected to the positive terminal of the diode D1 and the first terminal of the switch signal relay coil K1;

[0027] The negative terminal of diode D1 is grounded to the second terminal of the switch signal relay coil K1.

[0028] Furthermore, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are MOSFETs.

[0029] Furthermore, the voltage acquisition circuit includes a voltage transformer, and the primary side terminal U of the voltage transformer is connected to the A-phase transmission line and the first terminal of the first bidirectional transient voltage suppression diode TSV1.

[0030] The primary side terminal X of the voltage transformer is connected to the C-phase transmission line and the first terminal of the second bidirectional transient voltage suppressor diode TSV2;

[0031] The second terminal of the first bidirectional transient voltage suppressor diode TSV1 and the second terminal of the second bidirectional transient voltage suppressor diode TSV2 are both grounded;

[0032] The secondary side terminal u of the voltage transformer is connected to the first end of the fourth resistor R4 and the first end of the fifth resistor R5.

[0033] The secondary side terminal x of the voltage transformer, the second end of the fourth resistor R4, and the + pin of the operational chip IC1 are all grounded;

[0034] The second end of the fifth resistor R5 is connected to the - pin of the operational chip IC1, the second end of the sixth resistor R6 and the first end of the first capacitor C1;

[0035] The second terminal of the first capacitor C1 is connected to the out pin of the arithmetic chip IC1 and the first terminal of the seventh resistor R7;

[0036] The second terminal of the seventh resistor R7 is connected to the second terminal of the sixth resistor R6 and the signal conditioning circuit.

[0037] Furthermore, the current acquisition circuit includes: a current transformer; the terminal S1 of the current transformer is connected to the first end of the eighth resistor R8, the first end of the third bidirectional transient voltage suppressor diode TSV3, the - pin of the operational chip IC2, the first end of the ninth resistor R9, and the first end of the second capacitor C2.

[0038] The current transformer's terminal S2, the second end of the eighth resistor R8, the second end of the third bidirectional transient voltage suppressor diode TSV3, and the + pin of the operational chip IC2 are all grounded;

[0039] The out pin of chip IC2 is connected to the second terminal of the second capacitor C2 and the first terminal of the tenth resistor R10;

[0040] The second terminal of the tenth resistor R10 is connected to the second terminal of the ninth resistor and the signal conditioning circuit block.

[0041] Furthermore, the protection device also includes an alarm module, and the processor is connected to the alarm module. While controlling the execution circuit to perform the disconnection action, the processor controls the alarm module to sound an alarm.

[0042] Furthermore, the processor is an MCU microprocessor.

[0043] The beneficial effects of this invention are as follows:

[0044] This invention establishes a topology map in the background monitoring device, which is marked with the location information of each protection device and the SIM card number of the wireless communication device connected to it. When the protection device detects a fault in the transmission line, it can not only cut off the transmission line in time to avoid danger, but also send an alarm message to the background monitoring device through the wireless communication device. Based on the SIM card number of the wireless communication device that sent the alarm message, the background monitoring device marks the location of the fault in the topology map, thereby avoiding manual screening and improving the efficiency of emergency repair to a certain extent.

[0045] Furthermore, when multiple alarm messages are received, the present invention can use a topology map to quickly locate the precise location that caused the power outage on the transmission line.

[0046] Furthermore, the design principle of this invention is reliable, the structure is simple, and it has a very wide range of application prospects. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 A schematic diagram of the electrical schematic of a power transmission line protection system according to an embodiment of the present invention is shown.

[0049] Figure 2 A schematic diagram of the electrical principle of a protection device according to an embodiment of the present invention is shown.

[0050] Figure 3 It shows Figure 2 The circuit diagram of the protection device's execution circuit is shown.

[0051] Figure 4 It shows Figure 2 The circuit diagram of the voltage acquisition circuit of the protection device shown is a schematic diagram.

[0052] Figure 5 It shows Figure 2 The circuit diagram of the current acquisition circuit of the protection device shown is a schematic diagram.

[0053] 1. Protection device; 2. Background monitoring device; 3. Wireless communication device; 4. Voltage acquisition circuit; 5. Current acquisition circuit; 6. Signal conditioning circuit; 7. Signal conversion circuit; 8. Processor; 9. Execution circuit; 10. PFGA control chip; 11. Alarm device; 12. Alarm module. Detailed Implementation

[0054] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0055] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0056] This invention provides an embodiment of a power transmission line protection system, such as... Figure 1 As shown, the transmission line includes a main transmission line and multiple branch transmission lines, including a background monitoring device 2 and protection devices 1 installed on the main transmission line and multiple branch transmission lines.

[0057] Each protection device 1 is connected to a wireless communication device 3; each wireless communication device 3 is equipped with a SIM card, and each SIM card number is fixed and unique.

[0058] The background monitoring device 2 is equipped with a topology map that marks the location information of each protection device 1. The location information of each protection device 1 corresponds one-to-one with the SIM card number of the corresponding wireless communication device 3 connected to each protection device 1.

[0059] The background monitoring device 2 communicates with the protection device 1 through the wireless communication device 3. When the protection device 1 detects a fault in the transmission line, it disconnects the power to the transmission line and sends an alarm message to the background monitoring device 2. Based on the SIM card number of the wireless communication device 3 that sent the alarm message, the background monitoring device 2 marks the protection device 1 that sent the alarm message in the topology diagram.

[0060] The background monitoring device 2 is connected to the first alarm device 11. When it receives an alarm message, it controls the alarm device 11 to sound an alarm.

[0061] Before use, the background monitoring device 2 generates a topology map of the protection device 1 based on the actual installation location of the protection device 1 on the main transmission line and multiple branch transmission lines, and marks the location of each protection device 1 and the SIM card number of the wireless communication device 3 connected to the protection device 1 on the topology map. For example, a protection device is marked with SIM number 256 and location: latitude 20, longitude 30.

[0062] When in use, if the protection device 1 detects a power transmission line fault, it sends an alarm message to the backend via the wireless communication device 3. The backend monitoring device 2, based on the SIM card number of the wireless communication device 3 that sent the alarm message, marks the protection device 1 with that SIM card number on the topology map, thus obtaining the location of the protection device 1, i.e., the location of the fault. For example, if the backend monitoring device 2 receives an alarm message from SIM card number 256, it will locate the protection device 1 marked with 256 on the topology map, thus obtaining the location of the protection device 1 as latitude 20°, longitude 30°, i.e., the location of the fault.

[0063] It should be noted that a single transmission line may have multiple branch transmission lines, which may result in multiple alarm messages and multiple SIM card numbers being obtained. By marking the location of protection device 1 on the protection device topology diagram, the origin of the fault can be determined quickly and promptly, making it easier to locate the fault.

[0064] This invention provides another embodiment of a power transmission line protection system, such as... Figure 2 As shown, the protection device 1 includes: a voltage acquisition circuit 4, a current acquisition circuit 5, a signal conditioning circuit 6, a signal conversion circuit 7, a processor 8, an execution circuit 9, and an FPGA control chip 10.

[0065] Voltage acquisition circuit 4 is used to acquire phase voltage signals of the transmission line; current acquisition circuit 5 is used to acquire phase current signals of the transmission line.

[0066] The signal conditioning circuit 6 is connected to the voltage acquisition circuit 4 and the current acquisition circuit 5, and is used to condition the acquired phase voltage signal and phase current signal.

[0067] The signal conversion circuit 7 is connected to the signal conditioning circuit 6, and converts the conditioned phase voltage signal and phase current signal into digital phase voltage and digital phase current, respectively.

[0068] The FPGA control chip 10 is connected to the signal conversion circuit 7 and the signal conditioning circuit 6, and performs logic control on the signal conditioning circuit 6 and the signal conversion circuit 7.

[0069] The processor 8 receives digital values ​​of phase voltage and phase current through a connection with the signal conversion circuit 7.

[0070] The processor 8 is connected to the execution circuit 9. When the received digital value of the phase voltage exceeds the preset phase voltage threshold range or the received digital value of the phase current exceeds the preset phase current threshold range, the processor 8 controls the execution circuit 9 to perform a disconnection action, thereby de-energizing the transmission line.

[0071] The protection device provided by this invention completes the logic control and signal transmission between each functionally independent part through the FPGA control chip, which changes the practice of the entire device being operated by a processor, so that each circuit is responsible for its own task, thereby helping to improve the working efficiency of the entire device.

[0072] For example, such as Figure 3 As shown, the execution circuit 9 includes a first resistor R1 and a third resistor R3.

[0073] The first end of the first resistor R1 is connected to the first output pin I / O1 of the processor 8; the second end of the first resistor R1 is connected to the base of the first transistor Q1.

[0074] The first end of the third resistor R3 is connected to the third output pin I / O3 of the processor 8; the second end of the third resistor R3 is connected to the base of the third transistor Q3.

[0075] The emitter of the third transistor Q is connected to the second output pin I / O2 of the processor 8.

[0076] The collector of the third transistor Q3 is connected to the first end of the second resistor R2; the second end of the second resistor R2 is connected to the base of the second transistor Q2.

[0077] The emitter of the second transistor Q2 is connected to the first power supply V1; the collector of the second transistor Q2 is connected to the second power supply V2. The emitter of the first transistor Q1 is grounded.

[0078] The collector of the first transistor Q1 is connected to the positive terminal of the diode D1 and the first terminal of the switching signal relay coil K1. The negative terminal of the diode D1 is grounded to the second terminal of the switching signal relay coil K1.

[0079] It should be noted that the switch signal relay coil controls the closing and opening of switch K2. Switch K2 is connected in series in the transmission line and is in the closed state by default. When a fault is detected, the control switch K2 is opened.

[0080] When in use, if the output levels of the second output pin I / O2 and the third output pin I / O3 are consistent, but the output level of the first output pin I / O1 is incorrect, the second output pin I / O2 and the third output pin I / O3 will not conduct because they are connected in series with the coil of the switch signal relay, thus avoiding the risk of malfunction.

[0081] If the output levels of the second output pin I / O2 and the third output pin I / O3 are opposite, then each output pin of the processor is initialized. At this time, there will be no risk of malfunction when using the first output pin to control the switch signal relay coil, thus achieving accurate and reliable control of the switch signal relay.

[0082] For example, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are MOSFETs.

[0083] For example, such as Figure 4 As shown, the voltage acquisition circuit includes a voltage transformer, and the primary side terminal U of the voltage transformer is connected to the A-phase transmission line and the first terminal of the first bidirectional transient voltage suppression diode TSV1.

[0084] The primary side terminal X of the voltage transformer is connected to the C-phase transmission line and the first terminal of the second bidirectional transient voltage suppressor diode TSV2;

[0085] The second terminal of the first bidirectional transient voltage suppressor diode TSV1 and the second terminal of the second bidirectional transient voltage suppressor diode TSV2 are both grounded;

[0086] The secondary side terminal u of the voltage transformer is connected to the first end of the fourth resistor R4 and the first end of the fifth resistor R5.

[0087] The secondary side terminal x of the voltage transformer, the second end of the fourth resistor R4, and the + pin 3 of the operational chip IC1 are all grounded;

[0088] The second end of the fifth resistor R5 is connected to pin 2 of the operational chip IC1, the second end of the sixth resistor R6 is connected to the first end of the first capacitor C1;

[0089] The second terminal of the first capacitor C1 is connected to the out pin 1 of the arithmetic chip IC1 and the first terminal of the seventh resistor R7;

[0090] The second terminal of the seventh resistor R7 is connected to the second terminal of the sixth resistor R6 and the signal conditioning circuit.

[0091] For example, such as Figure 5 As shown, the current acquisition circuit 5 includes: a current transformer; the terminal S1 of the current transformer is connected to the first end of the eighth resistor R8, the first end of the third bidirectional transient voltage suppression diode TSV3, pin 2 of the operational chip IC2, the first end of the ninth resistor R9, and the first end of the second capacitor C2.

[0092] The current transformer's terminal S2, the second end of the eighth resistor R8, the second end of the third bidirectional transient voltage suppressor diode TSV3, and the + pin 3 of the operational chip IC2 are all grounded.

[0093] The out pin 1 of chip IC2 is connected to the second terminal of the second capacitor C2 and the first terminal of the tenth resistor R10.

[0094] The second terminal of the tenth resistor R10 is connected to the second terminal of the ninth resistor and the signal conditioning circuit.

[0095] This invention employs bidirectional transient voltage suppression diodes in the voltage sampling circuit and the current sampling circuit to avoid interference from high-intensity loss induced voltage and to absorb instantaneous pulsed large currents.

[0096] For example, the protection device further includes an alarm module, and the processor is connected to the alarm module. While controlling the execution circuit to perform a disconnection action, the processor controls the alarm module to sound an alarm.

[0097] For example, the processor is an MCU microprocessor.

[0098] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the invention by those skilled in the art without departing from the spirit and essence of the invention, and such modifications or substitutions should all be within the scope of the invention. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the invention should also be covered within the protection scope of the invention. Therefore, the protection scope of the invention should be determined by the scope of the claims.

Claims

1. A power transmission line protection system, wherein the power transmission line includes a main power transmission line and multiple branch power transmission lines, characterized in that, This includes a background monitoring device and protective devices installed on the main transmission line and multiple branch transmission lines; Each protection device is connected to a wireless communication device; each wireless communication device is equipped with a SIM card, and each SIM card number is fixed and unique. The background monitoring device contains a protection device topology diagram. Each protection device in the topology diagram is marked with its location information and the SIM card number of the wireless communication device connected to it. The background monitoring device communicates with the protection device through a wireless communication device. When the protection device detects a fault in the transmission line, it disconnects the power to the transmission line and simultaneously sends an alarm message to the background monitoring device. The background monitoring device marks the protection device that sent the alarm message in the topology diagram based on the SIM card number of the wireless communication device that sent the alarm message. The background monitoring device is connected to a first alarm device, which will activate the alarm device when it receives an alarm message. The protection device includes: a voltage acquisition circuit, a current acquisition circuit, a signal conditioning circuit, a signal conversion circuit, a processor, an execution circuit, and an FPGA control chip; The voltage acquisition circuit is used to acquire phase voltage signals of transmission lines; the current acquisition circuit is used to acquire phase current signals of transmission lines. The signal conditioning circuit is connected to the voltage acquisition circuit and the current acquisition circuit, and is used to condition the acquired phase voltage signal and phase current signal; The signal conversion circuit is connected to the signal conditioning circuit to convert the conditioned phase voltage signal and phase current signal into digital phase voltage and digital phase current, respectively. The FPGA control chip is connected to the signal conversion circuit and the signal conditioning circuit, and performs logic control on the signal conditioning circuit and the signal conversion circuit; The processor receives digital values ​​of phase voltage and phase current through a signal conversion circuit. The processor, connected to the execution circuit, controls the execution circuit to perform a disconnection action when the received digital value of phase voltage exceeds a preset phase voltage threshold range or the received digital value of phase current exceeds a preset phase current threshold range, thereby de-energizing the transmission line. The execution circuit includes a first resistor R1 and a third resistor R3; The first end of the first resistor R1 is connected to the first output pin of the processor; the second end of the first resistor R1 is connected to the base of the first transistor Q1. The first end of the third resistor R3 is connected to the third output pin of the processor; the second end of the third resistor R3 is connected to the base of the third transistor Q3. The emitter of the third transistor Q3 is connected to the second output pin of the processor; The collector of the third transistor Q3 is connected to the first end of the second resistor R2; the second end of the second resistor R2 is connected to the base of the second transistor Q2. The emitter of the second transistor Q2 is connected to the first power supply V1; The collector of the second transistor Q2 is connected to the second power supply V2; The emitter of the first transistor Q1 is grounded; The collector of the first transistor Q1 is connected to the positive terminal of the diode D1 and the first terminal of the switch signal relay coil K1; The negative terminal of diode D1 is grounded to the second terminal of the switch signal relay coil K1.

2. The transmission line protection system according to claim 1, characterized in that, The first transistor Q1, the second transistor Q2, and the third transistor Q3 are MOSFETs.

3. The transmission line protection system according to claim 1, characterized in that, The voltage acquisition circuit includes a voltage transformer, and the primary side terminal U of the voltage transformer is connected to the A-phase transmission line and the first end of the first bidirectional transient voltage suppression diode TSV1. The primary side terminal X of the voltage transformer is connected to the C-phase transmission line and the first terminal of the second bidirectional transient voltage suppressor diode TSV2; The second terminal of the first bidirectional transient voltage suppressor diode TSV1 and the second terminal of the second bidirectional transient voltage suppressor diode TSV2 are both grounded; The secondary side terminal u of the voltage transformer is connected to the first end of the fourth resistor R4 and the first end of the fifth resistor R5. The secondary side terminal x of the voltage transformer, the second end of the fourth resistor R4, and the + pin of the operational chip IC1 are all grounded; The second end of the fifth resistor R5 is connected to the - pin of the operational chip IC1, the second end of the sixth resistor R6 and the first end of the first capacitor C1; The second terminal of the first capacitor C1 is connected to the out pin of the arithmetic chip IC1 and the first terminal of the seventh resistor R7; The second terminal of the seventh resistor R7 is connected to the second terminal of the sixth resistor R6 and the signal conditioning circuit.

4. The transmission line protection system according to claim 1, characterized in that, The current acquisition circuit includes: a current transformer; the current transformer's terminal S1 is connected to the first end of the eighth resistor R8, the first end of the third bidirectional transient voltage suppression diode TSV3, the - pin of the operational chip IC2, the first end of the ninth resistor R9, and the first end of the second capacitor C2. The current transformer's terminal S2, the second end of the eighth resistor R8, the second end of the third bidirectional transient voltage suppressor diode TSV3, and the + pin of the operational chip IC2 are all grounded; The out pin of chip IC2 is connected to the second terminal of the second capacitor C2 and the first terminal of the tenth resistor R10; The second terminal of the tenth resistor R10 is connected to the second terminal of the ninth resistor and the signal conditioning circuit block.

5. The transmission line protection system according to claim 1, characterized in that, The protection device also includes an alarm module. The processor is connected to the alarm module. While controlling the execution circuit to perform a disconnection action, the processor controls the alarm module to sound an alarm.

6. The transmission line protection system according to claim 1, characterized in that, The processor is an MCU microprocessor.

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