Synchronous electronic circuit equipment

Abstract

The present application discloses a synchronous electronic circuit device. An electronic circuit device (100) for acquiring analog signals. The device (100) comprises: a data line (110), one or more control lines (120), wherein the one or more control lines (120) have at least one clock line (120a), and the device (100) is configured to transmit stored digital measurement results using the data line (110) and the one or more control lines (120) according to a synchronous serial communication protocol; a detection device (130) for identifying a synchronization pulse on one of the one or more control lines (120) or on the data line (110); wherein the device (100) is configured to repeatedly measure the analog signal or to measure the analog signal triggered by the synchronization pulse; and to store one or more digital measurement results or a combination thereof when triggered by the synchronization pulse.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuit devices, and more particularly to a triggerable electronic circuit device that can communicate with a master device via a synchronous serial communication protocol, and to an electronic system comprising a plurality of such electronic circuit devices and a master device. Background Art

[0002] The electronic circuit device can be configured as a slave device and communicate collected data with a master device via a synchronous serial communication protocol. Examples of synchronous serial communication protocols are Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C).

[0003] SPI is a synchronous serial communication protocol that allows multiple electronic devices to be connected to a master device. Each electronic device is sequentially addressed via the Slave Select (SS) pin on the master device, using the Chip Select (CS) pin. Once a slave device is selected, communication occurs using the remaining three terminals. Data is transmitted using two unidirectional Master-Out Slave-In (MOSI) and Master-In Slave-Out (MISO) lines, and this transmission is synchronized using a clock line (SCK). For example, a slave electronic device can be configured as a sensor or analog-to-digital converter and transmit measurement information to the master device.

[0004] The problem with this configuration is that the slave devices can only be accessed individually (via CS), and the measurements made by the slaves cannot be synchronized, meaning the analog signals (e.g., physical quantities) being measured are not measured at the same time. If the SPI communication protocol is used to send a trigger command (i.e., a command to acquire data), the measurements are not performed at the same time, but are propagated in time with a fixed delay. If the slave devices are configured to continuously acquire data and provide the latest data when a read command is received, the analog signals are measured at different times because each slave device is sequentially addressed with different chip select timing. In either case, the analog signals of each slave are not measured substantially simultaneously. However, in some applications, it is necessary to use multiple sensors for such simultaneous measurements. For example, when measuring current in a three-phase system, or when measuring the three-phase current through a motor's coils in conjunction with rotor position, or when measuring the three-phase current in conjunction with two redundant rotor position sensors, the rotor position can be measured twice using different redundant sensors. Using two redundant rotor position sensors allows for verification of measurement validity.

[0005] I2C is also a synchronous digital protocol. However, in I2C, there is no chip select terminal to select a slave device. Instead, a slave is selected by communicating its address on the bus. The slave device with the corresponding address will execute commands and / or respond on that line. Furthermore, a single terminal is used for bidirectional communication. As with SPI, a clock signal is used to synchronize communication between multiple slave devices in one or more master devices. Similar to SPI, only one slave device can be addressed at a time, and acquisition commands cannot be sent to all sensors simultaneously.

[0006] Therefore, there is a need for an electronic circuit device that can communicate with a controller using a synchronous serial communication protocol and can simultaneously receive acquisition commands. Summary of the Invention

[0007] An object of an embodiment of the present invention is to provide an electronic circuit device that can simultaneously receive acquisition commands to communicate measurement results to a controller using a synchronous serial communication protocol, and to provide an electronic system including such a device.

[0008] The above objects are achieved by the device and system according to the present invention.

[0009] A first aspect of the present invention relates to an electronic circuit device configured to acquire an analog signal by measuring the analog signal and storing a digital measurement result indicative of the analog signal.

[0010] The electronic circuit device includes a data line and one or more control lines. At least one control line is a clock line.

[0011] The electronic circuit device is configured to transmit stored data using a data line and one or more control lines according to a synchronous serial communication protocol, wherein a clock signal on a clock line is used to synchronize the data on the data line. For example, the stored data may be one or more digital measurements, processed versions of the digital measurements, and / or a combination of digital measurements.

[0012] Furthermore, the electronic circuit arrangement comprises a detection device which is configured to recognize a synchronization pulse on one of the one or more control lines or on the data line.

[0013] The electronic circuit device is configured to repeatedly measure an analog signal or to measure an analog signal triggered by a synchronization pulse, and the electronic circuit device is configured to store one or more digital measurement results or a combination of one or more digital measurement results when triggered by the synchronization pulse, or to process the digital measurement results and to store the obtained data when triggered by the synchronization pulse. For example, the electronic circuit device may be configured to combine the digital measurement results to obtain one or more combinations of digital measurement results, and to store the obtained one or more combinations when triggered by the synchronization pulse.

[0014] In an embodiment of the present invention, the electronic device is configured such that if a plurality of electronic circuit devices receive a synchronization pulse from a controller connected to their data lines and one or more control lines, the electronic circuit devices are triggered simultaneously by the synchronization pulse.

[0015] An advantage of embodiments of the present invention is that multiple electronic circuit devices can be triggered simultaneously to store (one or more) digital measurement results without requiring additional control lines other than the already existing control line or lines for transmitting the stored measurement results.

[0016] This is achieved by adding a detection device to the electronic circuit arrangement, wherein the detection device is configured to identify a synchronization pulse on one of the control lines or on the data line, and wherein the electronic circuit arrangement is configured to store the last (one or more) digital measurement results when the synchronization pulse is detected. Since the synchronization pulse can be detected on one of the one or more control lines of the synchronous serial communication protocol or on the data line, there is no need to add another control line.

[0017] Adding a synchronization pulse to one of the one or more control lines of a synchronous serial communication protocol or to a data line is not obvious, because sending a trigger pulse on a logic signal of the protocol itself may lead to protocol violations and / or misunderstandings according to the synchronous serial communication protocol.

[0018] In an embodiment of the present invention, one of the one or more control lines is a chip select line.

[0019] In an embodiment of the invention, the detection means are configured for identifying a synchronization pulse on a chip select line.

[0020] In an embodiment of the invention, the detection means are configured for identifying synchronization pulses on the clock line.

[0021] In an embodiment of the present invention, the synchronous serial communication protocol is a standardized serial communication protocol.

[0022] In an embodiment of the present invention, the synchronous serial communication protocol is an SPI protocol or an I2C protocol.

[0023] In an embodiment of the present invention, the detection device is configured to measure an analog signal upon detecting a trigger pulse. For example, the analog signal may be located at the first edge of a synchronization pulse. The detection device may be configured to store a digital measurement result upon detecting a second edge of the synchronization pulse within a predetermined duration after the first edge.

[0024] In an embodiment of the present invention, the detection device is configured to store the latest available samples.

[0025] In an embodiment of the present invention, the digital measurement results can be combined. Thus, an estimated value of the physical quantity can be obtained.

[0026] For example, the first edge may be a falling edge and the second edge may be a rising edge.

[0027] In an embodiment of the invention, the detection means are disabled after recognition of the synchronization pulse and enabled after a predetermined duration.

[0028] In an embodiment of the invention in which a plurality of electronic circuit devices are connected as slaves to a master device, the predetermined duration is selected such that the detection means is disabled before all slave devices have transmitted their data. An advantage of this embodiment of the invention is that further acquisition is avoided before the stored measurement results are transmitted.

[0029] In an embodiment of the present invention, the detection device is configured to measure the analog signal on the first edge or the second edge of the synchronization pulse.

[0030] In an embodiment of the invention, the electronic circuit device comprises an internal clock, and the electronic circuit device is configured for tuning and / or synchronizing the internal clock using the synchronization pulse.

[0031] In an embodiment of the present invention, the measured analog signal is a physical quantity, and the measurement result is indicative of the physical quantity.

[0032] In a second aspect, embodiments of the present invention relate to an electronic system comprising a plurality of electronic circuit devices and a controller connected to data lines and one or more control lines of the electronic circuit devices. The electronic system is configured such that a synchronization pulse from the controller is applied to one of the control lines of each electronic circuit device or to the data line, and the controller is configured to sequentially receive measurement results from different electronic circuit devices.

[0033] In an embodiment of the present invention, the controller includes a synchronization output line connected to one of the control lines of the sensor device or the data line to apply a synchronization pulse of the controller to the connected line.

[0034] In an embodiment of the present invention, the signal on the chip select line of the electronic circuit device is a combination of a chip select signal from the controller and a synchronization pulse from the controller.

[0035] In an embodiment of the present invention, the controller may include a chip select line for each electronic circuit device and a synchronization output line. The chip select line of the electronic circuit device may be connected to the output of an AND gate, and the input of the AND gate is connected to the chip select line and the synchronization output line of the controller of the specific sensor device.

[0036] In an alternative embodiment, the combinational logic of the AND gates may be implemented in the controller itself.

[0037] In an embodiment of the present invention, the chip select signal is combined with a synchronization pulse on the same line, and the two signals are not active at the same time.

[0038] In an embodiment of the present invention, the signal on the clock line of the electronic circuit device is a combination of a clock signal from the controller and a synchronization pulse from the controller.

[0039] In an embodiment of the present invention, the clock signal is combined with a synchronization pulse on the same line, and the two signals are not active at the same time.

[0040] Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. Features from the dependent claims may be combined with features of the independent claims and with features of other dependent claims as appropriate, and not merely as explicitly set out in a claim.

[0041] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 Block diagrams of electronic circuit devices and electronic systems according to embodiments of the present invention are shown.

[0043] Figure 2 A block diagram of an electronic circuit device and an electronic system according to an embodiment of the present invention is shown, wherein the communication protocol is the SPI protocol.

[0044] Figure 3 Shown is a timing diagram illustrating synchronization pulses and communication time slots of a chip select line of an electronic circuit device according to an embodiment of the present invention.

[0045] Figure 4 Block diagrams of electronic circuit devices and electronic systems according to embodiments of the present invention are shown, wherein synchronization pulses are sent on a clock line.

[0046] Figure 5 Shown as Figure 4 Timing diagram of the electronic system shown.

[0047] Figure 6 Block diagrams of electronic circuit devices and electronic systems according to embodiments of the present invention are shown, in which synchronization pulses are superimposed internally in a controller on a control line or a data line.

[0048] Figure 7 Shown as Figure 6Timing diagram of the electronic system shown.

[0049] Figure 8 A block diagram of an electronic circuit device and an electronic system according to an embodiment of the present invention is shown, wherein the communication protocol is the I2C protocol.

[0050] Figure 9 A block diagram of an electronic system including an asynchronous electronic circuit device according to an embodiment of the present invention is shown.

[0051] Figure 10 A block diagram of an electronic circuit arrangement according to an embodiment of the invention is shown, wherein the detection means are implemented in the control circuit.

[0052] Figure 11 A block diagram of an electronic circuit arrangement according to an embodiment of the invention is shown, wherein the detection means is separated from the control circuit.

[0053] Figure 12 A timing sequence of an electronic circuit device according to an embodiment of the present invention is shown.

[0054] Any reference signs in the claims should not be construed as limiting the scope.

[0055] The same reference numbers in different drawings refer to the same or similar elements. DETAILED DESCRIPTION

[0056] The present invention will be described with respect to specific embodiments and with reference to certain drawings, but the invention is not limited thereto but only by the claims. The drawings described are merely schematic and non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn to scale for illustrative purposes. Dimensions and relative dimensions do not correspond to actual reductions in practice of the invention.

[0057] The terms first, second, etc. in the specification and claims are used to distinguish between similar elements and not necessarily to describe a sequence in time, space, hierarchy, or in any other manner. It is understood that the terms so used are interchangeable under appropriate circumstances, and that the embodiments of the invention described herein are capable of operation in a sequence different from that described or illustrated herein.

[0058] It should be noted that the term "comprising" used in the claims should not be interpreted as being limited to the means listed thereafter; it does not exclude other elements or steps. Thus, the term should be interpreted as specifying the presence of the stated features, integers, steps, or components as mentioned, but does not exclude the presence or addition of one or more other features, integers, steps, or components, or groups thereof. Thus, the scope of the expression "a device comprising means A and B" should not be limited to a device consisting solely of components A and B. This means that for the present invention, the only relevant components of the device are A and B.

[0059] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may refer to different embodiments. Furthermore, in one or more embodiments, the particular features, structures, or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure.

[0060] Similarly, it should be appreciated that in the description of exemplary embodiments of the present invention, various features of the present invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding understanding of one or more of the various inventive aspects. However, this method of disclosure should not be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. On the contrary, as reflected in the appended claims, inventive aspects lie in fewer features than all of the features of a single preceding disclosed embodiment. Accordingly, the claims appended to the detailed description are hereby expressly incorporated into this detailed description, with each claim itself representing a separate embodiment of the present invention.

[0061] Furthermore, although some embodiments described herein include some features included in other embodiments but not other features included in other embodiments, combinations of features from different embodiments are intended to fall within the scope of the present invention and form different embodiments as will be understood by those skilled in the art. For example, in the appended claims, any of the claimed embodiments may be used in any combination.

[0062] In the description provided herein, numerous specific details are set forth. However, it should be understood that embodiments of the present invention may be practiced without these specific details. In other instances, well-known methods, structures, and techniques are not shown in detail to avoid obscuring understanding of this description.

[0063] In an embodiment of the present invention, when a synchronization pulse is referred to, a pulse on a control line or a data line is referred to. If the default level on the line is a high level, the pulse may include a falling edge followed by a rising edge, and if the default level on the line is a low level, the pulse may include a rising edge followed by a falling edge.

[0064] In embodiments of the present invention, when reference is made to an action being triggered by a synchronization pulse, the action is performed in response to the synchronization pulse. This may be performed immediately after the synchronization pulse, or at a predefined time after the synchronization pulse. For example, the actions may include measuring an analog signal, storing one or more digital measurements, or a combination thereof, processing the digital measurements, and then storing the resulting data. The digital measurements may be obtained by repeated measurements or when triggered by a synchronization pulse.

[0065] In a first aspect, embodiments of the present invention relate to an electronic circuit device 100 configured to acquire an analog signal by measuring the analog signal and storing a digital measurement result indicative of the analog signal. Example implementations of such an electronic circuit device 100 include Figure 1 As shown in the block diagram.

[0066] Electronic circuit device 100 includes a data line 110 and one or more control lines 120. At least one of the control lines is a clock line 120a. Electronic circuit device 100 is configured to transmit stored digital measurements using data line 110 and one or more control lines 120. Therefore, it utilizes a synchronous serial communication protocol. According to the protocol, a clock signal on clock line 120a is used to synchronize data on data line 110. In an embodiment of the present invention, the electronic circuit device is configured to sample incoming analog signals synchronously with the clock signal on the clock line.

[0067] In addition, the electronic circuit device includes a detection device 130, which is configured to identify a synchronization pulse on one of the one or more control lines 110 or on the data line 110. In an embodiment of the present invention, the electronic circuit device 100 is configured to repeatedly measure an analog signal. In an embodiment of the present invention, the electronic circuit device is configured to measure an analog signal triggered by a synchronization pulse. Thus, one or more digital measurement results are obtained. In addition, the electronic circuit device is configured to store the most recent one or more digital measurement results or one or more combinations thereof when triggered by the synchronization pulse, or is configured to process the digital measurement results and store the obtained data when triggered by the synchronization pulse (for example, combining the digital measurement results to obtain one or more combinations thereof, and storing the obtained one or more combinations thereof). In an embodiment of the present invention, when triggered by the synchronization pulse, the most recent one or more digital measurement results or one or more combinations thereof can be stored.

[0068] In an embodiment of the present invention, the electronic circuit devices are configured such that if a plurality of electronic circuit devices are receiving a synchronization pulse from a controller connected to the data lines 110 and one or more control lines 120 of the plurality of electronic circuit devices 100, the electronic circuit devices are triggered simultaneously by the synchronization pulse.

[0069] In an embodiment of the present invention, the electronic circuit device 100 may be configured to trigger one or more measurements of an analog signal upon receipt of a synchronization pulse, and to store the last digital measurement result or a combination of the last multiple digital measurement results after the measurement. For example, the combination may be an average or interpolation of the digital measurement results. Samples may be acquired before the trigger pulse, after the trigger pulse, or both before and after the trigger pulse. The digital measurement results may be combined by performing calculations according to a predefined formula to extract a physical quantity or another physical quantity different from the measured quantity. For example, in a magnetic position sensor, two components of a magnetic field may be measured, and the position of the magnet may be determined by calculating a function based on these two components of the field. For example, the combination may be performed by interpolating or extrapolating the measurement results. This may be accomplished by calculating an estimate of a predefined time Td (Td may be positive, negative, or zero) relative to the trigger pulse based on two or more samples. For example, the interpolation may be linear, polynomial, spline, or any other interpolation known to those skilled in the art. Alternatively, an estimate of the analog signal may be obtained by extrapolating the digital measurement results.

[0070] In an embodiment of the present invention, the electronic circuit device 100 can be configured to repeatedly measure the analog signal upon receiving a synchronization pulse and store the last digital measurement result or a combination of the last multiple digital measurement results. The higher the sampling rate, the lower the jitter. In an embodiment of the present invention, for example, the sampling rate may be higher than 1 MSPS, or even higher than 10 MSPS.

[0071] An advantage of embodiments of the present invention is that it is possible to trigger multiple electronic circuit devices simultaneously to store the most recent digital measurement result(s), without requiring additional control lines other than the already existing control line(s) for transmitting the stored measurement results.

[0072] In an embodiment of the present invention, the synchronous serial communication protocol is a standardized serial communication protocol. For example, the synchronous serial communication protocol can be an SPI protocol or an I2C protocol.

[0073] In a second aspect, embodiments of the present invention relate to an electronic system 300. According to an embodiment of the present invention, the electronic system 300 includes a plurality of electronic circuit devices 100 and a controller 200. An exemplary embodiment of such an electronic system 300 is described in Figure 1Shown in.

[0074] The controller 200 is connected to the data line 110 and one or more control lines 120 of the electronic circuit device 110. In an embodiment of the present invention, the controller may be a microcontroller. In an embodiment of the present invention, the controller may be implemented in a field programmable gate array.

[0075] The electronic system 300 is configured so that the synchronization pulse of the controller 200 is applied to one of the control lines 120 of each electronic circuit device 100 or to the data line 110. This can be done via a synchronization output line 230 of the controller 200, which is connected to one of the control lines of the electronic circuit device 100 or to the data line, such as Figure 1 Alternatively, this connection may be internal to the controller 200. In this case, the controller is configured to apply the synchronization pulse to a control line 220 connected to the control line 120 of the electronic circuit device or to a data line 210 connected to the data line 110 of the electronic circuit device.

[0076] In an embodiment of the present invention, the controller 200 is configured to sequentially receive digital measurement results from different electronic circuit devices.

[0077] The electronic circuit device may include an AD converter for converting an analog signal into a digital signal.

[0078] In an embodiment of the present invention, the electronic circuit device is a sensor. In this case, the measured analog signal is a physical quantity, and the measurement result indicates the physical quantity. For example, the sensor can be a magnetic sensor, a position sensor, a current sensor, or a temperature sensor. In an embodiment of the present invention, the electronic circuit device is an integrated circuit (IC). For example, the IC can be an analog-to-digital converter IC or a sensor IC (e.g., a Hall effect IC).

[0079] Figure 2 A schematic block diagram of an electronic circuit device 100 and an electronic system 300 according to an embodiment of the present invention is shown, wherein the communication between the electronic circuit device 100 and the controller 200 is based on the SPI protocol. In such an embodiment, a synchronization pulse is added to the chip select (CS) line 120b of the electronic circuit device 100. This can be achieved via an external gate and synchronization terminal 230. The external gate and synchronization terminal are optional. The synchronization pulses can be combined internally, such as being superimposed on each CS terminal, and generating Figure 3Timing diagram. A synchronization pulse is received simultaneously by each electronic circuit device 100 (which may be a sensor, for example). The electronic circuit devices include detection means for identifying the trigger pulse. In this exemplary embodiment of the present invention, the trigger pulse triggers acquisition at the sensors, so all sensors measure analog signals (e.g., physical quantities) at the same time, digitize the values, and store them. In the second phase, the microcontroller sequentially reads the values ​​from each electronic circuit device using a standard serial digital protocol. In this example, the SPI protocol is used: the microcontroller 200 selects the first electronic circuit device using the CS1 terminal 220b and issues a read command. The electronic circuit device recognizes that SPI communication has been initiated and transmits data. In this embodiment of the present invention, the electronic circuit device is configured to distinguish between a read command and a synchronization pulse (e.g., based on pulse length). This operation is then repeated sequentially for the remaining electronic circuit devices connected to the bus. Using this solution, the standard SPI protocol can be used on the controller side. On the sensor side, a detection means is required to distinguish between synchronization pulses and digital communication. This detection means can be implemented as a control circuit.

[0080] In an embodiment of the invention, the synchronization pulses are transmitted / decoded on the lines of a (standard) synchronous serial digital communication interface.

[0081] The obvious solution is to add an extra trigger pin to each electronic device and connect it to the sync pin of the microcontroller. However, this results in more pins and more wires.

[0082] In contrast, in the present invention, the trigger pulses are sent on the control line(s) and / or on the data line(s) for the logic signals of the protocol itself. Detection means are therefore additionally provided which are configured to identify these synchronization pulses.

[0083] Thus, an electronic circuit device is obtained that allows for synchronous acquisition and fast digital output rates. Furthermore, the pin count of such an electronic circuit device is reduced compared to an electronic circuit device that adds an additional synchronization pin.

[0084] In an embodiment of the present invention, the detection device 130 is configured to identify a synchronization pulse on one or more of the control lines or on the data line.

[0085] In an embodiment of the present invention, an electronic circuit device includes an internal clock derived from an internal oscillator (e.g., an RC oscillator). This clock can be used to time the internal operating cycles of the sensor. In an embodiment of the present invention, the electronic circuit device is configured to tune and / or synchronize the internal clock using synchronization pulses. Synchronizing oscillators on a reference signal is well known in the art. For example, this can be accomplished by comparing the time interval associated with the synchronization pulse (e.g., the duration of the pulse, or the interval between two or more pulses) with the time interval derived from the internal clock of the electronic circuit device and adjusting the frequency of the RC oscillator so that the two intervals match. Adjustment can be accomplished, for example, by digitally applying a resistor or capacitor to the RC oscillator. Tuning can be performed at every synchronization pulse or every N synchronization pulses (where N>1). In addition to frequency, the phase of the internal oscillator can optionally be synchronized, but this is not required. For example, the internal clock can be an RC oscillator with a frequency tolerance of + / - 10% before synchronization. The advantages of tuning / synchronizing the internal clock are that timing can be better controlled and jitter between sensor acquisitions and / or interpolations can be further reduced (e.g., over the entire temperature range). For example, this allows reducing residual timing errors between sensor acquisitions and / or interpolations and measuring physical quantities within a shortened time window. The effective timing errors between sensor acquisitions and / or interpolations may be less than 10 microseconds, or less than 1 microsecond, or less than 300 nanoseconds, or less than 100 nanoseconds.

[0086] In an embodiment of the invention, the detection means is configured for detecting a first edge and a second edge of the synchronization pulse and for identifying the synchronization pulse when the second edge of the synchronization pulse is detected within a predetermined time duration after the first edge.

[0087] In an embodiment of the present invention, this predefined duration may be shorter than the communication duration.

[0088] In an embodiment of the present invention, a synchronization pulse can be detected / identified when the duration of the synchronization pulse is substantially equal to a predefined duration (e.g., between a predefined upper limit and a predefined lower limit). The lower limit can be selected so that interference is not mistaken for a synchronization pulse, and the upper limit can be selected so that communication pulses are not mistaken for synchronization pulses. In such an embodiment, a synchronization pulse is detected if the duration of the synchronization pulse is within a predetermined time window.

[0089] In an embodiment of the invention, wherein a synchronization pulse is detected on a clock line, the predefined duration may be longer than a clock period.

[0090] The measurement of the analog signal can be triggered on the first edge (e.g., the falling edge) of the synchronization pulse. When the second edge of the synchronization pulse is detected within a predefined duration after the first edge, the digital measurement result can be stored. An example of this is shown in the timing diagram as Figure 3 shown. The effect is that all electronic circuit devices acquire their respective physical quantities at substantially the same time, even if they operate on asynchronous clocks. The duration t_pulse (t_ pulse) of the synchronization pulse can be configured to be shorter than the communication duration t_com (t_ communication). In this case, the electronic circuit device will only store data if the synchronization pulse is recognized (e.g., when the second edge (e.g., the rising edge) is detected within a predefined duration (e.g., <t_timer (t_ timer)) after the first edge (in this example, the falling edge)). The predefined duration t_timer is selected to be longer than the duration t_pulse of the synchronization pulse but shorter than the communication duration t_com.

[0091] In an alternative embodiment of the present invention, the detection device is disabled after the synchronization pulse is detected, such as to avoid further storing of the digital measurement result when the next falling edge (the edge of the digital communication phase) is detected. Subsequently, for example, after a successful communication sequence or after a predefined duration, the detection device can be re-enabled.

[0092] In yet another embodiment of the present invention, the measurement of the analog signal is triggered on the second edge (in this example, the rising edge) of the trigger pulse. After the synchronization pulse is received and the measurement is completed and stored, the master device (i.e., the controller 300) will retrieve the data from each sensor on the line by successively pulling the corresponding CS pin low and communicate the data using the SPI terminals (mosi, miso, clk).

[0093] Figure 4 A schematic block diagram of an electronic circuit device and an electronic system according to an embodiment of the present invention is shown. In an embodiment of the present invention, the synchronization pulse is sent on different terminals of the serial interface. In this example, the synchronization pulse is sent on the clock terminal sck. This can be done externally using an AND gate as Figure 4 shown, or the synchronization pulse can be internally superimposed on the clk signal in the controller. In this case, the controller does not require an external gate.

[0094] The detection device is configured to distinguish the synchronization pulse on the clock line sck. For example, this can be achieved by simultaneously monitoring the chip select pin cs, because when the bus is idle, all cs pins are in the high state. In this embodiment, after the synchronization pulse is received, the flip-flop can be disabled for a certain duration to avoid the switching of sck during communication being interpreted as a synchronization pulse (see the timing diagram on the next page).

[0095] In an embodiment of the present invention, a synchronization pulse can be applied to the data line. For example, in an electronic circuit device with an SPI interface, this can be done on the MOSI line. In an alternative embodiment of the present invention, the SPI interface includes only three wires (no SDI).

[0096] In some implementations, SPI uses only 3 wires (ie, the controller can only receive data from the electronic circuit device). In an embodiment of the present invention, only the SDI line is used to apply the synchronization pulse.

[0097] Figure 5 Shown as Figure 4 Timing diagram of the electronic system shown. The acquisition of the electronic circuit device is triggered using the clock terminal sck of the interface. For example, the acquisition can be triggered on the falling edge of the synchronization pulse, which can be identified from the electronic circuit device when the chip select signal cs is high. The trigger can then be disabled for a certain duration t_disable (t_disable), such as to avoid new samples being digitized during the communication phase of the three sensors (because the sck pin will be switched during the communication phase). Once the three sensors are read out using the standard SPI protocol, and after the duration t_disable has passed, the trigger circuit of the sensor is re-enabled and ready for the next synchronization pulse. Alternatively, the synchronization pulse can be configured to have a duration different from that of the clock cycle (for example, longer or shorter). In this case, the electronic circuit device can recognize the synchronization pulse when the duration of the synchronization pulse is different from the predefined duration (for example, longer or shorter), and disabling the trigger becomes optional.

[0098] Figure 6 A block diagram of an electronic circuit device and an electronic system according to an embodiment of the present invention is shown, in which a synchronization pulse is superimposed on a control line or a data line internally in the controller. In this embodiment, no external components are required (no OR gates, no AND gates). The SPI interface uses general-purpose input / output pins (GPIO). SCK, MOSI, and CS are configured as digital outputs. Therefore, the controller (e.g., a microcontroller) can be configured to generate a synchronization pulse on one of these pins before an SPI communication sequence (e.g., using a timer or interrupt). In this example, the electronic circuit device is connected to a single CS pin at the controller. In a typical read sequence, the controller issues N sequential SPI communications (N=3 in this case), as if the controller wants to read N times from a single electronic circuit device. The electronic circuit device has a counting device for counting the number of read sequences and is configured to respond sequentially based on a programmed ID (1, 2, or 3).

[0099] Figure 7Shown as Figure 6 The timing diagram of the electronic system shown in Figure 1 is shown. In this example, the synchronization pulse is sent on SCK, but it can also be sent on CS. The electronic circuit device can count the number of falling edges on CS and respond only when the count number corresponds to its ID. Detection of the synchronization pulse on SCK can be simplified because it only occurs when CS is high. There is no need to disable the flip-flop. In this example, the electronic circuit device can have a predefined identification number (for example, programmed or set by an external switch).

[0100] Figure 8 A schematic diagram of an electronic system including a controller and electronic circuit devices according to an embodiment of the present invention is shown. In this example, the synchronous serial communication protocol between the controller and the electronic circuit devices is the I2C protocol. The I2C protocol requires only two wires between the controller and the electronic circuit devices: an SCL line that interconnects the SCL interfaces and transmits the clock, and an SDA line that interconnects the SDA interfaces and transmits data. The controller includes an SCL interface connected to the SCL interfaces of all electronic circuit devices, and an SDA interface connected to the SDA interfaces of all electronic circuit devices. For example, a synchronization pulse can be added to the SDA line. In this example, a MOSFET is used to pull the line to ground. When the bus is idle, both SCL and SDA are in a high state. The synchronization pulse on SDA corresponds to a start condition (a falling edge on SDA when SCL is high), followed by a stop condition (a rising edge on SDA when SCL is high). Therefore, this can be detected by the electronic circuit device as a trigger condition (relative to the communication sequence). The electronic circuit device can be configured to trigger acquisition and latch data until a read command is requested. When a read command is received (in this case, a stop condition will not immediately follow a start condition), the sensor transmits the stored data. As previously mentioned, a synchronization pulse can be superimposed on the data line (SDA in this example) using the microcontroller's internal circuitry, and external components are optional.

[0101] Figure 9A block diagram of a sensor system 200 according to an embodiment of the present invention is shown. In addition to the synchronous electronic circuit device 100 described in the previous example, the sensor system 200 also includes an asynchronous electronic circuit device 400. The asynchronous electronic circuit device communicates according to an asynchronous serial protocol and a data line 440. The data line may include two or more conductors, for example, only two conductors. The asynchronous electronic circuit device 400 is configured to recognize synchronization pulses on the data line 440. The data line 440 is connected to the controller 200 via an asynchronous data terminal 240 (for example, a UART protocol or a protocol derived from the UART). The asynchronous electronic circuit device 400 is configured to repeatedly measure an analog signal or to measure an analog signal when triggered by a synchronization pulse. The asynchronous electronic circuit device 400 is configured to store one or more digital measurement results or one or more combinations thereof when triggered by the synchronization pulse.

[0102] An advantage of embodiments of the present invention is that asynchronous electronic circuit devices can also be triggered simultaneously to store the latest (one or more) digital measurement results, without requiring additional control lines other than the already existing one or more control lines for transmitting the stored measurement results.

[0103] In an embodiment of the present invention, the asynchronous protocol may be, for example, a Universal Asynchronous Receiver-Transmitter (UART) protocol, or a protocol derived from UART.

[0104] An advantage of embodiments of the present invention is that both sensors with synchronous protocols and sensors with asynchronous protocols can be used, as this allows for greater flexibility in the location of the controller relative to the sensors in the system. For example, sensor(s) located on the same printed circuit board (PCB) as the controller can conform to a synchronous protocol using 2 or more logic signals (e.g., SPI), while sensor(s) located further away from the PCB (such as position sensors) can conform to an asynchronous protocol over, for example, 2-wire differential lines (e.g., UART over CAN), such as to be more robust against electromagnetic interference.

[0105] An advantage of embodiments of the present invention is that different protocols can be used to achieve communication with the sensor, thereby improving the reliability and safety of the system.In both cases, the synchronization pulse allows the measurements to be synchronized.

[0106] Figure 10A block diagram of an electronic circuit device according to an embodiment of the present invention is shown, in which the detection device is implemented in the control circuit. The electronic circuit device includes an AD converter for converting an incoming analog signal into a digital signal. The AD converter can receive analog signals from sensor elements. The sensor elements can be integrated in the same circuit or can be external components. In addition, the electronic circuit device includes a communication circuit that is configured to communicate according to a synchronous serial communication protocol (SPI protocol in this example). However, the present invention is not limited to this. In addition, the electronic circuit device includes a memory for storing digital memory results, and a control circuit connected to the memory, AD converter, communication circuit and chip select interface. The detection device 130 is implemented in the control circuit. The detection device is arranged to detect synchronization pulses (on the CS interface in this example) and trigger acquisition (AD conversion in this example), and is used to store digital measurement results in the memory. This digital measurement is transmitted in a subsequent read command using a standard digital protocol.

[0107] Figure 11 A block diagram of an electronic circuit device according to an embodiment of the present invention is shown, wherein the detection means is separate from the control circuit. In this example, the detection means is configured to detect whether a synchronization pulse is received and trigger the control circuit to store a digital measurement or enable a communication circuit.

[0108] For example, an electronic system according to an embodiment of the present invention can be used to monitor the status of an electric motor. The electronic circuit device can be a sensor for monitoring the current through the motor phases and for monitoring the rotor position, such as a magnetic sensor. Thus, an advantage is that the measurements can be collected simultaneously without requiring additional interface pins at the electronic circuit device, and thus without requiring additional wiring from the controller to the electronic circuit device. In such embodiments, the synchronization pulse can be derived from the drive signal (e.g., a PWM signal) of the associated electric motor. This allows monitoring to be performed synchronously with the rotation of the motor.

[0109] In an embodiment of the present invention, the analog signal can be repeatedly measured. An example of this is Figure 12 , where x represents a measurement according to time. In this example, in response to a synchronization pulse, the electronic circuit device starts processing digital measurement results. The processing can use digital measurement results acquired before the synchronization pulse, after the synchronization pulse, or before and after the synchronization pulse. After processing the digital measurement results, the obtained data results are stored. Processing the digital measurement results can mean combining them. After combining the digital measurement results, a combination of one or more obtained measurement results is stored. For example, the measurement results can be filtered. For example, this can be achieved using a Kalman filter or using an integrating filter. For example, the synchronization pulse can start the integration of the sampled data in the filter. This is in Figure 12. After receiving the synchronization pulse, the integration of the sampled data begins. At the end of the integration window, the filtered data is stored. The start of the processing can begin with the initialization of the processing. For example, in the case of a Kalman filter, initialization can mean resetting the filter.

[0110] In an embodiment of the electronic circuit device, the device may be configured to store one or more digital measurement results after receiving the synchronization pulse.

[0111] In an embodiment of the electronic circuit device, it may be configured to store one or more combinations of digital measurements (e.g., interpolated values) after receiving a synchronization pulse. The digital measurements may be collected before the synchronization pulse, after the synchronization pulse, or before and after the synchronization pulse.

[0112] In an embodiment of the electronic circuit device, the device may be configured to process the digital measurement result after receiving the synchronization pulse.The digital measurement result may be acquired before the synchronization pulse, or after the synchronization pulse, or before and after the synchronization pulse.

Claims

1. An electronic system comprising a plurality of electronic circuit devices, each of the plurality of electronic circuit devices being configured to acquire an analog signal by measuring the analog signal to obtain one or more digital measurement results indicative of the analog signal, each electronic circuit device comprising: a data line and one or more control lines, wherein at least one of the control lines is a clock line, wherein the data line and the one or more control lines have a synchronous serial communication protocol, wherein each electronic circuit device is configured to transmit stored data using the data line and the one or more control lines according to the synchronous serial communication protocol, wherein a clock signal on the clock line is used to synchronize data on the data line; a detection device configured to identify a synchronization pulse on one of the one or more control lines or on the data line, wherein each electronic circuit device is configured to: repeatedly measuring the analog signal; or for measuring the analog signal when triggered by the synchronization pulse, and wherein each electronic circuit device is configured to: storing the one or more digital measurements or one or more combinations of the one or more digital measurements when triggered by the synchronization pulse, or for processing the digital measurements and for storing acquired data when triggered by the synchronization pulse; wherein the electronic system further comprises a controller connected to the data line and the one or more control lines of the electronic circuit device; and The electronic system is configured such that a synchronization pulse of the controller is applied to one of the control lines of each electronic circuit device or to the data line of each electronic circuit device, and wherein the controller is configured to sequentially receive measurement results from different electronic circuit devices. 2 . The electronic system of claim 1 , wherein one of the one or more control lines of each electronic circuit device is a chip select line. 3 . The electronic system of claim 2 , wherein the detection means of each electronic circuit device is configured to identify the synchronization pulse on the chip select line or the clock line.

4. The electronic system of claim 1, wherein the synchronous serial communication protocol is a standardized serial communication protocol. 5 . The electronic system as claimed in claim 1 , wherein the synchronous serial communication protocol is an SPI protocol or an I 2 C protocol.

6. An electronic system as claimed in claim 1, wherein the detection device of each electronic circuit device is configured to detect a first edge and a second edge of the synchronization pulse, and to identify the synchronization pulse when the second edge of the synchronization pulse is detected within a predetermined duration after the first edge.

7. The electronic system of claim 1, wherein the detection means of each electronic circuit device is disabled after recognizing the synchronization pulse and is enabled after a predetermined duration.

8. The electronic system of claim 1, wherein the detection device of each electronic circuit device is configured to measure an analog signal at a first edge or a second edge of the synchronization pulse.

9. The electronic system of claim 1, wherein each electronic circuit device further comprises an internal clock, and wherein each electronic circuit device is configured to use the synchronization pulse to tune and / or synchronize the internal clock.

10. The electronic system of claim 1, wherein the measured analog signal is a physical quantity, and wherein the measurement result is indicative of the physical quantity.

11. The electronic system of claim 1, wherein the controller comprises a synchronization output line connected to one of the control lines of the sensor device or the data line of the sensor device to apply a synchronization pulse of the controller to the connected line.

12. The electronic system of claim 1 , wherein one of the one or more control lines is a chip select line, and wherein a signal on the chip select line of the electronic circuit device is a combination of a chip select signal from the controller and a synchronization pulse from the controller.

13. The electronic system of claim 1, wherein the synchronous serial communication protocol is a standardized serial communication protocol, and wherein the signal on the clock line of the electronic circuit device is a combination of a clock signal from the controller and a synchronization pulse from the controller.

14. The electronic system of claim 1 , wherein the electronic system further comprises an asynchronous electronic circuit device configured to transmit data to the controller using an additional data line and following an asynchronous serial communication protocol, wherein the asynchronous electronic circuit device is configured to identify a synchronization pulse on the additional data line of the asynchronous electronic circuit device, wherein the asynchronous electronic circuit device is configured to repeatedly measure the analog signal or to measure the analog signal when triggered by the synchronization pulse, and wherein the asynchronous electronic circuit device is configured to store one or more digital measurement results or a combination of one or more digital measurement results when triggered by the synchronization pulse.

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