Electret with ultra-high charge density and method of making the same

Abstract

An ultra-high charge density electret is disclosed. The ultra-high charge density electret includes a three-dimensional structure with multiple sidewalls. A porous silica film is formed on the multiple sidewalls, and the porous silica film is charged by multiple positive or negative ions.

Description

[0001] This application is a divisional application. The parent application is entitled "Ultra-high charge density electret and method for manufacturing the same", filed on July 4, 2018, with application number 201810722593.0. Technical Field

[0002] This disclosure relates to ultra-high charge density electrets and methods for their fabrication. Background Technology

[0003] Electrets are dielectric materials having quasi-permanent embedded electrostatic charges and / or quasi-permanent polarized dipoles. In particular, electret materials are utilized in a number of commercial and technical applications, such as electrostatic sensing applications (e.g., electret microphones, copiers), signal transmission applications (e.g., ULF / VLF transmitters operating at 30 kHz and below), and energy harvesting applications (e.g., extracting energy from external sources such as environmental vibrations, wind, heat, or light).

[0004] The properties of electret materials are related to the charge density per unit volume (or C / m³) of the material. 3 Proportional. However, since static charge can often only be placed on the surface of the electret material involved, it is often proportional to the unit space area (or C / m²). 2 The charge density of these electret materials is expressed as ( ). In particular, existing electret materials with higher charge densities are utilized in certain applications to maximize the performance of the devices involved. However, the maximum charge density of an electret is primarily limited by the electrical breakdown threshold level between the dielectric material of the electret and the surrounding air.

[0005] Traditional electret research and development has been largely limited to areas with a temperature of approximately 30 mC / m 2 Two-dimensional or flat surface materials with the highest charge density are preferred. However, due to the shallow penetration depth of ionized charges, the charge density of these two-dimensional surfaces is considered relatively low. In particular, many commercial and defense applications require materials with a charge density greater than 30 mC / m 2 Electronic or electromechanical devices using electret materials with much higher charge densities. For example, in VLF signal transmission applications used for critical long-distance and underwater communications, the use of electret materials with charge densities greater than 1 C / m is required. 2VLF transmission devices using electret materials with equivalent charge density. In this respect, ULF / VLF transmission is particularly useful for applications where signal propagation through conductive media (such as water, metal, rock, building materials, etc.) is desired. Furthermore, ULF / VLF transmission is extremely useful for long-range communication applications because signals in these frequency ranges can be coupled to a virtual ionosphere-to-ground "waveguide" that circles the Earth and propagates the signal around the Earth with very little attenuation.

[0006] Electret materials are generally classified into two groups: organic electret materials (e.g., polymers) and inorganic electret materials (e.g., silicon dioxide). Polymer electret materials typically have low charge density (less than 5 mC / m). 2 Moreover, polymer materials are not compatible with traditional microelectromechanical systems (MEMS) manufacturing processes, and may therefore present daunting design challenges, for example, in the scaling up and down of arrays.

[0007] A significant advantage of silica electret materials is that they are compatible with existing silicon MEMS fabrication processes and typically have a much higher charge density (e.g., 34 mC / m²) than organic electret materials (such as polymers). 2 Moreover, another advantage of silicon dioxide electret materials compared to polymer electret materials is that silicon dioxide electret materials can be embedded in single or dipole charges.

[0008] For the reasons stated above and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding this specification, there is a need in the art for electrets with very high (e.g., ultra-high) charge density. Summary of the Invention

[0009] The embodiments disclosed herein present techniques for fabricating ultra-high charge density electrets. In one example embodiment of this disclosure, multiple ultra-high charge density electrets are formed by combining a three-dimensional silicon structure with a high surface-to-volume ratio with a porous silicon dioxide film with a high surface area to significantly increase the charge density of the resulting electret (e.g., compared to the charge density of conventional electrets). Specifically, for one example embodiment, a silicon structure (e.g., a silicon wafer, die, etc.) is etched to form multiple positively tapered sidewalls (e.g., pyramidal), which produce a three-dimensional textured surface that significantly increases the surface-to-volume ratio of the silicon structure in question. A porous silicon dioxide film is formed on multiple surfaces of the tapered sidewalls, and positive (or negative) charges are generated in the porous silicon dioxide film on the multiple surfaces of the tapered sidewalls, which produces multiple ultra-high charge density electrets on the surface of the silicon structure in question. Attached Figure Description

[0010] The embodiments of this disclosure can be more readily understood when considered in light of the preferred embodiments and the following description in the accompanying drawings, in which:

[0011] Figure 1 This is a structural diagram illustrating a cross-sectional side view of a silicon structure that can be used to implement an example embodiment of the present invention.

[0012] Figure 2 This is a structural diagram illustrating a cross-sectional side view of a second silicon structure that can be used to implement an example embodiment of the present invention.

[0013] Figure 3 This is a structural diagram illustrating a cross-sectional side view of a third silicon structure that can be used to implement an example embodiment of the present invention.

[0014] Figure 4 The diagram is in Figure 3 The structural diagram of the three-dimensional perspective view of the example embodiment depicted in the figure.

[0015] Figure 5 The diagram is in Figure 3 The second three-dimensional perspective view of the example embodiment depicted is a structural diagram.

[0016] Figure 6 The diagram is made from materials that can be used to manufacture... Figure 3-5 The diagram shows a structural diagram with multiple two-dimensional side views of the structure obtained from an exemplary process of creating a three-dimensional silicon structure.

[0017] Figure 7 The diagram can be used to perform Figure 6 A flowchart illustrating an exemplary method of an exemplary manufacturing process.

[0018] Figure 8 This is a simplified schematic block diagram of a system that can be used to implement an example embodiment of the present invention.

[0019] By convention, the various described features are not drawn to scale, but rather to emphasize features relevant to this disclosure. Throughout the figures and text, reference numerals denote similar elements. Detailed Implementation

[0020] In the following detailed description, reference is made to the accompanying drawings, which form part of the description and are shown therein as specific illustrative embodiments (which may be practiced). These embodiments are described in sufficient detail to enable those skilled in the art to practice them, and it is to be understood that other embodiments may be utilized and logical, mechanical, and electrical changes may be made without departing from the scope of this disclosure. Therefore, the following detailed description should not be taken in a limiting sense.

[0021] Figure 1 This is a structural diagram illustrating a cross-sectional side view of a silicon structure 100, which can be used to implement an example embodiment of the present invention. For example... Figure 1 As illustrated, the surface of silicon structure 100 is textured, for example, to include multiple three-dimensional structures (e.g., 102a, 102b...102n) with conical sidewalls. In the illustrated example embodiment, each of the three-dimensional structures 102a-102n is pyramidal. However, in a second embodiment, the three-dimensional structures 102a-102n can be shaped differently from the pyramidal structure. For example, each of the three-dimensional structures 102a-102n can be formed in the shape of a column (e.g., with vertical sidewalls), a trench (e.g., with vertical or conical sidewalls), or a point. In particular, the technical advantage of the three-dimensional structures 102a-102n is that, compared to the surface-to-volume ratio of conventional two-dimensional (e.g., flat surface) silicon structures, the three-dimensional structures 102a-102n significantly increase the surface-to-volume ratio of silicon structure 100. Moreover, the increased surface-to-volume ratio of the silicon structure 100 compared to that of a conventional two-dimensional surface results in a significant enhancement of charge density gain (e.g., approximately 50 times higher) compared to that generated by a conventional two-dimensional surface.

[0022] Figure 2 This is a structural diagram illustrating a cross-sectional side view of a silicon structure 200, which can be used to implement an example embodiment of the present invention. For example... Figure 2 As illustrated, the silicon structure 200 includes a silicon layer 202 (e.g., a silicon wafer, die, etc.) and a layer (e.g., a film) 204 of porous silicon formed (e.g., etched) onto the surface of the silicon layer 202. In particular, compared to the properties of non-porous silicon, the property of porous silicon is its large surface-to-volume ratio, which significantly increases the effective charge density of porous silicon compared to the effective charge density of the equivalent structure of non-porous silicon.

[0023] Porous silicon structures (e.g., layer 204) can be fabricated using a suitable electrochemical etching process, where etching parameters manage the size and alignment of the pores and the percentage of void space resulting from the pores. Thus, for... Figure 2 The example embodiment illustrated in the figure utilizes a suitable silicon oxidation process to oxidize the porous silicon structure 204 to generate a porous silicon dioxide film 204. It is claimed that films with a diameter of approximately 300 μm have been produced. 2 / cm 3 The porous silica structure has a high specific surface area. Therefore, for example, using a 100 μm porous silica film, a surface-to-volume enhancement of 30,000 times (theoretically) compared to a non-porous silicon film can be achieved. However, as... Figure 2As indicated by the finite depth of the positive ion charge 206 shown, injecting a charge greater than 2 μm (e.g., the ion penetration depth indicated by the dashed line 208) into the porous silicon film 204 without damaging the film is a difficult process. Therefore, practically speaking, in two-dimensional porous silicon structures (such as...), Figure 2 In the exemplary silicon structure 204 depicted, only about 600 times of surface-to-volume enhancement can actually be achieved.

[0024] Figure 3 This is a structural diagram illustrating a cross-sectional side view of an enhanced three-dimensional silicon structure 300, which can be used to implement an example embodiment of the present invention. For example... Figure 3 As illustrated, the surface of the silicon structure 300 is textured into multiple three-dimensional silicon structures 302a-302n, each having conical sidewalls (e.g., pyramidal sidewalls). A layer (e.g., film) of porous silicon dioxide (e.g., 304a-304n) is formed on the surface of the multiple sidewalls of the silicon structures 302a-302n. Specifically, in... Figure 3 In the example embodiment depicted herein, the enhanced three-dimensional silicon structure 300 advantageously... Figure 1 The technical features of the three-dimensional silicon structure 100 described herein are as follows: Figure 2 The technical features of the porous silica film 204 described herein are combined. Thus, assuming (e.g., conservatively) that the three-dimensional silicon structure 302 can provide a 30-fold enhancement in surface-to-volume gain and the porous silica film 304 can provide a 600-fold enhancement in surface-to-volume gain, then in the formation of… Figure 3 The enhanced silicon structure disclosed herein can achieve an overall improvement of 18,000 times in surface-to-volume gain (e.g., increasing the surface-to-volume gain by 300 times). Figure 1 and Figure 2 (Combining the technical features disclosed herein). This significant increase in electret charge density compared to existing electret materials enables advanced development of key technologies such as, for example, low-size, low-weight, and low-power (SWaP) ULF / VLF transmitters capable of transmitting signals at 30 kHz and below.

[0025] Figure 4 It's a diagram. Figure 3 The exemplary embodiment depicted herein shows a structural diagram of a portion of the enhanced three-dimensional silicon structure 300 in a three-dimensional perspective view 400. As described above regarding... Figure 3 As described, each three-dimensional silicon structure, such as, for example, a pyramidal three-dimensional structure 402, has a layer or film 404 of porous silicon dioxide on each of the (e.g., four) surfaces of the exemplary three-dimensional structure 402. In particular, perspective view 400 is primarily provided herein to facilitate understanding. Figure 3 Understanding of the example embodiments depicted herein.

[0026] Figure 5 It's a diagram. Figure 3 The exemplary embodiments depicted herein show a structural diagram of a majority three-dimensional perspective view 500 of the enhanced three-dimensional silicon structure 300. Specifically, in Figure 5 In the exemplary view illustrated herein, multiple three-dimensional silicon structures are shown (e.g., in the form of an array having “n” rows and “m” columns, where “n” and “m” may or may not represent equal numbers). In any case, each three-dimensional silicon structure 502a-502n,m in the array has a layer or film of porous silicon dioxide 504a-504n,m on each of the (e.g., four) surfaces of the illustrated exemplary three-dimensional structure. In particular, extended view 500 is primarily provided herein to illustrate... Figure 3 The enhanced three-dimensional silicon structure depicted in the paper has a “textured” surface. Thus, electret materials formed by an array of (e.g., pyramidal) three-dimensional structures 502a-502n-m with porous silica surface films 504a-504n,m are likely to achieve an overall improvement in surface-to-volume gain of approximately 18,000 times compared to conventional electret materials.

[0027] Figure 6 This is a structural diagram illustrating multiple two-dimensional side views of the structure obtained by the exemplary process 600, which can be used to manufacture... Figure 3-5 The diagram illustrates an enhanced three-dimensional silicon structure. (Reference) Figure 6 A suitable silicon wafer 602 is provided (e.g., formed or grown). Then, a suitable patterning process 604 (e.g., photolithography) is used to form multiple etch masks (e.g., silicon dioxide etch masks 603) on the silicon wafer. A suitable etching process (e.g., deep reactive ion etching or DRIE process) 606 is used to form multiple three-dimensional silicon structures (e.g., Figure 1(102a-102n in the original text). In one example embodiment, the depth / thickness of each three-dimensional structure thus formed (e.g., 607) is approximately 200 μm. However, in another embodiment, the depth / thickness of each three-dimensional structure thus formed can vary from less than 1 μm up to the thickness of the wafer in use. A suitable etching process (e.g., electrochemical etching) 608 is then used to remove the mask and form a porous silicon layer 609 on multiple surfaces of each of the three-dimensional silicon structures. A suitable oxidation process (e.g., thermal oxidation, etc.) 610 is then used to form a porous silicon dioxide layer 611 on multiple surfaces of each of the three-dimensional silicon structures. Next, a suitable ionization process (e.g., ion implantation) 612 is used to generate charges (positive or negative ions) in the three-dimensional structure. If deemed necessary, a suitable annealing process 614 can then be used to anneal the ionized surfaces and thereby enhance the charge retention time for the electret material thus formed.

[0028] Figure 7 The diagram illustrates what can be used to execute... Figure 6 The flowchart illustrates an exemplary method 700 of an exemplary manufacturing process 600. (See also...) Figure 6 and Figure 7 The method begins by forming or otherwise providing a silicon wafer (or silicon disk, die, etc.) (702). Next, a pattern of an etching mask (e.g., silicon dioxide) is formed (704). Then, an etching process is used to form multiple three-dimensional structures (706). The mask is then removed, and porous silicon layers are formed (etched) on multiple surfaces of the three-dimensional structures (708). The porous silicon layers are then oxidized to form a porous silicon dioxide layer (710). Next, the porous silicon dioxide layer is charged (e.g., implanted with positive or negative ions) to produce an enhanced electret material (712). The enhanced electret material can then be annealed, for example, if a higher charge retention time is desired (714).

[0029] Figure 8 This is a simplified schematic block diagram of system 800, which can be used to implement an example embodiment of the present invention. For this exemplary embodiment, system 800 is a VLF transmitter system. Reference Figure 8Example system 800 includes: a text message processor 802 (e.g., voice messaging is not practical at VLF), configured to input and process text messages from a user; and a transmitter (e.g., broadcast) processor 804, coupled to the text message processor 802 and configured to process a plurality of text messages from the user into a suitable broadcast format for VLF. A signal processor / encoder 806 is coupled to the transmitter processor 804 and configured to encode text messages received from the transmitter processor 804 into a suitable encoding format for VLF transmission. A modulator 808 is coupled to the signal processor 806 and configured to convert the encoded text messages into a suitable VLF signal. The VLF signal generated in the modulator 808 is coupled to a VLF power amplifier 812 and then transmitted via an antenna 814. Specifically, in one example embodiment, the modulator 808 includes suitable electronic and / or electromechanical circuitry configured to physically move an ultra-high charge density (enhanced) electret 810 within the modulator 808, thereby generating a VLF signal to be broadcast or transmitted via the VLF antenna 814. Thus, the enhanced electret material 810 (e.g., as described above regarding...) Figure 3-6 (As described) It can produce an overall improvement in surface-to-volume gain of approximately 18,000 times compared to the surface-to-volume gain of conventional electret materials used to transmit VLF signals. Therefore, the SwP and transmission performance of the VLF transmitter system 800 are significantly improved compared to the SwP and transmission performance of existing VLF transmitters using conventional electret materials.

[0030] It should be understood that the elements of the embodiments and illustrative drawings described above can be used in various combinations with each other to produce further embodiments explicitly intended to be within the scope of this disclosure.

[0031] Example Implementation

[0032] Example 1 includes an ultra-high charge density electret comprising: a three-dimensional structure; a plurality of sidewalls on the three-dimensional structure; and a porous silica film formed on the plurality of sidewalls, wherein the porous silica film is charged by a plurality of positive or negative ions.

[0033] Example 2 includes the ultra-high charge density electret of Example 1, wherein the three-dimensional structure is a pyramidal silicon structure.

[0034] Example 3 includes an ultra-high charge density electret of any of Examples 1-2, wherein the three-dimensional structure is formed on the surface of a silicon wafer.

[0035] Example 4 includes an ultra-high charge density electret of any one of Examples 1-3, wherein the three-dimensional structure is at least one of a trench-shaped, columnar, or pointed silicon structure.

[0036] Example 5 includes an ultra-high charge density electret of any of Examples 1-4, and further includes multiple three-dimensional structures.

[0037] Example 6 includes the ultra-high charge density electret of Example 5, wherein the plurality of three-dimensional structures include an array of three-dimensional structures.

[0038] Example 7 includes a method for forming an ultra-high charge density electret material, comprising: providing a silicon wafer; forming a patterned etch mask on a surface of the silicon wafer; forming a plurality of three-dimensional structures on the surface of the silicon wafer; forming a porous silicon layer on at least one surface of each of the plurality of three-dimensional structures; forming a porous silicon oxide layer on the at least one surface of each of the plurality of three-dimensional structures; and forming charges on the porous silicon oxide layer on the at least one surface of each of the plurality of three-dimensional structures.

[0039] Example 8 includes the method of Example 7, wherein forming the porous silicon layer further includes: forming the porous silicon layer on a plurality of surfaces of each of the plurality of three-dimensional structures.

[0040] Example 9 includes the method of any one of Examples 7-8, wherein forming the plurality of three-dimensional structures on the surface of the silicon wafer includes: etching the plurality of three-dimensional structures onto the surface of the silicon wafer.

[0041] Example 10 includes the method of any one of Examples 7-9, wherein forming the porous silicon oxide layer further includes: forming a silicon dioxide layer, etching the silicon dioxide layer, and thereby forming a plurality of pores in the silicon dioxide layer.

[0042] Example 11 includes the method of any one of Examples 7-10, wherein forming the plurality of three-dimensional structures on the surface of the silicon wafer includes: forming a plurality of pyramidal structures on the silicon wafer.

[0043] Example 12 includes the method of any one of Examples 7-11, wherein forming the plurality of three-dimensional structures on the surface of the silicon wafer includes: forming a plurality of trench-shaped, columnar-shaped, or pointed structures on the silicon wafer.

[0044] Example 13 includes the method of any one of Examples 7-12, wherein forming the charge on the porous silicon oxide layer includes: implanting a plurality of positive or negative ions into at least one surface of each of the plurality of three-dimensional structures.

[0045] Example 14 includes the method of any one of Examples 7-13, further comprising: annealing the porous silicon oxide layer on at least one surface of each of the plurality of three-dimensional structures.

[0046] Example 15 includes a system comprising: a text message processor; a broadcast processor coupled to an output of the text message processor; a signal processor coupled to an output of the broadcast processor; a modulator coupled to an output of the signal processor; a power amplifier coupled to an output of the modulator; and an antenna coupled to an output of the power amplifier, wherein the modulator comprises a plurality of ultra-high charge density electrets, including: a plurality of three-dimensional structures; a plurality of sidewalls on each of the plurality of three-dimensional structures; and a porous silica film formed on the plurality of sidewalls, wherein the porous silica film is charged using a plurality of positive or negative ions.

[0047] Example 16 includes the system of Example 15, wherein each of the plurality of three-dimensional structures is a pyramid-shaped silicon structure.

[0048] Example 17 includes a system of any one of Examples 15-16, wherein the plurality of three-dimensional structures are formed on the surface of a silicon wafer or die.

[0049] Example 18 includes a system of any one of Examples 15-17, wherein each of the plurality of three-dimensional structures is at least one of a trench-shaped, columnar, or pointed silicon structure.

[0050] Example 19 includes a system of any one of Examples 15-18, wherein the plurality of three-dimensional structures comprises an array of three-dimensional structures.

[0051] Example 20 includes a system of any one of Examples 15-19, wherein the plurality of ultra-high charge density electrets are components of an electromechanical circuit configured to generate a very low frequency (VLF) signal.

[0052] Although specific embodiments have been illustrated and described herein, those skilled in the art will appreciate that the specific embodiments shown can be substituted with any arrangement contemplated to achieve the same purpose. This application is intended to cover any adaptations or variations of the presented embodiments. Therefore, it is expressly intended that the embodiments be limited only by the claims and their equivalents.

Claims

1. A transmitter system, comprising: A modulator, comprising an ultra-high charge density electret, the ultra-high charge density electret comprising: Three-dimensional structure; and The three-dimensional structure has multiple sidewalls; and a porous silica film formed on the multiple sidewalls, wherein the porous silica film is charged using multiple positive or negative ions; and A signal processor coupled to the modulator, wherein circuitry within the modulator physically moves the ultra-high charge density electret to generate a signal in response to a signal received from the signal processor.

2. The transmitter system of claim 1, wherein the three-dimensional structure is formed on the surface of a silicon wafer.

3. The transmitter system of claim 1, wherein the three-dimensional structure is at least one of a pyramidal, trench-shaped, columnar, or pointed silicon structure.

4. The transmitter system of claim 1, further comprising a plurality of three-dimensional structures, wherein the plurality of three-dimensional structures comprises an array of three-dimensional structures.

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