A method and system for updating firmware of a multi-version compatible bridge under BIOS
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HANGZHOU EBOYLAMP ELECTRONICS CO LTD
- Filing Date
- 2023-08-30
- Publication Date
- 2026-06-02
Smart Images
Figure CN116991446B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of bridge chip firmware, specifically relating to a method and system for updating bridge chip firmware compatible with multiple versions under BIOS. Background Technology
[0002] A bridge chip is a processing chip that directly exchanges data and instructions with the CPU, acting as a connecting bridge. On a computer motherboard, if the CPU socket is considered north, the chip closest to the CPU socket that serves as the connection is called the "northbridge chip".
[0003] The existing solution for updating bridge chip firmware involves using an external storage device containing the bridge chip firmware, such as a USB flash drive or SATA disk. The BIOS Flash memory then reads the bridge chip firmware from the external storage device and finally stores the bridge chip firmware in the bridge chip's Flash memory, thus updating the bridge chip firmware.
[0004] However, there may be multiple versions of the bridge chip firmware. With this update method, the original bridge chip firmware cannot be saved after the update. Moreover, the BIOS Flash can only support one type of bridge chip firmware. Every time the bridge chip firmware version is switched, an external storage device is needed to update it in the BIOS or re-flash the BIOS Flash, which is a cumbersome process. Summary of the Invention
[0005] The purpose of this invention is to address the problems mentioned in the background art by proposing a method for updating BIOS firmware that is compatible with multiple versions of bridge chips.
[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0007] The present invention proposes a method for updating BIOS firmware compatible with multiple versions of bridge chips, which includes dividing the BIOS flash memory into spaces storing preset versions of bridge chips;
[0008] The CPU reads the preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and stores it into the CPU's memory;
[0009] The CPU writes the bridge chip firmware from memory to the bridge chip's DDR for temporary storage and sends an update command.
[0010] In response to the update command, the bridge chip writes the bridge chip firmware in the DDR to the bridge chip flash memory, thus completing the bridge chip firmware update.
[0011] Preferably, the BIOS-compatible multi-version bridge chip firmware update method further includes: after the CPU reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it in the CPU's memory, the CPU verifies whether the version of the bridge chip firmware is correct.
[0012] Preferably, the BIOS-compatible multi-version bridge chip firmware update method further includes: the process of the bridge chip writing the bridge chip firmware in DDR to the bridge chip flash memory, and the CPU determining whether the updated data in the bridge chip flash memory reaches the size of the corresponding version of the bridge chip firmware.
[0013] If the condition is met, the update is complete.
[0014] If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold.
[0015] If the time exceeds the threshold, the update will fail;
[0016] If the time limit is not exceeded, the update will continue.
[0017] A BIOS-compatible multi-version bridge chip firmware update system includes a CPU, a BIOS flash memory and a bridge chip respectively connected to the CPU, and a bridge chip flash memory connected to the bridge chip, wherein:
[0018] The BIOS flash memory has space for storing different preset versions of the bridge chip;
[0019] The CPU is used to read the preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and store it into the CPU's memory;
[0020] The CPU is used to write the bridge chip firmware in memory to the bridge chip's DDR for temporary storage, and is also used to send update commands.
[0021] The bridge chip is used to respond to update commands and also to write the bridge chip firmware in DDR to the bridge chip flash memory to complete the bridge chip firmware update.
[0022] Preferably, after the CPU reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it in the CPU's memory, it performs the following operations:
[0023] The CPU verifies whether the bridge chip firmware version is correct.
[0024] Preferably, the process of writing the bridge chip firmware from the DDR to the bridge chip flash memory involves the following operations:
[0025] The CPU determines whether the updated data in the bridge chip's flash memory has reached the size of the corresponding bridge chip firmware version:
[0026] If the condition is met, the update is complete.
[0027] If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold.
[0028] If the time exceeds the threshold, the update will fail;
[0029] If the time limit is not exceeded, the update will continue.
[0030] Preferably, the CPU includes a timer for timing bridge chip firmware updates.
[0031] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0032] This BIOS-compatible method and system for updating bridge chip firmware across multiple versions allocates space in the BIOS flash memory to store different versions of bridge chip firmware. When updating the bridge chip firmware, the corresponding version of the bridge chip firmware in the BIOS flash memory is transferred to the bridge chip's DDR memory for temporary storage. Then, the bridge chip firmware in the DDR memory is written back to the bridge chip flash memory, completing the update. Simultaneously, the bridge chip firmware can also be updated back to the original version. This solves the problems of existing technologies where, during updates using external storage containing the bridge chip firmware, the original bridge chip firmware cannot be saved after an update, and each time the bridge chip firmware version is switched, an external storage device is needed to update or re-flash the BIOS flash memory, making the process cumbersome. Attached Figure Description
[0033] Figure 1 This is a block diagram of the BIOS-compatible multi-version bridge chip firmware update method and system of the present invention;
[0034] Figure 2 This is a schematic diagram of the space division of the BIOS flash memory in this invention;
[0035] Figure 3 This is a flowchart illustrating the BIOS-compatible multi-version bridge chip firmware update method and system of the present invention. Detailed Implementation
[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0037] It should be noted that when a component is referred to as being "connected" to another component, it can be directly connected to the other component or there may be an intervening component. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to limit the application.
[0038] In one embodiment, such as Figure 1-3As shown, a method for updating bridge chip firmware compatible with multiple versions under BIOS includes:
[0039] Step 1: Divide the space in the BIOS flash memory to store different preset versions of bridge chips.
[0040] It should be noted that a dedicated area is allocated in the BIOS flash memory to store multiple versions of the bridge chip firmware. This embodiment uses the X100 bridge chip firmware as an example, but it is not limited to this model and can also use other models. In this embodiment, the BIOS flash memory layout is as follows... Figure 2 As shown (but the layout of the BIOS flash memory is not limited and can be in other ways), the size of the BIOS flash memory is 16M. The first 8M is used to store the BIOS firmware, 0xE00000~0xE50000 is used to store BIOS variables, and the middle 6M space from 0x800000 to 0xDFFFFF is used to store the bridge chip firmware. In this embodiment, each version of the bridge chip firmware is 1M in size and 6 versions can be stored.
[0041] Step 2: The CPU reads the preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and stores it in the CPU memory.
[0042] It should be noted that, firstly, in the BIOS interface, an option to add bridge chip firmware is added (select the bridge chip firmware version you want to switch to). After selecting the corresponding bridge chip firmware version, the CPU checks whether the bridge chip firmware is in place. If it is not in place, a message is displayed indicating that the bridge chip firmware is not in place, and the entire update process ends automatically. If it is in place, the CPU automatically reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it in the CPU's memory. In this embodiment, the transmission of the bridge chip firmware between the BIOS and the CPU can be done via QSPI or SPI, but the specific transmission method is not limited, and other transmission methods can also be used.
[0043] This step also includes the CPU reading the corresponding version of the bridge chip firmware from the BIOS flash memory and storing it in the CPU's memory. The CPU then verifies whether the bridge chip firmware version is correct. The specific verification method is as follows (taking the X100 bridge chip firmware as an example): The CPU reads 4 bytes of data at offset 0xF0000 of the X100 bridge chip firmware and checks whether it is 0x54460110 (the X100 bridge chip firmware flag). If it is, it means that the X100 bridge chip firmware version is correct; otherwise, it prompts the CPU to check the bridge chip firmware version.
[0044] Step 3: The CPU writes the bridge chip firmware in memory to the bridge chip's DDR for temporary storage and sends an update command.
[0045] It should be noted that the DDR of the bridge chip is an independent video memory space. The bridge chip firmware can be transferred between the CPU and the bridge chip via PCIe, but it is not limited to this method and can also be transferred via other methods.
[0046] Step 4: In response to the update command, the bridge chip writes the bridge chip firmware in the DDR to the bridge chip flash memory, completing the bridge chip firmware update.
[0047] Specifically, the process involves the bridge chip writing the bridge chip firmware from DDR to the bridge chip flash memory, and the CPU determining whether the updated data in the bridge chip flash memory has reached the size of the corresponding version of the bridge chip firmware.
[0048] If the condition is met, the update is complete.
[0049] If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold.
[0050] If the time exceeds the threshold, the update will fail;
[0051] If the time limit is not exceeded, the update will continue.
[0052] It should be noted that the bridge chip writes the bridge chip firmware from the DDR to the bridge chip flash memory. This data transfer process takes a certain amount of time. The CPU determines whether the updated data in the bridge chip flash memory reaches the size of the corresponding version of the bridge chip firmware based on the amount of bridge chip firmware data in the DDR. The threshold for the bridge chip firmware update time is set by the CPU, and the CPU also keeps a timer during the update process. If the update time exceeds the threshold, the update fails; if the update time does not exceed the threshold, the bridge chip firmware update process continues.
[0053] This method allocates space in the BIOS flash memory to store different versions of the bridge chip firmware. When updating the bridge chip firmware, the corresponding version of the bridge chip firmware in the BIOS flash memory is transferred to the bridge chip's DDR for temporary storage. Then, the bridge chip firmware in the DDR is written back to the bridge chip flash memory, completing the bridge chip firmware update. At the same time, the bridge chip firmware can also be updated to the original version. This solves the problems of existing technologies where, during the update process using external storage containing the bridge chip firmware, the original bridge chip firmware cannot be saved after one update (in existing technologies, the bridge chip firmware only exists in the bridge chip flash memory, and if the previous version of the bridge chip firmware is updated, it is lost), and the cumbersome process of updating or re-burning the BIOS flash memory under BIOS every time the bridge chip firmware version is switched.
[0054] In another embodiment, a BIOS-compatible multi-version bridge chip firmware update system includes a CPU, a BIOS flash memory and a bridge chip respectively connected to the CPU, and a bridge chip flash memory connected to the bridge chip, wherein:
[0055] The BIOS flash memory has space for storing different preset versions of the bridge chip;
[0056] The CPU is used to read the preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and store it into the CPU's memory;
[0057] The CPU is used to write the bridge chip firmware in memory to the bridge chip's DDR for temporary storage, and is also used to send update commands.
[0058] The bridge chip is used to respond to update commands and also to write the bridge chip firmware in DDR to the bridge chip flash memory to complete the bridge chip firmware update.
[0059] In this embodiment, after the CPU reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it in the CPU's memory, it performs the following operations:
[0060] The CPU verifies whether the bridge chip firmware version is correct.
[0061] In this embodiment, the process of the bridge chip writing the bridge chip firmware from the DDR to the bridge chip flash memory involves the following operations:
[0062] The CPU determines whether the updated data in the bridge chip's flash memory has reached the size of the corresponding bridge chip firmware version:
[0063] If the condition is met, the update is complete.
[0064] If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold.
[0065] If the time exceeds the threshold, the update will fail;
[0066] If the time limit is not exceeded, the update will continue.
[0067] In this embodiment, the CPU is equipped with a timer for timing bridge chip firmware updates.
[0068] It should be noted that the CPU uses a timer to time the data update time in the bridge chip's flash memory.
[0069] The limitations of this invention on the method for updating bridge chip firmware compatible with multiple versions under BIOS also apply to the system for updating bridge chip firmware compatible with multiple versions under BIOS, and will not be repeated here.
[0070] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0071] The embodiments described above are merely specific and detailed examples of the embodiments described in this application, and should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the scope of protection of this patent application should be determined by the appended claims.
Claims
1. A method for updating bridge chip firmware compatible with multiple versions under BIOS, characterized in that: The BIOS-compatible multi-version bridge chip firmware update method includes: The BIOS flash memory is divided into spaces that store different preset versions of the bridge chip; The CPU reads the preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and stores it into the CPU's memory; The CPU writes the bridge chip firmware from memory to the bridge chip's DDR for temporary storage and sends an update command. In response to the update command, the bridge chip writes the bridge chip firmware in the DDR to the bridge chip flash memory, thus completing the bridge chip firmware update.
2. The BIOS-compatible multi-version bridge chip firmware update method as described in claim 1, characterized in that: The BIOS-compatible multi-version bridge chip firmware update method further includes: after the CPU reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it into the CPU's memory, the CPU verifies whether the version of the bridge chip firmware is correct.
3. The BIOS-compatible multi-version bridge chip firmware update method as described in claim 1, characterized in that: The BIOS-compatible multi-version bridge chip firmware update method further includes: the process of the bridge chip writing the bridge chip firmware in DDR to the bridge chip flash memory, and the CPU determining whether the updated data in the bridge chip flash memory reaches the size of the corresponding version of the bridge chip firmware. If the condition is met, the update is complete. If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold. If the time exceeds the threshold, the update will fail; If the time limit is not exceeded, the update will continue.
4. A BIOS-compatible multi-version bridge chip firmware update system, characterized in that: The BIOS-compatible multi-version bridge chip firmware update system includes a CPU, a BIOS flash memory and a bridge chip respectively connected to the CPU, and a bridge chip flash memory connected to the bridge chip, wherein: The BIOS flash memory has space for storing preset versions of bridge chips; The CPU is used to read a preset version of the bridge chip firmware from the partitioned space of the BIOS flash memory and store it into the CPU's memory; The CPU is used to write the bridge chip firmware in memory to the DDR of the bridge chip for temporary storage, and is also used to send update commands. The bridge chip is used to respond to an update command and also to write the bridge chip firmware in the DDR to the bridge chip flash memory to complete the bridge chip firmware update.
5. The BIOS-compatible multi-version bridge chip firmware update system as described in claim 4, characterized in that: After the CPU reads the corresponding version of the bridge chip firmware from the BIOS flash memory and stores it in the CPU's memory, it performs the following operations: The CPU verifies whether the bridge chip firmware version is correct.
6. The BIOS-compatible multi-version bridge chip firmware update system as described in claim 4, characterized in that: The process by which the bridge chip writes the bridge chip firmware from the DDR to the bridge chip flash memory involves the following operations: The CPU determines whether the updated data in the bridge chip's flash memory has reached the size of the corresponding bridge chip firmware version: If the condition is met, the update is complete. If the threshold is not reached, the CPU will continue to determine whether the update time exceeds the preset threshold. If the time exceeds the threshold, the update will fail; If the time limit is not exceeded, the update will continue.
7. The BIOS-compatible multi-version bridge chip firmware update system as described in claim 4, characterized in that: The CPU is equipped with a timer for timing bridge chip firmware updates.