Overvoltage protection circuit for power device and overvoltage protection method based thereon
Patent Information
- Application Number
- CN202310956243.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-31
- Publication Date
- 2026-09-29
- Estimated Expiration
- 2043-07-31
AI Technical Summary
[0003]但是,这样会存在以下缺点:功率器件的过压保护严重依赖于TVS管的击穿电压值,其中,当TVS管的击穿电压值比较低时,过压保护容易提前发生,从而会增大功率器件在正常工况下的关断速度,进而增大功率器件的关断损耗,增大功率器件的发热,降低电驱动系统的稳定性,极端情况下还会造成功率器件热损坏;当TVS管的击穿电压值比较高时,保护响应会滞后发生,从而会导致关断电压过高,功率器件损坏
通过本公开的实施例,功率器件的过压保护电路,包括:第一电压获取单元、第二电压获取单元、第一比较单元、第二比较单元和控制单元;其中,第一比较单元的第一端与控制单元的第一信号输入端连接,第一比较单元的第二端分别与第一电压源和第一电压获取单元的第一端连接后形成第一节点,第二比较单元的第一端与控制单元的第二信号输入端连接,第二比较单元的第二端分别与第二电压源和第二电压获取单元的第一端连接后形成第二节点,第一电压获取单元的第二端和第二电压获取单元的第二端分别与功率器件的第一端连接,控制单元的信号输出端与功率器件的控制端连接,功率器件的第二端接地;第一电压获取单元,用于获取第一节点的电压值;第二电压获取单元,用于获取第二节点的电压值;第一比较单元,用于根据第一节点的电压值和第一参考电压值的比较结果,输出第一信号;第二比较单元,用于根据第二节点的电压值和第二参考电压值的比较结果,输出第二信号;控制单元,用于根据第一信号和第二信号,对输出信号进行调节,以实现对所述功率器件的过压保护。由此,本公开能够在不依赖于TVS管击穿电压值的情况下实现对功率器件的过压保护,提高了功率器件过压保护精准性,提升了电驱动系统安全稳定性。
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Figure CN117039823B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of power device technology, and in particular to an overvoltage protection circuit for a power device and an overvoltage protection method based thereon. Background Technology
[0002] In related technologies, the overvoltage protection method for power devices is active voltage clamping protection. The principle of active clamping protection is that when the turn-off voltage of the power device is too high, the TVS (Transient Voltage Suppressor) is broken down, and the breakdown current of the TVS is used as feedback to control the turn-off speed of the power device. If the breakdown current is larger, the turn-off speed is slower, thereby controlling the turn-off peak voltage of the power device and achieving overvoltage protection for the power device.
[0003] However, this approach has the following drawbacks: Overvoltage protection of power devices heavily relies on the breakdown voltage of the TVS diode. When the breakdown voltage of the TVS diode is relatively low, overvoltage protection is prone to occur prematurely, which increases the turn-off speed of the power device under normal operating conditions, thereby increasing the turn-off loss of the power device, increasing the heat generation of the power device, reducing the stability of the electric drive system, and in extreme cases, causing thermal damage to the power device. When the breakdown voltage of the TVS diode is relatively high, the protection response will be delayed, which will lead to excessively high turn-off voltage and damage to the power device. Summary of the Invention
[0004] This disclosure provides an overvoltage protection circuit for power devices and an overvoltage protection method based thereon. This circuit enables overvoltage protection of power devices without relying on the breakdown voltage of a TVS diode, improving the accuracy of overvoltage protection and enhancing the safety and stability of the electric drive system. The technical solution of this disclosure is as follows: The first aspect of this disclosure provides an overvoltage protection circuit for a power device, comprising: a first voltage acquisition unit, a second voltage acquisition unit, a first comparison unit, a second comparison unit, and a control unit; wherein, a first terminal of the first comparison unit is connected to a first signal input terminal of the control unit, a second terminal of the first comparison unit is connected to a first voltage source and the first terminal of the first voltage acquisition unit respectively to form a first node, a first terminal of the second comparison unit is connected to a second signal input terminal of the control unit, a second terminal of the second comparison unit is connected to a second voltage source and the first terminal of the second voltage acquisition unit respectively to form a second node, a second terminal of the first voltage acquisition unit and the second terminal of the second voltage acquisition unit are respectively connected to a first terminal of the power device, a signal output terminal of the control unit is connected to a control terminal of the power device, and a second terminal of the power device is grounded; The first voltage acquisition unit is used to acquire the voltage value of the first node; The second voltage acquisition unit is used to acquire the voltage value of the second node; The first comparison unit is configured to output a first signal based on the comparison result between the voltage value of the first node and the first reference voltage value; The second comparison unit is used to output a second signal based on the comparison result of the voltage value of the second node and the second reference voltage value; The control unit is used to adjust the output signal according to the first signal and the second signal to achieve overvoltage protection for the power device.
[0005] In one embodiment of this disclosure, when the control unit adjusts the output signal according to the first signal and the second signal, it includes: When the first signal changes, a first time point is obtained; When the second signal changes, a second time point is acquired; Calculate the absolute value of the difference between the second time point and the first time point, and use it as the time difference. Calculate the absolute value of the difference between the voltage value of the second voltage source and the voltage value of the first voltage source, and use it as the voltage difference. The ratio between the voltage difference and the time difference is calculated and used as the rising slope of the power device's turn-off voltage. The output signal is adjusted according to the rising slope.
[0006] In one embodiment of this disclosure, when the control unit adjusts the output signal according to the rising slope, it includes: If the rising slope is greater than the set rising slope, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal.
[0007] In one embodiment of this disclosure, the first voltage acquisition unit includes: a first resistor and a first diode; wherein, The first end of the first resistor serves as the first end of the first voltage acquisition unit. The second end of the first resistor is connected to the anode of the first diode, and the cathode of the first diode serves as the second end of the first voltage acquisition unit.
[0008] In one embodiment of this disclosure, the second voltage acquisition unit includes: a second resistor and a second diode; wherein, The first end of the second resistor serves as the first end of the second voltage acquisition unit; The second end of the second resistor is connected to the anode of the second diode, and the cathode of the second diode serves as the second end of the second voltage acquisition unit.
[0009] In one embodiment of this disclosure, the first comparison unit includes: a first comparator; wherein, The non-inverting input of the first comparator serves as the second terminal of the first comparison unit. The inverting input of the first comparator is used to input the first reference voltage value; The output of the first comparator serves as the first terminal of the first comparison unit.
[0010] In one embodiment of this disclosure, the second comparison unit includes: a second comparator; wherein, The non-inverting input of the second comparator serves as the second terminal of the second comparison unit; The inverting input of the second comparator is used to input the second reference voltage value; The output of the second comparator serves as the first terminal of the second comparison unit.
[0011] In one embodiment of this disclosure, the circuit further includes: a third resistor and a fourth resistor; wherein, The first end of the third resistor is connected to the first node; The first end of the fourth resistor is connected to the second node; The second end of the third resistor is connected to the second end of the fourth resistor, and then connected to the second end of the power device.
[0012] In one embodiment of this disclosure, the circuit further includes a fifth resistor; wherein, The first end of the fifth resistor is connected to the output end of the control unit, and the second end of the fifth resistor is connected to the control end of the power device.
[0013] In one embodiment of this disclosure, the power device includes: a transistor and a transient voltage suppressor diode; wherein, The first terminal of the transistor is connected to the cathode of the transient voltage suppression diode and serves as the first terminal of the power device. The second terminal of the transistor is connected to the anode of the transient voltage suppression diode and serves as the second terminal of the power device. The control terminal of the transistor serves as the control terminal of the power device. The transistor is either an IGBT (Insulated Gate Bipolar Transistor) or a MOS (Metal-Oxide-Semiconductor Field-Effect Transistor).
[0014] The second aspect of this disclosure provides an overvoltage protection method based on an overvoltage protection circuit of a power device, comprising the following steps: Acquire a first signal output by the first comparison unit; wherein the first signal is a signal obtained by the first comparison unit based on the comparison result between the voltage value of the first node obtained by the first voltage acquisition unit and the first reference voltage value; The second signal output by the second comparison unit is acquired; wherein the second signal is a signal obtained by the second comparison unit based on the comparison result between the voltage value of the second node acquired by the second voltage acquisition unit and the second reference voltage value; The output signal is adjusted according to the first signal and the second signal to achieve overvoltage protection for the power device.
[0015] In one embodiment of this disclosure, adjusting the output signal based on the first signal and the second signal includes: When the first signal changes, a first time point is obtained; When the second signal changes, a second time point is acquired; Calculate the absolute value of the difference between the second time point and the first time point, and use it as the time difference. Calculate the absolute value of the difference between the voltage value of the second voltage source and the voltage value of the first voltage source, and use it as the voltage difference value; The ratio between the voltage difference and the time difference is calculated and used as the rising slope of the power device's turn-off voltage. The output signal is adjusted according to the rising slope.
[0016] In one embodiment of this disclosure, adjusting the output signal according to the rising slope includes: If the rising slope is greater than the set rising slope, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal.
[0017] A third aspect of this disclosure provides an electronic device, including: a processor and a memory; The processor reads executable program code stored in the memory to run a program corresponding to the executable program code, so as to implement the overvoltage protection method of the power device-based overvoltage protection circuit of the second aspect embodiment.
[0018] The fourth aspect of this disclosure provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the overvoltage protection method of the power device-based overvoltage protection circuit of the second aspect embodiment.
[0019] The fifth aspect of this disclosure provides a computer program product that, when executed by an instruction processor, performs an overvoltage protection method based on a power device-based overvoltage protection circuit according to the second aspect of the embodiment.
[0020] The technical solutions provided by the embodiments of this disclosure have at least the following beneficial effects: According to embodiments of this disclosure, an overvoltage protection circuit for a power device includes: a first voltage acquisition unit, a second voltage acquisition unit, a first comparison unit, a second comparison unit, and a control unit; wherein, a first terminal of the first comparison unit is connected to a first signal input terminal of the control unit, a second terminal of the first comparison unit is connected to a first voltage source and the first terminal of the first voltage acquisition unit respectively to form a first node, a first terminal of the second comparison unit is connected to a second signal input terminal of the control unit, a second terminal of the second comparison unit is connected to a second voltage source and the first terminal of the second voltage acquisition unit respectively to form a second node, the second terminals of the first and second voltage acquisition units are respectively connected to the first terminal of the power device, a signal output terminal of the control unit is connected to the control terminal of the power device, and the second terminal of the power device is grounded; the first voltage acquisition unit is used to acquire the voltage value of the first node; the second voltage acquisition unit is used to acquire the voltage value of the second node; the first comparison unit is used to output a first signal based on the comparison result of the voltage value of the first node and a first reference voltage value; the second comparison unit is used to output a second signal based on the comparison result of the voltage value of the second node and the second reference voltage value; the control unit is used to adjust the output signal according to the first signal and the second signal to achieve overvoltage protection for the power device. Therefore, this disclosure enables overvoltage protection of power devices without relying on the breakdown voltage of the TVS diode, improving the accuracy of overvoltage protection of power devices and enhancing the safety and stability of the electric drive system.
[0021] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.
[0023] Figure 1 This is a schematic diagram of an overvoltage protection circuit for a power device according to an embodiment of the present disclosure; Figure 2 This is a schematic diagram of a motor controller according to an embodiment of the present disclosure; Figure 3 This is a schematic diagram of the power device turn-off voltage according to an embodiment of the present disclosure; Figure 4 This is a schematic diagram of an overvoltage protection circuit for a power device according to an embodiment of the present disclosure; Figure 5 This is a flowchart of an overvoltage protection method based on an overvoltage protection circuit of a power device according to an embodiment of the present disclosure. Detailed Implementation
[0024] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings.
[0025] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.
[0026] The overvoltage protection circuit of the power device and the overvoltage protection method based thereon according to embodiments of the present disclosure are described below with reference to the accompanying drawings.
[0027] Figure 1 This is a schematic diagram of an overvoltage protection circuit for a power device according to an embodiment of the present disclosure.
[0028] It should be noted that the overvoltage protection circuit of the power device in this disclosure can be applied to the control and protection of electric drive power devices in electric vehicles, including pure electric vehicles and hybrid vehicles, and the power devices include IGBT transistors or MOSFETs. The technical solution of this disclosure can also be extended to motor controllers in the industrial field (such as...). Figure 2 As shown), and in the controllers of power devices such as photovoltaic inverters, wind power inverters, and energy storage inverters in the energy field.
[0029] like Figure 1 As shown, the overvoltage protection method for power devices in this embodiment includes: a first voltage acquisition unit 10, a second voltage acquisition unit 20, a first comparison unit 30, a second comparison unit 40, and a control unit 50.
[0030] In this configuration, the first end of the first comparison unit 30 is connected to the first signal input terminal Input1 of the control unit 50, and the second end of the first comparison unit 30 is connected to the first voltage source VCC1 and the first end of the first voltage acquisition unit 10 to form a first node J1. The first end of the second comparison unit 40 is connected to the second signal input terminal Input2 of the control unit 50, and the second end of the second comparison unit 40 is connected to the second voltage source VCC2 and the first end of the second voltage acquisition unit 20 to form a second node J2. The second end of the first voltage acquisition unit 10 and the second end of the second voltage acquisition unit 20 are connected to the first end of the power device 60. The signal output terminal OUT of the control unit 50 is connected to the control terminal of the power device 60, and the second end of the power device 60 is grounded. The first voltage acquisition unit 10 is used to acquire the voltage value V1 of the first node J1; The second voltage acquisition unit 20 is used to acquire the voltage value V2 of the second node J2; The first comparison unit 30 is used to output a first signal based on the comparison result between the voltage value V1 of the first node J1 and the first reference voltage value Vref1. The second comparison unit 40 is used to output a second signal based on the comparison result of the voltage value V2 of the second node J2 and the second reference voltage value Vref2. The control unit 50 is used to adjust the output signal according to the first signal and the second signal to achieve overvoltage protection for the power device 60.
[0031] In this embodiment, the control unit 50 can be a gate driver chip, which has a first signal input terminal Input1, a second signal input terminal Input2, and a signal output terminal OUT. The signal output terminal OUT is used to control the power device 60. When the power device 60 is turned off, the voltage value Vds between its two terminals (between the first terminal and the second terminal of the power device 60) is as follows: Figure 3As shown, when power device 60 is turned on, the voltage value Vds across it is the saturation voltage value Vsat. Subsequently, during the turn-off process, the voltage value Vds gradually increases. For example, the voltage value Vds may experience overcharging due to the influence of the loop inductance in the circuit (not shown in the figure), eventually reaching the DC bus voltage value Vdc. Before power device 60 starts to turn off, since the voltage value Vds across power device 60 is the saturation voltage value Vsat at this time, the voltage value of the first node J1 will be clamped by power device 60, and its magnitude is the sum of Vsat and the voltage drop of each component in the first voltage acquisition unit 10, which is taken as V1. At the same time, the voltage value of the second node J2 will also be clamped by power device 60, and its magnitude is the sum of Vsat and the voltage drop of each component in the second voltage acquisition unit 20, which is taken as V2. By setting Vcc2>Vcc1>>(V1, V2), before the power device 60 starts to turn off, the voltage value V2 of the first node J1 and the second node J2 is clamped at V1 and V2 respectively. The first reference voltage value Vref1 and the second reference voltage value Vref2 are set to be slightly lower than the voltage value Vcc1 of the first voltage source VCC1 and the voltage value Vcc2 of the second voltage source VCC2 respectively. When the voltage value V1 of the first node J1 and the voltage value V2 of the second node J2 are lower than the corresponding first reference voltage value Vref1 and the second reference voltage value Vref2 respectively, the first signal output by the first comparison unit 30 and the second comparison unit 40 is a low-level signal. That is to say, before the power device 60 starts to turn off, the first signal and the second signal input to the gate driver chip by the first comparison unit 30 and the second comparison unit 40 are both low-level signals. After the power device 60 starts its turn-off process, the voltage value Vds at both ends begins to rise, successively exceeding Vcc1 and Vcc2. The voltage value V1 of the first node J1 and the voltage value V2 of the second node J2 are no longer clamped by the power device 60. The voltage value V1 of the first node J1 and the voltage value V2 of the second node J2 rise to Vcc1 and Vcc2 respectively, which are higher than the reference voltage values of the corresponding comparison units. The signals input to the gate driver chip by the two comparison units change from low level signals to high level signals.
[0032] During the turn-off process of power device 60, when the voltage value Vds across the power device 60 reaches Vcc1, the voltage value V1 of the first node J1 is no longer clamped. When the voltage value V1 of the first node J1 reaches Vcc1, the first signal output by the first comparison unit 30 changes from a low-level signal to a high-level signal. The gate driver chip detects the change in port state through the first input signal terminal, and this is taken as the first time point T1 when the timer (not shown in the figure) starts counting. Since Vcc2 > Vcc1, the voltage value V2 of the second node J2 is still clamped, and the second signal output by the second comparison unit 40 is still a low-level signal. When the voltage value Vds across the power device 60 continues to rise to Vcc2, the second signal output by the second comparison unit 40 will change from a low-level signal to a high-level signal. The gate driver chip detects the port change moment through the second signal input terminal Input2 and takes it as the second time point T2 when the timer ends counting. Then, the absolute value of the difference between the second time point T2 and the first time point T1 is calculated as the time difference ΔT = |T2 - T1|. The absolute value of the difference between the voltage value Vcc2 of the second voltage source VCC2 and the voltage value Vcc1 of the first voltage source VCC1 is also calculated as the voltage difference ΔV = |Vcc2 - Vcc1|. Next, the ratio between the voltage difference ΔV and the time difference ΔT is calculated as the rising slope of the power device 60's turn-off voltage, dv / dt = ΔV / ΔT. Based on the rising slope, it is determined whether to adjust the output signal. Specifically, if the rising slope is less than or equal to a set rising slope (the set rising slope can be set according to actual conditions, and is not specifically limited here), the output signal is not adjusted. If the rising slope is greater than the set rising slope, it indicates that the power device 60's turn-off speed is too fast. In this case, the output signal is adjusted to reduce the output voltage or output current value at the control unit's signal output terminal, thereby reducing the power device's turn-off speed and turn-off voltage, thus achieving overvoltage protection for the power device.
[0033] Therefore, this disclosure eliminates the reliance on the breakdown voltage of the TVS diode for overvoltage protection of power devices, thereby improving the accuracy of overvoltage protection and enhancing the safety and stability of the electric drive system. Furthermore, in related technologies with active voltage clamping schemes, overvoltage detection occurs at the end of the turn-off process, often resulting in insufficient time for protection. In contrast, the overvoltage detection in this disclosure occurs at the initial stage of the turn-off process. By detecting the rising slope dv / dt of the power device's turn-off voltage, overvoltage is predicted, enabling earlier detection and response, resulting in better performance compared to traditional solutions.
[0034] Figure 4 This is a schematic diagram of an overvoltage protection circuit for a power device according to an embodiment of the present disclosure.
[0035] like Figure 4 As shown, the first voltage acquisition unit 10 includes: a first resistor R1 and a first diode D1; wherein, the first end of the first resistor R1 serves as the first end of the first voltage acquisition unit 10; the second end of the first resistor R1 is connected to the anode of the first diode D1, and the cathode of the first diode D1 serves as the second end of the first voltage acquisition unit 10.
[0036] like Figure 4 As shown, the second voltage acquisition unit 20 includes: a second resistor R2 and a second diode D2; wherein, the first end of the second resistor R2 serves as the first end of the second voltage acquisition unit 20; the second end of the second resistor R2 is connected to the anode of the second diode D2, and the cathode of the second diode D2 serves as the second end of the second voltage acquisition unit 20.
[0037] like Figure 4 As shown, the first comparison unit 30 includes: a first comparator COMP1; wherein, the non-inverting input terminal of the first comparator COMP1 serves as the second terminal of the first comparison unit 30; the inverting input terminal of the first comparator COMP1 receives a first reference voltage value Vref1; and the output terminal of the first comparator serves as the first terminal of the first comparison unit 30.
[0038] like Figure 4 As shown, the second comparison unit 40 includes: a second comparator COMP2; wherein, the non-inverting input terminal of the second comparator COMP2 serves as the second terminal of the second comparison unit 40; the inverting input terminal of the second comparator COMP2 receives the second reference voltage value Vref2; and the output terminal of the second comparator serves as the first terminal of the second comparison unit 40.
[0039] like Figure 4 As shown, the circuit also includes a third resistor R3 and a fourth resistor R4; wherein, the first end of the third resistor R3 is connected to the first node J1; the first end of the fourth resistor R4 is connected to the second node J2; and the second end of the third resistor R3 is connected to the second end of the fourth resistor R4 and then connected to the second end of the power device 60.
[0040] like Figure 4 As shown, the circuit also includes a fifth resistor R5; wherein, the first end of the fifth resistor R5 is connected to the output terminal OUT of the control unit 50, and the second end of the fifth resistor R5 is connected to the control terminal of the power device 60.
[0041] like Figure 4As shown, the power device 60 includes: a transistor S1 and a transient voltage suppressor diode (TVS); wherein, the first terminal of the transistor S1 is connected to the cathode of the transient voltage suppressor diode (TVS) and serves as the first terminal of the power device 60; the second terminal of the transistor S1 is connected to the anode of the transient voltage suppressor diode (TVS) and serves as the second terminal of the power device 60; the control terminal of the transistor S1 serves as the control terminal of the power device 60; wherein, the transistor S1 is an IGBT or a MOSFET.
[0042] In this embodiment, during the conduction of transistor S1, the voltage value V1 of the first node J1 is clamped to V1 by power device 60, where V1 = Vsat + V R1 +V D1 , where V R1 V is the voltage across the first resistor R1. D1 This represents the forward voltage drop of the first diode D1. Simultaneously, the voltage V2 at the second node J2 will also be clamped to V2 by the power device 60. V2 = Vsat + V R2 +V D2 , where V R2 V is the voltage across the second resistor R2. D2 Let V be the forward voltage drop of the second diode D2. At this time, the voltage value V1 of the first node J1 and the voltage value V2 of the second node J2 are lower than the corresponding first reference voltage value Vref1 and the second reference voltage value Vref2, respectively. The first signals output by the first comparator COMP1 and the second comparator COMP2 are both low-level signals.
[0043] During the turn-off process of transistor S1, when the voltage value Vds across transistor S1 reaches Vcc1, the voltage of the first node J1 is no longer clamped, and the voltage of the first node J1 reaches Vcc1. At this time, the first signal output by the first comparator COMP1 changes. Since Vcc2 > Vcc1, the voltage value V2 of the second node J2 is still clamped, and the second signal output by the second comparator unit 40 is still a low-level signal. When the voltage value Vds across transistor S1 continues to rise to Vcc2, the second signal output by the second comparator unit 40 will change. The control unit 50 calculates the time interval between the changes in the input signals at the first signal input terminal Input1 and the second signal input terminal Input2 as the time difference ΔT, and calculates the rising slope of the turn-off voltage of transistor S1 as dv / dt=ΔV / ΔT, where ΔV=Vcc2-Vcc1. If the rising slope dv / dt is greater than the set rising slope, it indicates that the turn-off speed of transistor S1 is too fast. At this time, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal to reduce the turn-off speed of the power device, thereby reducing the turn-off voltage.
[0044] In summary, the overvoltage protection circuit for the power device according to the embodiments of this disclosure comprises a first voltage acquisition unit, a second voltage acquisition unit, a first comparison unit, a second comparison unit, and a control unit. The first terminal of the first comparison unit is connected to the first signal input terminal of the control unit; the second terminal of the first comparison unit is connected to both a first voltage source and the first terminal of the first voltage acquisition unit to form a first node; the first terminal of the second comparison unit is connected to the second signal input terminal of the control unit; the second terminal of the second comparison unit is connected to both a second voltage source and the first terminal of the second voltage acquisition unit to form a second node; the second terminals of the first and second voltage acquisition units are connected to the first terminals of the power device; the signal output terminal of the control unit is connected to the control terminal of the power device; and the second terminal of the power device is grounded. The first voltage acquisition unit acquires the voltage value of the first node; the second voltage acquisition unit acquires the voltage value of the second node; the first comparison unit outputs a first signal based on the comparison result between the voltage value of the first node and a first reference voltage value; the second comparison unit outputs a second signal based on the comparison result between the voltage value of the second node and the second reference voltage value; and the control unit adjusts the output signal based on the first and second signals to achieve overvoltage protection for the power device. Therefore, this disclosure enables overvoltage protection of power devices without relying on the breakdown voltage of the TVS diode, improving the accuracy of overvoltage protection of power devices and enhancing the safety and stability of the electric drive system.
[0045] Figure 5 This is a flowchart of an overvoltage protection method based on an overvoltage protection circuit of a power device according to an embodiment of the present disclosure.
[0046] like Figure 5 As shown, the overvoltage protection method based on the overvoltage protection circuit of the power device in this disclosure includes the following steps: S501, acquire the first signal output by the first comparison unit. The first signal is a signal obtained by the first comparison unit based on the comparison result between the voltage value of the first node acquired by the first voltage acquisition unit and the first reference voltage value.
[0047] S502, acquire the second signal output by the second comparison unit. The second signal is obtained by the second comparison unit based on the comparison result between the voltage value of the second node acquired by the second voltage acquisition unit and the second reference voltage value.
[0048] S503 adjusts the output signal according to the first signal and the second signal to achieve overvoltage protection for power devices.
[0049] In one embodiment of this disclosure, adjusting the output signal according to a first signal and a second signal includes: When the first signal changes, acquire the first time point; When the second signal changes, acquire the second time point; Calculate the absolute value of the difference between the second time point and the first time point, and use it as the time difference. Calculate the absolute value of the difference between the voltage value of the second voltage source and the voltage value of the first voltage source, and use it as the voltage difference value; Calculate the ratio between the voltage difference and the time difference, and use it as the rising slope of the power device's turn-off voltage; The output signal is adjusted based on the rising slope.
[0050] In one embodiment of this disclosure, determining the output signal based on the rising slope includes: If the rising slope is greater than the set rising slope, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal.
[0051] It should be noted that for details not disclosed in the overvoltage protection method based on the overvoltage protection circuit of the power device in the embodiments of this disclosure, please refer to the details disclosed in the overvoltage protection circuit of the power device in the embodiments of this disclosure, which will not be repeated here.
[0052] According to the overvoltage protection method based on the power device overvoltage protection circuit of the present disclosure, a first signal output by a first comparison unit is first acquired. This first signal is obtained by the first comparison unit based on a comparison between the voltage value of a first node obtained by a first voltage acquisition unit and a first reference voltage value. Simultaneously, a second signal output by a second comparison unit is acquired. This second signal is obtained by the second comparison unit based on a comparison between the voltage value of a second node obtained by a second voltage acquisition unit and a second reference voltage value. Then, the output signal is adjusted based on the first and second signals to achieve overvoltage protection for the power device. Therefore, the present disclosure can achieve overvoltage protection for power devices without relying on the breakdown voltage value of the TVS diode, improving the accuracy of overvoltage protection for power devices and enhancing the safety and stability of the electric drive system.
[0053] Based on the above embodiments, this disclosure also proposes an electronic device.
[0054] The electronic device according to embodiments of this disclosure includes: a processor and a memory; The processor reads the executable program code stored in the memory to run the program corresponding to the executable program code, so as to use the overvoltage protection method of the power device-based overvoltage protection circuit mentioned above.
[0055] The electronic device of this disclosure, by adopting the above-described overvoltage protection method based on the overvoltage protection circuit of the power device, can achieve overvoltage protection of the power device without relying on the breakdown voltage value of the TVS tube, thereby improving the accuracy of overvoltage protection of the power device and enhancing the safety and stability of the electric drive system.
[0056] Based on the above embodiments, this disclosure also proposes a computer-readable storage medium.
[0057] The computer-readable storage medium of this disclosure stores a computer program that, when executed by a processor, implements the above-described overvoltage protection method based on a power device overvoltage protection circuit.
[0058] The computer-readable storage medium of this disclosure, by employing the above-described overvoltage protection method based on the overvoltage protection circuit of the power device, can achieve overvoltage protection of the power device without relying on the breakdown voltage value of the TVS tube, thereby improving the accuracy of overvoltage protection of the power device and enhancing the safety and stability of the electric drive system.
[0059] Based on the above embodiments, this disclosure also proposes a computer program product.
[0060] When the instruction processor in the computer program product of this disclosure embodiment is executed, the above-described overvoltage protection method based on the overvoltage protection circuit of the power device is executed.
[0061] The computer program product of this disclosure, by adopting the above-described overvoltage protection method based on the overvoltage protection circuit of power devices, can achieve overvoltage protection of power devices without relying on the breakdown voltage value of the TVS tube, thereby improving the accuracy of overvoltage protection of power devices and enhancing the safety and stability of the electric drive system.
[0062] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0063] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0064] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of preferred embodiments of this disclosure includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of this disclosure pertain.
[0065] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.
[0066] It should be understood that various parts of this disclosure can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0067] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.
[0068] Furthermore, the functional units in the various embodiments of this disclosure can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
[0069] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.
Claims
1. An overvoltage protection circuit for a power device, characterized in that, include: The system comprises a first voltage acquisition unit, a second voltage acquisition unit, a first comparison unit, a second comparison unit, and a control unit; wherein, a first terminal of the first comparison unit is connected to a first signal input terminal of the control unit, a second terminal of the first comparison unit is connected to a first voltage source and a first terminal of the first voltage acquisition unit to form a first node, a first terminal of the second comparison unit is connected to a second signal input terminal of the control unit, a second terminal of the second comparison unit is connected to a second voltage source and a first terminal of the second voltage acquisition unit to form a second node, a second terminal of the first voltage acquisition unit and a second terminal of the second voltage acquisition unit are connected to a first terminal of the power device, a signal output terminal of the control unit is connected to a control terminal of the power device, and a second terminal of the power device is grounded; The first voltage acquisition unit is used to acquire the voltage value of the first node; The second voltage acquisition unit is used to acquire the voltage value of the second node; The first comparison unit is configured to output a first signal based on the comparison result between the voltage value of the first node and the first reference voltage value; The second comparison unit is used to output a second signal based on the comparison result of the voltage value of the second node and the second reference voltage value; The control unit is used to adjust the output signal according to the first signal and the second signal to achieve overvoltage protection for the power device; Wherein, the control unit is used to adjust the output signal according to the first signal and the second signal, including: When the first signal changes, a first time point is obtained; When the second signal changes, a second time point is acquired; Calculate the absolute value of the difference between the second time point and the first time point, and use it as the time difference. Calculate the absolute value of the difference between the voltage value of the second voltage source and the voltage value of the first voltage source, and use it as the voltage difference. The ratio between the voltage difference and the time difference is calculated and used as the rising slope of the power device's turn-off voltage. The output signal is adjusted according to the rising slope.
2. The circuit according to claim 1, characterized in that, When the control unit adjusts the output signal according to the rising slope, it includes: If the rising slope is greater than the set rising slope, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal.
3. The circuit according to claim 1, characterized in that, The first voltage acquisition unit includes: a first resistor and a first diode; wherein, The first end of the first resistor serves as the first end of the first voltage acquisition unit. The second end of the first resistor is connected to the anode of the first diode, and the cathode of the first diode serves as the second end of the first voltage acquisition unit.
4. The circuit according to claim 1, characterized in that, The second voltage acquisition unit includes: a second resistor and a second diode; wherein, The first end of the second resistor serves as the first end of the second voltage acquisition unit; The second end of the second resistor is connected to the anode of the second diode, and the cathode of the second diode serves as the second end of the second voltage acquisition unit.
5. The circuit according to claim 1, characterized in that, The first comparison unit includes: a first comparator; wherein, The non-inverting input of the first comparator serves as the second terminal of the first comparison unit. The inverting input of the first comparator is used to input the first reference voltage value; The output of the first comparator serves as the first terminal of the first comparison unit.
6. The circuit according to claim 1, characterized in that, The second comparison unit includes: a second comparator; wherein, The non-inverting input of the second comparator serves as the second terminal of the second comparison unit; The inverting input of the second comparator is used to input the second reference voltage value; The output of the second comparator serves as the first terminal of the second comparison unit.
7. The circuit according to claim 1, characterized in that, Also includes: The third and fourth resistors; among which, The first end of the third resistor is connected to the first node; The first end of the fourth resistor is connected to the second node; The second end of the third resistor is connected to the second end of the fourth resistor, and then connected to the second end of the power device.
8. The circuit according to claim 1, characterized in that, Also includes: The fifth resistor; among which, The first end of the fifth resistor is connected to the output end of the control unit, and the second end of the fifth resistor is connected to the control end of the power device.
9. The circuit according to claim 1, characterized in that, The power device includes: a transistor and a transient voltage suppression diode; wherein, The first terminal of the transistor is connected to the cathode of the transient voltage suppression diode and serves as the first terminal of the power device. The second terminal of the transistor is connected to the anode of the transient voltage suppression diode and serves as the second terminal of the power device. The control terminal of the transistor serves as the control terminal of the power device. The transistor is either an IGBT or a MOS transistor.
10. An overvoltage protection method based on an overvoltage protection circuit of a power device as described in any one of claims 1-9, characterized in that, Includes the following steps: Acquire a first signal output by the first comparison unit; wherein the first signal is a signal obtained by the first comparison unit based on the comparison result between the voltage value of the first node obtained by the first voltage acquisition unit and the first reference voltage value; The second signal output by the second comparison unit is acquired; wherein the second signal is a signal obtained by the second comparison unit based on the comparison result between the voltage value of the second node acquired by the second voltage acquisition unit and the second reference voltage value; The output signal is adjusted according to the first signal and the second signal to achieve overvoltage protection for the power device; The step of adjusting the output signal based on the first signal and the second signal includes: When the first signal changes, a first time point is obtained; When the second signal changes, a second time point is acquired; Calculate the absolute value of the difference between the second time point and the first time point, and use it as the time difference. Calculate the absolute value of the difference between the voltage value of the second voltage source and the voltage value of the first voltage source, and use it as the voltage difference value; The ratio between the voltage difference and the time difference is calculated and used as the rising slope of the power device's turn-off voltage. The output signal is adjusted according to the rising slope.
11. The method according to claim 10, characterized in that, The adjustment of the output signal based on the rising slope includes: If the rising slope is greater than the set rising slope, the output voltage or output current value of the control unit's signal output terminal is reduced by adjusting the output signal.
12. An electronic device, characterized in that, include: Processor and memory; The processor reads executable program code stored in the memory to run a program corresponding to the executable program code, so as to implement the method as described in claim 10 or 11.
13. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in claim 10 or 11.
Citation Information
Patent Citations
Monitoring method of IGBT collector overvoltage double protection
CN101916985A
