A circuit for preventing the output of a transmitter from being externally high-voltage

Abstract

The application relates to a circuit for preventing high-voltage external connection of a transmitter output. The circuit comprises a first input end of the circuit for connecting a first output end of an input structure, a second input end of the circuit for connecting a second output end of the input structure, a third input end of the circuit for connecting a first end of a transmitter output structure, a first output end of the circuit for connecting a second end of the transmitter output structure, and a second output end of the circuit for connecting a third end of the transmitter output structure. The circuit can feed back a high-voltage external connection control signal to the transmitter output structure to protect the transmitter.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and in particular relates to a circuit for preventing external high voltage from being connected to the transmitter output. Background Technology

[0002] With the development of integrated circuit technology, differential bus communication technology has emerged for long-distance, high-reliability data exchange between devices. Utilizing differential signal transmission, it possesses excellent common-mode interference immunity and can effectively suppress noise in complex electromagnetic environments. Furthermore, in the implementation of the physical interface, the current mainstream approach involves a dedicated bus transmitter chip responsible for converting the single-ended digital signal generated by the controller into a differential analog signal and driving the physical cable. In traditional technology, the common approach to address the risk of transmitter damage due to ground potential differences is to rely on external discrete protection circuits. This involves connecting transient suppression diodes or varistors in parallel between the transmitter's signal line and ground to clamp high-voltage spikes; or connecting RC networks or thermistors in series in the data path to limit inrush current. These external components are designed to bypass or absorb externally introduced overvoltage and overcurrent energy, providing a buffer for the internal transmitter chip. However, when the communication device and the remote device are connected to power outlets in different locations, a significant potential difference may exist between the ground wires of the two devices. Especially in industrial environments, the start-up and shutdown of high-power equipment can cause ground noise and potential fluctuations, and this potential difference is directly applied to the transmitter's connection lines. Since the signal ground and power ground of the transmitter chip are usually connected, this external high voltage can surge directly into the transmitter through the ground wire, far exceeding its typical withstand voltage range, causing the transmitter to burn out instantly. Summary of the Invention

[0003] Therefore, it is necessary to provide a circuit that protects the transmitter from external high voltage when it is subjected to an inrush of external high voltage, in order to address the above-mentioned technical problems.

[0004] In a first aspect, this application provides a circuit for use in an integrated circuit, the integrated circuit including an input structure, a transmitter output structure, and a circuit for preventing external high voltage from being applied to the transmitter output, wherein the circuit for preventing external high voltage from being applied to the transmitter output includes:

[0005] The first input terminal of the circuit for preventing external high voltage from the transmitter output is used to connect to the first output terminal of the input structure. The second input terminal of the circuit for preventing external high voltage from the transmitter output is used to connect to the second output terminal of the input structure. The third input terminal of the circuit for preventing external high voltage from the transmitter output is used to connect to the first terminal of the transmitter output structure. The first output terminal of the circuit for preventing external high voltage from the transmitter output is used to connect to the second terminal of the transmitter output structure. The second output terminal of the circuit for preventing external high voltage from the transmitter output is used to connect to the third terminal of the transmitter output structure. This circuit is used to receive the voltage at the first terminal of the transmitter output structure and to feed back the external high voltage control signal to the transmitter output structure.

[0006] Furthermore, the circuit for preventing the transmitter output from being connected to an external high voltage includes:

[0007] The external positive high voltage protection module has a first input terminal for connecting to the first output terminal of the input structure, a second input terminal for connecting to the first terminal of the transmitter output structure, and an output terminal for connecting to the second terminal of the transmitter output structure, which is used to feed back the external positive high voltage control signal to the transmitter output structure.

[0008] Furthermore, the protection against external positive high voltage modules includes:

[0009] The first transistor has its source connected to a voltage source and its gate connected to the first terminal of the transmitter output structure.

[0010] The second transistor has its source connected to the first terminal of the transmitter output structure, its gate connected to a voltage source, and its drain connected to the drain of the first transistor.

[0011] The source of the third transistor is used to connect to the first terminal of the transmitter output structure, and the gate of the third transistor is used to ground.

[0012] The first resistor has its first end connected to the drain of the third transistor and its second end connected to the gate of the third transistor and used for grounding.

[0013] The fourth transistor has its source connected to the drain of the first transistor and the drain of the second transistor. Its gate is used to connect to the first output terminal of the input structure, and its drain is used to connect to the second terminal of the transmitter output structure.

[0014] The fifth transistor has its source connected to the drain of the third transistor and the first terminal of the first resistor. The gate of the fifth transistor is used to connect to the positive threshold voltage. The drain of the fifth transistor is used to connect to the second terminal of the transmitter output structure and the drain of the fourth transistor.

[0015] The second resistor has its first end connected to the drain of the fourth transistor, the drain of the fifth transistor, and the second end of the transmitter output structure.

[0016] The sixth transistor has its drain connected to the second terminal of the second resistor, its gate connected to the gate of the fourth transistor and the first output terminal of the input structure, and its source grounded.

[0017] Among them, the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are PMOS transistors, and the sixth transistor is an NMOS transistor.

[0018] Furthermore, protection against external positive high-voltage circuits includes:

[0019] The external negative high voltage protection module has a first input terminal for connecting to the second output terminal of the input structure, a second input terminal for connecting to the first terminal of the transmitter output structure, and an output terminal for connecting to the third terminal of the transmitter output structure, which is used to feed back the external negative high voltage control signal to the transmitter output structure.

[0020] Furthermore, the protection against external negative high voltage modules includes:

[0021] The source of the seventh transistor is used to connect to the first terminal of the transmitter output structure, and the gate of the seventh transistor is used to ground.

[0022] The eighth transistor has its source grounded, its gate connected to the first terminal of the transmitter output structure, and its drain connected to the drain of the seventh transistor.

[0023] The ninth transistor has its source connected to the first terminal of the transmitter output structure and its gate grounded.

[0024] The third resistor has its first end connected to the gate of the ninth transistor and used for grounding, while its second end is connected to the drain of the ninth transistor.

[0025] The tenth transistor has its source connected to the drain of the seventh transistor and the drain of the eighth transistor. Its gate is used to connect to the second output terminal of the input structure, and its drain is used to connect to the third terminal of the transmitter output structure.

[0026] The eleventh transistor has its source connected to the drain of the ninth transistor and the second terminal of the third resistor, and its gate connected to the negative threshold voltage. The drain of the eleventh transistor is connected to the drain of the tenth transistor and the third terminal of the transmitter output structure.

[0027] The fourth resistor, the first end of which is used to connect the third terminal of the transmitter output structure, the drain of the tenth transistor, and the drain of the eleventh transistor.

[0028] The twelfth transistor has its drain connected to the second terminal of the fourth resistor, its gate connected to the gate of the tenth transistor and the second output terminal of the input structure, and its source used for grounding.

[0029] Among them, the seventh, eighth, ninth, tenth, and eleventh transistors are NMOS transistors, and the twelfth transistor is a PMOS transistor.

[0030] The aforementioned circuit for preventing external high voltage at the transmitter output, wherein the first input terminal of the circuit is connected to the first output terminal of the input structure, the second input terminal of the circuit is connected to the second output terminal of the input structure, the third input terminal of the circuit is connected to the first terminal of the transmitter output structure, the first output terminal of the circuit is connected to the second terminal of the transmitter output structure, and the second output terminal of the circuit is connected to the third terminal of the transmitter output structure, is capable of receiving the voltage at the first terminal of the transmitter output structure and feeding back the external high voltage control signal to the transmitter output structure, thereby achieving overvoltage protection when excessive or insufficient voltage occurs in the transmitter. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 A schematic diagram of a circuit structure for preventing external high voltage from being connected to the transmitter output, provided in an embodiment of the present invention;

[0033] Figure 2 A schematic diagram of a circuit structure for preventing external high voltage from being connected to the transmitter output, provided in an embodiment of the present invention;

[0034] Figure 3 A schematic diagram of a circuit structure for preventing external high voltage from being connected to the transmitter output, provided in an embodiment of the present invention;

[0035] Figure 4 This is a schematic diagram of a circuit structure for preventing external high voltage from being connected to the transmitter output, provided as an embodiment of the present invention. Detailed Implementation

[0036] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0038] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0039] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0040] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0041] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0042] In one embodiment, such as Figure 1 As shown, a circuit 100 for preventing external high voltage from the transmitter output is provided. This circuit 100 is applied to an integrated circuit. The integrated circuit includes an input structure, a transmitter output structure, and the circuit 100 for preventing external high voltage from the transmitter output. The circuit for preventing external high voltage from the transmitter output includes:

[0043] The first input terminal of the circuit 100 for preventing external high voltage output from the transmitter is used to connect to the first output terminal of the input structure. The second input terminal of the circuit 100 for preventing external high voltage output from the transmitter is used to connect to the second output terminal of the input structure. The third input terminal of the circuit 100 for preventing external high voltage output from the transmitter is used to connect to the first terminal of the transmitter output structure. The first output terminal of the circuit 100 for preventing external high voltage output from the transmitter is used to connect to the second terminal of the transmitter output structure. The second output terminal of the circuit 100 for preventing external high voltage output from the transmitter is used to connect to the third terminal of the transmitter output structure. This circuit is used to receive the voltage at the first terminal of the transmitter output structure and to feed back the external high voltage control signal to the transmitter output structure.

[0044] The third output terminal of the input structure is used to connect to the fourth terminal of the transmitter output structure.

[0045] The circuit for preventing external high voltage at the transmitter output receives control signals from the input structure and feedback signals from the transmitter output structure. When the voltage of the feedback signal from the transmitter output structure exceeds the operating range of the integrated circuit, the circuit for preventing external high voltage at the transmitter output sends an external high voltage control signal to the transmitter output structure to provide feedback that the current operating state is not within the operating range. After receiving the external high voltage control signal, the transmitter output structure protects itself to prevent external high voltage from damaging the internal circuit of the integrated circuit.

[0046] This embodiment provides a circuit for preventing external high voltage from being applied to the transmitter output. The first input terminal of this circuit is connected to the first output terminal of the input structure. The second input terminal is connected to the second output terminal of the input structure. The third input terminal is connected to the first terminal of the transmitter output structure. The first output terminal is connected to the second terminal of the transmitter output structure. The second output terminal is connected to the third terminal of the transmitter output structure. Through this structure, the voltage at the first terminal of the transmitter output structure can be received, and an external high voltage control signal can be fed back to the transmitter output structure, thereby achieving overvoltage protection when excessive or insufficient voltage occurs in the transmitter.

[0047] In one embodiment, such as Figure 2 As shown, the circuit 100 for preventing the transmitter from outputting an external high voltage includes:

[0048] The external positive high voltage protection module 110 has a first input terminal for connecting to the first output terminal of the input structure, a second input terminal for connecting to the first terminal of the transmitter output structure, and an output terminal for connecting to the second terminal of the transmitter output structure, for feeding back the external positive high voltage control signal to the transmitter output structure.

[0049] The external positive high voltage protection module receives a first control signal from the input structure and a feedback signal from the transmitter output structure. It then sends an external positive high voltage control signal to the transmitter output structure. When the voltage of the feedback signal from the transmitter output structure exceeds the upper limit of the positive high voltage of the integrated circuit, the external positive high voltage protection module sends the external positive high voltage control signal to the transmitter output structure. This signal is used to indicate that the current operating state exceeds the upper limit of the positive voltage operating range. After receiving the external positive high voltage control signal, the transmitter output structure maintains the output voltage at a fixed level by transitioning the internal P-type output power transistor from the linear region to the saturation region, thereby protecting the integrated circuit from damage caused by the external positive high voltage.

[0050] This embodiment provides an external positive high voltage protection module, which enables the function of reporting abnormal operating status when the transmitter output structure outputs a positive high voltage that exceeds the operating range, thereby avoiding the risk of integrated circuit damage under positive high voltage.

[0051] In this embodiment, the external positive high voltage protection circuit 100 further includes:

[0052] The external negative high voltage protection module 120 has a first input terminal for connecting to the second output terminal of the input structure, a second input terminal for connecting to the first terminal of the transmitter output structure, and an output terminal for connecting to the third terminal of the transmitter output structure, for feeding back the external negative high voltage control signal to the transmitter output structure.

[0053] The external negative high voltage protection module receives a second control signal from the input structure and a feedback signal from the transmitter output structure. It then feeds back an external negative high voltage control signal to the transmitter output structure. When the voltage of the feedback signal from the transmitter output structure is lower than the negative high voltage lower limit of the integrated circuit, the external negative high voltage protection module sends the external negative high voltage control signal to the transmitter output structure. This is used to indicate that the current operating state is below the lower limit of the negative voltage operating range. After receiving the external negative high voltage control signal, the transmitter output structure transitions its internal N-type output power transistor from the linear region to the saturation region, thereby suppressing the increase of the external negative voltage and protecting itself from damage to the internal circuitry of the integrated circuit caused by the external negative high voltage.

[0054] This embodiment provides an external negative high voltage protection module, which enables the function of reporting abnormal operating status when the transmitter output structure outputs a negative high voltage that exceeds the operating range, thereby avoiding the risk of integrated circuit damage under negative high voltage.

[0055] In one embodiment, such as Figure 3 As shown, the external positive high voltage protection module 110 includes:

[0056] The first transistor has its source connected to a voltage source and its gate connected to the first terminal of the transmitter output structure.

[0057] The first end of the transmitter output structure is used to send the feedback signal to the gate of the first transistor. The voltage source is a fixed voltage, which is used to provide a reference turn-on voltage so that the first transistor turns on when the received feedback signal is not an external high voltage signal.

[0058] The second transistor has its source connected to the first terminal of the transmitter output structure, its gate connected to a voltage source, and its drain connected to the drain of the first transistor.

[0059] In this design, the first terminal of the transmitter output structure sends the feedback signal to the source of the second transistor, whose gate is connected to a fixed voltage source. When the received feedback signal is an external positive high-voltage signal, the second transistor gradually turns on, while the first transistor turns off. The second and first transistors work together to achieve voltage selection, enabling the determination of whether the feedback signal is an external positive high-voltage signal based on the fixed voltage source. When the feedback signal is negative, the first transistor turns on, outputting the fixed voltage source voltage, and the second transistor turns off. When the feedback signal voltage is greater than the turn-on voltage of one PMOS transistor in the fixed voltage source, the feedback signal is determined to be an external positive high-voltage signal, the second transistor turns on, outputting the external positive high-voltage signal voltage, and the first transistor turns off.

[0060] The source of the third transistor is used to connect to the first terminal of the transmitter output structure, and the gate of the third transistor is used to ground.

[0061] The source of the third transistor receives the feedback signal, and its gate is grounded. When the feedback signal is negative, the third transistor is turned off to prevent negative voltage from entering the circuit and causing circuit damage.

[0062] The first resistor has its first end connected to the drain of the third transistor, and its second end connected to the gate of the third transistor and used for grounding.

[0063] Specifically, the first resistor and the third transistor work together to fix the voltage drop of the feedback signal when the feedback signal is an external positive high voltage signal, thereby limiting the drain current of the third transistor and achieving current limiting protection.

[0064] The fourth transistor has its source connected to the drain of the first transistor and the drain of the second transistor. Its gate is used to connect to the first output terminal of the input structure, and its drain is used to connect to the second terminal of the transmitter output structure.

[0065] In this design, the source of the fourth transistor receives the outputs of the first and second transistors, namely the voltage of a fixed voltage source or an external positive high-voltage signal. The gate of the fourth transistor receives a first control signal from the first output terminal of the input structure. This first control signal controls the turn-on and turn-off of the fourth transistor. For example, if the voltage of the first control signal is greater than the voltage of the fixed voltage source but less than the voltage of the external positive high-voltage signal, then the fourth transistor is turned off when its source receives the voltage of the fixed voltage source; and turned on when it receives the external positive high-voltage signal. The drain of the fourth transistor is connected to the second terminal of the transmitter output structure, used to output the external positive high-voltage control signal to the transmitter output structure.

[0066] The fifth transistor has its source connected to the drain of the third transistor and the first terminal of the first resistor. The gate of the fifth transistor is used to connect to the positive threshold voltage. The drain of the fifth transistor is used to connect to the second terminal of the transmitter output structure and the drain of the fourth transistor.

[0067] The forward threshold voltage, denoted by VP, is the upper limit of the circuit's voltage under normal operating conditions. The source of the fifth transistor is connected to the drain of the third transistor, receiving an external forward high-voltage signal that has been stepped down by the third transistor and the first resistor. The gate of the fifth transistor is connected to the forward threshold voltage. When the stepped-down external forward high-voltage signal exceeds the forward threshold voltage, the fifth transistor conducts, outputting an external forward high-voltage control signal to the transmitter output structure. By adjusting the voltage of the first control signal, the fifth and fourth transistors should conduct simultaneously, controlling the output external forward high-voltage control signal to a high level. This drives the PMOS transistor in the transmitter output structure into the cutoff region, thereby controlling the output voltage of the transmitter output structure to remain within a safe range and protecting the internal circuitry.

[0068] The second resistor has its first end connected to the drain of the fourth transistor, the drain of the fifth transistor, and the second end of the transmitter output structure.

[0069] The second resistor is used to protect the circuit when the fourth and fifth transistors output a high level.

[0070] The sixth transistor has its drain connected to the second terminal of the second resistor, its gate connected to the gate of the fourth transistor and the first output terminal of the input structure, and its source grounded.

[0071] Specifically, the sixth transistor is an NMOS transistor with its source grounded and its gate receiving the first control signal, and is in the on state. When the outputs of the fourth and fifth transistors are high, the drain voltage is greater than the source voltage, so the current flows from the drain to the source, and then to the ground. When the fourth and fifth transistors are not on, that is, when the feedback signal is not an external positive high voltage signal, the output of the anti-external positive high voltage module is grounded.

[0072] Among them, the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are PMOS transistors, and the sixth transistor is an NMOS transistor.

[0073] In this embodiment, the circuit with the above structure determines that the circuit is operating within the normal voltage range when the voltage of the feedback signal is less than the preset positive threshold voltage, preventing the external positive high voltage module from outputting a ground level. When the voltage of the feedback signal is greater than the positive threshold voltage, the circuit is determined to be operating under positive high voltage conditions. The first transistor is turned off, and the second, third, fourth, and fifth transistors are turned on, preventing the external positive high voltage module from outputting a high level. This drives the P-type power output transistor in the transmitter output structure to transition from the linear region to the saturation region, suppressing the increase of the external voltage. This ensures the safety of the internal circuit while maintaining the efficiency of the transmitter.

[0074] In one embodiment, such as Figure 4 As shown, the external negative high voltage protection module 120 includes:

[0075] The seventh transistor has its source connected to the first terminal of the transmitter output structure, and its gate grounded.

[0076] The source of the seventh transistor is used to receive the feedback signal, and the gate is grounded. When the feedback signal is negative, the seventh transistor is turned on and outputs the feedback signal to the drain of the seventh transistor.

[0077] The eighth transistor has its source grounded, its gate connected to the first terminal of the transmitter output structure, and its drain connected to the drain of the seventh transistor.

[0078] Specifically, the source of the eighth transistor is grounded, and its gate receives the feedback signal. When the eighth transistor is on, the seventh transistor is off; when the eighth transistor is off, the seventh transistor is on. When the feedback signal is a non-negative voltage, the eighth transistor is on, and the output is ground level. The structure composed of the eighth and seventh transistors also implements a voltage selection function, used to select whether the output voltage is ground level or the feedback signal.

[0079] The ninth transistor has its source connected to the first terminal of the transmitter output structure, and its gate grounded.

[0080] The third resistor has its first end connected to the gate of the ninth transistor and used for grounding, while its second end is connected to the drain of the ninth transistor.

[0081] The ninth transistor conducts when the feedback signal is negative, and together with the third resistor, it reduces the input feedback signal to protect the subsequent transistors from damage.

[0082] The tenth transistor has its source connected to the drain of the seventh transistor and the drain of the eighth transistor. Its gate is used to connect to the second output terminal of the input structure, and its drain is used to connect to the third terminal of the transmitter output structure.

[0083] Specifically, the gate of the tenth transistor is used to receive the second control signal, and the source receives the signal selected by the seventh and eighth transistors. When it is at ground level, the tenth transistor is turned off. When it is a feedback signal, the magnitude of the second control signal and the feedback signal are compared. If the negative voltage of the second control signal is greater, the tenth transistor is turned off. If the negative voltage of the feedback signal is greater, the feedback signal is an external negative high voltage signal, and the tenth transistor is turned on.

[0084] The eleventh transistor has its source connected to the drain of the ninth transistor and the second terminal of the third resistor, and its gate connected to the negative threshold voltage. The drain of the eleventh transistor is connected to the drain of the tenth transistor and the third terminal of the transmitter output structure.

[0085] The negative threshold voltage, denoted by VN, represents the upper limit of the negative high voltage that the circuit can receive under normal operating conditions. By controlling the magnitude of the second control signal, the eleventh and tenth transistors are made to have the same conduction state, so that the output of the external negative high voltage protection module is at a low level. This drives the NMOS transistor in the transmitter output structure into the cutoff region, thereby controlling the output voltage of the transmitter output structure to remain within a safe range and protecting the internal circuit.

[0086] The fourth resistor, the first end of which is used to connect the third terminal of the transmitter output structure, the drain of the tenth transistor, and the drain of the eleventh transistor.

[0087] Specifically, the fourth resistor is used to protect the circuit when the outputs of the tenth and eleventh transistors are low.

[0088] The twelfth transistor has its drain connected to the second terminal of the fourth resistor, its gate connected to the gate of the tenth transistor and the second output terminal of the input structure, and its source grounded.

[0089] The source of the twelfth transistor is grounded and is at a low level. The gate of the twelfth transistor is connected to the second control signal, which is a negative voltage. The twelfth transistor is in the on state. When the negative voltage output by the tenth and eleventh transistors is too large, it provides a path to ground to protect the circuit. When the tenth and eleventh transistors are turned off, the output of the external negative high voltage module is clamped to the ground level.

[0090] Among them, the seventh, eighth, ninth, tenth, and eleventh transistors are NMOS transistors, and the twelfth transistor is a PMOS transistor.

[0091] In this embodiment, the circuit is determined to be operating within the normal voltage range when the negative voltage of the feedback signal is less than the preset negative threshold voltage, preventing the external negative high voltage module from outputting a ground level. When the negative voltage of the feedback signal is greater than the negative threshold voltage, the circuit is determined to be operating under negative high voltage conditions. The eighth transistor is turned off, and the seventh, ninth, tenth, and eleventh transistors are turned on, preventing the external positive high voltage module from outputting a low level. This drives the N-type power output transistor in the transmitter output structure to transition from the linear region to the saturation region, suppressing the increase of the external negative voltage. This ensures the safety of the internal circuit while maintaining the efficiency of the transmitter.

[0092] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0093] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] The above-described embodiments are merely illustrative of several implementation methods of the embodiments of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the embodiments of this application, and these modifications and improvements all fall within the protection scope of the embodiments of this application.

Claims

1. A circuit for preventing external high voltage from being connected to the transmitter output, characterized in that, This is applied to an integrated circuit, which includes an input structure, a transmitter output structure, and a circuit for preventing external high voltage from being connected to the transmitter output. The circuit for preventing external high voltage from being connected to the transmitter output includes: The first input terminal of the circuit for preventing external high voltage output from the transmitter is used to connect to the first output terminal of the input structure. The second input terminal of the circuit for preventing external high voltage output from the transmitter is used to connect to the second output terminal of the input structure. The third input terminal of the circuit for preventing external high voltage output from the transmitter is used to connect to the first terminal of the transmitter output structure. The first output terminal of the circuit for preventing external high voltage output from the transmitter is used to connect to the second terminal of the transmitter output structure. The second output terminal of the circuit for preventing external high voltage output from the transmitter is used to connect to the third terminal of the transmitter output structure. This circuit is used to receive the voltage at the first terminal of the transmitter output structure and to feed back the external high voltage control signal to the transmitter output structure.

2. The circuit for preventing external high voltage output from the transmitter according to claim 1, characterized in that, The circuit for outputting external high voltage to the transmitter includes: An external positive high voltage protection module is provided, wherein the first input terminal of the external positive high voltage protection module is used to connect to the first output terminal of the input structure, the second input terminal of the external positive high voltage protection module is used to connect to the first terminal of the transmitter output structure, and the output terminal of the external positive high voltage protection module is used to connect to the second terminal of the transmitter output structure, for feeding back the external positive high voltage control signal to the transmitter output structure.

3. The circuit for preventing external high voltage output from the transmitter according to claim 2, characterized in that, The external positive high voltage protection module includes: The first transistor has its source connected to a voltage source and its gate connected to the first terminal of the transmitter output structure. The second transistor has its source connected to the first terminal of the transmitter output structure, its gate connected to the voltage source, and its drain connected to the drain of the first transistor. The third transistor has its source connected to the first terminal of the transmitter output structure and its gate grounded. A first resistor, the first end of which is connected to the drain of the third transistor, and the second end of which is connected to the gate of the third transistor and used for grounding; The fourth transistor has its source connected to the drain of the first transistor and the drain of the second transistor, its gate connected to the first output terminal of the input structure, and its drain connected to the second terminal of the transmitter output structure. The fifth transistor has its source connected to the drain of the third transistor and the first terminal of the first resistor, its gate connected to the positive threshold voltage, and its drain connected to the second terminal of the transmitter output structure and the drain of the fourth transistor. The second resistor has its first end connected to the drain of the fourth transistor, the drain of the fifth transistor, and the second end of the transmitter output structure. The sixth transistor has its drain connected to the second terminal of the second resistor, its gate connected to the gate of the fourth transistor and the first output terminal of the input structure, and its source grounded. The first, second, third, fourth, and fifth transistors are PMOS transistors, and the sixth transistor is an NMOS transistor.

4. The circuit for preventing external high voltage output from the transmitter according to claim 1, characterized in that, The circuit for preventing external positive high voltage includes: An external negative high voltage protection module is provided, wherein the first input terminal of the external negative high voltage protection module is used to connect to the second output terminal of the input structure, the second input terminal of the external negative high voltage protection module is used to connect to the first terminal of the transmitter output structure, and the output terminal of the external negative high voltage protection module is used to connect to the third terminal of the transmitter output structure, for feeding back the external negative high voltage control signal to the transmitter output structure.

5. The circuit for preventing external high voltage output from the transmitter according to claim 4, characterized in that, The external negative high voltage protection module includes: The seventh transistor has its source connected to the first terminal of the transmitter output structure and its gate grounded. The eighth transistor has its source grounded, its gate connected to the first terminal of the transmitter output structure, and its drain connected to the drain of the seventh transistor. The ninth transistor has its source connected to the first terminal of the transmitter output structure and its gate grounded. The third resistor has its first end connected to the gate of the ninth transistor and used for grounding, and its second end connected to the drain of the ninth transistor. The tenth transistor has its source connected to the drain of the seventh transistor and the drain of the eighth transistor, its gate connected to the second output terminal of the input structure, and its drain connected to the third terminal of the transmitter output structure. The eleventh transistor has its source connected to the drain of the ninth transistor and the second terminal of the third resistor, and its gate connected to the negative threshold voltage; the drain of the eleventh transistor is connected to the drain of the tenth transistor and the third terminal of the transmitter output structure. The fourth resistor, the first end of which is used to connect the third end of the transmitter output structure, the drain of the tenth transistor, and the drain of the eleventh transistor; The twelfth transistor has its drain connected to the second terminal of the fourth resistor, its gate connected to the gate of the tenth transistor and the second output terminal of the input structure, and its source grounded. Among them, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor are NMOS transistors, and the twelfth transistor is a PMOS transistor.

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