Semiconductor oxidation prevention test method and apparatus
By using a film layer to cover the unit under test and expelling air in semiconductor testing, the problems of low detection efficiency and high cost caused by nitrogen filling are solved, achieving efficient and low-cost detection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SIDEA SEMICON EQUIP (SHENZHEN) CO LTD
- Filing Date
- 2023-08-11
- Publication Date
- 2026-07-03
Smart Images

Figure CN117148084B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor oxidation prevention testing method and semiconductor oxidation prevention testing equipment. Background Technology
[0002] Semiconductor testing requires the use of probes to contact the solder joints or electrodes of the unit under test (wafer, IC, or PCBA, etc.), and high currents are often used in the testing process. As products become smaller and smaller, the size of the solder joints is now tens of micrometers, and the spacing between the solder joints is also very small. To ensure accurate probe insertion, the probe tips are becoming increasingly fine, and the spacing between the tip groups is also very small.
[0003] During product testing (especially high-current testing), the thin tip of the test probe comes into contact with the test electrode and the bonding pad, causing a point discharge arcing phenomenon. During the discharge process, oxygen in the air combines with the electrode and probe surfaces, forming an oxide film on the probe and electrode surfaces. The oxidation of the electrodes has a significant impact on the reliability of subsequent soldering processes.
[0004] In existing technologies, nitrogen protection is commonly used during testing to address discharge issues. Current nitrogen protection methods typically employ two approaches. The first involves creating a nitrogen environment within the test space. The entire test system is housed in a relatively sealed cavity. During testing, the sample under test is placed on a stage, and then the cavity is filled with nitrogen. To ensure adequate nitrogen concentration, the flow rate and duration of nitrogen filling are carefully controlled, and a high nitrogen concentration is required. Larger test samples necessitate larger cavities and longer filling times to ensure sufficient nitrogen concentration. This method is insufficient for high-efficiency testing. The second approach involves filling the test unit with nitrogen from above and simultaneously spraying nitrogen onto the test location. This requires sufficiently smooth movement of the test unit, limiting its speed. Furthermore, the airflow velocity is affected by temperature, requiring temperature-controlled testing and adjustment. Excessive movement speed or nitrogen flow rate can cause air disturbance, leading to insufficient nitrogen concentration. Both methods require high nitrogen capacity and cost. Summary of the Invention
[0005] The main objective of this invention is to provide a semiconductor oxidation prevention testing method and semiconductor oxidation prevention testing equipment, aiming to solve the technical problems of low detection efficiency and high detection cost caused by the need for constant temperature adjustment before testing when using nitrogen filling in the prior art.
[0006] To achieve the above objectives, the present invention proposes a semiconductor oxidation resistance testing method, the semiconductor oxidation resistance testing method comprising:
[0007] Multiple test units are configured on the top surface of the test sample;
[0008] A first film layer is provided on the top surface of the sample to be tested, and the first film layer covers all the multiple test units on the sample to be tested;
[0009] The air between the first film layer and the sample to be tested is squeezed out;
[0010] The test probe is passed through the first membrane layer and brought into contact with the unit under test for detection until all the units under test on the test sample have been tested.
[0011] Optionally, the step of providing a first film layer on the top surface of the sample to be tested, and ensuring that the first film layer completely covers all the multiple test units on the sample to be tested, includes:
[0012] Apply adhesive to the top surface of the sample to be tested;
[0013] The sample is left to stand for a preset time to allow the adhesive to cover the edges of the sample under test, all the test units on the sample under test, and the gaps between any two adjacent test units, in order to form the first film layer.
[0014] Optionally, after the step of allowing the adhesive to remain still for a preset time to cover the edges of the test sample, all the test units on the test sample, and the gaps between any two adjacent test units, the method further includes:
[0015] The adhesive is then cured.
[0016] Optionally, the step of providing a first film layer on the top surface of the sample to be tested, and ensuring that the first film layer completely covers all the multiple test units on the sample to be tested, includes:
[0017] Obtain the position information of all the units to be tested on the sample to be tested;
[0018] According to the location information, adhesive is applied to all the test units on the test sample to form multiple first film layers for covering the test units.
[0019] Optionally, the first film layer is an insulating and flame-retardant flexible film or an insulating and flame-retardant flexible adhesive.
[0020] Optionally, after the step of providing a first film layer on the top surface of the test sample and ensuring that the first film layer completely covers all the test units on the test sample, the method further includes:
[0021] A second film layer is disposed at the bottom of the sample to be tested, so that the first film layer and the second film layer cover the sample to be tested.
[0022] Optionally, after the step of passing the test probe through the first membrane layer and contacting the unit under test for detection until all the units under test on the test sample have been detected, the method further includes:
[0023] The first film layer and / or the second film layer on the sample to be tested are cleaned.
[0024] Optionally, the step of cleaning the first film layer and / or the second film layer on the test sample includes:
[0025] The first film layer and / or the second film layer are irradiated with a UV lamp to reduce the viscosity of the first film layer and / or the second film layer.
[0026] The first and / or second film layers, after viscosity reduction, are peeled off from the test sample.
[0027] Optionally, the step of arranging multiple test units on the top surface of the test template includes:
[0028] Multiple test units are arranged in a matrix on the top surface of the test sample.
[0029] Furthermore, to address the aforementioned problems, this invention also proposes a semiconductor oxidation prevention testing device. This device applies the semiconductor oxidation prevention testing method described above, and includes:
[0030] The test platform is used to place the sample to be tested;
[0031] A test probe, which is movably positioned above the test platform.
[0032] This invention protects the test sample and the test unit on it by forming a first film layer on the test sample. Furthermore, it eliminates air between the first film layer and the test sample, preventing the test probe from discharging during testing and from reacting with oxygen to form an oxide film. This eliminates the need for nitrogen, eliminates the need for testing and debugging, and is suitable for inter-process storage, long-term storage, and long-distance transportation. It saves production costs and improves testing efficiency. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0034] Figure 1 This is a schematic flowchart of the first embodiment of the semiconductor anti-oxidation testing method of the present invention;
[0035] Figure 2 This is a flowchart illustrating the second embodiment of the semiconductor anti-oxidation testing method of the present invention;
[0036] Figure 3 This is a flowchart illustrating the third embodiment of the semiconductor anti-oxidation testing method of the present invention;
[0037] Figure 4 This is a flowchart illustrating the fourth embodiment of the semiconductor anti-oxidation testing method of the present invention;
[0038] Figure 5 This is a flowchart illustrating the fifth embodiment of the semiconductor anti-oxidation testing method of the present invention;
[0039] Figure 6 This is a schematic diagram of the first embodiment of the semiconductor anti-oxidation test plate in the present invention;
[0040] Figure 7 This is a schematic diagram of the second embodiment of the semiconductor anti-oxidation test method of the present invention;
[0041] Figure 8 This is a schematic diagram of the third embodiment of the semiconductor anti-oxidation test method of the present invention;
[0042] Figure 9 This is a schematic diagram of the fourth embodiment of the semiconductor anti-oxidation test method of the present invention.
[0043] Explanation of icon numbers:
[0044] label name label name 10 Sample to be tested 11 Unit under test 20 First membrane layer 40 Second film layer 30 test needle
[0045] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0047] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.
[0048] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0049] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0050] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.
[0051] This invention proposes a semiconductor oxidation protection testing method, please refer to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the semiconductor oxidation prevention testing method of the present invention. The semiconductor oxidation prevention testing method includes the following steps:
[0052] Step S10: Arrange multiple test units 11 on the top surface of the test sample 10;
[0053] Step S20: A first film layer 20 is provided on the top surface of the test sample 10, and the first film layer 20 covers all the multiple test units 11 on the test sample 10.
[0054] Step S30: Expel the air between the first film layer 20 and the test sample 10;
[0055] Step S40: Pass the test needle 30 through the first film layer 20 and abut against the unit under test 11 for testing until all the units under test 11 on the test sample 10 have been tested.
[0056] The test board 10 is used to configure the unit under test 11. The test board 10 can be a wafer, IC, or PCBA, etc., and the unit under test 11 is a solder joint or electrode on the test board 10. The test probe 30 is brought into contact with the unit under test 11, and the test probe 30 is energized to test the test board 10 and the unit under test 11.
[0057] As one example, please refer to Figure 6 The first film layer 20 is formed by directly attaching the film to the sample 10 to be tested.
[0058] The film is made of a soft material that is easily punctured by the test probe 30. It is insulating, non-flammable, and leaves no residue or contamination when peeled off or removed, thus not contaminating the test sample 10 or the test unit 11. Furthermore, it can be used in the semiconductor process chain and requires approval.
[0059] Specifically, firstly, a film is applied to the top surface of the test sample 10, ensuring that all the test units 11 on the test sample 10 are covered by the film.
[0060] After the film is applied, a first film layer 20 is formed on the test sample 10. The first film layer 20 is then squeezed to expel the air remaining between the first film layer 20 and the test sample 10.
[0061] The sample 10 to be tested, after the film has been applied, is placed on a semiconductor anti-oxidation testing device for testing. During the test, the test needle 30 is moved close to the sample 10 to be tested until the tip of the test needle 30 pierces the first film layer 20 and comes into contact with the unit under test 11 within the first film layer 20.
[0062] When the test probe 30 is energized, the instrument records parameters such as voltage and current to complete the test.
[0063] In this embodiment, since there is no air between the first film layer 20 and the test sample 10, especially since oxygen is squeezed out, even if a high current test is used, there will be no discharge, sparking, or oxidation, and no scorched oxide layer will be generated on the test unit 11 of the test sample 10.
[0064] As another embodiment, please refer to Figure 2 , Figure 2This is a schematic flowchart of the second embodiment of the semiconductor anti-oxidation testing method of the present invention. Step S20 includes:
[0065] Step S21: Apply adhesive to the top surface of the sample 10 to be tested;
[0066] Step S22: Allow the sample to stand for a preset time so that the adhesive covers the edge of the test sample 10, all the test units 11 on the test sample 10, and the gap between any two adjacent test units 11, to form the first film layer 20.
[0067] Please refer to Figure 7 By spraying glue onto the test sample 10, the glue covers the entire top surface of the test sample 10, forming the first film layer 20.
[0068] Using glue spraying allows the glue to adhere more tightly to the top surface of the test sample 10, resulting in less air remaining between the first film layer 20 and the test sample 10, further improving the effect of preventing test discharge and preventing the formation of oxide film.
[0069] Similarly, the adhesive should be made of a soft material that is easily punctured by the test needle 30, is insulating and non-flammable, leaves no residue or contamination when the film is peeled off or removed, and does not contaminate the test sample 10 and the test unit 11. Furthermore, it should be usable in the semiconductor process chain and require approval.
[0070] It should be noted that regardless of whether a film or adhesive is used for covering, when the application is in a high-temperature testing environment, the film and adhesive must be high-temperature resistant.
[0071] Specifically, first apply glue evenly to the top surface of the sample to be tested, or use a spray nozzle to spray glue onto the sample 10 to be tested.
[0072] After the adhesive is sprayed, let it stand for a period of time, such as 10 seconds. Due to the surface tension and viscosity of the adhesive, the adhesive can cover and fill the entire test sample 10.
[0073] Using spray adhesive is more efficient, as it can quickly cover the entire surface of the test sample 10, thus improving testing efficiency.
[0074] Furthermore, by spraying adhesive onto the entire top surface of the test sample 10, not only can the test unit 11 on the test sample 10 be covered, but also the gap between any two adjacent test units 11, or the grooves etched on one side of the sample, can be uniformly covered.
[0075] The test sample 10, after being coated with adhesive, is placed on a semiconductor anti-oxidation testing device for testing. During the test, the test probe 30 is moved close to the test sample 10 until the tip of the test probe 30 pierces the first film layer 20 and contacts the test unit 11 within the first film layer 20.
[0076] When the test probe 30 is energized, the instrument records parameters such as voltage and current to complete the test.
[0077] In this embodiment, after the test is completed, the first film layer 20 formed by applying adhesive can also meet the sealing requirements during subsequent storage and transportation.
[0078] Furthermore, after step S22, the following steps are also included:
[0079] Step S23: Curing the adhesive.
[0080] This embodiment targets low-viscosity adhesives to prevent them from flowing out from the edges of the test sample 10. A micro-curing process is used to give the adhesive a certain surface tension to prevent it from flowing. At the same time, after the adhesive forms the first film layer 20, it also meets the requirement that the test needle 30 pierce the first film layer 20.
[0081] Specifically, the adhesive can be dried at a certain temperature or left to stand for a period of time to cure.
[0082] The technical solution of this invention protects the test sample 10 and the test unit 11 on it by forming a first film layer 20 on the test sample 10. Furthermore, it squeezes out the air between the first film layer 20 and the test sample 10, preventing the test probe 30 from discharging during testing and from reacting with oxygen to form an oxide film. This eliminates the need for nitrogen, eliminates the need for testing and debugging, and is suitable for inter-process storage, long-term storage, and long-distance transportation. It saves production costs and improves testing efficiency.
[0083] Further, please refer to Figure 3 , Figure 3 This is a flowchart illustrating the third embodiment of the semiconductor anti-oxidation testing method of the present invention. Step S20 includes:
[0084] Step S24: Obtain the position information of all the test units 11 on the test sample 10;
[0085] Step S25: Apply adhesive to all the test units 11 on the test sample 10 according to the location information to form a plurality of first film layers 20 for covering the test units 11.
[0086] To save on testing costs and reduce adhesive usage, adhesive can be applied only to the location on the test sample 10 where the test unit 11 is positioned.
[0087] Therefore, this embodiment uses a dispensing method, which can take pictures of the test sample 10 using a camera or other devices, and analyze the pictures using image recognition software. For example, the position of the test unit 11 can be identified by different colors in the picture, thereby obtaining the position information of all the test units 11.
[0088] The position information is used to control the nozzle to move to the corresponding position to spray adhesive, thereby achieving the formation of the first film layer 20 by spraying adhesive on each of the test units 11. In this embodiment, there are multiple first film layers 20, and the number of multiple first film layers 20 is consistent with the number of multiple test units 11 and corresponds one-to-one.
[0089] To facilitate glue spraying, the multiple test units 11 on the test sample 10 are arranged in a rectangular pattern, which facilitates the positioning and movement of the spray head.
[0090] Further, please refer to Figure 4 , Figure 4 This is a schematic flowchart of the fourth embodiment of the semiconductor anti-oxidation testing method of the present invention. After step S20, the method further includes the following steps:
[0091] Step S50: A second film layer 40 is provided at the bottom of the test sample 10 so that the first film layer 20 and the second film layer 40 cover the test sample 10.
[0092] To further improve storage performance and prevent oxidation during storage and transportation, after setting the first film layer 20, a second film layer 40 is set at the bottom of the sample to be tested 10.
[0093] Please refer to Figure 8 The second film layer 40 can be directly adhered to the bottom of the sample 10 to be tested. Please refer to... Figure 9 Alternatively, adhesive can be applied to the bottom surface of the sample 10 to form the second film layer 40.
[0094] The test sample 10 is wrapped by the first film layer 20 on the top of the test sample 10 and the second film layer 40 on the bottom of the test sample 10.
[0095] Further, please refer to Figure 5 , Figure 5 This is a schematic flowchart of the fifth embodiment of the semiconductor anti-oxidation testing method of the present invention. After step S40, it further includes:
[0096] Step S60: Clean the first film layer 20 and / or the second film layer 40 on the test sample 10.
[0097] After testing, the qualified test sample 10 can be put into use. To ensure normal use, the first film layer 20 on the test sample 10 needs to be removed before assembly. If the second film layer 40 is provided, it can be removed as needed.
[0098] Specifically, step S60 includes:
[0099] Step S61: Irradiate the first film layer 20 and / or the second film layer 40 with a UV lamp to reduce the viscosity of the first film layer 20 and / or the second film layer 40.
[0100] Step S62: Peel off the first film layer 20 and / or the second film layer 40 after reducing the viscosity from the test sample 10.
[0101] From the perspective of ease of peeling and removal, UV-based films and adhesives can be selected. Using UV de-adhesion equipment, such as a UV lamp, to irradiate the film or adhesive reduces its stickiness, making the first film layer 20 and the second film layer 40 easier to peel off. After curing and reducing its stickiness, the adhesive forms a film that detaches from the surface of the test sample 10.
[0102] It should be noted that in this embodiment, the film and adhesive are not limited to UV-based films and adhesives. As long as the above-mentioned test characteristics are met, the easy-to-clean characteristic is also required.
[0103] To address the aforementioned issues, this invention also proposes a semiconductor oxidation prevention testing device. The semiconductor oxidation prevention testing device employs the semiconductor oxidation prevention testing method described above. The semiconductor oxidation prevention testing device includes a testing platform and a testing probe 30. The testing platform is used to place the sample 10 to be tested. The testing probe 30 is movably disposed above the testing platform.
[0104] When setting the first and second films using different methods, the semiconductor anti-oxidation testing equipment can also be equipped with a nozzle to meet the requirements of adhesive spraying; it can also be equipped with a camera, image recognition software, etc. to analyze and identify position information.
[0105] The test board 10 is used to configure the unit under test 11. The test board 10 can be a wafer, IC, or PCBA, etc., and the unit under test 11 is a solder joint or electrode on the test board 10. The test probe 30 is brought into contact with the unit under test 11, and the test probe 30 is energized to test the test board 10 and the unit under test 11.
[0106] As one example, please refer to Figure 6 The first film layer 20 is formed by directly attaching the film to the sample 10 to be tested.
[0107] The film is made of a soft material that is easily punctured by the test probe 30. It is insulating, non-flammable, and leaves no residue or contamination when peeled off or removed, thus not contaminating the test sample 10 or the test unit 11. Furthermore, it can be used in the semiconductor process chain and requires approval.
[0108] Specifically, firstly, a film is applied to the top surface of the test sample 10, ensuring that all the test units 11 on the test sample 10 are covered by the film.
[0109] After the film is applied, a first film layer 20 is formed on the test sample 10. The first film layer 20 is then squeezed to expel the air remaining between the first film layer 20 and the test sample 10.
[0110] The sample 10 to be tested, after the film has been applied, is placed on a semiconductor anti-oxidation testing device for testing. During the test, the test needle 30 is moved close to the sample 10 to be tested until the tip of the test needle 30 pierces the first film layer 20 and comes into contact with the unit under test 11 within the first film layer 20.
[0111] When the test probe 30 is energized, the instrument records parameters such as voltage and current to complete the test.
[0112] In this embodiment, since there is no air between the first film layer 20 and the test sample 10, especially since oxygen is squeezed out, even if a high current test is used, there will be no discharge, sparking, or oxidation, and no scorched oxide layer will be generated on the test unit 11 of the test sample 10.
[0113] As another embodiment, please refer to Figure 7 By spraying glue onto the test sample 10, the glue covers the entire top surface of the test sample 10, forming the first film layer 20.
[0114] Using glue spraying allows the glue to adhere more tightly to the top surface of the test sample 10, resulting in less air remaining between the first film layer 20 and the test sample 10, further improving the effect of preventing test discharge and preventing the formation of oxide film.
[0115] Similarly, the adhesive should be made of a soft material that is easily punctured by the test needle 30, is insulating and non-flammable, leaves no residue or contamination when the film is peeled off or removed, and does not contaminate the test sample 10 and the test unit 11. Furthermore, it should be usable in the semiconductor process chain and require approval.
[0116] It should be noted that regardless of whether a film or adhesive is used for covering, when the application is in a high-temperature testing environment, the film and adhesive must be high-temperature resistant.
[0117] Specifically, first apply glue evenly to the top surface of the sample to be tested, or use a spray nozzle to spray glue onto the sample 10 to be tested.
[0118] After the adhesive is sprayed, let it stand for a period of time, such as 10 seconds. Due to the surface tension and viscosity of the adhesive, the adhesive can cover and fill the entire test sample 10.
[0119] Using spray adhesive is more efficient, as it can quickly cover the entire surface of the test sample 10, thus improving testing efficiency.
[0120] Furthermore, by spraying adhesive onto the entire top surface of the test sample 10, not only can the test unit 11 on the test sample 10 be covered, but also the gap between any two adjacent test units 11, or the grooves etched on one side of the sample, can be uniformly covered.
[0121] The test sample 10, after being coated with adhesive, is placed on a semiconductor anti-oxidation testing device for testing. During the test, the test probe 30 is moved close to the test sample 10 until the tip of the test probe 30 pierces the first film layer 20 and contacts the test unit 11 within the first film layer 20.
[0122] When the test probe 30 is energized, the instrument records parameters such as voltage and current to complete the test.
[0123] In this embodiment, after the test is completed, the first film layer 20 formed by applying adhesive can also meet the sealing requirements during subsequent storage and transportation.
[0124] This embodiment targets low-viscosity adhesives to prevent them from flowing out from the edges of the test sample 10. A micro-curing process is used to give the adhesive a certain surface tension to prevent it from flowing. At the same time, after the adhesive forms the first film layer 20, it also meets the requirement that the test needle 30 pierce the first film layer 20.
[0125] Specifically, the adhesive can be dried at a certain temperature or left to stand for a period of time to cure.
[0126] The technical solution of this invention protects the test sample 10 and the test unit 11 on it by forming a first film layer 20 on the test sample 10. Furthermore, it squeezes out the air between the first film layer 20 and the test sample 10, preventing the test probe 30 from discharging during testing and from reacting with oxygen to form an oxide film. This eliminates the need for nitrogen, eliminates the need for testing and debugging, and is suitable for inter-process storage, long-term storage, and long-distance transportation. It saves production costs and improves testing efficiency.
[0127] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.
Claims
1. A method of testing a semiconductor against oxidation, characterized by, The semiconductor oxidation protection test method includes: Multiple test units are configured on the top surface of the test sample; A first film layer is provided on the top surface of the sample to be tested, and the first film layer covers all the multiple test units on the sample to be tested; The air between the first film layer and the sample to be tested is squeezed out; The test probe is passed through the first membrane layer and brought into contact with the unit under test for detection until all the units under test on the test sample have been detected. The first film layer on the sample to be tested is cleaned; The steps for cleaning the first film layer on the test sample include: The first film layer is irradiated with a UV lamp to reduce its viscosity. The first film layer, after its viscosity has been reduced, is peeled off from the test sample.
2. The semiconductor oxidation prevention test method according to claim 1, characterized by, The step of depositing a first film layer on the top surface of the sample to be tested, and ensuring that the first film layer completely covers all the multiple test units on the sample to be tested, includes: Apply adhesive to the top surface of the sample to be tested; The sample is left to stand for a preset time to allow the adhesive to cover the edges of the sample under test, all the test units on the sample under test, and the gaps between any two adjacent test units, in order to form the first film layer.
3. The semiconductor oxidation prevention test method according to claim 2, characterized by, After the step of allowing the adhesive to remain stationary for a preset time to cover the edges of the test sample, all the test units on the test sample, and the gaps between any two adjacent test units, the method further includes: The adhesive is then cured.
4. The semiconductor oxidation prevention test method according to claim 1, characterized by, The step of depositing a first film layer on the top surface of the sample to be tested, and ensuring that the first film layer completely covers all the multiple test units on the sample to be tested, includes: Obtain the position information of all the units to be tested on the sample to be tested; According to the location information, adhesive is applied to all the test units on the test sample to form multiple first film layers for covering the test units.
5. The semiconductor oxidation prevention test method according to any one of claims 1 to 4, characterized by, The first film layer is an insulating and flame-retardant flexible film or an insulating and flame-retardant flexible adhesive.
6. The semiconductor oxidation prevention test method according to claim 1, wherein After the step of depositing a first film layer on the top surface of the test sample and ensuring that the first film layer completely covers all the test units on the test sample, the method further includes: A second film layer is disposed at the bottom of the sample to be tested, so that the first film layer and the second film layer cover the sample to be tested.
7. The semiconductor oxidation prevention test method according to claim 6, wherein After the step of passing the test probe through the first membrane layer and contacting it with the unit under test for detection, until all the units under test on the test sample have been detected, the method further includes: The second film layer on the sample to be tested is cleaned.
8. The semiconductor oxidation prevention test method according to claim 7, characterized in that, The steps for cleaning the second film layer on the test sample include: The second film layer is irradiated with a UV lamp to reduce its viscosity. The second film layer, after its viscosity has been reduced, is peeled off from the sample to be tested.
9. The semiconductor oxidation prevention test method according to claim 1, wherein The steps of configuring multiple test cells on the top surface of the test sample include: Multiple test units are arranged in a matrix on the top surface of the test sample.
10. A semiconductor oxidation prevention test apparatus characterized by comprising: The semiconductor oxidation prevention testing equipment uses the semiconductor oxidation prevention testing method as described in any one of claims 1 to 9, wherein the semiconductor oxidation prevention testing equipment comprises: The test platform is used to place the sample to be tested; a test needle, the test needle being movable disposed above the test platform.