A 3D display device

Abstract

The present disclosure provides a 3D display device. The 3D display device comprises a substrate, a plurality of gate lines, the plurality of gate lines are located on one side of the substrate and extend along a first direction, and a plurality of pixel electrodes, the plurality of pixel electrodes are arranged in an array, the pixel electrodes in the same row are electrically connected to at least one of the gate lines, and at least adjacent portions of two adjacent pixel electrodes in the same row are arranged in a staggered manner.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a 3D display device. Background Technology

[0002] In recent years, the 3D display field has developed rapidly. Among them, lenticular 3D display devices have attracted much attention due to their advantages such as simple manufacturing process and low crosstalk. Typically, a lenticular 3D display device includes a display panel and a lenticular lens. The viewer's left and right eyes respectively obtain the left-eye view and right-eye view displayed on the display panel through the lenticular lens to form a 3D display image. Summary of the Invention

[0003] This disclosure provides a 3D display device. The 3D display device includes:

[0004] Substrate;

[0005] Multiple gate lines, wherein the multiple gate lines are located on one side of the substrate and extend along a first direction;

[0006] Multiple pixel electrodes are arranged in an array, and the pixel electrodes in the same row are electrically connected to at least one gate line. In the same row of pixel electrodes, the adjacent two pixel electrodes are at least staggered in their adjacent portions.

[0007] In one possible implementation, the display substrate includes two electrode layers stacked together, the two electrode layers including a first electrode layer and a second electrode layer located on the side of the first electrode layer away from the substrate;

[0008] The pixel electrodes are distributed across the two electrode layers.

[0009] In one possible implementation, in the same row of pixel electrodes, the same pixel electrode is located in the same electrode layer, and two adjacent pixel electrodes are located in different electrode layers.

[0010] In one possible implementation, each pixel electrode includes a skeleton portion extending in a main direction perpendicular to the first direction, and branches extending from both sides of the skeleton portion.

[0011] In one possible implementation, each pixel electrode includes: two skeleton portions extending in a main direction perpendicular to the first direction and having a gap, and a branch extending from the side of each skeleton portion away from the gap;

[0012] The display substrate further includes a connecting portion extending along the first direction, wherein the orthographic projection of the connecting portion on the substrate is at least located in the gap between the two skeleton portions, and the two skeleton portions of the same pixel electrode are connected through the connecting portion.

[0013] In one possible implementation, each pixel electrode includes a first sub-electrode and a second sub-electrode arranged sequentially along a direction parallel to the first direction. The first sub-electrode and the second sub-electrode of the same pixel electrode are located in different electrode layers, and the first sub-electrode and the second sub-electrode of the same pixel electrode are connected through a via.

[0014] In one possible implementation, both the first sub-electrode and the second sub-electrode include: a skeleton portion extending in a main body direction perpendicular to the first direction, and a branch extending from the side of each skeleton portion away from the other skeleton portion.

[0015] In one possible implementation, the orthographic projection of the skeleton portion of the first sub-electrode onto the substrate substantially coincides with the orthographic projection of the skeleton portion of the second sub-electrode onto the substrate.

[0016] In one possible implementation, the orthographic projection of the skeleton portion of the first sub-electrode onto the substrate is parallel to the orthographic projection of the skeleton portion of the second sub-electrode onto the substrate, and there is a gap between them.

[0017] In one possible implementation, the first sub-electrode further includes: a first portion connected to the skeleton portion and extending away from the side of the second sub-electrode;

[0018] The second sub-electrode further includes: an extension portion connected to the skeleton portion and extending toward the first sub-electrode side;

[0019] The first part and the extension have an overlapping area in the orthographic projection on the substrate, and the first part and the extension are connected by a hole in the overlapping area.

[0020] In one possible implementation, the second sub-electrode further includes a protrusion configured to be electrically connected to the source or drain.

[0021] The extension and the protrusion are located at the same end of the pixel electrode.

[0022] In one possible implementation, the display substrate further includes data lines extending in a main direction perpendicular to the first direction, and a common electrode layer; a portion of the orthographic projection of the data lines onto the substrate is located within the region where the orthographic projection of the pixel electrode onto the substrate is located.

[0023] In one possible implementation, when the pixel electrode includes a skeleton portion, the orthographic projection of the data line onto the substrate and the orthographic projection of the skeleton portion onto the substrate substantially coincide.

[0024] In one possible implementation, when the pixel electrode includes two skeleton portions and the orthographic projections of the two skeleton portions on the substrate substantially coincide, the orthographic projection of the data line on the substrate substantially coincides with the orthographic projection of the skeleton portions on the substrate.

[0025] In one possible implementation, the data line is located between the first electrode layer and the substrate;

[0026] The display substrate also includes an organic film layer located between the first electrode layer and the data line.

[0027] In one possible implementation, when the pixel electrode includes two skeleton portions with a gap between the two skeleton portions, the orthogonal projection of the data line onto the substrate is located at the gap between the two skeleton portions on the substrate.

[0028] In one possible implementation, the data line is located in the first electrode layer; or, the data line is located between the first electrode layer and the substrate.

[0029] In one possible implementation, among the pixel electrodes parallel to the first direction and in the same row, the minimum spacing between two adjacent pixel electrodes ranges from 0 to 2 μm.

[0030] This disclosure also provides a display panel, which includes the display substrate as described in this disclosure.

[0031] This disclosure also provides a display device, which includes the display panel as described in this disclosure. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the structure of a 3D display device;

[0033] Figure 2 This is a schematic diagram of a pixel electrode structure in the prior art;

[0034] Figure 3A for Figure 3B A schematic diagram of the structure along the dotted line AA1;

[0035] Figure 3B This is one of the top view schematic diagrams of the display substrate provided in the embodiments of this disclosure;

[0036] Figure 3C for Figure 3B A schematic diagram of the pixel electrodes in the image;

[0037] Figure 3D for Figure 3B Schematic diagram of the pixel electrode in the first electrode layer;

[0038] Figure 3E for Figure 3B Schematic diagram of the pixel electrode in the second electrode layer;

[0039] Figure 4A for Figure 4B A schematic diagram of the structure along the dotted line AA1;

[0040] Figure 4B This is a second top view schematic diagram of the display substrate provided in the embodiments of this disclosure;

[0041] Figure 4C for Figure 4B A schematic diagram of the pixel electrodes in the image;

[0042] Figure 4D for Figure 4B Schematic diagram of the pixel electrode in the first electrode layer;

[0043] Figure 4E for Figure 4B Schematic diagram of the pixel electrode in the second electrode layer;

[0044] Figure 5A for Figure 5B A schematic diagram of the structure along the dotted line AA1;

[0045] Figure 5B This is the third top view schematic diagram of the display substrate provided in the embodiments of this disclosure;

[0046] Figure 5C for Figure 5B A schematic diagram of the pixel electrodes in the image;

[0047] Figure 5D for Figure 5B Schematic diagram of the pixel electrode in the first electrode layer;

[0048] Figure 5E for Figure 5B Schematic diagram of the pixel electrode in the second electrode layer;

[0049] Figure 6A for Figure 6B A schematic diagram of the structure along the dotted line AA1;

[0050] Figure 6B This is the fourth top view schematic diagram of the display substrate provided in the embodiments of this disclosure;

[0051] Figure 6C for Figure 6B A schematic diagram of the pixel electrodes in the image;

[0052] Figure 6D for Figure 6B Schematic diagram of the pixel electrode in the first electrode layer;

[0053] Figure 6E for Figure 6B Schematic diagram of the pixel electrode in the second electrode layer;

[0054] Figure 7 This is a schematic diagram showing the extension direction of different branches in the embodiments of this disclosure;

[0055] Figure 8A Fifth schematic diagram of a display substrate provided as an example of this disclosure;

[0056] Figure 8B for Figure 8A A schematic diagram of the cross section at point AA1 along the dashed line.

[0057] Figure 9A Sixth schematic diagram of a display substrate provided as an example of this disclosure;

[0058] Figure 9B for Figure 9A One of the schematic diagrams of the cross section at point AA1 along the dashed line in the middle;

[0059] Figure 9C for Figure 9A Second schematic diagram of the cross section at point AA1 along the dashed line;

[0060] Figure 9D for Figure 9A Schematic diagram of the cross section at point AA1 along the dashed line (part 3);

[0061] Figure 10A Seventh schematic diagram of a display substrate provided as an example of this disclosure;

[0062] Figure 10B for Figure 10A A schematic diagram of the cross section at point AA1 along the dashed line.

[0063] Figure 11A Eighth schematic diagram of a display substrate provided as an example of this disclosure;

[0064] Figure 11B for Figure 11A A schematic diagram of the cross section at point AA1 along the dashed line.

[0065] Figure 12 This is a top view of a data cable provided in an embodiment of the present disclosure. Detailed Implementation

[0066] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0067] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0068] As used herein, “approximately” or “substantially the same” includes the stated value and means within an acceptable range of deviations from the specific value, as determined by a person skilled in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., limitations of the measurement system). For example, “substantially the same” may mean a difference relative to the stated value within one or more standard deviations, or within ±30%, 20%, 10%, or 5%.

[0069] In the accompanying drawings, the thicknesses of layers, films, panels, regions, etc., are enlarged for clarity. Exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Thus, deviations from the shapes shown in the drawings will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the regions shown herein, but rather include deviations in shape caused, for example, by manufacturing processes. For example, regions illustrated or described as flat may typically have rough and / or non-linear characteristics. Furthermore, sharp corners illustrated may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions, nor are they intended to limit the scope of the claims.

[0070] To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0071] like Figure 1 As shown, the naked-eye 3D display device adopts a combination and superposition mode of light source 10, display panel 20 and grating 30. The display panel 20 receives external signals and displays a two-dimensional image; then the parallax is achieved through the refraction of the grating 30 in front of the screen to form a stereoscopic effect, so that the viewer 40 can see a 3D image.

[0072] When using a lenticular naked-eye 3D display device, moiré patterns may appear in the 3D display image due to the manufacturing process of the display panel or other factors, affecting the 3D display effect.

[0073] This disclosure provides a display substrate, see [link to relevant documentation] Figures 3A-3E , Figures 4A-4E , Figures 5A-5E ,as well as Figures 6A-6E As shown, where, Figure 3A for Figure 3B A schematic diagram of the cross-section along the dashed line AA1. Figures 3B-3D This is a schematic diagram showing the situation where the same pixel electrode is located in the same layer and includes a skeleton portion. Figure 4A for Figure 4B A schematic diagram of the cross-section along the dashed line AA1. Figures 4B-4D This is a schematic diagram showing the same pixel electrode located in the same layer and including two skeleton parts. Figure 5A for Figure 5B A schematic diagram of the cross-section along the dashed line AA1. Figures 5B-5D This is a schematic diagram showing the same pixel electrode located in different layers and including two skeleton parts with overlapping orthographic projections. Figure 6A for Figure 6B A schematic diagram of the cross-section along the dashed line AA1. Figures 6B-6D This is a schematic diagram showing a display substrate comprising: (The diagram shows the same pixel electrode located on different layers and including two non-overlapping orthographic projections of the skeleton portion.)

[0074] Substrate 1;

[0075] Multiple gate lines 3 are located on one side of the substrate 1 and extend along the first direction F1;

[0076] Multiple pixel electrodes 2 are arranged in an array. Pixel electrodes 2 in the same row are electrically connected to at least one gate line 3, and adjacent pixel electrodes 2 in the same row are staggered in at least their adjacent portions. Specifically, for example, ... Figures 3A-3E or Figures 4A-4E In the same row of pixel electrodes 2, there may be a first pixel electrode 21, a second pixel electrode 22, and a third pixel electrode 23, with adjacent entire first pixel electrodes 21 and entire second pixel electrodes 22 located in different layers; or, for example, as Figures 5A-5E or Figures 6A-6EThe right part of the first pixel electrode 21 and the left part of the second pixel electrode 22 are located in different layers.

[0077] In this embodiment of the present disclosure, in the same row of pixel electrodes 2, the adjacent parts of two adjacent pixel electrodes 2 are staggered, which can further reduce the spacing d between adjacent pixel electrodes 2 and reduce the display dark area between adjacent pixel electrodes 2. When the display substrate provided in this embodiment of the present disclosure is applied to a 3D display device, it can improve moiré patterns and enhance the display effect.

[0078] In specific implementation, the substrate 1 can be selectively chosen according to the actual situation. Specifically, the substrate 1 may include: insulating layer, metal layer and other film layers.

[0079] It should be noted that the pixel electrode 2 in the same row is electrically connected to at least one gate line 3, but the pixel electrode 2 in the same row and at least one gate line 3 are not directly connected. For example, they are electrically connected through a thin-film transistor.

[0080] In one possible implementation, such as Figure 3B , Figure 4B , Figure 5B , Figure 6B In this embodiment, among the pixel electrodes 2 parallel to the first direction F1 and in the same row, the minimum distance d between two adjacent pixel electrodes 2 ranges from 0 to 2 μm. The staggered arrangement of adjacent pixel electrodes 2 in this embodiment allows the minimum distance d between two adjacent pixel electrodes 2 to be in the range of 0 to 2 μm. Within this distance range, there is essentially no dark area between adjacent pixel electrodes 2.

[0081] It should be noted that in the above figures, other film layer structures are not shown in order to illustrate the structure of the gate line 3 and the pixel electrode 2 more clearly. However, the embodiments disclosed herein are not limited thereto. Specifically, for example, a first insulating layer 61 may be provided between the pixel electrodes 2 located in different layers.

[0082] Liquid crystal display (LCD) panels are widely used due to their thin and light design, energy efficiency, and lack of radiation. The working principle of an LCD panel is to change the arrangement of liquid crystal molecules within the liquid crystal layer by altering the voltage difference across the liquid crystal layer, thereby changing the light transmittance of the liquid crystal layer and displaying an image. In specific implementations, the display panel in this disclosure embodiment can be a liquid crystal display panel. For liquid crystal display panels, the traditional pixel electrode structure design is as follows... Figure 2As shown, the edge of the pixel electrode is surrounded by an electrode skeleton (used for signal transmission), and the pixel electrode has multiple transverse slits inside, with liquid crystal arranged along the slits; however, when it reaches the edge of the pixel electrode, the structure of the electrode skeleton causes the liquid crystal arrangement at the edge of the pixel electrode to become disordered, forming a display dark area; therefore, there is a large display dark area between adjacent sub-pixels, which is not conducive to the elimination of moiré patterns; the display substrate provided in the embodiments of this disclosure can reduce the display dark area between adjacent pixel electrodes 2, improve moiré patterns, and enhance the display effect.

[0083] In specific implementations, the display substrate provided in this disclosure can be applied to liquid crystal displays (LCDs). LCD panels are widely used due to their thin and light appearance, energy saving, and lack of radiation. The working principle of an LCD panel is to change the arrangement of liquid crystal molecules within the liquid crystal layer by changing the voltage difference across the liquid crystal layer, thereby altering the light transmittance of the liquid crystal layer to display images.

[0084] In one possible implementation, combining Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the display substrate includes two stacked electrode layers, each comprising a first electrode layer P1 and a second electrode layer P2 located on the side of the first electrode layer P1 away from the substrate 1; multiple pixel electrodes 2 are distributed between the two electrode layers. Specifically, a first insulating layer 61 may also be disposed between the two electrode layers. In this embodiment, when adjacent pixel electrodes 2 are staggered, multiple pixel electrodes are distributed on the two electrode layers respectively, which can reduce the number of electrode layers used to distribute the pixel electrodes 2 and reduce the fabrication complexity of the display substrate.

[0085] In one possible implementation, combining Figure 3A or Figure 4A As shown, in the same row of pixel electrodes 2, the same pixel electrode 2 is located on the same electrode layer, and two adjacent pixel electrodes 2 are located on different electrode layers. Specifically, for example, as... Figure 3A or Figure 4A In the diagram, the left pixel electrode 2 is located on the second electrode layer P2, and the right pixel electrode 2 is located on the first electrode layer P1. Compared to placing different parts of the same pixel electrode 2 on different layers, which requires connecting and conducting different parts of the same pixel electrode 2, in this embodiment, each pixel electrode 2 is treated as a whole, with the same pixel electrode 2 located on the same electrode layer and adjacent pixel electrodes 2 located on different electrode layers. This can improve the moiré pattern of the display substrate while simplifying the manufacturing process of the display substrate.

[0086] In specific implementations, when the same pixel electrode 2 is located on the same electrode layer, and two adjacent pixel electrodes 2 are located on different electrode layers, the pixel electrode 2 may include one skeleton portion 211 or two skeleton portions 211, as described below:

[0087] For example, such as Figures 3A-3E As shown, each pixel electrode 2 includes a skeleton portion 211 extending in the main direction perpendicular to the first direction F1, and branches 2121 extending from both sides of the skeleton portion 211. Specifically, each pixel electrode 2 includes a skeleton portion 211, and the branches 2121 extend from both sides of the skeleton portion 211.

[0088] For example, such as Figures 4A-4E As shown, each pixel electrode 2 includes: two skeleton portions 211 extending along a direction perpendicular to the first direction F1 and having a gap, and a branch 2121 extending from the side of each skeleton portion 211 away from the gap; the display substrate also includes: a connecting portion 24 extending along the first direction F1, the orthographic projection of the connecting portion 24 on the substrate 1 being at least located in the gap between the two skeleton portions 211, and the two skeleton portions 211 of the same pixel electrode 2 being connected through the connecting portion 24. Specifically, the connecting portion 24 can be distributed in the same layer as the pixel electrode 2; specifically, the connecting portion 24 can also be located in a different layer from the pixel electrode 2, and the two skeleton portions 211 of the same pixel electrode 2 can be connected and connected by drilling. In this case, the orthographic projection of the connecting portion 24 on the substrate 1 can also include an area overlapping with the two skeleton portions 211 (not shown in the figure).

[0089] Specifically, when the same pixel electrode 2 is located in the same layer, but adjacent pixel electrodes 2 are located in different layers, such as Figures 3C-3E ,as well as Figures 4C-4E As shown, for example, it could be Figure 3C or Figure 4C The second and fourth pixel electrodes from the left are located in the first electrode layer P1. Figure 3C or Figure 4C The first and third pixel electrodes 2 from the left are located in the second electrode layer P2; of course, in specific implementations, it can also be... Figure 3C or Figure 4C The first and third pixel electrodes 2 from the left are located in the first electrode layer P1. Figure 3C or Figure 4C The second and fourth pixel electrodes from the left are located in the second electrode layer P2.

[0090] In one possible implementation, combining Figures 5A-5E As shown, and Figures 6A-6EAs shown, each pixel electrode 2 includes a first sub-electrode 201 and a second sub-electrode 202 arranged sequentially along a first direction F1. The first sub-electrode 201 and the second sub-electrode 202 of the same pixel electrode 2 are located in different electrode layers, and the first sub-electrode 201 and the second sub-electrode 202 of the same pixel electrode 2 are connected through vias. Specifically, for example, as... Figure 5A As shown, the first sub-electrode 201 of the pixel electrode 2 is located in the first electrode layer P1, and the second sub-electrode 202 is located in the second electrode layer P2; of course, in a specific implementation, the first sub-electrode 201 of the pixel electrode 2 is also located in the second electrode layer P2, and the second sub-electrode 202 can be located in the first electrode layer P1.

[0091] In specific implementation, when the first sub-electrode 201 and the second sub-electrode 202 of the same pixel electrode 2 are located in different electrode layers, both the first sub-electrode 201 and the second sub-electrode 202 can have a skeleton portion. Specifically, in conjunction with... Figures 5A-5E As shown, and Figures 6A-6E As shown, both the first sub-electrode 201 and the second sub-electrode 202 include: a skeleton portion 211 extending in the main body direction perpendicular to the first direction F1, and a branch portion 2121 extending from the side of each skeleton portion 211 away from the other skeleton portion 211.

[0092] In one possible implementation, combining Figures 5A-5E As shown, the orthographic projection of the skeleton portion 211 of the first sub-electrode 201 onto the substrate 1 approximately coincides with the orthographic projection of the skeleton portion 211 of the second sub-electrode 202 onto the substrate 1. In this case, the first sub-electrode 201 and the second sub-electrode 202 of the same pixel electrode 2 can be connected by drilling a hole at the overlapping area of ​​the two skeleton portions 211; specifically, a hole can be drilled at the midpoint of the skeleton portion 211 (e.g., ...). Figure 5C A hole can be drilled at point B in the diagram to conduct electricity, or a hole can be drilled at the beginning or end of the skeleton portion 211. It is understood that due to process errors in actual manufacturing, it is difficult to ensure that the orthographic projection of the skeleton portion 211 of the first sub-electrode 201 onto the substrate 1 completely coincides with the orthographic projection of the skeleton portion 211 of the second sub-electrode 202 onto the substrate 1. Therefore, in this embodiment, the orthographic projection of the skeleton portion 211 of the first sub-electrode 201 onto the substrate 1 approximately coincides with the orthographic projection of the skeleton portion 211 of the second sub-electrode 202 onto the substrate 1, which can be understood as the overlapping area being 70% to 100%.

[0093] In one possible implementation, combining Figures 6A-6EAs shown, the orthographic projection of the skeleton portion 211 of the first sub-electrode 201 onto the substrate 1 is parallel to the orthographic projection of the skeleton portion 211 of the second sub-electrode 202 onto the substrate 1, and there is a gap between them. Specifically, the first sub-electrode 201 further includes a first portion 26 connected to the skeleton portion 211 and extending away from the side of the second sub-electrode 202; the second sub-electrode 202 further includes an extension portion 25 connected to the skeleton portion 211 and extending toward the side of the first sub-electrode; there is an overlapping area between the orthographic projection of the first portion 26 onto the substrate 1 and the orthographic projection of the extension portion 26 onto the substrate 1, and the first portion 26 and the extension portion 25 are connected at the overlapping area by a hole.

[0094] In one possible implementation, combining Figures 6B-6E As shown, the second sub-electrode 202 also includes a protrusion 27, which is configured to be electrically connected to the source or drain electrode; the extension 25 and the protrusion 27 are located at the same end of the pixel electrode 2. Specifically, as... Figure 6C In the second pixel electrode 2 from the left, both the extension 25 and the protrusion 27 are located at the lower end of the pixel electrode 2.

[0095] In specific implementation, combined with Figures 3A-3E , Figures 4A-4E , Figures 5A-6E ,as well as Figures 6A-6E As shown, there are slits 2122 between adjacent branches 2121, and multiple branches 2121 and multiple slits 2122 form a comb-like structure 212. Specifically, the shape of the skeleton part 211 can be a zigzag shape. This zigzag-shaped skeleton part 211 can avoid moiré patterns caused by interference between the skeleton part and the grating of the 3D display device, and can further eliminate moiré patterns in the displayed image, thereby improving the display effect.

[0096] In specific implementation, it should be combined with 3A- Figure 3E , Figures 4A-4E , Figures 5A-6E ,as well as Figures 6A-6E As shown, the skeleton portion 211 is divided into a first sub-skeleton portion 2111 and a second sub-skeleton portion 2112 along the bending point B; the branches 2121 on both sides of the first sub-skeleton portion 2111 correspond one-to-one and are located on the same straight line, and the branches 2121 on both sides of the second sub-skeleton portion 2112 correspond one-to-one and are located on the same straight line. This facilitates the regular arrangement of liquid crystal molecules and improves the display effect.

[0097] In specific implementation, it should be combined with 3A- Figure 3E , Figures 4A-4E , Figures 5A-6E ,as well as Figures 6A-6EAs shown, the branches 2121 connected to the first sub-frame 2111 are approximately parallel, and the branches 2121 connected to the second sub-frame 2112 are also approximately parallel. This allows all liquid crystal molecules to be arranged in a regular pattern during display, improving the display effect.

[0098] In specific implementation, in the display panel provided in the embodiments of this disclosure, such as Figure 7 As shown, the first sub-frame part 2111 is connected to the branch 2121 ( Figure 7 The branch 2121 (represented by 2121' in the middle) has a first tilt angle α1 with the row direction F1, and is connected to the second sub-frame part 2112 by the branch 2121 ( Figure 7 (represented by 2121'') has a second tilt angle α2 with the row direction F1, and the first tilt angle α1 and the second tilt angle α2 are complementary. The same pixel electrode has a branch 2121 with complementary tilt angles. In this setting, the brightness of the same pixel electrode can be complementary, thereby avoiding the appearance of horizontal stripes.

[0099] In specific implementation, in the display panel provided in the embodiments of this disclosure, such as Figures 3A-3E , Figures 4A-4E , Figures 5A-6E ,as well as Figures 6A-6E As shown, the pixel electrode 21 has a center line L extending along the row direction F1, and the bending point B is approximately located on the center line L. Due to the influence of the manufacturing process, the position of the bending point B may have a certain error with the center line L. This structure can maximize the improvement of moiré defects.

[0100] In specific implementation, in the display panel provided in the embodiments of this disclosure, such as Figure 3C , Figure 4C , Figure 5C ,as well as Figure 6C As shown, the skeleton portion 211 has a bending angle β at the corresponding bending point B. On one side of the bending angle β and near the bending point B (elliptical dashed frame T1), multiple branches 2121 corresponding to the first sub-skeleton portion 2111 and the second sub-skeleton portion 2112 are electrically connected. On the opposite side of the bending angle β and at the two edges away from the bending point B (elliptical dashed frame T2), multiple branches 2121 corresponding to the first sub-skeleton portion 2111 are electrically connected, and multiple branches 2121 corresponding to the second sub-skeleton portion 2112 are electrically connected. The ends of the branches 2121 at other positions that are away from the skeleton portion 211 are independent of each other. That is, the edge of the pixel electrode structure is set as an open comb structure, which can realize the orderly arrangement of liquid crystals at the edge of the pixel electrode, reduce the display dark area between sub-pixels, improve moiré patterns, and improve the display effect.

[0101] In one possible implementation, such as Figure 8A , Figure 8B , Figures 9A-9D , Figure 10A , Figure 10B , Figure 11A ,as well as Figure 11B As shown, where, Figure 8A for Figure 3B A schematic diagram of the display substrate after stacking data lines and a common electrode layer. Figure 8B for Figure 8A A schematic diagram of the cross-section along the dashed line AA1. Figure 9A for Figure 4B A schematic diagram of the display substrate after stacking data lines and a common electrode layer. Figure 9B for Figure 9A A schematic diagram of the cross-section along the dashed line AA1. Figure 10A for Figure 5B A schematic diagram of the display substrate after stacking data lines and a common electrode layer. Figure 10B for Figure 10A A schematic diagram of the cross-section along the dashed line AA1. Figure 11A for Figure 6B A schematic diagram of the display substrate after stacking data lines and a common electrode layer. Figure 11B for Figure 11A A cross-sectional schematic diagram along the dashed line AA1 shows that the substrate also includes a data line 4 extending in the main direction perpendicular to the first direction F1, and a common electrode layer 5; the partial orthogonal projection of the data line 4 onto the substrate 1 is located in the region where the orthogonal projection of the pixel electrode 2 onto the substrate 1 is located.

[0102] In one possible implementation, combining Figure 8A and Figure 8B As shown, when the same pixel electrode 2 is located on the same electrode layer, two adjacent pixel electrodes 2 are located on different electrode layers, and the pixel electrode 2 includes a skeleton portion 211, the orthographic projection of the data line 4 on the substrate 1 and the orthographic projection of the skeleton portion 211 on the substrate 1 approximately coincide. It is understandable that due to process errors in actual manufacturing, it is difficult to ensure that the orthographic projection of the data line 4 on the substrate 1 and the orthographic projection of the skeleton portion 211 on the substrate 1 completely coincide. Therefore, in this embodiment, the orthographic projection of the data line 4 on the substrate 1 and the orthographic projection of the skeleton portion 211 on the substrate 1 approximately coincide, which can be understood as the overlapping area being 70% to 100%.

[0103] In one possible implementation, combining Figure 10A and Figure 10B As shown, when the pixel electrode 2 includes two skeleton portions 211 and the orthographic projections of the two skeleton portions 211 on the substrate 1 are approximately coincident, the orthographic projection of the data line 4 on the substrate 1 is approximately coincident with the orthographic projection of the skeleton portion 211 on the substrate 1.

[0104] Specifically, such as Figure 8B as well as Figure 10BAs shown, the data line 4 can be located between the first electrode layer P1 and the substrate 1. The display substrate can also include an organic film layer 64 located between the first electrode layer P1 and the data line 4. Specifically, a common electrode layer 5 can be disposed between the data line 4 and the first electrode layer P1, and a second insulating layer 62 can be provided between the common electrode layer 5 and the first electrode layer P1. The organic film layer 64 can be located between the common electrode layer 5 and the data line 4. In this embodiment of the disclosure, as... Figure 8B as well as Figure 10B As shown, the display substrate can be an organic film layer product. That is, since the data line 4 overlaps with the pixel electrode 21 and the common electrode layer 5, by setting an organic film layer 64 between the first electrode layer P1 and the data line 4, the coupling capacitance can be reduced by using organic film technology, thus ensuring pixel charging rate and image quality.

[0105] In one possible implementation, such as Figures 9A-9D , Figure 11A as well as Figure 11B As shown, the display substrate of this embodiment can also be a non-organic film product, that is, the orthographic projection of the data line 4 on the substrate 1 does not coincide with the orthographic projection of the skeleton portion 211 on the substrate 1, and no organic film may be provided between the data line 4 and the first electrode layer P1; when the pixel electrode 2 includes two skeleton portions 211 and there is a gap between the two skeleton portions 211, the orthographic projection of the data line 4 on the substrate 1 is located at the gap between the two skeleton portions 211 on the substrate.

[0106] Specifically, in one possible implementation, combined with Figures 9A-9D As shown, when the same pixel electrode 2 is located in the same electrode layer, and two adjacent pixel electrodes 2 are located in different electrode layers, and the pixel electrode 2 includes two skeleton portions 211, the data line 4 can be set in the same layer as the first electrode layer P1, or it can be set in a different layer from the first electrode layer P1. The following is a detailed explanation:

[0107] For example, such as Figure 9B As shown, data line 4 can be disposed on the same layer as the first electrode layer P1. A common electrode layer 5 can be located between the first electrode layer P1 and the substrate 1, and a second insulating layer 62 can also be disposed between the common electrode layer 5 and the first electrode layer P1. When data line 4 is disposed on the same layer as the first electrode layer P1, for... Figure 9A The connection portion 24 in the pixel electrode 2, which is on the same layer as the data line 4, may not be disposed on the same layer as the pixel electrode 2 to avoid affecting the normal display of the display substrate when the connection portion 24 crosses with the data line 4. Specifically, in one possible embodiment, for the connection portion 24 in the pixel electrode 2 located in the first electrode layer P1, the connection portion 24 can be disposed in the second electrode layer P2, so that the two parts of the same pixel electrode 2 in the first electrode layer P1 can be connected and connected by drilling.

[0108] For example, such as Figure 9C As shown, data line 4 is located between the first electrode layer P1 and the substrate 1. Specifically, a common electrode layer 5 is located between data line 4 and the substrate 1. Specifically, a second insulating layer 62 may be provided between data line 4 and the first electrode layer P1, and a third insulating layer 63 may be provided between data line 4 and the common electrode layer 5.

[0109] For example, such as Figure 9D As shown, data line 4 is located between the first electrode layer P1 and the substrate 1. Specifically, data line 4 is disposed on the same layer as the common electrode layer 5, and a second insulating layer 62 may be disposed between data line 4 and the first electrode layer P1.

[0110] Specifically, in one possible implementation, combined with Figure 11A or Figure 11B As shown, when the same pixel electrode 2 is located in the same electrode layer, and two adjacent pixel electrodes 2 are located in different electrode layers, when the pixel electrode 2 includes two skeleton portions 211, and the two skeleton portions 211 have a gap in their orthogonal projection onto the substrate 1, the combination... Figure 11B As shown, data line 4 can be disposed on the same layer as the first electrode layer P1. Specifically, data line 4 can be disposed on the same layer as the first sub-electrode 201 in pixel electrode 2. Common electrode layer 5 can be located between data line 4 and substrate 1, and a second insulating layer 62 can also be disposed between common electrode layer 5 and data line 4.

[0111] In one possible implementation, combining Figures 8A-11B ,as well as Figure 12 As shown, the orthographic projection shape of data line 4 onto substrate 1 can be a polygonal line. The polygonal shape of data line 4 can avoid moiré patterns caused by interference with the grating of the 3D display device, further eliminating moiré patterns in the displayed image and improving the display effect.

[0112] Specifically, when the orthographic projection of data line 4 on substrate 1 coincides with the orthographic projection of skeleton portion 211 on substrate 1, the combination Figure 8A , Figure 10A as well as Figure 12 As shown, the orthographic projection of data line 4 onto substrate 1 and the orthographic projection of pixel electrode 2 onto substrate 1 have an overlapping region DD, and the shape of the overlapping region DD is a broken line.

[0113] Specifically, in combination Figure 8A , Figure 10A as well as Figure 12As shown, when the orthographic projection of the skeleton portion 211 of the pixel electrode 2 on the substrate 1 roughly overlaps with the orthographic projection of the overlapping region DD on the substrate 1, the skeleton portion 211 of the pixel electrode 2 is arranged along the data line 4, so that the liquid crystal disorder area coincides with the metal light-shielding area (overlapping region DD). The remaining part of the pixel electrode 2 adopts a horizontal open comb structure, which ultimately achieves the ultimate minimization of the dark area between sub-pixels.

[0114] Specifically, in conjunction with 8A, Figure 10A as well as Figure 12 As shown, the overlapping region DD forms an isosceles triangle with the column direction F2, and the bending angle β of the overlapping region DD is greater than 90° and less than 180°, which can further improve moiré patterns. Specifically, the bending angle β of the overlapping region DD can be set to 114°, and one angle θ1 between the zigzag overlapping region DD and the column direction F2 of the sub-pixel P can be set to 32°, and the other angle θ2 between the zigzag overlapping region DD and the column direction F1 of the sub-pixel P can be set to 32°. The long side of the bending angle β is arranged along the long side (column direction F2) of the pixel electrode 2, and its light-shielding area width (the long side of β) is as small as possible to eliminate moiré patterns, while the widths of the other two sides are unrestricted. Of course, in practical applications, the specific values ​​of β, θ1, and θ2 can be designed according to the actual application requirements, and are not limited here.

[0115] Specifically, a row of pixel electrodes 2 can be configured with one data line 4 (41 or 42); combined with Figure 12 As shown, each data line 4 includes a first sub-data line D01 and a second sub-data line D02 that are electrically connected to each other. The orthographic projection of the first sub-data line D01 onto the substrate 1 overlaps with the orthographic projection of the corresponding pixel electrode 2 region onto the substrate 1, forming an overlapping region DD. The orthographic projection of the second sub-data line D02 onto the substrate 1 does not overlap with the orthographic projection of the pixel electrode 2 region onto the substrate 1. For example, the orthographic projection of the second sub-data line D02 onto the substrate 1 is located between the orthographic projections of adjacent pixel electrode 2 regions onto the substrate 1. This allows the data lines 4 to be reused as a light-shielding pattern to avoid interference with the grating, reducing the difficulty of the manufacturing process and decreasing the thickness of the display panel.

[0116] It should be noted that, Figures 3A-11BThis is merely an illustrative description using a dual-gate structure on the display substrate. Specifically, each row of pixel electrodes 2 corresponds to two gate lines (G1, G2), and the orthographic projections of these gate lines (G1, G2) onto the substrate 1 lie between the orthographic projections of the regions of adjacent rows of pixel electrodes 2 onto the substrate 1. Furthermore, the two gate lines (31, 32) corresponding to the same row of pixel electrodes 2 are located on opposite sides of that row of pixel electrodes 2. For example, one gate line (e.g., 31) of the two gate lines (31, 32) corresponding to the same row of pixel electrodes 2 is electrically connected to the thin-film transistor (TFT) corresponding to the odd-numbered column of pixel electrodes 2 in that row, and the other gate line (e.g., 32) is electrically connected to the TFT corresponding to the even-numbered column of pixel electrodes 2 in that row. The gate line electrically connected to the TFT in the odd-numbered column of pixel electrodes 2 in that row (e.g., 31) can be positioned above the row, and the gate line electrically connected to the TFT in the even-numbered column of pixel electrodes 2 in that row (e.g., 32) can be positioned below the row. In specific implementations, the display substrate can also be a single-gate structure, that is, the gate line 3 extends along the row direction F1 of the pixel electrode 2, and one row of pixel electrode 2 corresponds to one gate line 3. The embodiments disclosed herein are not limited thereto.

[0117] Based on the same inventive concept, embodiments of this disclosure also provide a display panel, including a display substrate as provided in embodiments of this disclosure.

[0118] Based on the same inventive concept, embodiments of this disclosure also provide a display device, which includes a display panel as provided in embodiments of this disclosure.

[0119] In this embodiment of the present disclosure, in the same row of pixel electrodes 2, the adjacent parts of two adjacent pixel electrodes 2 are staggered, which can further reduce the spacing d between adjacent pixel electrodes 2 and reduce the display dark area between adjacent pixel electrodes 2. When the display substrate provided in this embodiment of the present disclosure is applied to a 3D display device, it can improve moiré patterns and enhance the display effect.

[0120] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0121] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations to the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A 3D display device, wherein, The 3D display device includes: a display panel and a grating located on one side of the display panel; the display panel includes: a display substrate; the display substrate includes: Substrate; Multiple gate lines, wherein the multiple gate lines are located on one side of the substrate and extend along a first direction; Multiple pixel electrodes are arranged in an array, and the pixel electrodes in the same row are electrically connected to at least one gate line. In the same row of pixel electrodes, the adjacent parts of two adjacent pixel electrodes are staggered. Each pixel electrode includes a skeleton portion extending in the main body direction perpendicular to the first direction; the skeleton portion is shaped like a broken line and has a bending point, and the skeleton portion has a bending angle at the bending point, the bending angle being greater than 90° and less than 180°; The display substrate also includes data lines extending in the main body direction perpendicular to the first direction; The pixel electrode includes a skeleton portion, and the orthographic projection of the data line on the substrate coincides with the orthographic projection of the skeleton portion on the substrate; Alternatively, the pixel electrode includes two skeleton portions and the orthographic projections of the two skeleton portions on the substrate coincide, and the orthographic projection of the data line on the substrate coincides with the orthographic projection of the skeleton portion on the substrate; Alternatively, the pixel electrode includes two skeleton portions with a gap between them, and the data line is projected onto the substrate at the gap between the two skeleton portions on the substrate.

2. The 3D display device as claimed in claim 1, wherein, The display substrate includes two electrode layers stacked together, the two electrode layers including a first electrode layer and a second electrode layer located on the side of the first electrode layer away from the substrate; The pixel electrodes are distributed across the two electrode layers.

3. The 3D display device as claimed in claim 2, wherein, In the same row of pixel electrodes, the same pixel electrode is located in the same electrode layer, and two adjacent pixel electrodes are located in different electrode layers.

4. The 3D display device as claimed in claim 3, wherein, Each pixel electrode includes branches extending from both sides of the skeleton portion.

5. The 3D display device as claimed in claim 3, wherein, Each pixel electrode includes: two skeleton portions with a gap, and a branch extending from the side of each skeleton portion away from the gap; The display substrate further includes a connecting portion extending along the first direction, wherein the orthographic projection of the connecting portion on the substrate is at least located in the gap between the two skeleton portions, and the two skeleton portions of the same pixel electrode are connected through the connecting portion.

6. The 3D display device as claimed in claim 2, wherein, Each pixel electrode includes a first sub-electrode and a second sub-electrode arranged sequentially along a direction parallel to the first direction. The first sub-electrode and the second sub-electrode of the same pixel electrode are located in different electrode layers and are connected through vias.

7. The 3D display device as claimed in claim 6, wherein, Both the first sub-electrode and the second sub-electrode include: the skeleton portion, and a branch extending from the side of each skeleton portion away from the other skeleton portion.

8. The 3D display device as claimed in claim 7, wherein, The orthographic projection of the skeleton portion of the first sub-electrode onto the substrate coincides with the orthographic projection of the skeleton portion of the second sub-electrode onto the substrate.

9. The 3D display device as claimed in claim 7, wherein, The orthographic projection of the skeleton portion of the first sub-electrode onto the substrate is parallel to the orthographic projection of the skeleton portion of the second sub-electrode onto the substrate, and there is a gap between them.

10. The 3D display device as claimed in claim 9, wherein, The first sub-electrode further includes: a first portion that is connected to the skeleton portion and extends away from the side of the second sub-electrode; The second sub-electrode further includes: an extension portion connected to the skeleton portion and extending toward the first sub-electrode side; The first part and the extension have an overlapping area in the orthographic projection on the substrate, and the first part and the extension are connected by a hole in the overlapping area.

11. The 3D display device as claimed in claim 10, wherein, The second sub-electrode also includes a protrusion configured to be electrically connected to the source or drain. The extension and the protrusion are located at the same end of the pixel electrode.

12. The 3D display device according to any one of claims 2-11, wherein, The display substrate further includes a common electrode layer; a portion of the data line's orthographic projection onto the substrate is located within the area where the pixel electrode's orthographic projection onto the substrate is located.

13. The 3D display device as claimed in claim 2, wherein, When the pixel electrode includes a skeleton portion, or when the pixel electrode includes two skeleton portions and the orthographic projections of the two skeleton portions on the substrate coincide, the data line is located between the first electrode layer and the substrate. The display substrate also includes an organic film layer located between the first electrode layer and the data line.

14. The 3D display device as claimed in claim 2, wherein, When the pixel electrode includes two skeleton portions and there is a gap between the two skeleton portions, the data line is located in the first electrode layer; or, the data line is located between the first electrode layer and the substrate.

15. The 3D display device as claimed in claim 1, wherein, In the pixel electrodes parallel to the first direction and in the same row, the minimum spacing between two adjacent pixel electrodes ranges from 0 to 2 μm.

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