Quantum computing control device, quantum computer and quantum computing control method

Abstract

The quantum computing control device includes a control signal generation unit and a qubit module. The qubit module includes an observation unit, a qubit substrate, a control circuit unit, an observation circuit unit, and a signal processing circuit unit. Multiple qubits are grouped into multiple groups, each consisting of qubits with the same positional relationship to the others, and arranged on the qubit substrate. The control signal generation unit generates control signals and command signals. The control signals are used to execute one or more spatially uniform first operations and one spatially non-uniform second operation at a lower frequency than the first operations. The command signals are used to control the control circuit unit to execute the first and second operations, which are operations on the qubits on the qubit substrate. The control circuit unit branches the control signals to the groups and, according to the command signals, controls the output of the control signals to each qubit on the qubit substrate. The observation circuit unit observes the state of each qubit that has received the first or second operation. The signal processing circuit unit sends the observation signals of each qubit to the observation unit.

Description

Technical Field

[0001] This invention relates to a quantum computing control device, a quantum computer, and a quantum computing control method.

[0002] This application claims priority based on U.S. Provisional Patent Application No. 63180500 and U.S. Patent Application No. 2021-091832. The description of the provisional application is incorporated herein by reference in its entirety. Background Technology

[0003] A superconducting decoding quantum computing circuit with a three-dimensional structure in which signal lines enter and exit the substrate relative to the qubits is proposed (e.g., Patent Document 1).

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2020-061447 Summary of the Invention

[0007] The problem the invention aims to solve

[0008] In quantum computers using superconducting qubits, the qubit substrate, housed within a cryostat such as a dilution refrigerator, needs to be connected via cables to control / observation devices placed at room temperature. Because independent control of all qubits is desired, previously each qubit required more than one wire. The cables used for such wiring were radio wave coaxial cables or microwave coaxial cables, with dimensions on the order of millimeters. This is larger than the wiring used in current integrated circuits, thus posing an integration challenge.

[0009] This invention was made in view of the following problem, and its object is to reduce the number of wires in devices using qubits. Furthermore, it aims to achieve robust control over deviations in circuit parameters even with the reduction in the number of wires.

[0010] Solution for solving the problem

[0011] To address the aforementioned problems, a quantum computing control device according to a certain embodiment of the present invention includes a control signal generation unit, an observation unit for receiving observation signals representing the state of each qubit, and a qubit module. The qubit module includes a qubit substrate unit carrying multiple qubits, a control circuit unit, an observation circuit unit, and a signal processing circuit unit. Multiple qubits are grouped into multiple groups consisting of multiple qubits with the same positional relationship to each other and arranged on the qubit substrate unit. The control signal generation unit generates control signals and command signals. The control signals are used to execute one or more types of spatially uniform first operations and spatially non-uniform second operations performed at a frequency lower than that of the first operations. The command signals are used to control the control circuit unit to execute the first and second operations, which are operations on the qubits on the qubit substrate unit. The control circuit unit branches the control signals into groups and, according to the command signals, controls the output of the control signals to each qubit on the qubit substrate unit. The observation circuit unit observes the state of each qubit that has received the first or second operation. The signal processing circuit unit sends the observation signals of each qubit to the observation unit.

[0012] According to this scheme, the amount of wiring in devices that use qubits can be reduced.

[0013] In one embodiment of the quantum computing control device, the control circuit section controls the output of control signals based on command signals, such that in the first operation, control signals are output to all qubits on the quantum bit substrate section, and in the second operation, control signals are output to only the qubits of a specific control target on the quantum bit substrate section.

[0014] In a quantum computing control device of a certain implementation, the first operation may be a syndrome extraction operation, and the second operation may be a logic quantum gate operation.

[0015] In one embodiment of the quantum computing control device, the signal processing circuit may perform quantum error correction decoding processing.

[0016] In one embodiment of the quantum computing control device, the control circuitry may send a common control signal to each group of quantum bit substrates in a first operation based on a command signal, and send a control signal to each quantum bit on the quantum bit substrate individually in a second operation.

[0017] In a certain embodiment of the quantum computing control device, when the number of signal lines for transmitting control signals is set to k' and the number of signal lines for transmitting command signals is set to s, the number of wirings connecting the control signal generation unit and the quantum bit module is k'+s or less.

[0018] In one embodiment of the quantum computing control device, the signal processing circuit can reduce the number of wires connecting the observation unit and the quantum bit module by sending only the quantum states of the logic qubits that have undergone error correction processing to the observation unit.

[0019] In a quantum computing control device according to a certain implementation, when the code length of the logic qubit formed by the qubit is set to d, the ratio of the frequency of the first operation to the frequency of the second operation is d or more.

[0020] In one embodiment of the quantum computing control device, the qubits may be solid-state qubits.

[0021] In one embodiment of the quantum computing control device, at least the qubit module may be placed inside a refrigerator.

[0022] In one embodiment of the quantum computing control device, the qubit may be a qubit that includes a superconducting qubit and operates at extremely low temperatures.

[0023] In one embodiment of the quantum computing control device, the control circuit section may include a memory for storing the waveforms of the control signals.

[0024] Another aspect of the present invention is a quantum computer. This quantum computer includes a quantum computing control device according to any of the above embodiments.

[0025] According to this scheme, a quantum computer with a reduced number of wires can be realized.

[0026] Another aspect of the present invention is a quantum computing control method using a qubit substrate, a control circuit, an observation circuit, and a signal processing circuit. The method comprises the following steps: generating a control signal and a command signal, wherein the control signal is used to execute one or more types of spatially uniform first operations and a spatially non-uniform second operation performed at a frequency lower than that of the first operations; the command signal is used to control the control circuit to execute the first and second operations, wherein the first and second operations are operations on multiple qubits arranged on the qubit substrate, which are grouped into multiple groups consisting of multiple qubits with the same positional relationship to each other; using the control circuit to branch the control signal to the groups, and controlling the output of the control signal to each qubit on the qubit substrate according to the command signal; using the observation circuit to observe the state of each qubit that has received the first or second operation; using the signal processing circuit to perform quantum error correction decoding processing; and determining whether the computation using the qubits has ended.

[0027] According to this scheme, the amount of wiring in devices that use qubits can be reduced.

[0028] It should be noted that any combination of the above-mentioned constituent elements, or any way of changing the description of the present invention among devices, methods, systems, recording media, computer programs, etc., is also valid as a solution of the present invention.

[0029] Invention Effects

[0030] According to the present invention, the number of wires in devices using qubits can be reduced. Furthermore, even with the reduction in the number of wires, robust control can be achieved against deviations in circuit parameters. Attached Figure Description

[0031] Figure 1 This is a schematic diagram showing the structure of a conventional quantum computer.

[0032] Figure 2 This is a functional block diagram of the quantum computing control device according to the first embodiment.

[0033] Figure 3 This is a schematic diagram showing a single cell of qubits arranged on a qubit substrate.

[0034] Figure 4 This is a schematic diagram showing qubits grouped and arranged on a qubit substrate.

[0035] Figure 5 This is a schematic diagram illustrating the execution of calibrator extraction and logic quantum gate operations.

[0036] Figure 6 yes Figure 2 Detailed diagrams of the control signal generation unit, qubit substrate unit, and control circuit unit of the quantum computing control device.

[0037] Figure 7 yes Figure 2 Detailed diagram of the control switches for the quantum computing control device.

[0038] Figure 8 This is a diagram showing the control switches associated with the corrector extraction operation.

[0039] Figure 9 This is a diagram showing the control switches associated with the calibrator extraction operation and subsequent logic quantum gate operations.

[0040] Figure 10 This is a detailed diagram of the quantum bit substrate and control circuit of the quantum computing control device according to the second embodiment.

[0041] Figure 11This is a flowchart of the quantum computing control method according to the fourth embodiment.

[0042] Figure 12 This is a functional block diagram of a modified quantum computing control device.

[0043] Figure 13 This is a schematic diagram showing a quantum bit configured as a square lattice. Detailed Implementation

[0044] The present invention will now be described based on preferred embodiments and with reference to the accompanying drawings. These embodiments are illustrative and do not limit the invention. All features and combinations thereof described in the embodiments are not necessarily essential features of the invention. Identical or equivalent constituent elements, components, and processes shown in the various drawings are labeled with the same reference numerals, and repetitive descriptions are omitted where appropriate. Furthermore, the scales and shapes of the parts shown in the figures are provided for ease of explanation and are not intended to be limiting unless specifically mentioned. Additionally, the use of terms such as "first" and "second" in this specification or claims does not imply any order or importance unless specifically mentioned, but is merely used to distinguish certain structures from others. Furthermore, less important components are omitted from the description of embodiments in the accompanying drawings.

[0045] Before describing the specific implementation, let's first explain some basic knowledge. In a quantum computer using superconducting qubits (hereinafter referred to as a "superconducting quantum computer"), the qubits and their associated electronic circuitry are placed inside a refrigerator. The refrigerator is maintained at a low temperature of several Kelvin to several tens of mK. In particular, the superconducting qubits are placed at an extremely low temperature of around 10 mK. In order to perform calculations using the superconducting quantum computer, it is necessary to perform corrector extraction operations and logic quantum gate operations on the qubits for quantum error correction. These operations are performed from a control device or PC located outside the refrigerator. The outside of such a refrigerator is usually at room temperature. In addition, the observation signal output from the qubits is still observed by a measuring device located at room temperature outside the refrigerator. In the past, such operations or observations were mainly performed using software. Therefore, a large number of cables are needed to connect the electronic circuitry inside the refrigerator and the device at room temperature. For example, when the total number of qubits is set to N, 2 × N cables are typically required to control and observe each qubit individually. The cables used for such wiring are radio wave coaxial cables or microwave coaxial cables, measuring only a few millimeters in size. This is larger than the wiring used in current integrated circuits, thus posing a significant integration challenge. Therefore, to achieve the integration of superconducting quantum computers, it is crucial to reduce the number of wires connecting the cooling system to the ambient temperature environment.

[0046] Figure 1The diagram schematically illustrates the structure of a conventional quantum computer 100. The quantum computer 100 includes a control device 101, an observation device 102, a quantum bit substrate 103 carrying qubits, a first electronic circuit 104, and a second electronic circuit 105. The control device 101 and the observation device 102 are placed at room temperature. The quantum bit substrate 103 and the first electronic circuit 104 are placed in an extremely low temperature environment of approximately 0.01 K within a refrigerator 106. The second electronic circuit 105 is placed in a low temperature environment of approximately 4 K within the refrigerator 106. The control device 101 is connected to the refrigerator 106 via a control line 107. The observation device 102 is connected to the refrigerator 106 via an observation line 108. The number of qubits carried on the quantum bit substrate 103 is set to N. It is said that N requires 10 qubits for practical applications. 8 Therefore, in order to independently control and observe all the qubits on the qubit substrate 103, N control lines 107 and observation lines 108 are needed, and their total number reaches 2 × 10⁻⁶. 8 As mentioned above, in existing methods that require extensive wiring, it is difficult to integrate the device due to limitations in internal space and cooling capacity of the refrigerator.

[0047] Typically, in many quantum computers, quantum error correction using surface codes (hereinafter referred to as "codes") is employed as a method to protect information from noise. In this method, a logical qubit is redundantly encoded using multiple physical qubits (hereinafter referred to as "qubits"). These physical qubits are arranged in a lattice on a two-dimensional plane. By increasing the size of the lattice (i.e., increasing the number of physical qubits), the redundancy of the code can be increased, thus improving fault tolerance.

[0048] The operations on qubits in quantum computers discussed in this specification are broadly categorized into "corrector extraction operations" and "logic quantum gate operations".

[0049] As described later, the collimator extraction operation (the operation of rapidly reading out collimator bits for quantum error correction) is an operation with translational symmetry in two-dimensional space (i.e., performing the same control operation on multiple groups of qubits whose positions are identical). Utilizing this property, the control signal for the collimator extraction operation can be branched by the control signal generation unit and sent to each qubit group via the control circuit unit. In other words, the collimator extraction operation is a spatially uniform operation. Furthermore, the collimator extraction operation is performed periodically in time.

[0050] In contrast, logic quantum gate operations for qubits do not possess spatial translation symmetry. That is, the control signals used in logic quantum gate operations are only sent to the specific qubit being controlled. In other words, logic quantum gate operations are spatially non-uniform operations. Logic quantum gate operations are performed during periodically repeated collateral extraction operations.

[0051] In the operation of a quantum computer, logic quantum gate operations are performed less frequently than calibrator extraction operations. Typically, when the code length of the logic qubit formed from the physical qubit is set to d, if the ratio of the frequency of calibrator extraction operations to the frequency of logic quantum gate operations is set to be greater than d, then logic quantum gate operations can be performed using the error-corrected logic qubit.

[0052] [First Implementation Method]

[0053] Figure 2 A functional block diagram of the quantum computing control device 1 according to the first embodiment is shown. The quantum computing control device 1 includes a control signal generation unit 11, an observation unit 12, and a quantum bit module 13. The quantum bit module 13 includes a quantum bit substrate 14 carrying multiple quantum bits, a control circuit 15, an observation circuit 16, and a signal processing circuit 17. The control signal generation unit 11 and the control circuit 15 are connected via a control line 20. The observation unit 12 and the signal processing circuit 17 are connected via an observation line 21. The quantum bit substrate 14 and the control circuit 15 are connected via a first internal wiring 22. The quantum bit substrate 14 and the observation circuit 16 are connected via a second internal wiring 23. The observation circuit 16 and the signal processing circuit 17 are connected via a third observation line 24.

[0054] The control signal generation unit 11 generates control signals for performing operations on the qubits on the qubit substrate unit 14, and command signals for controlling the control circuit unit 15 to perform such operations. These control signals and command signals will be described in detail later.

[0055] The observation unit 12 receives observation signals representing the state of each quantum bit.

[0056] A plurality of qubits are mounted on the qubit substrate 14. These qubits are grouped on the qubit substrate 14 into multiple groups consisting of multiple qubits in which each qubit has the same positional relationship with the others. This grouping will be described in detail later.

[0057] The control circuit section 15 branches the control signal into the groups described above, and controls the output of the control signal to each quantum bit on the quantum bit substrate section 14 according to the command signal generated by the control signal generation section 11.

[0058] The observation circuit section 16 observes the state of each qubit that has undergone the above-described operation.

[0059] The signal processing circuit section 17 sends the observation signals of each quantum bit to the observation section 12.

[0060] Figure 3 The qubits arranged on the qubit substrate 14 in this embodiment are schematically shown. Each qubit is regularly arranged in a two-dimensional space. Specifically, this arrangement has the following structure: a rectangular structure (hereinafter referred to as a "cell") is repeatedly arranged in the two-dimensional direction. This rectangular structure has one qubit at each vertex, edge, and interior (a total of four qubits when the number of qubits at the vertices is 1 / 4 and the number of qubits at the edges is 1 / 2). That is, the qubits are arranged on the qubit substrate 14 with translational symmetry. The qubits located on the edges of the cells are used to form codes and are called data qubits. On the other hand, the qubits located at the vertices and interiors of the cells are used as auxiliary qubits for observing the quantum state of the data qubits through cross-resonance gate operation and are called correction qubits. These qubits can be fixed-frequency transmission qubits or each have an inherent resonant frequency.

[0061] Here, we consider the case where the qubits are transport-type qubits and the cross-resonant gate is used as a two-qubit gate. Additionally, we consider the frequency relationship of the qubits as follows: Figure 4 The corrector qubits of AE and the data qubits of AE are allocated into 10 cases. At this point, the definition is... Figure 9 The square lattice G1 is shown. Lattice G1 spans multiple lattices, but has translational symmetry in units of 20 qubits, depending on the action determined by the code and the method of operation in the extraction operation.

[0062] Use with Figure 4 A translationally symmetric lattice G1 is used to group qubits disposed on a qubit substrate 14. Figure 4In the diagram, lattices G1, G2, G3, and G4 are shown as representatives of such lattices. Lattices G1, G2, G3, and G4 naturally have the same qubit configuration. Hereinafter, the qubits on the qubit substrate 14 are grouped into P lattices according to all of G1, G2, G3, G4, ..., GP. Furthermore, hereafter, k represents the number of qubits contained in each lattice. As shown in lattice G1, in this example, k = 20. Of course, lattices G1, G2, G3, G4, ..., GP all have the same geometric qubit configuration. That is, the qubits on the qubit substrate 14 are grouped into groups consisting of multiple qubits whose positional relationships are the same. In other words, these qubits are arranged in a tile-like pattern (in this example, lattices G1, G2, G3, G4, ...) on the qubit substrate 14 in a two-dimensional spatial direction. Hereinafter, the aforementioned lattice is sometimes referred to as a "group".

[0063] In quantum error correction using surface codes, the codes possess translational symmetry. Therefore, the collateral extraction operation for quantum error correction can be performed simultaneously across all lattices. For example, to perform collateral extraction independently on qubits within lattice G1, control lines are connected to k (20 in this example) qubits constituting lattice G1, and control signals for collateral extraction are transmitted. At this time, the same control signals as those for lattice G1 can also be used to perform collateral extraction operations on lattices G2, G3, G4, ..., GP. It should be noted that the control signals transmitted from the control circuit section 15 to the qubit substrate section 14 are periodically repeated on a per-lattice (group) basis. That is, the collateral extraction operation is also performed periodically in time.

[0064] Provided that the circuits constituting the qubits are sufficiently uniform and that deviations in the circuit parameters are robustly absorbed by the control waveform, the collimator extraction operation can be performed concurrently across the entire lattice.

[0065] In this case, after the control lines 20 connecting the control signal generation unit 11 and the control circuit unit 15 are common across each lattice (group), they are branched to each lattice (group) by the control circuit unit 15, thereby reducing the number of wirings. For example, when the total number of qubits on the qubit substrate unit 14 is set to N, the number of lattices (groups) is N / k. As explained above, the collimator extraction operation can be performed common across all lattices, therefore, the control lines 20 only need to have the number of qubits within the lattice (group). Therefore, the number of control lines that previously required a total number of qubits on the order of N can be reduced to k / N (times). For example, in this case, k = 20, therefore, the number of control lines 20 can be reduced to 20 / N (times). In this way, with respect to the collimator extraction operation, the control lines for the collimator extraction operation can be common by utilizing the symmetry of the code and the grouping of qubits. Hereinafter, the operation with spatial translational symmetry (more generally, spatially uniform operation) such as the collimator extraction operation will be referred to as the "first operation".

[0066] On the other hand, logic quantum gate operations are performed by manipulating the qubits of specific targets during the periodically repeated calibrator extraction operation. That is, logic quantum gate operations do not possess spatial translational symmetry or temporal periodicity. Therefore, unlike calibrator extraction operations, logic quantum gate operations cannot be performed jointly in the aforementioned lattice(s). Specifically, the control signals used for logic quantum gate operations need to be sent only to the qubits of specific targets. Therefore, logic quantum gate operations cannot be performed by simply commonalizing the control lines 20 and branching them to each lattice(s). Hereinafter, operations such as logic quantum gate operations that lack translational symmetry (more generally, spatially non-uniform operations) will be referred to as "second operations."

[0067] The number of calibrator extraction operations (quantum error correction) required for a single logic quantum gate operation is determined by the code length d of the qubit (d > 1). Typically, the required number of calibrator extraction operations is greater than d. Therefore, in this case, the ratio of the frequency of calibrator extraction operations to the frequency of logic quantum gate operations (and thus, the ratio of the execution time of calibrator extraction operations to the execution time of logic quantum gate operations) is greater than d. Figure 5 The diagram schematically illustrates the execution of the collimator extraction operation and the logic quantum gate operation. Here, lattices G1, G2, and G3 are representatively shown, each containing six qubits. It should be noted that... Figure 5 The boxes labeled "corrector extraction operation" indicate the same processing. Figure 5 This shows that these operations are performed periodically over time.

[0068] The configuration of qubits in the lattice described above is illustrative and not limited to this.

[0069] Figure 13 Schematic illustration of configuration with Figure 4 Quantum bits with different lattices GI, GII, GIII, and GIV. Here, four types of correction qubits for AD and four types of data qubits for xw are allocated, resulting in a total of eight types of qubits. As shown in lattice GI, in this example, k = 8. As mentioned above, the number of control lines, which was previously on the order of N qubits, can be reduced to k / N. Therefore, in this example (k = 8), the number of control lines is reduced to 8 / N. It should be noted that, of course, the second operation described above can also be performed in the case of k = 8.

[0070] As a surface code with translational symmetry, error-correcting codes only require proximity interactions. That is, interactions between distant qubits are not needed. For example, in qubits closely packed in a two-dimensional lattice, it is sufficient for two-qubit gates to be executed only next to each other on adjacent qubits.

[0071] As explained above, in quantum error-correcting codes, qubits are classified into two types with different functions. One is called the data qubit, which is used to maintain the quantum state. The other is called the parity qubit, which is used to check the parity value of the data qubit. Data qubits and parity qubits are arranged alternately on a square lattice. That is, when viewed from the data qubit, the adjacent qubits above, below, left, and right are parity qubits, and vice versa.

[0072] Unlike classical error-correcting codes, quantum error-correcting codes do not allow direct observation of the value of the data qubit, but they do allow the parity check value. To observe the state of the data qubit and obtain the parity check value without destroying its state, a two-qubit gate is required between the data qubit and the corrector qubit. In the case of a square lattice, the parity check value is collected into the corrector qubit by performing a two-qubit gate four times on a data qubit. Quantum entanglement is used in this process. The parity check value of the data qubit can be obtained by measuring only the corrector qubit.

[0073] exist Figure 13 In the configuration example shown, four types of correction qubits (A, B, C, D) and four types of data qubits (w, x, y, z) are allocated, resulting in a total of eight frequency qubits. For example... Figure 13As shown, a two-dimensional plane is completely filled with squares, each with a data qubit as its vertex and shaded by two different shades of gray. A correction qubit is positioned at the center of each square. This square represents the region responsible for the parity check value obtained by the correction qubit. This indicates that the correction qubit of AD obtains the parity check value of the data qubit of wz. In this case, the parity check concerns whether the number of identical bit values ​​(0 or 1) in the data qubit of wz is even (wxyz = 0000, 0011, 0101, 0110, 1001, ...) or odd (wxyz = 0001, 0010, 0100, 0111, ...). This parity check value is obtained by calculating the sum of the bit values ​​using a two-qubit gate (0 mod 2 in the even case, 1 mod 2 in the odd case) and observing the correction qubit.

[0074] Here, pay attention Figure 13 The squares are distinguished by two shades of gray. To maintain the quantum mechanical state, in addition to bit reversal, parity check values ​​related to phase reversal are also needed. These parity check values ​​relate to whether there are an even number (wxyz = ++++, ++--, +-+-, ...) or an odd number of identical values ​​when projecting the qubit values ​​onto the X-axis of the Bloch sphere. Quantum error correction constructs a parity check matrix based on the parity checks obtained from the corrector qubits used for bit reversal and corrects bit reversal errors through decoding. Quantum error correction also constructs a parity check matrix based on the parity checks obtained from the corrector qubits used for phase reversal and corrects phase reversal errors through decoding. To obtain these two different parity check values, the square lattice is completely filled with squares of two shades of gray (the responsible regions related to corrector extraction).

[0075] As explained above, qubits are classified as follows:

[0076] (1) Data qubits

[0077] (2) Syndrome qubit,

[0078] The square lattices are arranged alternately. Among them, the collimator qubits are classified as follows:

[0079] (2-A) Obtain the parity check value related to bit reversal

[0080] (2-B) Obtain parity check related to phase reversal.

[0081] The inventors have discovered that by controlling the output of control signals to the qubits on the qubit substrate 14, it is possible to perform both the first and second operations using a structure that unifies the control lines 20 described above. For example, by controlling the output of the control signals to output control signals to all qubits on the qubit substrate 14 in the first operation, and to output control signals only to specific qubits on the qubit substrate 14 that are subject to control in the second operation, both the first and second operations can be performed.

[0082] Figure 6 Details of the control signal generation unit 11, the qubit substrate unit 14, and the control circuit unit 15 of the quantum computing control device 1 are shown. The control circuit unit 15 includes a command decoder 151 and a maximum of N×k' control switches 152 (where N is the total number of qubits on the qubit substrate unit 14, and k' is the number of control signal lines described below). The control lines 20 connecting the control signal generation unit 11 and the control circuit unit 15 include k' (k < k' << N) control signal lines 201 and s command signal lines 202. The control circuit unit 15 is connected to the lattices G1, G2, G3, G4, ..., GP via k qubit control lines 221, 222, and 223, respectively.

[0083] Figure 7 Details of the control switches 152 in the control circuit section 15 of the quantum computing control device 1 are shown. Here, the number of lattices is set to 3 (represented by G1, G2, and G3), the number of qubits contained in each lattice is set to k = 6, the number of qubit control lines 221, 222, and 223 is set to 6 (equal to k), the total number of qubits on the qubit substrate section 14 is set to N = 18 (= k × number of lattices), the number of control signal lines is set to k' = 10, and the number of control switches 152 is set to 180 (= N × k'). The control switches 152 are configured in a matrix. Each row (horizontally arranged) of this matrix corresponds to the qubit control lines 221, 222, and 223, and each column (vertically arranged) corresponds to the control signal line 201. Here, the rows of this matrix are sequentially designated as row 1, row 2, ..., row 18 from bottom to top. Similarly, the columns of this matrix are sequentially designated as column 1, column 2, ..., column 10 from left to right. Using the components of this matrix, each control switch 152 is represented as SW(1,1), SW(1,2), ..., SW(1,10), SW(2,1), ..., SW(18,1), ..., SW(18,10). Note that... Figure 6 The control signal line 201 is drawn horizontally, but... Figure 7The control signal line 201 is depicted vertically. The outputs of the control switches connected to the same qubit, shown in the horizontal column, are combined into a single line and connected to the qubit via a multiplexer, etc. It should be noted that, for the sake of simplicity, the command signal line 202 and the command decoder 151 are omitted from the illustration.

[0084] Each control switch 152 consists of one input, one output, and one switch control line (not shown in the figure). The control switch 152 performs an action of either outputting or not outputting the control signal input to the input line to the output line based on the enable signal input to the switch control line (i.e., performing an on / off action).

[0085] The control signals generated by the control signal generation unit 11 are input to the control circuit unit 15 through k' control signal lines 201. Each control signal input to the control circuit unit 15 is branched into P signals and used for lattices G1, G2, G3, ..., GP, which are then input to the control switch 152 respectively.

[0086] On the other hand, the command signal generated by the control signal generation unit 11 is input to the command decoder 151 via the command signal line 202. The command decoder 151 decodes the input command signal and sequentially instructs each control switch 152 on and off the timing of its output via the switch control lines. It should be noted that the total number of switch control lines is N×k'. Furthermore, since the number of signal lines is s, a maximum of 2 can be set through decoding. s Type of command.

[0087] In the first operation (i.e., the calibrator extraction operation), the control switch 152 is controlled so that the control signal generated by the control signal generation unit 11 for performing the first operation is sent to each quantum bit corresponding to all the lattices (G1, G2, G3, ..., GP) on the quantum bit substrate unit 14 at the same time.

[0088] Figure 8The control switches associated with the collimator extraction operation are shown. As shown, the control switches used in the collimator extraction operation are a total of 18: SW(1,6), SW(2,5), SW(3,4), SW(4,3), SW(5,2), SW(6,1), SW(7,6), SW(8,5), SW(9,4), SW(10,3), SW(11,2), SW(12,1), SW(13,6), SW(14,5), SW(15,4), SW(16,3), SW(17,2), and SW(18,1). This corresponds to the diagonal components of the submatrix corresponding to each lattice. During the collimator extraction operation, these 18 control switches are periodically turned on and off. It should be noted that in this case, only 6 of the k' (=10) control signal lines 201 are used.

[0089] On the other hand, in the second operation (i.e., the logic quantum gate operation), the command signal only turns on the switches of the N×k' control switches 152 that are associated with the qubit of the specific controlled object. Therefore, the control signal generated by the control signal generation unit 11 for performing the second operation is only sent to the qubit of the specific controlled object on the qubit substrate unit 14.

[0090] exist Figure 9 In this diagram, only the control switches required for the first operation and the subsequent second operation are shown. From top to bottom, Q1, Q2, ..., Q6 represent the qubits contained in each lattice G1, G2, G3. Hereinafter, using the lattice numbers G1, G2, G3 and the qubit numbers Q1, Q2, ..., Q6 within each lattice, each qubit on the qubit substrate 14 is represented as Q(G1, Q1), Q(G1, Q2), ..., Q(G1, Q6), Q(G2, Q1), ..., Q(G2, Q6), Q(G3, Q1), ..., Q(G3, Q6). The control signal line 201 includes 10 control signal lines 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018, 2019, and 20110. Here, as commands related to logic quantum gate operations, we posit two types, command A and command B. Command A and command B are represented by upward and downward-facing triangles, respectively. Command A and command B control 10 qubits of a specific controlled object simultaneously and independently.

[0091] Command A sets Q(G1, Q1), Q(G1, Q2), Q(G2, Q1), Q(G2, Q3), Q(G2, Q4), Q(G2, Q6), Q(G3, Q3), Q(G3, Q4), Q(G3, Q5), and Q(G3, Q6) as control objects. Command B sets Q(G1, Q2), Q(G1, Q3), Q(G1, Q4), Q(G2, Q1), Q(G2, Q2), Q(G2, Q5), Q(G2, Q6), Q(G3, Q4), Q(G3, Q5), and Q(G3, Q6) as control objects.

[0092] The following describes the contents of the control signals transmitted by the 10 control signal lines 2011 to 20110 that constitute the control signal line 201.

[0093] Control signal line 2011 transmits control signals for the corrector extraction operation and for commands A and B for Q(G2, Q1).

[0094] Control signal line 2012 transmits control signals for the corrector extraction operation and for commands A and B for Q(G1, Q2).

[0095] Control signal line 2013 transmits control signals for the corrector extraction operation and for command A for Q(G3, Q3) and command B for Q(G1, Q3).

[0096] Control signal line 2014 transmits control signals for the corrector extraction operation and for commands A and B for Q(G3, Q4).

[0097] Control signal line 2015 transmits control signals for the corrector extraction operation and for commands A and B for Q(G3, Q5).

[0098] Control signal line 2016 transmits control signals for the corrector extraction operation and for commands A and B for Q(G2, Q6).

[0099] Control signal line 2017 transmits control signals for command A for Q(G2, Q3) and command B for Q(G2, Q2).

[0100] Control signal line 2018 transmits control signals for commands A and B for Q(G3, Q6).

[0101] Control signal line 2019 transmits control signals for command A for Q(G1, Q1) and command B for Q(G1, Q4).

[0102] Control signal line 20110 transmits control signals for command A for Q(G2, Q4) and command B for Q(G2, Q5).

[0103] The following describes the switching operations of SW(1,1) to SW(18,10).

[0104] When performing the corrector extraction operation, SW(1,6), SW(2,5), SW(3,4), SW(4,3), SW(5,2), SW(6,1), SW(7,6), SW(8,5), SW(9,4), SW(10,3), SW(11,2), SW(12,1), SW(13,6), SW(14,5), SW(15,4), SW(16,3), SW(17,2), and SW(18,1) are set to ON.

[0105] The switching actions when executing the logic quantum gate operation of command A are as follows.

[0106] When performing the logic quantum gate operation of command A on Q(G1, Q1), SW(6, 9) is turned on.

[0107] When performing the logic quantum gate operation of command A on Q(G1, Q2), SW(5, 2) is turned on.

[0108] When performing the logic quantum gate operation of command A on Q(G2, Q1), SW(12, 1) is turned on.

[0109] When performing the logic quantum gate operation of command A on Q(G2, Q3), SW(10, 3) is turned on.

[0110] When performing the logic quantum gate operation of command A on Q(G2, Q4), SW(9, 4) is turned on.

[0111] When performing the logic quantum gate operation of command A on Q(G2, Q6), SW(7, 6) is turned on.

[0112] When performing the logic quantum gate operation of command A on Q(G3, Q3), SW(16, 3) is turned on.

[0113] When performing the logic quantum gate operation of command A on Q(G3, Q4), SW(15, 4) is turned on.

[0114] When performing the logic quantum gate operation of command A on Q(G3, Q5), SW(14, 5) is turned on.

[0115] When performing the logic quantum gate operation of command A on Q(G3, Q6), SW(13, 8) is turned on.

[0116] The switching action when executing the logic quantum gate operation of command B is as follows.

[0117] When performing the logic quantum gate operation of command B on Q(G1, Q2), SW(5, 2) is turned on.

[0118] When performing the logic quantum gate operation of command B on Q(G1, Q3), SW(4, 3) is turned on.

[0119] When performing the logic quantum gate operation of command B on Q(G1, Q4), SW(3, 9) is turned on.

[0120] When performing the logic quantum gate operation of command B on Q(G2, Q1), SW(12, 1) is turned on.

[0121] When performing the logic quantum gate operation of command B on Q(G2, Q2), SW(11, 7) is turned on.

[0122] When performing the logic quantum gate operation of command B on Q(G2, Q5), SW(8, 10) is turned on.

[0123] When performing the logic quantum gate operation of command B on Q(G2, Q6), SW(7, 6) is turned on.

[0124] When performing the logic quantum gate operation of command B on Q(G3, Q4), SW(15, 4) is turned on.

[0125] When performing the logic quantum gate operation of command B on Q(G3, Q5), SW(14, 5) is turned on.

[0126] When performing the logic quantum gate operation of command B on Q(G3, Q6), SW(13, 8) is turned on.

[0127] Here, for example, to control Q(G1, Q1), control signal lines 2011 and 2019 are made to correspond. Control signal line 2016 is used for the collimator extraction operation via SW(6, 1). Control signal line 2019 is used for the logic quantum gate operation via SW(6, 9). Thus, for Q(G1, Q1), multiple control lines correspond to one qubit. The same applies to Q(1, 4), Q(2, 2), Q(2, 3), Q(2, 4), Q(2, 5), and Q(3, 6).

[0128] In contrast, for Q(G1,Q2), Q(G1,Q3), Q(G1,Q5), Q(G1,Q6), Q(G2,Q1), Q(G2,Q6), Q(G3,Q1), Q(G3,Q2), Q(G3,Q3), Q(G3,Q4), and Q(G3,Q5), one control line corresponds to one qubit.

[0129] The wiring and control switch configurations described above are illustrative and not limited to these examples.

[0130] As explained above, the control circuit section 15 controls the output of control signals based on command signals, such that in the first operation, control signals are output to all qubits on the quantum bit substrate section 14, and in the second operation, control signals are output to only the qubits of a specific control target on the quantum bit substrate section 14.

[0131] Furthermore, the control circuit unit 15 can also, based on the command signal generated by the control signal generation unit 11, send a common control signal to each group of the quantum bit substrate unit 14 in the first operation, and send a control signal individually to each quantum bit on the quantum bit substrate unit 14 in the second operation. Thus, a spatially uniform first operation can be performed jointly in all groups, while a spatially non-uniform second operation can be performed only on specific quantum bits at a lower frequency than the first operation.

[0132] The qubit module 13, which includes the control circuit 15, observation circuit 16, and signal processing circuit 17 described above, is preferably implemented in hardware. Thus, in this embodiment, by solving the quantum computing processes that were previously performed in software using hardware, the qubit module 13 can be placed inside the refrigerator.

[0133] As explained above, by applying k' control signal lines 201 and s command signal lines 202 to the control line 20, the number of control lines 20 can be reduced to k'+s. Thus, the number of control lines, previously requiring a total number of N qubits, can be reduced to (k'+s) / N.

[0134] According to this embodiment, when the number of qubits in each group is set to k and the number of signal lines transmitting command signals is set to s, the number of wiring lines 20 connecting the control signal generation unit 11 and the qubit module 13, i.e., control lines 20, can be set to k'+s. Furthermore, when the frequencies of the control signals are different, wiring can be saved by frequency multiplexing performed by the control signal generation unit 11. Additionally, when the control signals are digital signals, wiring can also be saved by time-division multiplexing. In such cases, the number of control lines 20 can be set to k'+s or less.

[0135] The signal processing circuit unit 17 can also perform quantum error correction decoding. Quantum error correction requires a very large number of high-speed readouts. For example, error information from a single logical qubit consisting of 2000 physical qubits generates approximately 1 Gbps of information. This output signal is used only for inferring errors occurring within the qubit. By performing quantum error correction decoding (error inference processing) in the cryogenic environment within the refrigerator, the signal bandwidth between the refrigerator and the ambient temperature environment can be reduced. For example, by using a signal processing circuit utilizing superconducting digital logic circuitry, the circuit can be activated via a switch. That is, it is not necessary to hold the acquired signal in the circuit beforehand, and the information used for inferring error locations can be discarded. Therefore, the signal bandwidth between the refrigerator and the ambient temperature environment can be reduced, and the wiring connecting the refrigerator and the ambient temperature environment can be reduced. As a result, the number of observation lines, which previously required a total number of qubits on the order of N, can be reduced to observation lines for only the data qubits after error correction. It should be noted that the number of observation lines can be further reduced through multiplexing processes, etc.

[0136] The overview of quantum error correction decoding processing is as follows. When the first operation described above is performed on a qubit, information related to errors in the qubit is obtained. The error location is deduced from this error information, and the inversion information of the qubit value is pre-stored in the signal processing circuit unit 17. On the other hand, in a part of the second operation described above, there is an operation to obtain information related to the qubit (e.g., parity check value, logical qubit value, etc.). For the value obtained after executing a command related to such an operation, a correction based on the pre-stored inversion information of the qubit value is added.

[0137] exist Figure 2 In the example, the quantum bit module 13 is placed in an extremely low temperature environment of about 0.01K inside the refrigerator 18, while the control signal generation unit 11 and the observation unit 12 are placed in a room temperature environment. However, the implementation is not limited to this; at least the quantum bit module 13 can be placed in an extremely low temperature environment inside the refrigerator. For example, the control signal generation unit 11 and the observation unit 12 can also be distributed in environments ranging from room temperature to low temperature. Alternatively, the entire structure inside the quantum bit module 13 inside the refrigerator 18 may not be placed in an extremely low temperature environment of about 0.01K. For example, only the quantum bit substrate 14 of the quantum bit module 13 may be placed in an extremely low temperature environment of about 0.01K, while the control circuit 15, the observation circuit 16, the signal processing circuit 17, etc., may be placed in an environment with a relatively high temperature of several K or several 100 mK inside the refrigerator 18.

[0138] This implementation is effective when applied to superconducting quantum computers. In this case, the qubits mounted on the qubit substrate are superconducting qubits.

[0139] In the above embodiments, the quantum bit module is placed in a low-temperature environment. However, this is not a limitation; the quantum bit can also be a solid-state quantum bit. In this case, the quantum bit module can also be placed in a room-temperature environment. For such a quantum bit module, hardware consisting of a command decoder and control switches can be used to perform both the first and second operations described above.

[0140] [Second Implementation]

[0141] exist Figure 10 Details of the quantum bit substrate 14 and control circuit 15 of the quantum computing control device 2 according to the second embodiment are shown. Figure 10 Corresponding to Figure 6 Quantum computing control device 2 relative to Figure 6 The quantum computing control device 1 also includes a waveform memory 153. The other structures of the quantum computing control device 2 are the same as those of the quantum computing control device 1.

[0142] The waveform memory 153 stores the waveform of the control signal used to perform the first operation generated by the control signal generation unit 11. For example, the waveform memory 153 may also store the value of one cycle for k different signal waveforms. When the first operation is performed, the waveform memory 153 reads the stored signal waveform and inputs it to the control switch 152.

[0143] The control signal used to perform the first operation repeats the same signal periodically, therefore, it is not necessary for the control signal generation unit 11 to generate it in real time all the time. Therefore, as in this embodiment, the waveform of the temporarily generated control signal can be stored in the waveform memory 153 and read out and used periodically. Moreover, when the control signal generation unit 11 generates a new signal waveform, the stored signal waveform can be rewritten as the new signal waveform.

[0144] According to this embodiment, during operation, the control signal input from the control signal generation unit 11 to the control circuit unit 15 becomes only the control signal for performing the second operation, thus reducing the bandwidth of the signal flowing in the control line 20.

[0145] [Third Implementation Method]

[0146] The third embodiment is a quantum computer. This quantum computer has the quantum computing control device described in the above embodiments. Existing technology can be used regarding the basic structure of the quantum computer.

[0147] According to this embodiment, a quantum computer with a reduced number of wires can be realized.

[0148] [Fourth Implementation Method]

[0149] Figure 11 A flowchart illustrating the quantum computing control method of the fourth embodiment is shown.

[0150] In step S1, this method generates control signals for performing a spatially uniform first operation of one or more types and a spatially non-uniform second operation at a lower frequency than the first operation of one or more types, and command signals for controlling the control circuit to perform the first and second operations, wherein the first and second operations are operations on the qubits on the qubit substrate. In step S2, this method uses the control circuit to branch the control signals to groups of qubits and controls the output of the control signals to each qubit on the qubit substrate according to the command signals. In step S3, this method uses the observation circuit to observe the state of each qubit that has received the first or second operation. In step S4, this method uses the signal processing circuit to perform quantum error correction decoding processing. In step S5, this method determines whether the computation using the qubit has ended. If the determination result is negative, the process returns to step S1. If the determination result is positive, the process ends. The qubits on the qubit substrate are grouped into multiple groups consisting of multiple qubits with the same positional relationship to each other.

[0151] According to this embodiment, the number of wires in devices that use qubits can be reduced.

[0152] The present invention has been described above based on embodiments. Those skilled in the art should understand that these embodiments are exemplary, and various modifications may exist in the combination of their constituent elements and processing procedures, and these modifications are also within the scope of the present invention.

[0153] Figure 12 A functional block diagram of a modified quantum computing control device 1a is shown. The quantum computing control device 1a includes a control signal generation unit 11a, an observation unit 12a, and a qubit module 13a. The qubit module 13a includes a qubit substrate 14a carrying multiple qubits, a control circuit 15a, an observation circuit 16a, and a signal processing circuit 17a. The control signal generation unit 11a and the control circuit 15a are connected via a control line 20a. The observation unit 12a and the signal processing circuit 17a are connected via an observation line 21a. The qubit substrate 14a and the control circuit 15a are connected via a first internal wiring 22a. The qubit substrate 14a and the observation circuit 16a are connected via a second internal wiring 23a. The observation circuit 16a and the signal processing circuit 17a are connected via a third observation line 24a.

[0154] exist Figure 2In the quantum computing control device 1, the control signal generation unit 11, the control circuit unit 15, the qubit substrate unit 14, the observation unit 12, the signal processing circuit unit 17, the observation circuit unit 16, and the qubit substrate unit 14 are connected in parallel. This is a "reflection-type" structure in which the observation signal is reflected back from the refrigerator 18 when control signals and command signals are input from the control signal generation unit 11 into the refrigerator 18.

[0155] In contrast, in the quantum computing control device 1a, the control signal generation unit 11a, the control circuit unit 15a, the quantum bit substrate unit 14a, the observation circuit unit 16a, the signal processing circuit unit 17a, and the observation unit 12a are connected in series. This is a "transmission-type" structure in which, when control signals and command signals are input from the control signal generation unit 11a into the refrigerator 18, the observation signals are output after they have passed through the refrigerator 18.

[0156] Any combination of the above-described embodiments and variations is also useful as an embodiment of the present invention. New embodiments resulting from such combinations combine the effects of each of the combined embodiments and variations.

[0157] Industrial availability

[0158] This invention can be used in quantum computing control devices, quantum computers, and quantum computing control methods.

[0159] This application claims priority based on U.S. Provisional Patent Application No. 63180500, the description of which is incorporated herein by reference in its entirety.

[0160] Explanation of reference numerals in the attached figures

[0161] 1…Quantum computing control device.

[0162] 2… Quantum computing control device.

[0163] 1a…Quantum computing control device.

[0164] 11…Control signal generation unit.

[0165] 11a…Control signal generation unit.

[0166] 12…Observation Department.

[0167] 12a…Observation Department.

[0168] 13… Quantum bit module.

[0169] 13a…Qubit module. 14…Qubit substrate section. 14a…Qubit substrate section. 15…Control circuit section.

[0170] 15a…Control Circuit Section.

[0171] 16…Observation Circuits Section.

[0172] 16a…Observation Circuit Section.

[0173] 17…Signal processing circuit section. 17a…Signal processing circuit section. 18…Refrigeration unit.

[0174] 18a…Refrigeration unit.

[0175] 20… control line.

[0176] 20a… control line.

[0177] 21… Observation line.

[0178] 21a… Observation line.

[0179] 22…First internal wiring.

[0180] 22a…First internal wiring. 23…Second internal wiring.

[0181] 23a…Second internal wiring. 24…Third internal wiring.

[0182] 24a…Third internal wiring. 100…Quantum computer.

[0183] 101… control device.

[0184] 102… Observation device.

[0185] 103… Quantum bit substrate. 104… First electronic circuit.

[0186] 105…Second electronic circuit.

[0187] 106…Refrigeration unit.

[0188] 107… control line.

[0189] 108… observation line.

[0190] 151… Command decoder.

[0191] 152… control switch.

[0192] 153… Waveform memory.

[0193] 201… control signal line.

[0194] 202… Command signal line.

[0195] 221…qubit control line.

[0196] 222…qubit control line.

[0197] 223… Quantum bit control line.

[0198] G1… lattice.

[0199] G2… lattice.

[0200] G3… lattice.

[0201] SW(1,1)~SW(18,10)… control switches.

[0202] S1… is the step of generating control signals and command signals.

[0203] S2… is a step of controlling the output of the control signal to each quantum bit on the quantum bit substrate.

[0204] S3…The steps for observing qubits on the qubit substrate.

[0205] S4… is the step that performs quantum error correction decoding.

[0206] S5… The step to determine whether the calculation has ended.

Claims

1. A quantum computing control device, characterized in that, The quantum computing control device includes: Control signal generation unit; The observation unit receives observation signals representing the state of each qubit; and A quantum bit module comprises a quantum bit substrate with multiple quantum bits, a control circuit, an observation circuit, and a signal processing circuit. The multiple qubit groups are arranged on the qubit substrate, consisting of multiple qubits with the same positional relationship and translational symmetry. The control signal generation unit generates control signals and command signals. The control signals are used to execute one or more types of spatially uniform collateral extraction operations and spatially non-uniform logic quantum gate operations at a frequency lower than that of the one or more types of collateral extraction operations. The command signals are used to control the control circuit unit to execute the collateral extraction operations and the logic quantum gate operations, wherein the collateral extraction operations and the logic quantum gate operations are operations on the qubits on the qubit substrate. The control circuitry branches the control signal to the group and controls the output of the control signal to each quantum bit on the quantum bit substrate according to the command signal. The control circuit controls the output of the control signal based on the command signal. This ensures that, during the collimator extraction operation, the control signal is sent to all qubits on the qubit substrate, while during the logic quantum gate operation, the control signal is sent only to the qubits of the specific control target on the qubit substrate. The control circuit is based on the command signal. During the collimator extraction operation, a common control signal is sent to each group of the qubit substrate. In the logic quantum gate operation, control signals are sent individually to each quantum bit on the quantum bit substrate. The observation circuit observes the state of each qubit after it has undergone the collimator extraction operation or the logic quantum gate operation. The signal processing circuit sends the observation signals of each quantum bit to the observation unit.

2. The quantum computing control device according to claim 1, characterized in that, The signal processing circuit performs quantum error correction decoding.

3. The quantum computing control device according to claim 1, characterized in that, When the number of signal lines transmitting the control signal is set to k' and the number of signal lines transmitting the command signal is set to s, the number of wirings connecting the control signal generation unit and the quantum bit module is k'+s or less.

4. The quantum computing control device according to claim 3, characterized in that, The signal processing circuit reduces the amount of wiring connecting the observation unit and the qubit module by sending only the quantum states of the logic qubits that have undergone error correction to the observation unit.

5. The quantum computing control device according to claim 1, characterized in that, When the code length of the logical qubit formed by the qubit is set to d, the ratio of the frequency of the calibrator extraction operation to the frequency of the logical quantum gate operation is greater than or equal to d.

6. The quantum computing control device according to claim 1, characterized in that, The qubits are solid-state qubits.

7. The quantum computing control device according to claim 1, characterized in that, At least the quantum bit module is placed inside the refrigerator.

8. The quantum computing control device according to claim 1, characterized in that, The quantum bit is a quantum bit that includes a superconducting quantum bit and operates at extremely low temperatures.

9. The quantum computing control device according to claim 1, characterized in that, The control circuit section includes a memory for storing the waveforms of the control signals.

10. A quantum computer, characterized in that, The quantum computer has the quantum computing control device as described in claim 1.

11. A quantum computing control method, comprising a quantum bit substrate, a control circuit, an observation circuit, and a signal processing circuit, characterized in that, The quantum computing control method comprises the following steps: A control signal and a command signal are generated. The control signal is used to perform one or more types of spatially uniform collateral extraction operations and spatially non-uniform logic quantum gate operations at a frequency lower than that of the one or more types of collateral extraction operations. The command signal is used to control the control circuit to perform the collateral extraction operations and the logic quantum gate operations. The collateral extraction operations and the logic quantum gate operations are operations on multiple qubits arranged on the qubit substrate, which are grouped into multiple groups consisting of multiple qubits with the same positional relationship and translational symmetry. Using the control circuit section, the control signal is branched to the group, and the output of the control signal to each qubit on the quantum bit substrate is controlled according to the command signal. The control circuit section controls the output of the control signal based on the command signal, such that in the collimator extraction operation, the control signal is output to all qubits on the quantum bit substrate, and in the logic quantum gate operation, the control signal is output only to the qubit of the specific control object on the quantum bit substrate. Based on the command signal, the control circuit section sends a common control signal to each group of the quantum bit substrate in the collimator extraction operation, and sends a control signal individually to each qubit on the quantum bit substrate in the logic quantum gate operation. The observation circuit section is used to observe the qubits on the qubit substrate section; The signal processing circuitry is used to perform quantum error correction decoding; and Determine whether the computation using the qubits has been completed.

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