Method for obtaining initial value of electric potential under quantum transport model

Abstract

The present disclosure provides a method for obtaining a spatial atomic-scale computational model of a semiconductor device, comprising: constructing a drift-diffusion model of a TCAD of a semiconductor device to be simulated; obtaining a spatially gridded potential distribution of the semiconductor device to be simulated according to the drift-diffusion model of the TCAD; extracting a potential initial solution according to the spatially gridded potential distribution; and obtaining a spatial atomic-scale computational model of the semiconductor device to be simulated based on the potential initial solution.

Description

Technical Field

[0001] This disclosure relates to the fields of microelectronics and semiconductor technology, and in particular to a method for obtaining an initial value of electric potential under a quantum transport model. Background Technology

[0002] With the development of quantum technology and microelectronics technology, the application of quantum transport is becoming more and more widespread. However, the current single quantum transport simulation method is time-consuming to calculate the self-consistent steps from scratch. The single step usually takes more than ten minutes, and the overall self-consistent convergence requires more than a hundred iterations. Calculating a single transport curve may take a week. At the same time, there are also problems such as difficulty in device convergence under large bias voltage. Summary of the Invention

[0003] To address the aforementioned issues, this disclosure provides a method for obtaining a spatial atomic-scale computational model of a semiconductor device, thereby alleviating the aforementioned technical problems in the prior art.

[0004] (I) Technical Solution

[0005] This disclosure provides a method for obtaining a spatial atomic-scale computational model of a semiconductor device, comprising: constructing a drift-diffusion model of the TCAD of the semiconductor device to be simulated; obtaining a spatially gridded potential distribution of the semiconductor device to be simulated based on the drift-diffusion model of the TCAD; extracting an initial potential solution based on the spatially gridded potential distribution; and obtaining a spatial atomic-scale computational model of the semiconductor device to be simulated based on the initial potential solution.

[0006] According to embodiments of this disclosure, obtaining the spatially gridded potential distribution of the semiconductor device to be simulated based on the drift-diffusion model of the TCAD includes extracting the potential of spatial points in the same space.

[0007] According to embodiments of this disclosure, extracting the initial potential solution based on the spatially meshed potential distribution includes: performing tetrahedral meshing on the drift-diffusion model of TCAD; and solving the drift-diffusion equation using the finite element method to obtain the spatial potential distribution at the mesh points.

[0008] Furthermore, methods for obtaining spatial atomic-scale computational models of semiconductor devices also include solving drift-diffusion equations using finite difference and finite volume algorithms.

[0009] Furthermore, the method for obtaining a spatial atomic-scale computational model of a semiconductor device also includes obtaining the space charge distribution at grid points.

[0010] According to an embodiment of this disclosure, the initial potential solution is extracted based on the spatially gridded potential distribution, including: when the number of known three-dimensional spatial points is large, the kD-tree algorithm is used to divide the space and construct a kD-tree spatial structure; the coordinates of each dimension of the kD-tree spatial structure are calculated to find neighboring spatial points; when the tetrahedron where the point to be located is found is located, the initial potential solution of that point is obtained by centroid interpolation.

[0011] According to embodiments of this disclosure, obtaining a spatial atomic-scale computational model of the semiconductor device to be simulated based on the initial potential solution includes: generating an atomic-scale device simulation model based on the parameter information of the device model to be simulated; obtaining the potential and charge distribution in the atomic-scale device through interpolation based on the spatial potential distribution and charge distribution at the grid points; and obtaining the quantum transport properties and electrostatic properties of the converged device through self-consistent quantum transport calculation.

[0012] Furthermore, methods for obtaining spatial atomic-scale computational models of semiconductor devices also include directly non-self-consistently computing the quantum transport properties of devices using non-self-consistent quantum transport.

[0013] Furthermore, methods for obtaining spatial atomic-scale computational models of semiconductor devices also include using octrees and BSP algorithms to locate the grid where any spatial point is located.

[0014] (II) Beneficial Effects

[0015] As can be seen from the above technical solution, the method for obtaining the spatial atomic-scale calculation model of semiconductor devices disclosed herein has at least one or a part of the following beneficial effects:

[0016] (1) Simple, convenient, efficient and accurate;

[0017] (2) Accelerate the accurate simulation of quantum transport properties of small-scale devices, save experimental and computational time and resources, and improve experimental efficiency. Attached Figure Description

[0018] Figure 1 This is a flowchart of a method for obtaining a spatial atomic-scale computational model of a semiconductor device according to an embodiment of this disclosure.

[0019] Figure 2 A schematic diagram illustrating the principle of a method for obtaining a spatial atomic-scale computational model of semiconductor devices.

[0020] Figure 3 This is a potential distribution diagram under the original mesh of the TCAD simulation in an embodiment of this disclosure.

[0021] Figure 4 This is a schematic diagram of the kD-tree data structure of spatial points in an embodiment of this disclosure.

[0022] Figure 5 A schematic diagram of the three-dimensional spatial structure of the kD-tree in this embodiment of the present disclosure.

[0023] Figure 6 A schematic diagram showing the potential at the centroid k-point of the tetrahedral structure in an embodiment of this disclosure.

[0024] Figure 7 This is an atomic-scale structural model diagram of three-dimensional interpolation in an embodiment of this disclosure.

[0025] Figure 8a This is a schematic diagram comparing the simulated potentials of devices under different phosphorus doping states according to embodiments of this disclosure.

[0026] Figure 8b This is a schematic diagram comparing the simulated potential of the device in the boron-doped state according to an embodiment of this disclosure.

[0027] Figure 9 This is a graph showing the current transfer characteristics of the nanowire device according to an embodiment of this disclosure. Detailed Implementation

[0028] This disclosure provides a method for obtaining a spatial atomic-scale computational model of a semiconductor device. The method applies the finite element method to solve the initial solution of the three-dimensional spatial potential and performs fast interpolation to generate an atomic coordinate potential distribution model, thereby realizing the function of high-precision computation of quantum transport models.

[0029] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0030] In this embodiment of the disclosure, a method for obtaining a spatial atomic-scale calculation model of a semiconductor device is provided, combined with Figure 1 and Figure 2 As shown, the method includes:

[0031] Operation S1: Build the drift and diffusion model of the semiconductor device to be simulated using TCAD;

[0032] Operation S2: Obtain the spatially gridded potential distribution of the semiconductor device to be simulated based on the drift-diffusion model of the TCAD;

[0033] Operation S3: Extract the initial potential solution based on the spatially gridded potential distribution; and

[0034] Operation S4: Based on the initial potential solution, obtain the spatial atomic-scale potential simulation model of the semiconductor device to be simulated.

[0035] According to embodiments of this disclosure, obtaining the spatially gridded potential distribution of the semiconductor device to be simulated based on the drift-diffusion model of the TCAD includes extracting the potential of spatial points in the same space.

[0036] According to embodiments of this disclosure, extracting an initial potential solution based on the spatially gridded potential distribution includes:

[0037] Tetrahedral meshing was performed on the drift-diffusion model of TCAD;

[0038] The spatial potential distribution at the grid points is obtained by solving the drift-diffusion equation using the finite element method.

[0039] Specifically, the device to be simulated is modeled using TCAD, and the potential distribution in the TCAD simulation under the original mesh is as follows: Figure 3 As shown: Tetrahedral meshing is performed on the model: The drift-diffusion equation is solved using the finite element or finite volume algorithm, and the spatial potential and charge distribution at the mesh points can be obtained.

[0040] Drift-diffusion equation (transport):

[0041]

[0042]

[0043] Continuity equation (excluding electron-hole generation and recombination):

[0044]

[0045]

[0046] Poisson equation

[0047]

[0048] Among them, J n Let μ represent the electron current, n represent the electron carrier density, q represent the elementary charge, and μ represent the fundamental charge. n Indicates electron mobility. k represents the potential difference. B This represents Boltzmann's constant, and T represents temperature. J represents the electron concentration gradient, p represents the hole carrier density, and J represents the electron concentration gradient. p Represents hole current, μ p This represents the hole mobility. N represents the hole concentration gradient. + N represents the acceptor doping concentration. - This indicates the donor doping concentration.

[0049] Furthermore, it may also include solving the drift-diffusion equation using finite difference and finite volume algorithms.

[0050] Furthermore, it may also include obtaining the space charge distribution at the grid points.

[0051] According to an embodiment of this disclosure, the initial potential solution is extracted based on the spatially gridded potential distribution, including: when the number of known three-dimensional spatial points is large, the kD-tree algorithm is used to divide the space and construct a kD-tree spatial structure; the coordinates of each dimension of the kD-tree spatial structure are calculated to find neighboring spatial points; when the tetrahedron where the point to be located is found is located, the initial potential solution of that point is obtained by centroid interpolation.

[0052] Furthermore, it may also include using octrees and BSP algorithms to locate the grid where any spatial point is located.

[0053] This involves potential conversion and extracting the initial potential value.

[0054] Data Processing: When the number of known 3D spatial points is large, the kD-tree algorithm is used for spatial partitioning. A kD-tree is a binary tree structure where the child nodes of each node are determined by the coordinates in one dimension. Each node contains k-dimensional data, and the data structure is shown below:

[0055] Node-data: A data vector, representing a specific data point in a dataset; it is a k-dimensional vector.

[0056] split: an integer, the index of the direction axis perpendicular to the splitting hyperplane;

[0057] Left: kD tree, a kd tree consisting of all data points located in the left subspace of the dividing hyperplane at this node;

[0058] Right: kD tree, a kd tree consisting of all data points located in the right subspace of the partition hyperplane at this node;

[0059] parent: In a kD tree, the parent node.

[0060] The order in which the kD-tree is constructed is based on Figure 4 As shown in the example: traverse all nodes sequentially.

[0061] 1) Divide the left and right nodes by the Y coordinate of point 1. Since Y2 > Y1, fill point 2 into the right node;

[0062] 2) Divide the left and right nodes by the Z coordinate of point 2. Since Y3 > Y1, move point 3 to the next node for comparison.

[0063] 3) Since Z3 > Z2, fill point 3 into the right node;

[0064] 4) Continue in this manner until the kD-tree is fully constructed.

[0065] Since the mesh of the finite element method is a tetrahedral element, the algorithm assumes that the electric potential inside the tetrahedral element can be calculated by interpolation of the centroid coordinates of the potentials at the four vertices. Therefore, for any point in space, we can first locate the tetrahedral element in which the point is located, and then calculate the potential value of any point in space from the potentials at the vertices.

[0066] kD-trees construct an ordered distribution of nodes, such as Figure 5 The diagram shows the construction of a kD-tree spatial structure. Coordinates are calculated for each dimension to find the nearest neighbor point. Assuming the coordinates of the point K to be located are (x0, y0, z0), starting from the root node, the node and its parent node N are found based on the coordinates of each dimension (x, y or z). The distances from K to N and its child nodes are compared, and the smallest distance is the coordinate point T closest to K in the finite element mesh.

[0067] Find all the tetrahedrons connected by T. According to the definition of the Delaunay mesh used in finite element method, K must be located in one of the tetrahedrons connected by T. The tetrahedron can be determined by using vector relationships.

[0068] like Figure 6 As shown, when the tetrahedron containing the point K to be located is found, the electric potential φ is obtained using the centroid interpolation formula:

[0069]

[0070] Where, φ i Let ψ be the electric potential at the four vertices of the tetrahedron. i These are the barycenter coordinates of the point to be located corresponding to the i-th vertex within the tetrahedron.

[0071]

[0072] V kxyz Let x, y, and z represent the coordinates of the three vertices of the tetrahedron excluding i, and V represent the volume of the tetrahedron. The electric potential at point K can then be calculated. Furthermore, the potential can be interpolated to a specified spatial location.

[0073] According to an embodiment of this disclosure, obtaining a spatial atomic-scale computational model of the semiconductor device to be simulated based on the initial potential solution includes: generating an atomic-scale device simulation model based on the parameter information of the device model to be simulated; obtaining the potential and charge distribution in the atomic-scale device through interpolation based on the spatial potential distribution and charge distribution on the grid points; and obtaining the quantum transport properties and electrostatic properties of the converged device through self-consistent quantum transport calculation.

[0074] Furthermore, it can also include the quantum transport properties of direct non-self-consistent computing devices with non-self-consistent quantum transport.

[0075] This disclosure includes applying the finite element method to solve for the initial solution of the three-dimensional spatial potential and performing rapid interpolation to generate an atomic coordinate potential distribution model; this disclosure extracts the potential of spatial points in the same space from potential data derived from TCAD device simulation, and uses interpolation to construct a new potential distribution and initial solution, generating an atomic-scale computational model.

[0076] This involves generating an atomic-scale model and inputting the initial solution for calculation.

[0077] 1) Atomic-scale device structure: Using the material, size, and doping concentration parameters from the above device model, an atomic-scale device model is generated, such as... Figure 7 As shown.

[0078] 2) Physical quantities such as potential and charge distribution in atomic-scale devices: Based on the device potential and charge distribution results obtained from the simulation of the drift-diffusion equation in Part 1.3, the potential and charge distribution in atomic-scale devices are obtained by using interpolation methods with real atoms as target nodes.

[0079] 3) Self-consistent quantum transport calculation: Using the initial potential and charge solutions obtained from interpolation in step 2), iterative self-consistent calculations are performed using the NEGF-TB method quantum transport calculation program. The converged quantum transport properties and electrostatic properties of the device are calculated, such as charge density, potential, and DOS (density of states). The results are as follows: Figure 8a , Figure 8b As shown, the device doping concentration under the quantum transport method is consistent with the potential distribution under the TCAD method, which meets the requirements for subsequent calculation of device transport properties.

[0080] 4) Non-self-consistent quantum transport calculation (optional): Using the initial solutions of potential and charge obtained by interpolation in step 2), the quantum transport properties of the device are directly calculated non-self-consistently.

[0081] like Figure 9As shown, this disclosure uses a nanowire transistor as an example to demonstrate the feasibility of the method. It demonstrates that the quantum transport device achieves the switching characteristics of nanowires, and further considers the influence of other quantum effects on the device properties. Other configurations of semiconductor transistors are also within the scope of protection.

[0082] This disclosure solves the drift-diffusion model of TCAD using the finite element method, thereby determining the spatial potential distribution of the device. Other methods for solving drift-diffusion models, such as the finite difference method and the finite volume method, are also within the scope of protection.

[0083] This disclosure uses the kD-Tree algorithm to quickly locate the grid containing any spatial point. Other algorithms for locating arbitrary spatial grids (e.g., octree, BSP algorithm) are also within the scope of protection.

[0084] This disclosure utilizes barycentric coordinate interpolation to obtain the electric potential at any spatial point from the electric potential at grid points.

[0085] The embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. It should be noted that implementations not illustrated or described in the drawings or the main text of the specification are forms known to those skilled in the art and are not described in detail. Furthermore, the definitions of the various elements and methods described above are not limited to the specific structures, shapes, or methods mentioned in the embodiments, and those skilled in the art can easily modify or substitute them.

[0086] Based on the above description, those skilled in the art should have a clear understanding of the method for obtaining the spatial atomic-scale calculation model of semiconductor devices disclosed herein.

[0087] In summary, this disclosure extracts the potential of spatial points in the same space using potential data derived from TCAD (Technology Computer Aided Design) device simulations, constructs a new potential distribution and initial solution using interpolation, and generates an atomic-scale computational model. This method has the advantages of being simple, convenient, efficient, and accurate, thereby accelerating the accurate simulation of quantum transport properties of small-scale devices, saving experimental and computational time and resources, and improving experimental efficiency.

[0088] It should also be noted that the above are different embodiments provided by this disclosure. These embodiments are used to illustrate the technical content of this disclosure and are not intended to limit the scope of protection of this disclosure. A feature of one embodiment can be applied to other embodiments through suitable modifications, substitutions, combinations, or separations.

[0089] It should be noted that, unless otherwise specified herein, having "a" element is not limited to having a single element, but may include one or more of the element.

[0090] Furthermore, unless otherwise specified, the ordinal numbers such as "first," "second," etc., used herein are merely for distinguishing multiple elements with the same name and do not indicate any hierarchy, order of execution, or process sequence among them. A "first" element and a "second" element may appear together in the same component or separately in different components. The presence of an element with a higher ordinal number does not necessarily indicate the presence of another element with a lower ordinal number.

[0091] In this document, unless otherwise specified, the term "characteristic A" or "and / or" and "characteristic B" means that A exists alone, B exists alone, or A and B exist simultaneously; the term "characteristic A" and "and" or "and" and "and" and "characteristic B" means that A and B exist simultaneously; the terms "including", "containing", "having", and "containing" refer to, but are not limited to, these.

[0092] Furthermore, in this document, terms such as "up," "down," "left," "right," "front," "back," or "between" are used only to describe the relative positions of multiple elements and can be extended to include translation, rotation, or mirroring. Additionally, unless otherwise specified, the statement "one element is on another element" or similar statements do not necessarily indicate that the element is in contact with the other element.

[0093] Furthermore, unless specifically described or required to occur in a specific order, the order of the above steps is not limited to those listed above and can be varied or rearranged according to the desired design. Moreover, the above embodiments can be used in combination with each other or with other embodiments based on design and reliability considerations; that is, technical features from different embodiments can be freely combined to form more embodiments.

[0094] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A method for obtaining a spatial atomic-scale computational model of a semiconductor device, comprising: Build a drift and diffusion model of the semiconductor device to be simulated using TCAD; The spatially gridded potential distribution of the semiconductor device to be simulated is obtained based on the drift-diffusion model of the TCAD. The initial potential solution is extracted based on the spatially gridded potential distribution. as well as Based on the initial solution of the potential, a spatial atomic-scale calculation model of the semiconductor device to be simulated is obtained. The step of extracting the initial potential solution based on the spatially meshed potential distribution includes: performing tetrahedral meshing on the drift-diffusion model of TCAD; and using the finite element method to solve the drift-diffusion equation to obtain the spatial potential distribution and spatial charge distribution at the mesh points. The process of obtaining a spatial atomic-scale computational model of the semiconductor device to be simulated based on the initial potential solution includes: generating an atomic-scale device simulation model based on the parameter information of the semiconductor device model to be simulated; obtaining the potential and charge distribution in the atomic-scale device through interpolation based on the spatial potential distribution and charge distribution at the grid points; and obtaining the quantum transport properties and electrostatic properties of the converged device through self-consistent quantum transport calculation.

2. The method for obtaining a spatial atomic-scale computational model of a semiconductor device according to claim 1, wherein obtaining the spatially gridded potential distribution of the semiconductor device to be simulated based on the drift-diffusion model of the TCAD includes extracting the potential of spatial points in the same space.

3. The method for obtaining a spatial atomic-scale computational model of a semiconductor device according to claim 1 further includes solving the drift-diffusion equation using finite difference and finite volume algorithms.

4. The method for obtaining a spatial atomic-scale calculation model of a semiconductor device according to claim 1, wherein extracting the initial potential solution based on the spatially gridded potential distribution includes: When the number of known three-dimensional spatial points in the spatial mesh is large, the kD-tree algorithm is used to partition the space and construct the kD-tree spatial structure. For the kD-tree spatial structure, calculate the coordinates of each dimension and find nearby spatial points; When the tetrahedron containing the point to be located is found, the initial solution of the potential at that point is obtained by centroid interpolation.

5. The method for obtaining a spatial atomic-scale computational model of a semiconductor device according to claim 1 further includes directly non-self-consistently computing the quantum transport properties of the device using non-self-consistent quantum transport.

6. The method for obtaining a spatial atomic-scale calculation model of a semiconductor device according to claim 5 further includes using an octree and the BSP algorithm to locate the grid where any spatial point is located.

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