Semiconductor structure and method of manufacturing the same
By forming a combination of a composite hard mask layer and an etch stop layer on the etched layer, redundant patterns are formed and precise etching is performed, solving the problems of insufficient etching and load effect, and achieving precise etching and structural integrity of high aspect ratio structures.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-06-27
- Publication Date
- 2026-05-29
AI Technical Summary
During the etching process, the sparse parts of the etching pattern of high aspect ratio structures are prone to insufficient etching and reduction of critical dimensions, resulting in severe load effects, which are difficult to solve effectively with existing technologies.
A composite hard mask layer, including a hard mask layer and an etch stop layer, is formed on the etch layer to form a first target pattern and a first redundant pattern. The bottom of the redundant pattern is located in the etch stop layer. The remaining etch stop layer is removed by wet etching. Then, etching is performed using the second target pattern and the second redundant pattern as masks to form the target structure and the redundant structure.
This reduces the load effect during the etching process, ensures the integrity and structural consistency of the etched layer, reduces the contamination of the etching stop layer on subsequent processes, and improves etching accuracy.
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Figure CN117352384B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and to, but is not limited to, a semiconductor structure and its fabrication method. Background Technology
[0002] With the development of semiconductor technology, the requirements for etching high aspect ratio structures are becoming increasingly stringent. Due to the etching load effect, incomplete etching and reduction in critical dimensions are prone to occur in areas where the etching pattern is relatively sparse. Summary of the Invention
[0003] In view of this, the present disclosure provides a semiconductor structure and a method for preparing the same.
[0004] In a first aspect, embodiments of this disclosure provide a method for fabricating a semiconductor structure, the method comprising: forming a composite hard mask layer on an etch layer, the composite hard mask layer including a hard mask layer and an etch stop layer surrounding the hard mask layer; forming a first target pattern and a first redundant pattern in the composite hard mask layer, the first target pattern being entirely located within the hard mask layer and not penetrating the hard mask layer in a direction perpendicular to the hard mask layer; the bottom of the first redundant pattern being located within the etch stop layer and not penetrating the etch stop layer in a direction perpendicular to the etch stop layer; removing the remaining etch stop layer to form a second target pattern and a second redundant pattern in the hard mask layer; etching using the second target pattern and the second redundant pattern as masks to form a target structure in the etch layer and a redundant structure within the hard mask layer; and removing the remaining hard mask layer.
[0005] In some embodiments, the hard mask layer includes a first hard mask layer and a second hard mask layer. The step of forming a composite hard mask layer on the etched layer, the composite hard mask layer including the hard mask layer and an etch stop layer surrounded by the hard mask layer, includes: sequentially forming the first hard mask layer and the etch stop layer on the etched layer, wherein the etch stop layer is embedded in the first hard mask layer and the top surface of the first hard mask layer is flush with the top surface of the etch stop layer; forming the second hard mask layer, the second hard mask layer covering the top surface of the first hard mask layer and the top surface of the etch stop layer, thereby forming the composite hard mask layer located on the etched layer.
[0006] In some embodiments, a first hard mask layer and an etch stop layer are sequentially formed on the etched layer, including: sequentially forming a first hard mask layer and an etch stop layer trench on the etched layer, wherein the etch stop layer trench is located within the first hard mask layer; and depositing an etch stop layer that fills the etch stop layer trench within the etch stop layer trench.
[0007] In some embodiments, forming a first hard mask layer and an etch stop layer trench sequentially on the etched layer includes: forming an initial first hard mask layer on the etched layer; forming a first photoresist layer on the initial first hard mask layer; patterning the first photoresist layer to form a first etch stop layer pattern; etching the initial first hard mask layer using the first etch stop layer pattern as a mask to form the first hard mask layer and the etch stop layer trench located within the first hard mask layer; and removing the first photoresist layer.
[0008] In some embodiments, depositing an etch stop layer that fills the etch stop layer trench includes: depositing an initial etch stop layer in the etch stop layer trench and on the top surface of the first hard mask layer; removing the initial etch stop layer on the top surface of the first hard mask layer such that the top surface of the first hard mask layer is flush with the top surface of the remaining initial etch stop layer to form the etch stop layer.
[0009] In some embodiments, along a direction parallel to the bottom surface of the composite hard mask layer, the critical dimension of the first target pattern is larger than the critical dimension of the first redundant pattern, and the first distance between the bottom of the first target pattern and the bottom surface of the composite hard mask layer is smaller than the second distance between the bottom of the first redundant pattern and the bottom surface of the composite hard mask layer.
[0010] In some embodiments, along a direction parallel to the bottom surface of the composite hard mask layer, the critical dimension of the first redundant pattern is smaller than the critical dimension of the etch stop layer.
[0011] In some embodiments, the first distance between the bottom of the first target pattern and the bottom surface of the composite hard mask layer is less than the third distance between the bottom of the etch stop layer and the bottom surface of the composite hard mask layer.
[0012] In some embodiments, forming a first target pattern and a first redundant pattern in the composite hard mask layer includes: forming a second photoresist layer on the composite hard mask layer; patterning the second photoresist layer to form an initial first target pattern and an initial first redundant pattern; wherein the critical dimension of the initial first target pattern is larger than the critical dimension of the initial first redundant pattern along a direction parallel to the top surface of the composite hard mask layer; etching the composite hard mask layer using the initial first target pattern and the initial first redundant pattern as masks to form the first target pattern and the first redundant pattern in the composite hard mask layer; and removing the second photoresist layer.
[0013] In some embodiments, the etched layer includes etched regions and non-etched regions. Using the initial first target pattern and the initial first redundant pattern as masks, etching the composite hard mask layer includes: forming the first target pattern in a first preset region and forming the first redundant pattern in a second preset region. The first preset region is a region along a direction perpendicular to the etched layer where the hard mask layer and the etched region are directly opposite each other. The second preset region is a region along a direction perpendicular to the etched layer where the hard mask layer and the etch stop layer are directly opposite each other and the non-etched region.
[0014] In some embodiments, in a direction perpendicular to the etched layer, the orthographic projection of the first redundant pattern lies within the range of the orthographic projection of the pattern of the etch stop layer.
[0015] In some embodiments, in the step of etching the composite hard mask layer using the initial first target pattern and the initial first redundant pattern as masks, the etching rate of the etching stop layer is less than the etching rate of the hard mask layer.
[0016] In some embodiments, removing the remaining etch stop layer includes: removing the remaining etch stop layer using a wet etching process.
[0017] In some embodiments, in the wet etching process, the etching rate of the etch stop layer is greater than the etching rate of the hard mask layer; and in a direction perpendicular to the hard mask layer, the second target pattern does not penetrate the hard mask layer, and the second redundant pattern does not penetrate the hard mask layer.
[0018] In some embodiments, etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer and a redundant structure in the hard mask layer. This includes: etching using the second target pattern and the second redundant pattern as masks, wherein the hard mask layer is etched using the second target pattern as a mask to form a third target pattern in the hard mask layer, the third target pattern penetrating the hard mask layer in a direction perpendicular to the hard mask layer; and etching the hard mask layer using the second redundant pattern as a mask to form a target structure in the hard mask layer. A third redundant pattern is formed in the hard mask layer. In the direction perpendicular to the hard mask layer, the third redundant pattern is located in the hard mask layer and does not penetrate the hard mask layer. Etching is performed using the third target pattern and the third redundant pattern as masks. The third target pattern is used as a mask to etch the etched layer, forming a target structure in the etched layer. The third redundant pattern is used as a mask to etch the hard mask layer, forming a redundant structure in the hard mask layer. In the direction perpendicular to the hard mask layer, the redundant structure is located in the hard mask layer and does not penetrate the hard mask layer.
[0019] In some embodiments, during the etching step using the third target pattern and the third redundant pattern as masks, the etching rate of the etched layer is greater than the etching rate of the hard mask layer.
[0020] In some embodiments, the material of the etch stop layer includes at least one of silicon oxide, silicon nitride, aluminum oxide, and borosilicate glass.
[0021] In some embodiments, the hard mask layer includes a first hard mask layer and a second hard mask layer, wherein the material of the first hard mask layer includes at least one of carbon, silicon nitride, titanium nitride, and silicon oxide; and / or the material of the second hard mask layer includes at least one of carbon, silicon nitride, titanium nitride, and silicon oxide; and the material of the etch stop layer is different from the materials of both the first hard mask layer and the second hard mask layer.
[0022] Secondly, embodiments of this disclosure provide a semiconductor structure, which is prepared according to the above-described preparation method.
[0023] In this embodiment, a composite hard mask layer is formed on the etched layer, wherein the composite hard mask layer includes a hard mask layer and an etch stop layer surrounded by the hard mask layer; then, a first target pattern and a first redundant pattern are formed in the composite hard mask layer, and the bottom of the first redundant pattern is located in the etch stop layer, and the first redundant pattern does not penetrate the etch stop layer in the direction perpendicular to the etch stop layer; then, the remaining etch stop layer is removed, and a second target pattern and a second redundant pattern are formed in the hard mask layer; etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer. A redundant structure is formed within the hard mask layer; finally, the remaining hard mask layer is removed to form an etched layer with the target structure. Thus, firstly, by embedding an etch stop layer in the hard mask layer and forming a first redundant pattern in the etch stop layer, the first redundant pattern can be stopped in the etch stop layer under the action of the etch stop layer; secondly, after forming the first redundant pattern, removing the etch stop layer can reduce the contamination of the etch stop layer on subsequent processes; thirdly, by introducing a redundant structure, the loading effect of the etching process can be reduced during the etching of high aspect ratio structures in the semiconductor structure. Attached Figure Description
[0024] Figure 1A A top view of a semiconductor structure provided in an embodiment of this disclosure;
[0025] Figure 1B Provided for the embodiments of this disclosure Figure 1A Front view of the semiconductor structure;
[0026] Figure 1C A schematic flowchart illustrating a semiconductor structure fabrication method provided in this embodiment of the disclosure;
[0027] Figure 1D A front view of another semiconductor structure provided in an embodiment of this disclosure;
[0028] Figure 1E Provided for the embodiments of this disclosure Figure 1D Top view of a semiconductor structure;
[0029] Figures 1F to 1J This is a schematic diagram of a semiconductor structure fabrication method provided in an embodiment of the present disclosure;
[0030] Figures 2A to 2H A schematic diagram illustrating the process of forming a composite hard mask layer on an etched layer, provided in an embodiment of this disclosure;
[0031] Figures 3A to 3C This is a schematic diagram illustrating the process of forming a first target pattern and a first redundant pattern in a composite hard mask layer, as provided in an embodiment of this disclosure. Detailed Implementation
[0032] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
[0033] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.
[0034] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.
[0035] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.
[0036] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0037] Figure 1A A semiconductor structure is shown, with a target pattern 101 and a redundant pattern 102 located on the right and left sides of the semiconductor structure, respectively. Typically, the target pattern 101 suffers from insufficient etching or reduced critical dimensions due to the etching load effect during etching. The loading effect refers to the decrease in etching rate or uneven distribution caused by localized etching gas consumption exceeding supply. Therefore, the redundant pattern 102 is introduced to reduce the etching load effect.
[0038] However, the target structure corresponding to the target pattern has a large aspect ratio, and smaller redundant patterns are no longer effective in solving the etching load effect problem, while larger redundant patterns cannot stop on the etched layer. Figure 1B It can be seen that when the size of the redundant pattern 102 is large, the redundant pattern 102 will enter the etching layer 103 during the etching process, thereby affecting the normal structure of the semiconductor.
[0039] Based on this, embodiments of this disclosure provide a method for fabricating a semiconductor structure, such as... Figure 1C As shown, the method includes:
[0040] Step S101: Form a composite hard mask layer on the etched layer, the composite hard mask layer including a hard mask layer and an etch stop layer surrounded by the hard mask layer;
[0041] Figure 1D This is a front view of a semiconductor structure, wherein a composite hard mask layer 104 is formed on an etch layer 103. The composite hard mask layer 104 includes a hard mask layer 1041 and an etch stop layer 1042, with the etch stop layer 1042 surrounded by the hard mask layer 1041. Figure 1E for Figure 1D The top view of the semiconductor structure shown, from Figure 1E It can be seen that the etch stop layer 1042 is surrounded by the hard mask layer 1041, that is, the etch stop layer 1042 is surrounded by the hard mask layer 1041.
[0042] Here, the etching layer is used to etch and form the target structure, which refers to the structure that needs to be formed in the etching layer through the etching process. The hard mask layer is used to form the hard mask pattern of the target structure, and the material of the hard mask layer may include at least one of carbon, silicon nitride, titanium nitride, and silicon oxide.
[0043] An etch stop layer is used to stop the etching process within its layer. The material of the etch stop layer may include at least one of silicon oxide, silicon nitride, aluminum oxide, and borosilicate glass. To ensure the etching process stops within the etch stop layer, the etching rate of the etch stop layer can be lower than the etching rate of the hard mask layer. That is, under the same etching conditions, the etching selectivity ratio of the hard mask layer to the etch stop layer can be relatively large, for example, 80:1. This allows the etch stop layer to be substantially unetched, only partially etched, or only partially etched when the hard mask layer is etched away. In some embodiments, the etching rates of the etch stop layer and the hard mask layer can be adjusted by changing the material composition and the ratio of each component.
[0044] In some embodiments, step S101 may involve forming a first hard mask layer on the etched layer, then embedding an etch stop layer on the upper surface of the first hard mask layer, and subsequently forming a second hard mask layer on the upper surfaces of the first hard mask layer and the etch stop layer, thereby forming a composite hard mask layer. This disclosure does not limit the method for forming the composite hard mask layer on the etched layer.
[0045] Step S102: A first target pattern and a first redundant pattern are formed in the composite hard mask layer. The first target pattern is completely located in the hard mask layer and does not penetrate the hard mask layer in the direction perpendicular to the hard mask layer. The bottom of the first redundant pattern is located in the etch stop layer and does not penetrate the etch stop layer in the direction perpendicular to the etch stop layer.
[0046] like Figure 1F As shown, a first target pattern 105 and a first redundant pattern 106 are formed in the composite hard mask layer 104. The first target pattern 105 is completely located in the hard mask layer 1041 and is perpendicular to the hard mask layer 1041 in the direction ( Figure 1F The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) indicates that the first target pattern 105 does not penetrate the hard mask layer 1041, meaning there is a certain height h1 between the bottom of the first target pattern 105 and the bottom of the hard mask layer 1041; the bottom 1061 of the first redundant pattern 106 is located in the etch stop layer 1042, and in a direction perpendicular to the etch stop layer 1042 ( Figure 1F The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) indicates that the first redundant pattern 106 does not penetrate the etch stop layer 1042.
[0047] Here, the first target pattern refers to the mask pattern used to form the target structure. The first target pattern does not penetrate the hard mask layer, that is, the bottom of the first target pattern is at a certain height from the bottom of the hard mask layer, so that when there is an etch stop layer, the etch layer is protected by the hard mask layer and will not be contaminated by the etch stop layer and the outside world.
[0048] The first redundant pattern refers to a pattern formed in the composite hard mask layer to reduce the etching load effect. The bottom of the first redundant pattern is located in the etch stop layer, that is, the bottom of the first redundant pattern is located inside the etch stop layer, or the bottom of the first redundant pattern may just be in contact with the upper surface of the etch stop layer (i.e., not yet located inside the etch stop layer). In some embodiments, in the direction perpendicular to the etch layer, the orthographic projection of the first redundant pattern may be located within the range of the orthographic projection of the pattern in the etch stop layer, so that the bottom of the first redundant pattern formed by the etching process may be located in the etch stop layer.
[0049] The first redundant pattern does not penetrate the etch stop layer, meaning that the first redundant pattern stops within or on the upper surface of the etch stop layer during the etching process. In some embodiments, the etching rate of the etch stop layer can be less than the etching rate of the hard mask layer. Therefore, under the same etching conditions, the etching depth of the etch stop layer is less than the etching depth of the hard mask layer. This allows the etch stop layer to stop the etching process during the etching of the first redundant pattern, thereby stopping the first redundant pattern within the etch stop layer.
[0050] In some embodiments, such as Figure 1F As shown, along the direction parallel to the bottom surface of the composite hard mask layer 104, the critical dimension CD2 of the first target pattern 105 is greater than the critical dimension CD1 of the first redundant pattern 106, and the first distance h1 between the bottom of the first target pattern 105 and the bottom surface of the composite hard mask layer 104 is less than the second distance h2 between the bottom of the first redundant pattern 106 and the bottom surface of the composite hard mask layer 104.
[0051] Here, critical dimensions refer to dimensions that significantly impact structural performance and require close monitoring. The critical dimension can be determined based on the structure's shape and manufacturing process. For example, in an etching process, when the structure is cylindrical, the diameter of the circular surface is the critical dimension (i.e.,...). Figure 1F (As shown in the example); when the structure is a cube, the side length is the critical dimension.
[0052] Under normal circumstances, for etching processes, when the critical dimension of the first redundant pattern is smaller than the critical dimension of the first target pattern along the direction parallel to the bottom surface of the composite hard mask layer, the etching load effect during the formation of the target structure can be reduced by utilizing the first redundant pattern. Therefore, along the direction parallel to the bottom surface of the composite hard mask layer, the critical dimension of the first redundant pattern can be smaller than the critical dimension of the first target pattern, that is, the critical dimension of the first target pattern is larger than the critical dimension of the first redundant pattern. Since the critical dimension of the first target pattern is larger than the critical dimension of the first redundant pattern, under the same etching conditions, the etching depth of the first target pattern is greater than the etching depth of the first redundant pattern. Therefore, the first distance between the bottom of the first target pattern and the bottom surface of the composite hard mask layer is smaller than the second distance between the bottom of the first redundant pattern and the bottom surface of the composite hard mask layer.
[0053] In some embodiments, such as Figure 1F As shown, along the direction parallel to the bottom surface of the composite hard mask layer 104, the critical dimension CD1 of the first redundant pattern 106 is smaller than the critical dimension CD3 of the etch stop layer 1042. Since the critical dimension of the first redundant pattern is smaller than the critical dimension of the etch stop layer, the etch stop layer can support the first redundant pattern during the etching process, allowing the first redundant pattern to stop inside or on the upper surface of the etch stop layer.
[0054] In some embodiments, such as Figure 1F As shown, the first distance h1 between the bottom of the first target pattern 105 and the bottom surface of the composite hard mask layer 104 is less than the third distance h3 between the bottom of the etch stop layer 1042 and the bottom surface of the composite hard mask layer 104.
[0055] Here, in order to form the target structure, the etch stop layer is usually removed first, forming something like... Figure 1G The diagram shows a second redundant pattern 108 including the region where the etch stop layer is located; that is, the bottom of the second redundant pattern 108 can be approximately equal to the bottom of the etch stop layer. Since the first target pattern will subsequently be used as a mask to etch the hard mask layer and the etched layer, respectively, a pattern is formed as shown... Figure 1I The third target pattern 111 shown and as follows Figure 1J The target structure 109 shown; and the hard mask layer 1041 etched using the second redundant pattern 108 as a mask to form the ... Figure 1H The redundant structure 110 is shown. It can be seen that... Figure 1F The first target pattern 105 on the left side of the middle is formed as follows Figure 1J The etching depth during the process of forming the target structure 109 shown is greater than that of the first redundant pattern 106 and the etching stop layer 1042 on the right, as shown in the figure. Figure 1H The etching depth of the redundant structure 110 shown is to ensure that the formed redundant structure is formed as shown in the figure. Figure 1J Since the target structure 109 is always located within the hard mask layer during the process, the first distance h1 between the bottom of the first target pattern 105 and the bottom surface of the composite hard mask layer 104 can be made smaller than the third distance h3 between the bottom of the etch stop layer 1042 and the bottom surface of the composite hard mask layer 104. Thus, with a larger third distance h3, sufficient space can be provided for forming redundant structures.
[0056] In some embodiments, step S102 may involve forming a photoresist layer on the composite hard mask layer and patterning the photoresist layer to form a mask pattern having a first target pattern and a first redundant pattern, and then etching the composite hard mask layer using the mask pattern as a mask to form the first target pattern and the first redundant pattern.
[0057] Step S103: Remove the remaining etch stop layer to form a second target pattern and a second redundant pattern in the hard mask layer;
[0058] Remove such as Figure 1F The remaining etch stop layer 1042 shown is used to form, as shown in the hard mask layer 1041. Figure 1G The second target pattern 107 and the second redundant pattern 108 are shown.
[0059] Here, the second target pattern refers to the pattern formed after the first target pattern has undergone the process of removing the remaining etch stop layer, i.e., the second target pattern 107 and... Figure 1F There is a corresponding relationship between the first target pattern 105 in the diagram.
[0060] The second redundant pattern refers to the pattern formed after the first redundant pattern has undergone the process of removing the remaining etch stop layer. Under strict process control, step S103 only removes the remaining etch stop layer, without removing the hard mask layer beneath the etch stop layer. Figure 1F As shown, the second redundant pattern 108 includes an etch stop layer 1042 (height h4) and a first redundant pattern 106. Of course, in some embodiments, step S103 may also remove a small portion of the hard mask layer beneath the etch stop layer in addition to removing the remaining etch stop layer.
[0061] Since the bottom of the first redundant pattern is located inside or on the upper surface of the etch stop layer, meaning a portion of the etch stop layer is directly below the hard mask layer, dry etching cannot effectively remove the etch stop layer. Therefore, step S103 can be performed using wet etching to remove the remaining etch stop layer. The etchant used in the wet etching process can be a mixture of hydrofluoric acid, nitric acid, and acetic acid, or substances such as potassium hydroxide. This embodiment does not limit the type of etchant used in the wet etching. In this embodiment, by using wet etching, the etch stop layer can be removed conveniently and quickly, while reducing the amount of residual etch stop layer.
[0062] When using wet etching to remove the etch stop layer, the following two conditions must be met:
[0063] First, the etching rate of the etching solution on the etch stop layer is greater than that on the hard mask layer. This ensures that during the removal of the etch stop layer, only a small portion of the hard mask layer is etched, rather than being completely removed.
[0064] Second, in the direction perpendicular to the hard mask layer, the second target pattern does not penetrate the hard mask layer, and the second redundant pattern does not penetrate the hard mask layer. For example... Figure 1G As shown, in the direction perpendicular to the hard mask layer 1041 (see...) Figure 1F (Understanding) The second target pattern 107 does not penetrate the hard mask layer 1041, and the second redundant pattern 108 does not penetrate the hard mask layer 1041. This allows the etched layer to remain intact under the protection of the unpenetrated hard mask layer without affecting the formation of the target structure of the etched layer.
[0065] Step S104: Etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer and a redundant structure in the hard mask layer;
[0066] by Figure 1G The second target pattern 107 and the second redundant pattern 108 are used as masks for etching, forming a pattern in the etched layer 103 as shown in the image. Figure 1H The target structure 109 shown, and the structure formed within the hard mask layer 1041 as shown Figure 1H The redundant structure 110 shown is, compared to Figure 1G The second redundant pattern 108 is deeper in the depth direction, that is, the height h5 of the redundant structure 110 is greater than the height h4 of the second redundant pattern 108.
[0067] Here, step S104 can be implemented by using a dry etching process with the second target pattern and the second redundant pattern as masks to form the target structure in the etched layer and the redundant structure in the hard mask layer. The dry etching process can include reactive ion etching, plasma etching, deep reactive ion etching and XeF2 isotropic etching, etc. The embodiments of this disclosure do not limit the type of dry etching process.
[0068] In some embodiments, the implementation of step S104 may include the following steps S1041 to S1042:
[0069] Step S1041: Etching is performed using the second target pattern and the second redundant pattern as masks, wherein the hard mask layer is etched using the second target pattern as a mask to form a third target pattern in the hard mask layer, and the third target pattern penetrates the hard mask layer in a direction perpendicular to the hard mask layer; the hard mask layer is etched using the second redundant pattern as a mask to form a third redundant pattern in the hard mask layer, and the third redundant pattern is located in the hard mask layer and does not penetrate the hard mask layer in a direction perpendicular to the hard mask layer;
[0070] like Figure 1G As shown, using the second target pattern 107 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1I The third target pattern 111 is shown. (As shown) Figure 1I As shown, in the direction perpendicular to the hard mask layer 1041 (i.e. Figure 1I The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) is where the third target pattern 111 penetrates the hard mask layer 1041.
[0071] like Figure 1G As shown, using the second redundant pattern 108 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1I The third redundant pattern 112 is shown. (As shown) Figure 1I As shown, in the direction perpendicular to the hard mask layer 1041, the third redundant pattern 112 is located in the hard mask layer 1041 and does not penetrate the hard mask layer 1041. The third redundant pattern 112, compared to... Figure 1G The second redundant pattern 108 in the middle is deeper in the depth direction, and compared to Figure 1H The redundant structure 110 in the middle is shallower in the depth direction; that is, the height h6 of the third redundant pattern 112 is greater than the height h4 of the second redundant pattern 108, but less than the height h5 of the redundant structure 110.
[0072] Here, the third target pattern is a target pattern that penetrates the hard mask layer in a direction perpendicular to the hard mask layer. Since the bottom area of the etch stop layer region in the second redundant pattern is larger, during the simultaneous etching process using the second redundant pattern and the second target pattern as masks, the etching rate of the second redundant pattern is slower than that of the second target pattern. As a result, the obtained third target pattern can penetrate the hard mask layer, while the third redundant pattern cannot.
[0073] Step S1042: Etching is performed using the third target pattern and the third redundant pattern as masks, wherein the third target pattern is used as a mask to etch the etching layer to form a target structure in the etching layer; the third redundant pattern is used as a mask to etch the hard mask layer to form a redundant structure in the hard mask layer, wherein the redundant structure is located in the hard mask layer and does not penetrate the hard mask layer in the direction perpendicular to the hard mask layer.
[0074] like Figure 1I As shown, using the third target pattern 111 as a mask, the etching layer 103 is etched, forming a pattern on the etching layer 103 as shown. Figure 1H The target structure shown is 109.
[0075] like Figure 1I As shown, using the third redundant pattern 112 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1H The redundant structure 110 shown is in the direction perpendicular to the hard mask layer 1041 (i.e. Figure 1H The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) indicates that the redundant structure 110 is located in the hard mask layer 1041 and does not penetrate the hard mask layer 1041.
[0076] Here, to ensure that during etching using the third target pattern and the third redundant pattern as masks, while the target structure is formed in the etched layer, the redundant structure remains within the hard mask layer and does not penetrate it, step S1042 may include: the etching rate of the etched layer is greater than the etching rate of the hard mask layer. This allows a small portion of the redundant structure to be etched away during etching using the third target pattern and the third redundant pattern as masks, while still remaining within the hard mask layer and not penetrating it. In some embodiments, the etching rate of the etched layer and the hard mask layer can be adjusted by changing the composition and ratio of the materials.
[0077] In this embodiment of the disclosure, by controlling the etching rate of the etching layer and the etching rate of the hard mask layer, the target structure is formed in the etching layer while the redundant structure is located in the hard mask layer and does not penetrate the hard mask layer, thereby facilitating the subsequent removal of the redundant structure.
[0078] Step S105: Remove the remaining hard mask layer.
[0079] Remove such as Figure 1H The remaining hard mask layer 1041 shown forms as follows: Figure 1J The etched layer 103 shown contains the target structure 109.
[0080] Here, step S105 can be implemented by using a dry etching process or a wet etching process to remove the remaining hard mask layer, thereby obtaining an etched layer with the target structure.
[0081] In this embodiment, a composite hard mask layer is formed on the etched layer, wherein the composite hard mask layer includes a hard mask layer and an etch stop layer surrounded by the hard mask layer; then, a first target pattern and a first redundant pattern are formed in the composite hard mask layer, and the bottom of the first redundant pattern is located in the etch stop layer, and the first redundant pattern does not penetrate the etch stop layer in the direction perpendicular to the etch stop layer; then, the remaining etch stop layer is removed, and a second target pattern and a second redundant pattern are formed in the hard mask layer; etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer. A redundant structure is formed within the hard mask layer; finally, the remaining hard mask layer is removed to form an etched layer with the target structure. Thus, firstly, by embedding an etch stop layer in the hard mask layer and forming a first redundant pattern above the etch stop layer, the first redundant pattern can be stopped on the etch stop layer under the action of the etch stop layer; secondly, by removing the etch stop layer after forming the first redundant pattern, the contamination of the etch stop layer on subsequent processes can be reduced; thirdly, by introducing a redundant structure, the loading effect of the etching process can be reduced during the etching of high aspect ratio structures in the semiconductor structure.
[0082] In some embodiments, the implementation of step S101, "forming a composite hard mask layer on the etched layer, the composite hard mask layer including a hard mask layer and an etch stop layer surrounded by the hard mask layer," may include the following steps S1011 to S1012:
[0083] Step S1011: The first hard mask layer and the etching stop layer are sequentially formed on the etching layer, wherein the etching stop layer is embedded in the first hard mask layer, and the top surface of the first hard mask layer is flush with the top surface of the etching stop layer;
[0084] like Figure 2A As shown, a first hard mask layer 1041a and an etch stop layer 1042 are sequentially formed on the etch layer 103, wherein the etch stop layer 1042 is embedded in the first hard mask layer 1041a, and the top surface of the first hard mask layer 1041a is flush with the top surface of the etch stop layer 1042.
[0085] Here, "etch stop layer embedded in the first hard mask layer" means that the etch stop layer, except for its top surface, is located within the first hard mask layer. In some embodiments, along a direction parallel to the top surface of the first hard mask layer, the horizontal dimension of the first hard mask layer is larger than the horizontal dimension of the etch stop layer, thus allowing the etch stop layer to be embedded within the first hard mask layer.
[0086] In some embodiments, the material of the first hard mask layer may include at least one of carbon, silicon nitride, titanium nitride, and silicon oxide. The material of the first hard mask layer is different from the material of the etch stop layer, so that under the same etch conditions, the etch rate of the first hard mask layer is different from the etch rate of the etch stop layer. By controlling the types of materials of the first hard mask layer and the etch stop layer, the etching of the etch stop layer or the first hard mask layer can be adjusted.
[0087] Step S1012: Form a second hard mask layer, which covers the top surface of the first hard mask layer and the top surface of the etch stop layer, thereby forming the composite hard mask layer located on the etch layer.
[0088] like Figure 2B As shown, a second hard mask layer 1041b is formed on the top surface of the first hard mask layer 1041a and the top surface of the etch stop layer 1042, thereby forming a composite hard mask layer 104 located on the etch layer 103. The composite hard mask layer 104 includes the first hard mask layer 1041a, the etch stop layer 1042 and the second hard mask layer 1041b.
[0089] In some embodiments, step S1012 can be performed by forming a second hard mask layer on the etched layer through a deposition process. The deposition process includes any of the following: Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), and any other suitable deposition process. The material of the second hard mask layer may include at least one of carbon, silicon nitride, titanium nitride, and silicon oxide. The material of the second hard mask layer is different from the material of the etch stop layer, so that under the same etching conditions, the etching rate of the second hard mask layer is different from that of the etch stop layer. By controlling the types of materials of the second hard mask layer and the etch stop layer, the etching of the etch stop layer or the second hard mask layer can be adjusted. In some embodiments, the material of the second hard mask layer may be the same as or different from the material of the first hard mask layer.
[0090] Regarding step S1011 above, in some embodiments, the implementation of step S1011 may include the following steps S1011a to S1011b:
[0091] Step S1011a: A first hard mask layer and an etch stop layer trench are sequentially formed on the etched layer, wherein the etch stop layer trench is located within the first hard mask layer;
[0092] like Figure 2C As shown, a first hard mask layer 1041a and an etch stop layer trench 113 are sequentially formed on the etch layer 103, wherein the etch stop layer trench 113 is located within the first hard mask layer 1041a.
[0093] In some embodiments, the implementation of step S1011a may include the following steps S11a1 to S11a5:
[0094] Step S11a1: Form an initial first hard mask layer on the etched layer;
[0095] like Figure 2D As shown, an initial first hard mask layer 10411 is formed on the etched layer 103, that is, a hard mask layer without etch stop layer trenches.
[0096] Here, step S11a1 can be performed by forming an initial first hard mask layer on the etched layer through a deposition process. The deposition process includes any of the following: Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), and any other suitable deposition process.
[0097] Step S11a2: Form a first photoresist layer on the initial first hard mask layer;
[0098] like Figure 2E As shown, a first photoresist layer 114 is formed on the initial first hard mask layer 10411.
[0099] Here, photoresist, also known as photoresist, refers to a photoresist material used for lithography, whose solubility changes upon exposure to ultraviolet light, electron beams, ion beams, X-rays, or other forms of radiation. Photoresist is photosensitive and comprises components such as photosensitive resin, sensitizer, and solvent. It is used as an anti-corrosion coating material in the photolithography process.
[0100] Step S11a3: Pattern the first photoresist layer to form a first etch stop layer pattern;
[0101] like Figure 2FAs shown, the first photoresist layer 114 is patterned to form a first etch stop layer pattern 115, wherein the first etch stop layer pattern 115 is used to etch and form an etch stop layer.
[0102] Here, patterned photoresist layer refers to the process of exposing and developing the photoresist layer to dissolve a portion of it. The undissolved portion of the photoresist layer forms a mask pattern, and the first window in the mask pattern is the first etch stop layer pattern.
[0103] Step S11a4: Using the first etch stop layer pattern as a mask, etch the initial first hard mask layer to form the first hard mask layer and the etch stop layer trench located in the first hard mask layer;
[0104] like Figure 2F As shown, the initial first hard mask layer 10411 is etched using the first etch stop layer pattern 115 as a mask to form the following... Figure 2G The first hard mask layer 1041a and the etch stop trench 113 located within the first hard mask layer 1041a are shown.
[0105] Here, the first hard mask layer is the hard mask layer formed after the etch stop layer trench is formed in the initial first hard mask layer.
[0106] Step S11a5: Remove the first photoresist layer.
[0107] like Figure 2G As shown, the first photoresist layer 114 is removed to form Figure 2C The structure shown.
[0108] Here, step S11a5 can use either a dry etching process or a wet etching process to remove the first photoresist layer.
[0109] Step S1011b: An etch stop layer is deposited in the etch stop layer trench to form an etch stop layer that fills the etch stop layer trench.
[0110] like Figure 2C As shown, a layer is deposited and formed within the etching stop layer trench 113, as shown in the figure. Figure 2A The etching stop layer 1042 shown is filled with etching stop layer trench 113.
[0111] Here, step S1011b can be performed by a deposition process to form an etch stop layer within the etch stop layer trench. The deposition process includes any of the following: Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), and any other suitable deposition process. Among these, ALD produces a deposition layer with extremely uniform thickness and excellent consistency.
[0112] In some embodiments, the implementation of step S1011b may include the following steps S11b1 to S11b2:
[0113] Step S11b1: An initial etch stop layer is deposited and formed in the etch stop layer trench and on the top surface of the first hard mask layer;
[0114] like Figure 2C As shown, a layer is deposited within the etch stop layer trench 113 and on the top surface of the first hard mask layer 1041a, forming a layer as shown. Figure 2H The initial etch stop layer 10421 is shown.
[0115] Step S11b2: Remove the initial etch stop layer located on the top surface of the first hard mask layer, so that the top surface of the first hard mask layer is flush with the top surface of the remaining initial etch stop layer, to form the etch stop layer.
[0116] like Figure 2H As shown, the initial etch stop layer 10421 located on the top surface of the first hard mask layer 1041a is removed, so that the top surface of the first hard mask layer 1041a is flush with the top surface of the remaining initial etch stop layer 10421, to form as shown. Figure 2A The etching stop layer 1042 is shown.
[0117] Here, step S11b2 can be performed by chemical mechanical polishing to remove the initial etch stop layer on the top surface of the first hard mask layer.
[0118] In some embodiments, the implementation of step S102, "forming a first target pattern and a first redundant pattern in the composite hard mask layer," may include the following steps S1021 to S1024:
[0119] Step S1021: Form a second photoresist layer on the composite hard mask layer;
[0120] like Figure 3A As shown, a second photoresist layer 301 is formed on the composite hard mask layer 104.
[0121] Here, the second photoresist can be the same as or different from the first photoresist.
[0122] Step S1022: Pattern the second photoresist layer to form an initial first target pattern and an initial first redundant pattern; along the direction parallel to the top surface of the composite hard mask layer, the critical dimension of the initial first target pattern is larger than the critical dimension of the initial first redundant pattern;
[0123] like Figure 3B As shown, the second photoresist layer 301 is patterned to form an initial first target pattern 302 and an initial first redundant pattern 303; along the direction parallel to the top surface of the composite hard mask layer 104, the critical dimension CD2 of the initial first target pattern 302 is larger than the critical dimension CD1 of the initial first redundant pattern 303.
[0124] Step S1023: Using the initial first target pattern and the initial first redundant pattern as masks, etch the composite hard mask layer to form the first target pattern and the first redundant pattern in the composite hard mask layer;
[0125] like Figure 3B As shown, using the initial first target pattern 302 and the initial first redundant pattern 303 as masks, the composite hard mask layer 104 is etched to form a pattern as shown in the figure. Figure 3C The first target pattern 105 and the first redundant pattern 106 are shown.
[0126] In some embodiments, during the step of etching the composite hard mask layer using the initial first target pattern and the initial first redundant pattern as masks, the etching rate of the etch stop layer is lower than the etching rate of the hard mask layer. This allows the formed first redundant pattern to stop on the etch stop layer without affecting the formation of the target structure in the etch layer located below the etch stop layer. In some embodiments, the etching rate can be adjusted by changing the composition and ratio of the materials of the etch stop layer and the hard mask layer.
[0127] In some embodiments, such as Figure 3C As shown, the etched layer 103 includes an etched region 1031 and a non-etched region 1032. Correspondingly, the implementation of step S1023 may include: forming a first target pattern 105 in a first preset region 304 and forming a first redundant pattern 106 in a second preset region 305. The first preset region 304 is the region where the hard mask layer 1041 is directly opposite the etched region 1031 along a direction perpendicular to the etched layer 103; the second preset region 305 is the region where the hard mask layer 1041 and the etch stop layer 1042 are directly opposite the non-etched region 1032 along a direction perpendicular to the etched layer 103.
[0128] In this embodiment of the disclosure, by dividing the etched layer into etched areas and non-etched areas, it is convenient to determine the positions of the first target pattern and the first redundant pattern.
[0129] Step S1024: Remove the second photoresist layer.
[0130] like Figure 3C As shown, the second photoresist layer 301 is removed to form a layer as shown. Figure 1F The structure shown.
[0131] In this embodiment of the present disclosure, a first target pattern and a first redundant pattern are formed by forming a second photoresist layer on a composite hard mask layer and then patterning the second photoresist layer.
[0132] The following describes another method for fabricating a semiconductor structure according to an embodiment of this disclosure, with reference to the figures. The method includes:
[0133] First step, such as Figure 2D As shown, an initial first hard mask layer 10411 is formed on the etched layer 103.
[0134] The second step, as Figure 2E As shown, a first photoresist layer 114 is formed on the initial first hard mask layer 10411; as Figure 2F As shown, the first photoresist layer 114 is patterned to form the first etch stop layer pattern 115.
[0135] The third step, as Figure 2F As shown, the initial first hard mask layer 10411 is etched using the first etch stop layer pattern 115 as a mask to form the following... Figure 2G The first hard mask layer 1041a and the etch stop trench 113 located within the first hard mask layer 1041a are shown.
[0136] Step four, as Figure 2G As shown, the first photoresist layer 114 is removed to form a layer as shown. Figure 2C The first hard mask layer 1041a and the etch stop layer trench 113 are sequentially formed on the etched layer 103.
[0137] Fifth step, as Figure 2C As shown, a layer is deposited within the etch stop layer trench 113 and on the top surface of the first hard mask layer 1041a, forming a layer as shown. Figure 2H The initial etch stop layer 10421 is shown.
[0138] Step 6, as follows Figure 2H As shown, the initial etch stop layer 10421 located on the top surface of the first hard mask layer 1041a is removed, so that the top surface of the first hard mask layer 1041a is flush with the top surface of the remaining initial etch stop layer 10421, to form as shown. Figure 2A The etching stop layer 1042 is shown.
[0139] Step 7, as Figure 2B As shown, a second hard mask layer 1041b is formed on the top surface of the first hard mask layer 1041a and the top surface of the etch stop layer 1042, thereby forming a composite hard mask layer 104 located on the etch layer 103. The composite hard mask layer 104 includes the first hard mask layer 1041a, the etch stop layer 1042 and the second hard mask layer 1041b.
[0140] Step 8, as Figure 3A As shown, a second photoresist layer 301 is formed on the composite hard mask layer 104. Figure 3B As shown, the second photoresist layer 301 is patterned to form an initial first target pattern 302 and an initial first redundant pattern 303; along the direction parallel to the top surface of the composite hard mask layer 104, the critical dimension CD2 of the initial first target pattern 302 is larger than the critical dimension CD1 of the initial first redundant pattern 303.
[0141] Step 9, as Figure 3B As shown, the composite hard mask layer 104 is etched using the initial first target pattern 302 and the initial first redundant pattern 303 as masks; as Figure 3C As shown, the second photoresist layer 301 is removed to form a layer as shown. Figure 1F The structure shown is formed in the composite hard mask layer 104 with a first target pattern 105 and a first redundant pattern 106.
[0142] Step 10, as follows Figure 1F As shown, the remaining etch stop layer 1042 is removed to form a layer in the hard mask layer 1041 as shown. Figure 1G The second target pattern 107 and the second redundant pattern 108 are shown. Figure 1G As shown, using the second target pattern 107 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1I The third target pattern 111 is shown. (As shown) Figure 1I As shown, in the direction perpendicular to the hard mask layer 1041 (i.e. Figure 1I The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) is shown, and the third target pattern 111 penetrates the hard mask layer 1041. For example... Figure 1G As shown, using the second redundant pattern 108 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1I The third redundant pattern 112 is shown. (As shown) Figure 1I As shown, in the direction perpendicular to the hard mask layer 1041 (i.e. Figure 1IThe direction indicated by the middle arrow (or the direction of the arrow pointing upwards) indicates that the third redundant pattern 112 is located in the hard mask layer 1041 and does not penetrate the hard mask layer 1041.
[0143] Step 11, as follows Figure 1I As shown, using the third target pattern 111 as a mask, the etching layer 103 is etched, forming a pattern in the etching layer 103 as shown. Figure 1H The target structure shown is 109. (As shown in the image) Figure 1I As shown, using the third redundant pattern 112 as a mask, the hard mask layer 1041 is etched to form a pattern as shown in the diagram. Figure 1H The redundant structure 110 shown is in the direction perpendicular to the hard mask layer 1041 (i.e. Figure 1H The direction indicated by the middle arrow (or the direction of the arrow pointing upwards) indicates that the redundant structure 110 is located in the hard mask layer 1041 and does not penetrate the hard mask layer 1041.
[0144] Step 12, Remove Figure 1H The remaining hard mask layer 1041 shown in the figure yields the following result: Figure 1J The etched layer 103 shown contains the target structure 109.
[0145] This disclosure provides a semiconductor structure, which is prepared according to the above-described semiconductor structure preparation method.
[0146] The features disclosed in the several method or structural embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or structural embodiments.
[0147] The descriptions of the above semiconductor structure embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the semiconductor structure embodiments of this disclosure, please refer to the descriptions of the method embodiments of this disclosure for understanding.
[0148] The above description is merely an exemplary embodiment of this disclosure and is not intended to limit the scope of protection of this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A method for fabricating a semiconductor structure, characterized in that, include: A composite hard mask layer is formed on the etched layer, the composite hard mask layer including a hard mask layer and an etch stop layer surrounded by the hard mask layer; A first target pattern and a first redundant pattern are formed in the composite hard mask layer. The first target pattern is completely located in the hard mask layer and does not penetrate the hard mask layer in the direction perpendicular to the hard mask layer. The bottom of the first redundant pattern is located in the etch stop layer and does not penetrate the etch stop layer in the direction perpendicular to the etch stop layer. Remove the remaining etch stop layer to form a second target pattern and a second redundant pattern in the hard mask layer; Etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer and a redundant structure in the hard mask layer. Remove the remaining hard mask layer.
2. The preparation method according to claim 1, characterized in that, The hard mask layer includes a first hard mask layer and a second hard mask layer. A composite hard mask layer is formed on the etch layer. The composite hard mask layer includes a hard mask layer and an etch stop layer surrounded by the hard mask layer. The first hard mask layer and the etching stop layer are sequentially formed on the etching layer, wherein the etching stop layer is embedded in the first hard mask layer, and the top surface of the first hard mask layer is flush with the top surface of the etching stop layer; A second hard mask layer is formed, which covers the top surface of the first hard mask layer and the top surface of the etch stop layer, thereby forming the composite hard mask layer located on the etch layer.
3. The preparation method according to claim 2, characterized in that, A first hard mask layer and an etch stop layer are sequentially formed on the etched layer, including: A first hard mask layer and an etch stop layer trench are sequentially formed on the etched layer, wherein the etch stop layer trench is located within the first hard mask layer; An etch stop layer is deposited within the etch stop layer trench to form an etch stop layer that fills the etch stop layer trench.
4. The preparation method according to claim 3, characterized in that, A first hard mask layer and an etch stop layer trench are sequentially formed on the etched layer, including: An initial first hard mask layer is formed on the etched layer; A first photoresist layer is formed on the initial first hard mask layer; The first photoresist layer is patterned to form a first etch stop layer pattern; Using the first etch stop layer pattern as a mask, the initial first hard mask layer is etched to form a first hard mask layer and an etch stop layer trench located within the first hard mask layer; Remove the first photoresist layer.
5. The preparation method according to claim 3, characterized in that, An etch stop layer is deposited within the etch stop layer trench to form an etch stop layer that fills the etch stop layer trench, including: An initial etch stop layer is deposited and formed within the etch stop layer trench and on the top surface of the first hard mask layer; The initial etch stop layer located on the top surface of the first hard mask layer is removed, so that the top surface of the first hard mask layer is flush with the top surface of the remaining initial etch stop layer, to form the etch stop layer.
6. The preparation method according to any one of claims 1 to 5, characterized in that, Along a direction parallel to the bottom surface of the composite hard mask layer, the critical dimension of the first target pattern is larger than the critical dimension of the first redundant pattern, and the first distance between the bottom of the first target pattern and the bottom surface of the composite hard mask layer is smaller than the second distance between the bottom of the first redundant pattern and the bottom surface of the composite hard mask layer.
7. The preparation method according to claim 6, characterized in that, Along a direction parallel to the bottom surface of the composite hard mask layer, the critical dimension of the first redundant pattern is smaller than the critical dimension of the etch stop layer.
8. The preparation method according to claim 6, characterized in that, The first distance between the bottom of the first target pattern and the bottom surface of the composite hard mask layer is less than the third distance between the bottom of the etch stop layer and the bottom surface of the composite hard mask layer.
9. The preparation method according to claim 6, characterized in that, Forming a first target pattern and a first redundant pattern in the composite hard mask layer includes: A second photoresist layer is formed on the composite hard mask layer; The second photoresist layer is patterned to form an initial first target pattern and an initial first redundant pattern; along a direction parallel to the top surface of the composite hard mask layer, the critical dimension of the initial first target pattern is larger than the critical dimension of the initial first redundant pattern; Using the initial first target pattern and the initial first redundant pattern as masks, the composite hard mask layer is etched to form the first target pattern and the first redundant pattern in the composite hard mask layer; Remove the second photoresist layer.
10. The preparation method according to claim 9, characterized in that, The etched layer includes etched and non-etched regions. Using the initial first target pattern and the initial first redundant pattern as masks, the composite hard mask layer is etched, including: The first target pattern is formed in a first preset area, and the first redundant pattern is formed in a second preset area. The first preset area is the area where the hard mask layer and the etched area are directly opposite each other along the direction perpendicular to the etched layer. The second preset area is the area where the hard mask layer and the etch stop layer are directly opposite each other along the direction perpendicular to the etched layer.
11. The preparation method according to any one of claims 1 to 5, 8 to 10, characterized in that, In a direction perpendicular to the etched layer, the orthographic projection of the first redundant pattern lies within the range of the orthographic projection of the pattern of the etch stop layer.
12. The preparation method according to claim 9 or 10, characterized in that, In the step of etching the composite hard mask layer using the initial first target pattern and the initial first redundant pattern as masks, the etching rate of the etching stop layer is less than the etching rate of the hard mask layer.
13. The preparation method according to any one of claims 1 to 5, 7 to 10, characterized in that, The removal of the remaining etch stop layer includes: The remaining etching stop layer is removed using a wet etching process.
14. The preparation method according to claim 13, characterized in that, In the wet etching process, the etching rate of the etching stop layer is greater than the etching rate of the hard mask layer; as well as In the direction perpendicular to the hard mask layer, the second target pattern does not penetrate the hard mask layer, and the second redundant pattern does not penetrate the hard mask layer.
15. The preparation method according to any one of claims 1 to 5, 7 to 10, and 14, characterized in that, Etching is performed using the second target pattern and the second redundant pattern as masks to form a target structure in the etched layer and a redundant structure in the hard mask layer, including: Etching is performed using the second target pattern and the second redundant pattern as masks. Specifically, the hard mask layer is etched using the second target pattern as a mask to form a third target pattern within the hard mask layer, which penetrates the hard mask layer in a direction perpendicular to it. Similarly, the hard mask layer is etched using the second redundant pattern as a mask to form a third redundant pattern within it, which is located within the hard mask layer and does not penetrate it in a direction perpendicular to it. Etching is performed using the third target pattern and the third redundant pattern as masks. Specifically, the third target pattern is used as a mask to etch the etching layer, forming a target structure in the etching layer. The third redundant pattern is used as a mask to etch the hard mask layer, forming a redundant structure in the hard mask layer. In a direction perpendicular to the hard mask layer, the redundant structure is located in the hard mask layer and does not penetrate the hard mask layer.
16. The preparation method according to claim 15, characterized in that, In the step of etching using the third target pattern and the third redundant pattern as masks, the etching rate of the etched layer is greater than the etching rate of the hard mask layer.
17. The preparation method according to any one of claims 1 to 5, 7 to 10, 14, and 16, characterized in that, The material of the etching stop layer includes at least one of silicon oxide, silicon nitride, aluminum oxide, and borosilicate glass.
18. The preparation method according to claim 17, characterized in that, The hard mask layer includes a first hard mask layer and a second hard mask layer, wherein the material of the first hard mask layer includes at least one of carbon, silicon nitride, titanium nitride, and silicon oxide; and / or; The material of the second hard mask layer includes at least one of carbon, silicon nitride, titanium nitride, and silicon oxide; and The material of the etching stop layer is different from the materials of the first hard mask layer and the second hard mask layer.
19. A semiconductor structure, characterized in that, The semiconductor structure is prepared by the preparation method according to any one of claims 1 to 18.