Document processing method, system, device and medium in chip design and verification
By using an automated document processing system to dynamically update chip design documents, the problem of repetitive communication among personnel during the chip design and verification process has been solved, improving work efficiency and shortening the development cycle.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MOLCHIP TECH (SHANGHAI) CO LTD
- Filing Date
- 2023-12-22
- Publication Date
- 2026-06-26
AI Technical Summary
In the chip design and verification process, communication between documentation writers and verification engineers involves repetitive work and high costs, which prolongs the chip development cycle.
An automated document processing system is used to automatically send notifications to document writers based on the annotations made by verification engineers in chip design documents, and dynamically update the document content based on the responses, reducing manual communication.
It significantly reduces personnel communication costs in the chip development process and shortens the development cycle.
Smart Images
Figure CN117473068B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip development technology, and in particular to a document processing method, system, device and medium for chip design and verification. Background Technology
[0002] In the field of integrated circuit (IC) design, mainstream chip design increasingly favors the use of System-on-Chip (SoC) designs. The SoC design process involves both design and verification. During the design phase, chip designers typically manually write chip design documents, which describe the design information of the design-under-test (DUT), such as the SoC chip. These documents can contain multiple sub-sections as needed. Based on the design documents written by the chip designers, verification engineers can set up verification environments to verify the functionality of the DUT.
[0003] Currently, chip design documentation and chip verification are typically handled by different departments / groups, inevitably leading to information gaps between the documentation writers and verification personnel. Throughout the chip verification process, verification engineers may need to communicate with the documentation writers regarding the chip design documentation. For example, when processing chip design documentation, if a verification engineer discovers that some content may be missing, they need to verify with the documentation writers; similarly, if information is found to be omitted in the documentation during actual verification work, communication with the documentation writers is necessary.
[0004] Currently, the aforementioned communication is usually conducted through face-to-face interactions or traditional communication tools (such as telephones, emails, instant messaging tools, etc.), which has the following drawbacks: the communication process involves a large amount of repetitive work, resulting in high communication costs, wasted human resources, and extended chip development cycles. On the one hand, since chip verification typically involves multiple stages, with different verification engineers responsible for different stages, the aforementioned communication work involves significant repetitive manual labor. For example, a chip project may include two verification stages. In the first verification stage, verification engineer Zhang San, responsible for that stage, communicates with the document writer about issue A; after the completion of that verification stage, the second verification stage begins, and the verification engineer changes. In this stage, verification engineer Li Si also communicates with the document writer about issue A while processing the document, resulting in multiple instances of repeated communication regarding the same design document. On the other hand, when staff changes, the aforementioned traditional communication methods inevitably suffer from repetitive communication problems. For example, a new engineer taking over the work may raise certain questions to the document writer based on the document, questions that the document writer had already discussed with previous engineers. Summary of the Invention
[0005] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a document processing method, system, device, and medium for chip design and verification. The document processing method for chip design and verification provided by this invention includes an automatic document processing system. This system enables dynamic updating of chip design document content, significantly reducing personnel communication costs during chip development and thus shortening the chip development cycle.
[0006] To achieve the above objectives, the present invention provides the following technical solution:
[0007] A document processing method for chip design and verification, comprising the following steps, using an automated document processing system to process chip design documents:
[0008] Verification engineers open the target chip design document using an automated document processing system.
[0009] Collect information on the annotation operations performed by the aforementioned verification engineers on the target chip design document;
[0010] The document automatic processing system sends a notification to the document writer corresponding to the aforementioned target chip design document;
[0011] Obtain the response information from the authors of the aforementioned document in response to the aforementioned notification;
[0012] The document automatic processing system updates the content of the aforementioned chip design document based on the response, and then sends the updated chip design document to the aforementioned verification engineer.
[0013] Furthermore, the automatic document processing system includes a chip document database; the document writers are chip designers, and the chip design documents written by the chip designers are archived in the aforementioned chip document database. The chip document database is configured with a document ID for each chip design document, and the document ID is set to correspond one-to-one with the chip design document, with each chip design document corresponding to a unique document ID.
[0014] Furthermore, the steps for verification engineers to open the target chip design document using the document automation system include:
[0015] Verification engineers log in to the document automation system using a configured user ID;
[0016] Send a document request message, which includes the document ID of the requested chip design document and the user ID of the aforementioned verification engineer;
[0017] The document automatic processing system retrieves the target chip design document from the chip document database based on the aforementioned document ID;
[0018] The target chip design document obtained based on the aforementioned user ID is sent to the aforementioned verification engineer's client for display output.
[0019] Furthermore, in the chip documentation database, different document archiving spaces are set up for different chip projects to store the chip design documents of the corresponding chip projects; for each chip project, a personnel address book corresponding to the chip project is created in the document automatic processing system, and the personnel address book is used to record the communication account information of the chip designers under the chip project.
[0020] At this point, the archiving steps are as follows:
[0021] Receive chip design documents uploaded by chip designers, and obtain the communication account information of the aforementioned chip designers;
[0022] Find the chip project to which the chip design document belongs;
[0023] Determine whether the chip documentation database contains the document archive space for the aforementioned chip project;
[0024] If it is determined that a document archive space already exists for the chip project, the aforementioned chip design document is stored in the corresponding document archive space. Then, it is determined whether the communication account information of the aforementioned chip designer is recorded in the personnel address book of the chip project. If it is determined that it does not exist, the communication account information of the chip designer is added to the personnel address book.
[0025] When it is determined that there is no document archive space for the chip project, a document archive space corresponding to the aforementioned chip project is created, and the aforementioned chip design documents are stored in the corresponding document archive space; and, a personnel address book corresponding to the aforementioned chip project is created, and the communication account information of the aforementioned chip designers is added to the personnel address book.
[0026] Furthermore, the communication account is an email address;
[0027] At this time, the document automatic processing system sends an email to the corresponding chip designer based on the email address of the chip designer in the personnel address book of the chip project to which the chip design document belongs, to make the aforementioned notification.
[0028] Furthermore, the document automatic processing system includes a label retrieval module and a label processing module;
[0029] The annotation retrieval module is configured to: perform keyword retrieval on the currently opened chip design document in the automatic document processing system; when a preset annotation keyword is found, determine that the current chip design document has undergone annotation operation, and send an annotation information processing instruction to the annotation processing module.
[0030] The annotation processing module is configured to: upon receiving an annotation information processing instruction, obtain the annotation information following the aforementioned annotation keywords; and obtain the email address of the chip designer in the current chip design document, generate an email containing the aforementioned annotation information, and send it to the aforementioned email address.
[0031] The annotation processing module is further configured to: when sending an email, assign a unique identifier to the annotation in the current chip design document, the unique identifier including the sending timestamp of the corresponding email and the position information of the annotation in the current chip design document; and when obtaining the reply email from the chip designer of the current chip design document in response to the aforementioned email, extract the content of the reply email, and add the reply content after the annotation content of the annotation in the document according to the unique identifier configured for the annotation, so as to form an updated chip design document.
[0032] Furthermore, the chip design document is either the register transfer level RTL design document of the design under test (DUT) or the synthesis netlist design document of the DUT.
[0033] The present invention also provides a chip verification system, including an automatic document processing system;
[0034] The document automatic processing system is configured to: acquire a chip design document request from a user, and display and output the target chip design document according to the aforementioned request; and,
[0035] Collect the annotation information of the aforementioned users on the target chip design document, and send a notification to the document writer corresponding to the target chip design document; and,
[0036] Obtain the response information from the aforementioned document author to the aforementioned notification, update the content of the aforementioned chip design document based on the response, and send the updated chip design document to the aforementioned user.
[0037] The present invention also provides an electronic device, comprising:
[0038] At least one processor;
[0039] and a memory communicatively connected to the at least one processor;
[0040] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enable the at least one processor to perform the method described in any of the preceding descriptions.
[0041] The present invention also provides a computer storage medium storing computer instructions, wherein the computer instructions are used to cause the computer to perform the method described in any of the preceding claims.
[0042] Compared with the prior art, the present invention, by adopting the above technical solution, has the following advantages and positive effects: The document processing method in chip design and verification provided by the present invention sets up an automatic document processing system, which realizes dynamic updating of chip design document content, significantly reduces personnel communication costs in the chip development process, thereby shortening the chip development cycle. Attached Figure Description
[0043] Figure 1 A flowchart illustrating a document processing method in chip design and verification provided for embodiments of the present invention.
[0044] Figure 2 This is a logic flowchart for archiving chip design documents to an automatic document processing system, provided as an embodiment of the present invention.
[0045] Figure 3 This is a sequence diagram of information processing between the document automatic processing system and the user terminal provided in an embodiment of the present invention. Detailed Implementation
[0046] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed account of the document processing methods, systems, devices, and media used in chip design and verification disclosed in this invention. It should be noted that techniques (including methods and apparatus) known to those skilled in the art may not be discussed in detail, but where appropriate, such known techniques are considered part of the specification. Furthermore, other examples of exemplary embodiments may have different values. The structures, proportions, sizes, etc., depicted in the accompanying drawings are merely illustrative of the content disclosed in this specification for the understanding and reading of those skilled in the art, and are not intended to limit the conditions under which the invention can be implemented.
[0047] In the description of the embodiments of this application, " / " means "or", and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" means: A and B exist alone, B exists alone, and A and B exist simultaneously. In the description of the embodiments of this application, "multiple" refers to two or more. Example
[0048] This invention provides a document processing method for chip design and verification. The method utilizes an automated document processing system to process chip design documents. The automated document processing system is configured to: receive a chip design document request from a user (e.g., a verification engineer); display and output a target chip design document based on the request; collect annotation information from the user on the target chip design document; send a notification to the document writer corresponding to the target chip design document; receive the document writer's response to the notification; update the content of the chip design document based on the response; and send the updated chip design document to the user.
[0049] See Figure 1 As shown, as a typical example, the document processing method may include the following steps.
[0050] S100 archives chip design documents to an automated document processing system.
[0051] Specifically, the automatic document processing system may include a chip document database for storing archived chip design documents, see [link to relevant documentation]. Figure 2 As shown.
[0052] The chip design document is a document used to describe the design information of the design under test (DUT, such as a System-on-a-Chip chip), and may contain multiple sub-sections as needed. For example, the chip design document includes, but is not limited to, chip architecture design documents and chip detailed design documents. The chip detailed design document may include chip system-level design documents, chip IP module-level design documents, etc.
[0053] The document writers are chip designers, and the chip design documents written by these designers are archived in the aforementioned chip document database. The chip document database can configure a document ID (Identity Document) for each stored chip design document. Each document ID corresponds one-to-one with a chip design document, ensuring a unique document ID for each chip design document. The corresponding document can be retrieved from the chip document database using the document ID.
[0054] Chip designers can upload their written chip design documents through the document upload interface set up on the automated document processing system. As an example, and not a limitation, chip designers can first register as users in the automated document processing system. After successful registration, they will receive a unique user ID (Identity Document) and login password. Subsequently, chip designers can log in to the automated document processing system using their user ID and login password, and then upload their written documents to the system through a preset document upload interface—such as a document upload field / document upload button. After receiving the uploaded chip design documents, the automated document processing system stores the documents in the chip document database. It can also store the user information of the uploaded document and associate the user information with the document.
[0055] Furthermore, the automatic document processing system can configure operable permissions for documents in the chip document database. In one embodiment, the automatic document processing system configures uniform operable permissions for all documents, such as allowing only viewing and annotation.
[0056] S200: Engineers open chip design documents through the document automation system.
[0057] When verification engineers need to view chip design documents, they can use the aforementioned document automation system to open the target chip design document they want to view.
[0058] Preferred, see Figure 3As shown, the steps for a verification engineer to open a target chip design document through the document automation system are as follows: The verification engineer logs into the document automation system using a configured user ID; sends a document request message, which includes the document ID of the requested chip design document and the aforementioned verification engineer's user ID; the document automation system retrieves the target chip design document from the chip document database based on the aforementioned document ID; and sends the retrieved target chip design document to the verification engineer's client for display output based on the aforementioned user ID.
[0059] In this embodiment, the verification engineer's user ID can be configured by the document automation system. Similar to the chip designer mentioned above, the verification engineer can first register as a user in the document automation system. After successful registration, the user receives a unique user ID and login password. Subsequently, the verification engineer can log in to the document automation system using the configured user ID and login password, and then send a document request to view the desired target document.
[0060] Once the target chip design document is opened, the verification engineer can view its contents and make annotations. For example, if the verification engineer has questions about the information in column 10 of the document, they can make annotations in the appropriate location.
[0061] In this embodiment, the annotation is based on a preset annotation format. Preferably, the data structure of the annotation format includes annotation keywords and annotation content, with the annotation keywords and annotation content separated by a preset symbol.
[0062] Furthermore, the annotation keyword may include a uniformly set annotation character and communication method information. The uniformly set annotation character and the communication method information are separated by another preset symbol. As an example, and not a limitation, the annotation keyword can be configured as QA_mail, where QA represents a uniformly set annotation character (used to indicate that an annotation has appeared here), the symbol _ represents a separator, and mail indicates that the communication method used for notification is email, that is, the document author is notified by email.
[0063] The separator between the annotation keyword and the annotation content can be other symbols, such as a colon (:). In this case, the annotation format is QA_mail:XXXXXX, where QA_mail is the annotation keyword, the colon (:) is the separator, and XXXXXX represents the annotation information, i.e., the annotation content.
[0064] S300 collects information on the annotation operations performed by the aforementioned engineers on the chip design documents.
[0065] The document automatic processing system can monitor the operation information of the verification engineer on the aforementioned opened target chip design document. When the system collects the annotation operation performed by the verification engineer in the target chip design document, it can trigger a notification sending instruction, that is, execute step S400.
[0066] S400, the document automatic processing system sends a notification to the document author corresponding to the document.
[0067] In other words, in response to the aforementioned annotation operations performed by verification engineers in the target chip design document, the document automatic processing system can send a notification to the document writer corresponding to the target chip design document to inform the document writer that someone has performed annotation operations.
[0068] S500: Obtain the response information from the aforementioned document author regarding the aforementioned notification.
[0069] After receiving the aforementioned notification related to the annotation operation, the document author can send a reply. At this time, the document automation system can obtain the aforementioned reply information.
[0070] S600, the document automatic processing system updates the aforementioned chip design document based on the reply content.
[0071] See also Figure 3 As shown, after the document automation system obtains the response to the aforementioned annotation information, it adds the response to the corresponding annotation location in the document, thereby updating the content of the aforementioned chip design document. Then, the updated chip design document can be sent to the aforementioned verification engineer for their review.
[0072] In this way, the verification engineer obtains the chip writer's response, and the communication process, including annotation information and response information, is also recorded by the document automatic processing system and stored in the aforementioned target chip document (the document content is updated, and the updated document content includes annotation information and response information), so as to facilitate other personnel to view it.
[0073] In another embodiment of this invention, the chip documentation database can also have different document archiving spaces for different chip projects to store the chip design documents for those projects. The chip design documents include annotated and updated chip design documents. The document archiving space for a chip project is maintained by one or more chip designers within that chip project.
[0074] For each chip project, an automated document processing system can create a personnel address book corresponding to that chip project. This address book records the communication account information of the chip designers under that project. For any given document, the document ID is associated with the communication account information of the chip designer who uploaded it, allowing the corresponding communication account information to be retrieved via the document ID.
[0075] At this point, the preferred archiving steps are as follows: Receive the chip design document uploaded by the chip designer, and obtain the chip designer's contact information; obtain the chip project to which the chip design document belongs—for example, the chip project can be determined based on the chip design document's notes, or the chip designer can be required to select the chip project when uploading the document; determine if the chip document database contains archiving space for the aforementioned chip project. If archiving space already exists for the chip project, store the aforementioned chip design document in the corresponding archiving space. Then, further determine if the chip designer's contact information is recorded in the chip project's personnel contact list; if it does not exist, add the chip designer's contact information to the personnel contact list; if it already exists, there is no need to add it to the aforementioned personnel contact list.
[0076] When it is determined that there is no document archive space for the chip project, a document archive space corresponding to the aforementioned chip project is created, and the aforementioned chip design documents are stored in the corresponding document archive space; and, a personnel address book corresponding to the aforementioned chip project is created, and the communication account information of the aforementioned chip designers is added to the personnel address book.
[0077] In this embodiment, the communication account is preferably an email address. In this case, the automatic document processing system sends emails to the corresponding chip designers based on the email addresses recorded in the personnel contact list of the chip project to which the chip design document belongs, thereby delivering the aforementioned notification.
[0078] In this embodiment, the automatic document processing system may specifically include a label retrieval module and a label processing module.
[0079] The annotation retrieval module is configured to: perform keyword retrieval on the currently opened chip design document in the automatic document processing system; when a preset annotation keyword is found, determine that an annotation operation has occurred on the current chip design document, and send an annotation information processing instruction to the annotation processing module.
[0080] The annotation processing module is configured to: upon receiving an annotation information processing instruction, obtain the annotation information following the aforementioned annotation keywords; and obtain the email address of the chip designer in the current chip design document, generate an email containing the aforementioned annotation information, and send it to the aforementioned email address.
[0081] The annotation processing module is further configured to: when sending an email, assign a unique identifier to the annotation in the current chip design document, the unique identifier including the sending timestamp of the corresponding email and the position information of the annotation in the current chip design document; and when obtaining the reply email from the chip designer of the current chip design document in response to the aforementioned email, extract the content of the reply email, and add the reply content after the annotation content of the annotation in the document according to the unique identifier configured for the annotation to form an updated chip design document.
[0082] This embodiment is described in illustrative and not limiting way, using the keyword configuration of QA_mail and the separator configuration of a colon as an example.
[0083] For a target chip design document opened in the document automatic processing system, the annotation retrieval module performs keyword retrieval on the target chip design document. When the preset annotation keyword QA_mail is found in the document, it is determined that an annotation operation has occurred in the current chip design document, triggering the annotation information processing instruction, that is, sending the annotation information processing instruction to the annotation processing module.
[0084] After receiving the aforementioned annotation information processing instruction, the annotation processing module obtains the email address of the document writer from the personnel address book, and then sends the annotation information (i.e. the specific content of the annotation) after QA_mail: to the aforementioned document writer in the form of an email based on the email address.
[0085] While sending the email, the annotation processing module also adds a unique identifier to the annotation QA_mail. This unique identifier includes the email's sending timestamp and the annotation's position within the current chip design document. The timestamp and position are separated by a preset delimiter. For example, if the email was sent at 09:03:55 AM on January 1, 2023, and the annotation is located on the third line of the document, the configured unique identifier would be 20230101090355_3. Furthermore, a document ID can be added to the unique identifier. In this case, the unique identifier would be USB0304_20230101090355_3, where USB0304 is the document ID and the underscore (_) is the delimiter.
[0086] After the document writer replies to the aforementioned email, the system can automatically append the reply to the text corresponding to the QA_mail annotation based on the unique identifier. For example, if the annotation is "A type of XXX, xxxx", and the document writer replies with "OK", then the document will be updated to "A type of XXX, xxxxOK".
[0087] In this embodiment, the chip design document can be a register-transfer level (RTL) design document for the design under test (DUT). The RTL design document is a code file described in Verilog.
[0088] Alternatively, the chip design document is a synthesis netlist design document for the design under test (DUT). This synthesis netlist design document is a gate-level netlist file processed by a synthesis tool, which can convert the circuit information described in the RTL-level design document into circuit information constructed from logic gates and flip-flops.
[0089] By utilizing the technical solution provided by this invention, document content can be automatically and dynamically improved, thereby enhancing document quality, increasing the smoothness of task execution for chip engineers, effectively reducing communication costs for engineers in actual work, and shortening the chip development cycle.
[0090] Another embodiment of the present invention also provides a chip verification system, including the aforementioned automatic document processing system.
[0091] The document automatic processing system is configured to: obtain a chip design document request issued by a user, and display and output a target chip design document according to the request; collect the annotation operation information of the user on the target chip design document, and send a notification to the document writer corresponding to the target chip design document; obtain the reply information of the document writer to the notification, update the content of the chip design document according to the reply content, and send the updated chip design document to the user.
[0092] Other technical features are described in the preceding embodiments and will not be repeated here.
[0093] Another embodiment of the present invention also provides an electronic device, comprising:
[0094] At least one processor;
[0095] and a memory communicatively connected to the at least one processor;
[0096] The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enable the at least one processor to perform the method described in any of the preceding descriptions.
[0097] Other technical features are described in the preceding embodiments and will not be repeated here.
[0098] Another embodiment of the present invention provides a computer storage medium storing computer instructions, wherein the computer instructions are used to cause the computer to perform the method described in any of the preceding claims.
[0099] The storage medium may include various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0100] Other technical features are described in the preceding embodiments and will not be repeated here.
[0101] In the above description, the disclosure of this invention is not intended to limit itself to these aspects. Rather, within the scope of the objectives of this disclosure, components can be selectively and operationally combined in any number. Furthermore, terms such as “comprising,” “encompassing,” and “having” should be interpreted by default as inclusive or open-ended, rather than exclusive or closed, unless explicitly defined as such. All technical, scientific, or other terms are to be understood by those skilled in the art, unless defined as such. Public terms found in dictionaries should not be interpreted in the context of the relevant technical documents in an overly idealistic or impractical manner, unless explicitly defined as such in this disclosure. Any modifications or alterations made by those skilled in the art based on the foregoing disclosure are within the scope of the claims.
Claims
1. A document processing method for chip design and verification, characterized in that, The chip design document is processed using an automated document processing system, including the following steps: Verification engineers open the target chip design document using an automated document processing system. Collect information on the annotation operations performed by the aforementioned verification engineers on the target chip design document; The document automatic processing system sends a notification to the document writer corresponding to the aforementioned target chip design document, and the document writer is the chip designer. Obtain the response information from the authors of the aforementioned document in response to the aforementioned notification; The document automatic processing system updates the content of the aforementioned chip design document based on the response, and sends the updated chip design document to the aforementioned verification engineer. The document automatic processing system includes a label retrieval module and a label processing module; The annotation retrieval module is configured to: perform keyword retrieval on the currently opened chip design document in the automatic document processing system; when a preset annotation keyword is found, it is determined that an annotation operation has occurred on the current chip design document, and an annotation information processing instruction is sent to the annotation processing module. The annotation processing module is configured to: upon receiving an annotation information processing instruction, obtain the annotation information following the annotation keywords; and obtain the communication account of the chip designer of the current chip design document, generate a notification including the aforementioned annotation information, and send it to the aforementioned communication account; wherein, when sending the notification, a unique identifier is configured for the annotation in the current chip design document, the unique identifier including the sending timestamp information of the corresponding notification and the position information of the annotation in the current chip design document; Furthermore, when obtaining the chip designer's response to the aforementioned notification in the current chip design document, the content of the response is extracted, and the response content is added to the annotation content of the annotation in the document according to the unique identifier configured in the annotation, so as to form an updated chip design document.
2. The method according to claim 1, characterized in that: The document automatic processing system includes a chip document database; chip design documents written by chip designers are archived into the aforementioned chip document database. The chip document database is configured with a document ID for each chip design document. The document ID is set to correspond one-to-one with the chip design document, and each chip design document corresponds to a unique document ID.
3. The method according to claim 2, characterized in that, The steps a verification engineer takes to open the target chip design document using a document automation system include: Verification engineers log in to the document automation system using a configured user ID; Send a document request message, which includes the document ID of the requested chip design document and the user ID of the aforementioned verification engineer; The document automatic processing system retrieves the target chip design document from the chip document database based on the aforementioned document ID; The target chip design document obtained based on the aforementioned user ID is sent to the aforementioned verification engineer's client for display output.
4. The method according to claim 2, characterized in that: In the chip documentation database, different document archiving spaces are set up for different chip projects to store the chip design documents of the corresponding chip projects; for each chip project, a personnel address book is created in the document automatic processing system, which is used to record the communication account information of the chip designers under the chip project. At this point, the archiving steps are as follows: Receive chip design documents uploaded by chip designers, and obtain the communication account information of the aforementioned chip designers; Find the chip project to which the chip design document belongs; Determine whether the chip documentation database contains the document archive space for the aforementioned chip project; When it is determined that a document archiving space already exists for the chip project, the aforementioned chip design documents are stored in the corresponding document archiving space. Then, it is determined whether the communication account information of the aforementioned chip designer is recorded in the personnel address book of the chip project. If the chip designer's communication account information is not found, add it to the personnel address book. When it is determined that there is no document archive space for the chip project, a document archive space corresponding to the aforementioned chip project is created, and the aforementioned chip design documents are stored in the corresponding document archive space; and, a personnel address book corresponding to the aforementioned chip project is created, and the communication account information of the aforementioned chip designers is added to the personnel address book.
5. The method according to claim 4, characterized in that: The communication account is an email address; At this time, the document automatic processing system sends an email to the corresponding chip designer based on the email address of the chip designer in the personnel address book of the chip project to which the chip design document belongs, to make the aforementioned notification.
6. The method according to claim 1, characterized in that: The chip design document is either the register-transfer level RTL design document of the design under test (DUT) or the synthesis netlist design document of the DUT.
7. A chip verification system according to claim 1, characterized in that, Including document automation systems; The document automatic processing system is configured to: acquire a chip design document request from a user, and display and output the target chip design document according to the aforementioned request; and, Collect the annotation information of the aforementioned users on the target chip design document, and send a notification to the document writer corresponding to the target chip design document; as well as, Obtain the response information from the aforementioned document author to the aforementioned notification, update the content of the aforementioned chip design document based on the response, and send the updated chip design document to the aforementioned user.
8. An electronic device, comprising: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.
9. A computer storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-6.