Interconnects and electronic device interconnect assemblies

Abstract

The application discloses an interconnect and an electronic device interconnection assembly, and relates to the technical field of integrated circuit semiconductor packaging. The interconnect comprises a substrate layer and a plurality of strip conductors; the substrate layer has a first interconnection corresponding surface and a second interconnection corresponding surface arranged oppositely; the strip conductors penetrate through the substrate layer and have a first outer protruding segment protruding on the first interconnection corresponding surface and a second outer protruding segment protruding on the second interconnection corresponding surface; a direction vector determined by the reverse directions of the outer protruding directions of two adjacent first outer protruding segments has a first included angle between first projection vectors corresponding to the first interconnection corresponding surface, and the first included angle is less than or equal to 45 degrees; a direction vector determined by the outer protruding directions of two adjacent second outer protruding segments has a second included angle between second projection vectors corresponding to the second interconnection corresponding surface, and the second included angle is less than or equal to 45 degrees. The interconnect of the application can conveniently and quickly realize the interconnection between electronic devices and can avoid the short circuit problem during the interconnection.

Description

Technical Field

[0001] This application relates to the field of integrated circuit semiconductor packaging technology, and more specifically to interconnect components and their fabrication methods, and electronic device interconnect components and their fabrication methods. Background Technology

[0002] Interconnection between existing electronic devices, such as circuit boards or chips, is generally achieved through interconnect components. Common interconnect components include bonding wires, solder paste, metal bumps, or conductive vias. When using these interconnect components to interconnect electronic devices, the positions of the interconnect components need to be specifically designed according to the specific distribution of each pin or pad of the electronic device, resulting in a complex manufacturing process. Furthermore, to avoid short circuits after interconnection, multiple interconnect components require a relatively large area to ensure sufficient insulation distance between them, which is detrimental to increasing the number of pads or pins per unit area of ​​the electronic device.

[0003] Therefore, how to conveniently and quickly adapt the layout of various types of pads or pins of electronic devices to facilitate interconnection between electronic devices and avoid short circuits after interconnection is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] In view of this, in order to solve the above-mentioned technical problems, this application provides interconnection components and electronic device interconnection assemblies.

[0005] To achieve the above objectives, this application provides an interconnecting device comprising a substrate layer and a plurality of strip conductors. The substrate layer has a first interconnecting corresponding surface and a second interconnecting corresponding surface disposed opposite to each other. The strip conductors penetrate the substrate layer and have a first outwardly protruding section protruding from the first interconnecting corresponding surface and a second outwardly protruding section protruding from the second interconnecting corresponding surface. The plurality of strip conductors are arranged in an array at intervals along the layer direction of the substrate layer.

[0006] In this design, the direction vector determined by the reverse direction of the convexity of the first convex segment is a first vector inclined relative to the thickness direction of the substrate layer, and the direction determined by the convexity of the second convex segment is a second vector inclined relative to the thickness direction of the substrate layer. The orthographic projection of the first vector onto the corresponding surface of the first interconnect is the first projection vector, and the orthographic projection of the second vector onto the corresponding surface of the second interconnect is the second projection vector. A first angle, less than or equal to 45 degrees, exists between the first projection vectors of two adjacent first convex segments. A second angle, less than or equal to 45 degrees, exists between the second projection vectors of two adjacent second convex segments.

[0007] To solve the above-mentioned technical problems, another technical solution adopted in this application is to provide an electronic device interconnection assembly, which includes electronic devices and electrical connectors, wherein the electrical connectors are formed by the aforementioned interconnection components.

[0008] The electronic device includes multiple external connectors, which are pins or pads. The electronic device and electrical connectors are stacked. One of the first and second protruding sections, facing the electronic device, is the target protruding section of the corresponding electronic device. A single external connector covers and electrically contacts multiple corresponding target protruding sections. The substrate layer is fixedly connected to the outer package of the electronic device.

[0009] In this process, the outer part presses against the corresponding target protruding section, causing the target protruding section to bend and deform to press against the outer part, thereby forming an electrical connector.

[0010] Beneficial Effects: Unlike existing technologies, in this application, when interconnecting electronic devices with interconnecting components, the side of the electronic device with its external portion faces the interconnecting component, and one external portion of the electronic device electrically contacts the corresponding protruding segment of the interconnecting component. This allows other external portions of the electronic device to adaptively contact the corresponding protruding segments of the interconnecting component. This facilitates convenient and quick interconnection between the electronic devices in the interconnecting component and external electronic devices. Furthermore, since the first included angle is less than or equal to 45 degrees, and the second included angle is less than or equal to 45 degrees, when the first and second protruding segments are bent and deformed by the pressure of the external portion of the electronic device, adjacent first and second protruding segments are less likely to overlap due to bending, thus avoiding short circuits after interconnection. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the interconnection components of this application. Figure 1 The medium stripe shape is represented by thick lines, and the outer insulating layer is... Figure 1 Not shown in the image;

[0012] Figure 2 yes Figure 1 An enlarged schematic diagram of a local area of ​​the interconnect component;

[0013] Figure 3 This is a schematic diagram of the cross-sectional structure obtained by cutting along the cutting line AA in one example of the interconnection component of this application.

[0014] Figure 4 yes Figure 3 Enlarged schematic diagram of region A in the middle;

[0015] Figure 5 yes Figure 2 A schematic diagram illustrating the first and second vectors defined by the strip conductor.

[0016] Figure 6 This is a schematic diagram of how the first vector is projected to form the first projection vector;

[0017] Figure 7 This is a schematic diagram of how the second vector projection forms the second projection vector;

[0018] Figure 8 yes Figure 3 A magnified schematic diagram of a local region in the middle, where the first projection vector is located. Figure 3 The arrow in the middle indicates this;

[0019] Figure 9 This is a diagram of the first included angle;

[0020] Figure 10 Figure 3 A magnified schematic diagram of a local region in the middle, where the second projection vector is located. Figure 3 The arrow in the middle indicates this;

[0021] Figure 11 This is a diagram of the second included angle;

[0022] Figure 12 This is an enlarged view of a local area in a cross-sectional structural schematic diagram obtained by cutting along section line AA in another example of the interconnection of this application;

[0023] Figure 13 yes Figure 2 Dimensioning diagram;

[0024] Figure 14 This is an enlarged schematic diagram of a local area in a cross-sectional structure obtained by cutting along section line AA in another example of the interconnection of this application. The second projection vector is in Figure 14 The arrow in the middle indicates this;

[0025] Figure 15 This is an enlarged schematic diagram of a local area in a cross-sectional structure obtained by cutting along section line AA in another example of the interconnection of this application. The second projection vector is in Figure 15 The arrow in the middle indicates this;

[0026] Figure 16 This is a schematic diagram of an example of the electronic device interconnection assembly of this application;

[0027] Figure 17 yes Figure 16 Enlarged schematic diagram of region B in the middle;

[0028] Figure 18 yes Figure 16 Dimensional standard diagram;

[0029] Figure 19This is a schematic diagram of another example of the electronic device interconnection assembly of this application;

[0030] Figure 20 This is a schematic diagram of the structure of another example of the electronic device interconnection assembly of this application;

[0031] Figure 21 This is a schematic diagram of another example of the electronic device interconnection assembly of this application.

[0032] Explanation of reference numerals in the attached figures:

[0033] 100 - Interconnector; 110 - Substrate layer; 120 - Strip conductor; 130 - Outer insulating layer; H - Thickness direction; h1 - Thickness of the substrate layer; L - Length of the strip conductor; L1 - Length of the first convex segment; L2 - Length of the second convex segment;

[0034] 111 - First interconnection corresponding surface; 112 - Second interconnection corresponding surface;

[0035] 121 - First convex segment; 122 - Second convex segment; 123 - Inner segment; a1 - First vector; a2 - Second vector; a3 - Third vector; b1 - First projection vector; b2 - Second projection vector; α1 - First included angle; α2 - Second included angle; θ1 - Third included angle; θ2 - Fourth included angle; s1 - First spacing; d - Thickness of outer insulating layer; s2 - Second spacing;

[0036] 200 - Electronic device interconnection assembly; 200a - First electronic device interconnection assembly; 200b - Second electronic device interconnection assembly; 210 - Electronic device; 220 - Electrical connector; 221 - External part; 230 - Fixed part; 210a - First electronic device; 210b - Second electronic device; 210c - Third electronic device; 210d - Fourth electronic device; 122a - Third protruding section; 122b - Fourth protruding section;

[0037] 1a - First surface area; 1b - Second surface area; 113 - Device receiving groove; 113a - Stepped groove; 11b - Stepped surface. Detailed Implementation

[0038] To enable those skilled in the art to better understand the technical solutions of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] Please see Figure 1-4The interconnect 100 of this application includes a substrate layer 110 and a plurality of strip conductors 120. The substrate layer 110 has a first interconnect corresponding surface 111 and a second interconnect corresponding surface 112 disposed opposite to each other. The strip conductors 120 penetrate the substrate layer 110 and have a first outwardly protruding section 121 protruding from the first interconnect corresponding surface 111 and a second outwardly protruding section 122 protruding from the second interconnect corresponding surface 112. The plurality of strip conductors 120 are arranged in an array at intervals in the layer direction of the substrate layer 110.

[0040] Combination Figures 1-4 See Figures 5-7 The direction vector determined by the reverse direction of the convex direction of the first convex segment 121 is a first vector a1 inclined with respect to the thickness direction H of the substrate layer 110, and the direction vector determined by the convex direction of the second convex segment 122 is a second vector a2 inclined with respect to the thickness direction H of the substrate layer 110. The orthographic projection of the first vector a1 onto the first interconnect corresponding surface 111 is a first projection vector b1, and the orthographic projection of the second vector a2 onto the second interconnect corresponding surface 112 is a second projection vector b2.

[0041] Among them, combined Figures 8-11 As shown, the two first projection vectors b1 have a first included angle α1, which is less than or equal to 45 degrees; the two second projection vectors b2 have a second included angle α2, which is less than or equal to 45 degrees.

[0042] That is, the first included angle α1 and the second included angle α2 can be 45 degrees, 40 degrees, 38 degrees, 30 degrees, 24 degrees, 20 degrees, 15 degrees, 10 degrees, or 0 degrees. Preferably, the first included angle α1 and the second included angle α2 are both less than or equal to 30 degrees, and more preferably, the first included angle α1 and the second included angle α2 are both less than or equal to 15 degrees.

[0043] It should be understood that, such as Figure 8 As shown, the first vector a1 determined by two adjacent first convex segments 121 does not intersect the orthographic projection of the corresponding first interconnecting surface 111. The first included angle α1 is the mathematical angle between vectors, that is, the angle between the positive directions of two vectors. Figure 10 The second vector a2, defined by the two second convex segments 122 of the vector shown, does not intersect the orthographic projection of its corresponding second vector a2 onto the second interconnected plane 112. The second included angle α2 is the mathematical angle between vectors, that is, the angle between the positive directions of two vectors. Furthermore, Figure 9 and Figure 11 In order to clearly display the first included angle α1 and the second included angle α2, the first included angle α1 and the second included angle α2 are displayed as relatively large. In fact, the closer the first included angle α1 and the second included angle α2 are to 0 degrees, the better. Optimally, the first included angle α1 and the second included angle α2 are 0 degrees.

[0044] By means of the above method, when interconnecting the interconnecting component 100 with the electronic device 210, one side of the electronic device 210 with the external portion 221 faces the interconnecting component 100, and one of the external portions 221 of the electronic device 210 makes electrical contact with the corresponding protruding section of the interconnecting component 100. This allows the other external portions 221 of the electronic device 210 to adaptively contact the corresponding protruding sections of the interconnecting component 100. This facilitates convenient and quick interconnection between the electronic device 210 of the interconnecting component and the external electronic device 210. Furthermore, since the first included angle α1 is less than or equal to 45 degrees and the second included angle α2 is less than or equal to 45 degrees, when the first protruding section 121 and the second protruding end 122 are bent and deformed by the pressure of the external portion 221 of the electronic device 210, adjacent first protruding sections 121 and adjacent second protruding sections are less likely to overlap due to bending, thus avoiding short circuits after interconnection.

[0045] Alternatively, the material of the strip conductor may include, but is not limited to, an alloy of one or more of gold, copper, and aluminum, or at least two of them. For example, and not as a limitation, the alloy may be a gold-copper alloy.

[0046] In one example, refer to Figure 3 and Figure 4 As shown, an outer insulating layer 130 is provided on the outer wall of the strip conductor 120. Adjacent outer insulating layers 130 abut against each other, and the outer insulating layers 130 of multiple strip conductors 120 are arranged in a repeating pattern of closely spaced quadrilaterals. The closely spaced quadrilateral arrangement includes, but is not limited to, a closely spaced parallelogram arrangement, such as a closely spaced square arrangement as shown in the figure, where four outer insulating layers 130 are arranged in a closely spaced square arrangement, thereby forming a repeating pattern of closely spaced squares among the outer insulating layers 130 of multiple strip conductors 120.

[0047] It should be noted that the outer insulating layer 130 may not be provided on the outer wall of the strip conductor 120. That is to say, the schemes mentioned above and below that have an outer insulating layer 130 may not use an outer insulating layer 130.

[0048] In another example, comparison Figure 3 and Figure 4 See Figure 12 As shown, adjacent outer insulating layers 130 abut against each other, and the outer insulating layers 130 of the plurality of strip conductors 120 are arranged in a repeating pattern of closely spaced triangles. The closely spaced triangle arrangement includes, but is not limited to, an equilateral triangle arrangement. Specifically, as shown, three outer insulating layers 130 are arranged in a closely spaced equilateral triangle arrangement, thereby forming a repeating pattern of closely spaced equilateral triangles for the outer insulating layers 130 of the plurality of strip conductors 120.

[0049] Furthermore, such as Figure 13 As shown, the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 is 0.5 to 50.

[0050] In other words, the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 can be 0.5, 1, 2, 3, 4, 5, 10, 20, 30, 45, or 50.

[0051] Preferably, the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 is 0.5 to 20. More preferably, the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 is 0.5 to 10.

[0052] It should be understood that the smaller the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 within the aforementioned range, the less likely adjacent first convex segments 121 and adjacent second convex segments 122 will overlap due to bending. This allows for a smaller spacing between the outer walls of two adjacent strip conductors 120.

[0053] This is beneficial for increasing the number of strip conductors 120 distributed per unit area, which in turn facilitates interconnection between interconnect 100 and smaller external portions 221. This allows the size of external portions 221 of electronic devices 210, such as pads or pins, to be set smaller, which in turn increases the number of pads or pins distributed per unit area of ​​electronic devices 210 and improves the integration of pads or pins in electronic devices 210.

[0054] In one example, combining Figure 2 See Figure 4 and Figure 13 The distance between the outer walls of two adjacent strip conductors 120 is the first distance s1. The thickness h1 of the substrate layer is less than or equal to 100 micrometers, and the first distance s1 is 3 to 50 micrometers (e.g., 3 micrometers, 10 micrometers, 20 micrometers, 36 micrometers, 50 micrometers). This allows the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 to be set to 0.5 to 10.

[0055] In another example, combining Figure 2 See Figure 4 and Figure 13The distance between the outer walls of two adjacent strip conductors 120 is a first distance s1. The thickness h1 of the substrate layer is greater than 100 micrometers, and the first distance s1 is 10 micrometers to 200 micrometers (e.g., 10 micrometers, 16 micrometers, 20 micrometers, 34 micrometers, 67 micrometers, 100 micrometers, 157 micrometers, 200 micrometers). This allows the ratio of the length L of the strip conductor 120 to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 to be set to 10 to 50. When the thickness h1 of the substrate layer is greater than 100 micrometers, the first distance s1 is preferably 20 micrometers to 100 micrometers (e.g., 20 micrometers, 26 micrometers, 37 micrometers, 50 micrometers, 68 micrometers, 74 micrometers, 93 micrometers, 100 micrometers).

[0056] Examples, not limitations, see Figure 4 As shown, the sum of the thicknesses d of the outer insulating layers between two adjacent conductors 120 is less than or equal to 10 μm.

[0057] Preferably, the outer insulating layer 130 exposes the first protruding section 121 and the second protruding section 122. This increases the area of ​​the outer insulating layer 130 where the first protruding section 121 or the second protruding section 122 is exposed, which is beneficial for the first protruding section 121 or the second protruding section 122 to make electrical contact with the corresponding external portion 221.

[0058] Optionally, such as Figure 13 As shown, the first convex segment 121 and the first interconnecting corresponding surface 111 have a third included angle θ1, and the second convex segment 122 and the second interconnecting corresponding surface 112 have a fourth included angle θ2; wherein, the third included angle θ1 is 60 degrees to 85 degrees (e.g., 60 degrees, 65 degrees, 76 degrees, 80 degrees, 85 degrees), and the fourth included angle θ2 is 60 degrees to 85 degrees (e.g., 60 degrees, 65 degrees, 76 degrees, 80 degrees, 85 degrees). This effectively avoids the problem of adjacent first convex segments 121 and adjacent second convex segments overlapping due to bending during interconnection. This prevents short circuits after interconnection.

[0059] Furthermore, combined Figure 2 See Figure 13 As shown, the strip conductor 120 includes an inner section 123, which covers the substrate layer 110 and connects to the first outward protrusion 121 and the second outward protrusion 122. The length L1 of the first outward protrusion 121 is 0 micrometers to 50 micrometers, and the length L2 of the second outward protrusion 122 is also 0 micrometers to 50 micrometers. This design ensures that the outward protrusions of the strip conductor 120 protruding from the substrate layer 110 are not excessively long, thus avoiding the problem of adjacent outward protrusions overlapping due to bending; simultaneously, the outward protrusions have sufficient length for the electrical contact portion 221.

[0060] In one example, such as Figure 2 As shown, the second convex segment 122, the inner cladding segment 123 and the first convex segment 121 extend approximately in the same straight line, and the strip conductor 120 is inclined along its length direction relative to the thickness direction H of the substrate layer 110.

[0061] In addition, combined Figure 2 See Figure 4 Since the outer insulating layers 130 are closely arranged in adjacent strip conductors 120, the spacing between the outer walls of two adjacent strip conductors 120 can be defined by the thickness d of the outer insulating layer.

[0062] Specifically, the distance between the outer walls of two adjacent strip conductors 120 is the first distance s1, and the first distance s1 satisfies the following first formula (1):

[0063] s1=d1+d2±k·················(1)

[0064] Wherein, s1 is the first spacing, d1 is the thickness d of the outer insulation layer of one of the two adjacent strip conductors 120, d2 is the thickness d of the outer insulation layer of the other of the two adjacent strip conductors 120, and k is the error.

[0065] Optionally, by improving the uniformity of the thickness of the outer insulation layer 130 and using a thinner outer insulation layer 130, the first spacing s1 between adjacent strip conductors 120 in different regions can be more balanced and smaller. For example, the thicknesses d1 and d2 can be equal, so that the first spacing s1 is approximately twice the thickness d of the outer insulation layer 130. This ensures that adjacent strip conductors 120 are insulated from each other, which is beneficial for forming a neat and relatively close arrangement between the strip conductors 120.

[0066] In one example, such as Figure 10 As shown, the array spacing distribution includes a row and column distribution in the layer direction of the substrate layer 110, with multiple strip conductors 120 distributed in each row and column; the second projection vector b2 of the strip conductors 120 in the row and column distribution area extends in the same direction relative to the thickness direction H of the substrate layer 110 along the row or column direction, but is not limited thereto. For example, in other examples, the second projection vector b2 of the strip conductors 120 in the row and column distribution area extends in the same direction relative to the thickness direction H of the substrate layer 110 along a direction that forms an acute angle with the row or column direction.

[0067] In another example, such as Figure 14As shown, the array spacing distribution includes multiple annular distribution regions (not shown) arranged sequentially from the inner circle to the outer circle in the layer direction of the substrate layer 110. Each annular distribution region has multiple strip conductors 120 distributed along the annular direction. The second projection vector b2 of the strip conductors 120 in the annular distribution region extends in the same direction relative to the thickness direction H of the substrate layer 110 along the annular distribution region.

[0068] In another example, such as Figure 15 As shown, the array spacing distribution includes multiple annular distribution areas (not shown) arranged sequentially from the inner circle to the outer circle in the layer direction of the substrate layer 110. Each annular distribution area has multiple strip conductors 120 distributed along the annular direction. The second projection vector b2 of the strip conductors 120 in the annular distribution area extends in the same direction along the radial direction of the annular distribution area relative to the thickness direction H of the substrate layer 110.

[0069] Furthermore, this application provides a method for preparing an interconnect component, for preparing the interconnect component 100 described above, the method comprising steps S110 to S120.

[0070] Step S110: Provide multiple strip conductors and substrate materials with an outer insulating layer.

[0071] Step S120: Multiple strip conductors with outer insulating layers are arranged closely in parallel and cured into a whole by the base material to form a precast column.

[0072] The precast column includes a base column, parallel strip conductors disposed within the base column, and an outer insulating layer disposed on the outer wall of the strip conductors. The base is formed by curing the base material.

[0073] Step S130: Process the prefabricated column to form the interconnect.

[0074] In one example, the strip conductor in the precast column extends along the thickness direction of the precast column. In this case, step S130 further includes steps S131a to S132a.

[0075] Step S131a: Cut the precast column along the bevel to divide the precast column into multiple precast pieces, wherein the bevel is a plane inclined relative to the strip conductor.

[0076] The preform includes a substrate layer and multiple strip conductors with an outer insulating layer. The substrate layer of the preform is obtained by cutting the substrate column of the preform column, and the strip conductors of the preform are obtained by cutting the strip conductors of the preform column.

[0077] Step S132a: The ends of the strip conductor extend beyond the two sides of the substrate layer of the preform to form an interconnect.

[0078] Specifically, the height of the substrate layer of the preform can be reduced so that the ends of the strip conductors extend beyond the two sides of the substrate layer of the preform, thereby forming an interconnect.

[0079] In another example, the strip conductor in the precast column is inclined relative to the thickness direction of the precast column. In this case, step S130 further includes steps S131b to S132b.

[0080] Step S131b: Cut the precast column with a flat cut surface to divide the precast column into multiple precast pieces, wherein the flat cut surface is a plane perpendicular to the thickness direction of the precast body.

[0081] The preform includes a substrate layer and multiple strip conductors with an outer insulating layer. The substrate layer of the preform is obtained by cutting the substrate column of the preform column, and the strip conductors of the preform are obtained by cutting the strip conductors of the preform column.

[0082] Step S132b: The ends of the strip conductor extend beyond the two sides of the substrate layer of the preform to form interconnects.

[0083] Specifically, the height of the substrate layer of the preform can be reduced so that the ends of the strip conductors extend beyond the two sides of the substrate layer of the preform, thereby forming an interconnect.

[0084] Furthermore, combined Figures 1-4 See Figures 16-17 The electronic device interconnect assembly 200 provided in this application includes an electronic device 210 and an electrical connector 220. The electronic device 210 includes a plurality of external connection portions 221 for external connection, where the external connection portions 221 are pins or pads. The electronic device 210 and the electrical connector 220 are stacked and electrically connected. The electrical connector 220 is formed by interconnect 100. Optionally, the electronic device 210 may include, but is not limited to, a circuit board or a chip.

[0085] In this configuration, the first protruding segment 121 and the second protruding segment 122 facing the electronic device 210 are the target protruding segments of the corresponding electronic device 210. A single external portion 221 covers and electrically contacts multiple corresponding target protruding segments. The substrate layer 110 is fixedly connected to the outer package of the electronic device 210. The external portion 221 presses against the target protruding segments, causing the target protruding segments to bend and deform to press tightly against the external portion 221, thereby forming an electrical connection 220 with the interconnect 100. This facilitates compaction between the substrate layer 110 and the outer package of the electronic device 210, thereby reducing or eliminating gaps between the substrate layer 110 and the outer package of the electronic device 210.

[0086] In one example, the first protruding segment 121 and the second protruding segment 122 are capable of generating deformation recovery force after being deformed under stress; and / or the substrate layer 110 is capable of generating deformation recovery force after being deformed under stress. The substrate layer 110 is fixedly connected to the outer package of the electronic device 210, causing the electronic device 210 to maintain a pressing force on the electrical connector 220, resulting in compressive deformation of the electrical connector 220. This compressive deformation causes the deformation recovery force of the electrical connector 220 to become an expansion force. The pressing force resists the expansion force, allowing the electronic device 210 and the electrical connector 220 to be elastically pre-tightened. In this way, the outer portion 221 can maintain contact with the corresponding protruding segment, making it less prone to open circuits.

[0087] Optionally, the diameter of the circumscribed circle of the end face of the outer portion 221 is at least three times the sum of the diameter of the circumscribed circle of the maximum cross-section of the strip conductor 120 and the distance between the outer sidewalls of the two adjacent strip conductors, so that a single outer portion 221 covers and electrically contacts multiple corresponding target protrusions.

[0088] Preferably, the protruding surface of the first interconnection corresponding surface 111 and the second interconnection corresponding surface 112, which is provided with the target protruding segment, is the protruding surface corresponding to the target protruding segment. The protruding surface forms a protruding segment receiving groove (not shown in the figure), which is partially or entirely embedded in the corresponding protruding segment receiving groove against the substrate layer 110. In this way, the gap between the substrate layer 110 and the outer package of the electronic device 210 can be minimized or eliminated to a large extent while maintaining electrical contact between the external part 221 and the target protruding segment.

[0089] Preferably, combined with Figures 1-4 See Figures 16-18 The distance between the outer edges of two adjacent external portions 221 in the electronic device 210 is the second distance s2. The second distance s2 is greater than the reference size, and the reference size satisfies the following formula (2):

[0090]

[0091] Where t is a reference dimension, q is a first dimension equal to the sum of the outer circle diameter of the maximum cross-section of the strip conductor 120 and the thickness d of the outer insulating layer, and p is a second dimension equal to the length of the target protruding segment. This avoids short circuits caused by insufficient spacing between the outer edges of adjacent outer portions 221 in the electronic device 210, which could lead to direct electrical contact between the bent target protruding segment and adjacent outer portions 221 in the electronic device 210.

[0092] Furthermore, the electronic device 210 is at least divided into a first electronic device 210a and a second electronic device 210b, the target protruding segment is divided into a first target protruding segment and a second target protruding segment, and the protruding setting surface is divided into a first protruding setting surface and a second protruding setting surface.

[0093] The first electronic device 210a is stacked on the side of the electrical connector 220 where the first interconnect corresponding surface 111 is located. The first target protrusion is the target protrusion of the first electronic device 210a and is the first protrusion 121. The first protruding surface is the first interconnect corresponding surface 111.

[0094] The second electronic device 210b is stacked on the side of the electrical connector 220 where the second interconnection corresponding surface 112 is located. The second target protrusion is the target protrusion of the second electronic device 210b and is the second protrusion 122. The second protruding surface is the second interconnection corresponding surface 112.

[0095] Optionally, the substrate layer 110 and the corresponding outer package are fixedly connected by a first method and / or a second method.

[0096] The first method involves pressing the electronic device 210 and the substrate layer 110 together and then baking them to solidify the electronic device 210 and the substrate layer together. This allows the substrate layer 110 to directly contact and solidify with the corresponding outer package. The second method involves bonding the substrate layer 110 and the corresponding outer package separately using adhesive. In this way, the adhesive forms a fixing part 230 to fix the relative positions of the outer package of the first electronic device 210a, the electrical connector 220, and the outer package of the second electronic device 210b.

[0097] In one example, such as Figure 16 As shown, viewed from the side of the second electronic device 210b away from the electrical connector 220 toward the electronic device interconnect assembly 200, the edge of the electrical connector 220 is flush with the edge of the second electronic device 210b, but is not limited thereto.

[0098] In another example, such as Figure 19 As shown, viewed from the side of the second electronic device 210b away from the electrical connector 220 toward the electronic device interconnect assembly 200, the edge of the electrical connector 220 is flush with the edge of the first electronic device 210a, but is not limited thereto.

[0099] Specifically, by properly cutting the interconnect 100, multiple interconnects 100 of smaller size or predetermined shape can be obtained. This makes the edge of the electrical connector 220 formed by the interconnect 100 flush with the edge of the first electronic device 210a or the second electronic device 210b. In this way, the shape of the interconnect 100 can be pre-processed before forming the electronic device interconnect assembly 200.

[0100] The structure of the electronic device interconnection component 200 will be further described below using specific embodiments. Specific Implementation Example 1

[0102] Combination Figures 1-4Referring to 20, the electronic device interconnection component 200 in the first embodiment of this application is a first electronic device interconnection component 200a. The parts of the first electronic device interconnection component 200a in the first embodiment that are identical to the aforementioned electronic device interconnection component 200 of this application will not be repeated. A further limitation is that the second interconnection corresponding surface 111 includes a first surface area 1a and a second surface area 1b, and the second electronic device 210a is multiple and divided into a third electronic device 210c and a fourth electronic device 210d. A detailed description follows.

[0103] The second surface region 1b is recessed relative to the first surface region 1a towards the side where the first interconnecting corresponding surface 112 is located, forming a device receiving groove 113. Both the first surface region 1a and the second surface region 1b have corresponding first outward protrusions 121. The third electronic device 210c is stacked on the second surface region 1b and housed within the device receiving groove 113. The fourth electronic device 210d is stacked on the first surface region 1a and covers the third electronic device 210c.

[0104] In this embodiment, the external portion 221 of the third electronic device 210c covers and electrically contacts the first protruding segment 121 of the first surface region 1a. The external portion 221 of the fourth electronic device 210d covers and electrically contacts the first protruding segment 121 of the second surface region 1b. Specific Implementation Example 2

[0106] Combination Figures 1-4 , Figure 20 See Figure 21 In the second specific embodiment of this application, the electronic device interconnection component 200 is a second electronic device interconnection component 200b, which includes a first electronic device 210a, a second electronic device 210b, and an electrical connector 220, wherein the electrical connector 220 is formed by the interconnection component 100.

[0107] The second electronic device 210b is divided into a third electronic device 210c and a fourth electronic device 210d.

[0108] The parts of the second electronic device interconnect component 200b in specific embodiment two that are the same as the first electronic device interconnect component 200a in specific embodiment one will not be described again. A further limitation is that the device receiving groove 113 is a stepped groove 113a, and the portion of the first interconnect corresponding surface 111 located in the second surface area 1b is divided into multiple stepped surfaces 11b within the stepped groove 113a. Multiple third electronic devices 210c are provided, each corresponding to a different stepped surface 11b, so that the multiple third electronic devices 210c are arranged in layers. A detailed description follows.

[0109] The external portion 221 of each third electronic device 210c covers and electrically contacts the second protruding segment 122 of the corresponding stepped surface 11b. The third electronic device 210c located on the upper layer covers the third electronic device 210c located on the lower layer.

[0110] This application further provides a method for preparing an electronic device interconnect component, which is used to prepare the above-mentioned electronic device interconnect component 200. The method for preparing the electronic device interconnect component includes steps S210 to S220.

[0111] Step S210: Provide electronic components and interconnects.

[0112] The interconnect is any of the interconnect 100 described above. The electronic device includes multiple external connections for external connection, which are pins or pads.

[0113] Step S220: Stack the interconnects and electronic components, and make a single external portion cover and electrically contact multiple target protruding segments.

[0114] The convex segment that faces the electronic device is the target convex segment of the corresponding electronic device.

[0115] S230: Securely connects the substrate layer to the outer package of the electronic device.

[0116] Furthermore, the electronic device is divided into a first electronic device and a second electronic device. The target external segment is divided into a first target convex segment and a second target convex segment.

[0117] Step S220 further includes steps S221 to S222.

[0118] Step S221: The first electronic device is stacked on the side of the first interconnect corresponding surface and the substrate layer is fixedly connected to the outer package of the first electronic device to form a pre-stacked body.

[0119] In step S221, the outer portion of the first electronic device presses against the corresponding target protruding segment, so that the target protruding segment bends and deforms to press against the outer portion of the first electronic device.

[0120] Step S222: The second electronic device is stacked on the side of the second interconnection corresponding surface of the interconnection component and the substrate layer is fixedly connected to the outer package of the second electronic device, so that the pre-stacked body and the second electronic device form an electronic device interconnection assembly.

[0121] In step S222, the outer portion of the second electronic device presses against the corresponding target protruding segment, so that the target protruding segment bends and deforms to press against the outer portion of the second electronic device.

[0122] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. An interconnecting component, characterized in that, The interconnecting components include: The substrate layer has a first interconnection corresponding surface and a second interconnection corresponding surface arranged opposite to each other; And a plurality of strip conductors, the strip conductors penetrating the substrate layer and having a first outwardly protruding section protruding from the first interconnect corresponding surface and a second outwardly protruding section protruding from the second interconnect corresponding surface; the plurality of strip conductors are arranged in an array at intervals in the layer direction of the substrate layer; Wherein, the direction vector determined by the opposite direction of the convex direction of the first convex segment is a first vector inclined relative to the thickness direction of the substrate layer, and the direction determined by the convex direction of the second convex segment is a second vector inclined relative to the thickness direction of the substrate layer; the orthographic projection of the first vector onto the first interconnect corresponding surface is a first projection vector, and the orthographic projection of the second vector onto the second interconnect corresponding surface is a second projection vector; there is a first angle between the first projection vectors of two adjacent first convex segments, and the first angle is less than or equal to 45 degrees; there is a second angle between the second projection vectors of two adjacent second convex segments, and the second angle is less than or equal to 45 degrees; The array spacing distribution includes multiple annular distribution areas arranged sequentially from the inner circle to the outer circle in the layer direction of the substrate layer, and each annular distribution area has multiple strip conductors distributed along the circumferential direction; the second projection vector of the strip conductors in the annular distribution area extends to the same side relative to the thickness direction of the substrate layer along the circumferential or radial direction of the annular distribution area.

2. The interconnecting component according to claim 1, characterized in that, An outer insulating layer is provided on the outer wall of the strip conductor, and adjacent outer insulating layers abut against each other.

3. The interconnecting component according to claim 1, characterized in that, The ratio of the length of the strip conductor to the diameter of the circumscribed circle of the maximum cross-section of the strip conductor is 0.5 to 50.

4. The interconnecting component according to claim 1, characterized in that, The thickness of the substrate layer is less than or equal to 100 micrometers, and the distance between the outer walls of two adjacent strip conductors is 3 micrometers to 50 micrometers; or, the thickness of the substrate layer is greater than 100 micrometers, and the distance between the outer walls of two adjacent strip conductors is 10 micrometers to 200 micrometers.

5. The interconnect according to claim 2, wherein the outer insulating layer exposes the first protruding section and the second protruding section.

6. The interconnecting component according to any one of claims 1-5, characterized in that, The first convex segment has a third included angle with the first interconnecting corresponding surface, and the second convex segment has a fourth included angle with the second interconnecting corresponding surface; wherein the third included angle is 60 degrees to 85 degrees, and the fourth included angle is 60 degrees to 85 degrees.

7. The interconnecting component according to claim 6, characterized in that, The strip conductor includes an inner section that covers the substrate layer and is respectively connected to the first outer section and the second outer section; The length of the first convex segment is 0 micrometers to 50 micrometers, and the length of the second convex segment is 0 micrometers to 50 micrometers.

8. The interconnecting element according to any one of claims 1-5 and 7, characterized in that, The first and second convex segments are capable of generating deformation recovery force after being subjected to force and deformation; and / or the matrix layer is capable of generating deformation recovery force after being subjected to force and deformation.

9. An electronic device interconnection assembly, characterized in that, The electronic device interconnection assembly includes electronic devices and electrical connectors, wherein the electrical connectors are formed by the interconnection components according to any one of claims 1-7; The electronic device includes multiple external connectors for external connection, the external connectors being pins or pads; the electronic device and the electrical connector are stacked; one of the first and second protruding segments facing the electronic device is the corresponding target protruding segment of the electronic device, and a single external connector covers and electrically contacts multiple corresponding target protruding segments; the substrate layer is fixedly connected to the outer package of the electronic device; The outer portion presses against the corresponding target protruding segment, causing the target protruding segment to bend and deform to press against the outer portion, thereby forming the electrical connector.

10. The electronic device interconnection assembly according to claim 9, characterized in that, The first and second convex segments are capable of generating deformation recovery force after being subjected to force and deformation; and / or the matrix layer is capable of generating deformation recovery force after being subjected to force and deformation. The substrate layer is fixedly connected to the outer package of the electronic device, so that the electronic device maintains a pressing force on the electrical connector, causing the electrical connector to undergo compressive deformation; the compressive deformation causes the deformation recovery force of the electrical connector to become an expansion force; the pressing force resists the expansion force, so that the electronic device and the electrical connector are elastically pre-tightened.

11. The electronic device interconnection assembly according to claim 9, characterized in that, The diameter of the circumscribed circle of the end face of the outer portion is at least three times greater than the sum of the diameter of the circumscribed circle of the maximum cross-section of the strip conductor and the distance between the outer sidewalls of the two adjacent strip conductors.

12. The electronic device interconnection assembly according to claim 9, characterized in that, The electronic device is a circuit board or a chip.

13. The electronic device interconnection assembly according to claim 9, characterized in that, The electronic device is at least divided into a first electronic device and a second electronic device, the target protruding segment is divided into a first target protruding segment and a second target protruding segment, and the protruding setting surface is divided into a first protruding setting surface and a second protruding setting surface; The first electronic device is stacked on one side of the first interconnection corresponding surface of the electrical connector; the first target protruding segment is the target protruding segment of the first electronic device and is also the first protruding segment; the first protruding surface is the first interconnection corresponding surface; The second electronic device is stacked on one side of the second interconnection corresponding surface of the electrical connector; the second target protruding segment is the target protruding segment of the second electronic device and is the second protruding segment; the second protruding surface is the second interconnection corresponding surface.

14. The electronic device interconnection assembly according to claim 9, characterized in that, The substrate layer and the corresponding outer package are fixedly connected by a first method and / or a second method; wherein, the first method is to press the electronic device and the substrate layer together and bake them, and the second method is to glue the substrate layer and the corresponding outer package together with a fixing adhesive.

15. The electronic device interconnection assembly according to claim 13, characterized in that, Viewed from the side of the second electronic device away from the electrical connector toward the electronic device interconnect assembly, the edge of the electrical connector is flush with the edge of the first electronic device or the second electronic device.

16. The electronic device interconnection assembly according to claim 13, characterized in that, The second interconnection corresponding surface includes a first surface area and a second surface area, and the second electronic device is multiple and is divided into a third electronic device and a fourth electronic device; The second surface area is recessed relative to the first surface area towards the side where the second interconnection corresponding surface is located to form a device receiving groove, and the first surface area and the second surface area have corresponding first protruding sections; the third electronic device is stacked on the second surface area and housed in the device receiving groove; the fourth electronic device is stacked on the first surface area and covers the third electronic device; The external portion of the third electronic device covers and electrically contacts the first protruding segment of the first surface area; the external portion of the fourth electronic device covers and electrically contacts the first protruding segment of the second surface area.

17. The electronic device interconnection assembly according to claim 16, characterized in that, The device receiving groove is a stepped groove, and the second surface area is divided into multiple stepped surfaces within the stepped groove. There are multiple third electronic devices, each corresponding to a different stepped surface, so that the multiple third electronic devices are arranged in layers. In this embodiment, the outer portion of each of the third electronic devices covers and electrically contacts the second protruding segment of the corresponding stepped surface; the third electronic device located on the outer layer covers the third electronic device located on the inner layer.

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