Method for manufacturing a semiconductor device and semiconductor device

Abstract

The present application provides a method for manufacturing a semiconductor device, comprising providing a substrate; forming a recess in a first region of an upper surface of the substrate and filling the recess with a first sacrificial layer, forming a second sacrificial layer on a second region of the upper surface of the substrate; depositing an electrode layer material on the substrate and patterning the electrode layer material to form a first lower electrode covering the first sacrificial layer and a second lower electrode covering the second sacrificial layer; depositing a piezoelectric layer material covering both lower electrodes and planarizing or patterning the piezoelectric layer material to form a first piezoelectric layer stacked on the first lower electrode and a second piezoelectric layer stacked on the second lower electrode, the first piezoelectric layer having a thickness greater than the second piezoelectric layer; forming a first upper electrode stacked on the first piezoelectric layer and a second upper electrode stacked on the second piezoelectric layer; removing the sacrificial layers to form cavities. The present application also provides a semiconductor device. The present application can form a film bulk acoustic resonator with different effective electromechanical coupling coefficients.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor device and the semiconductor device itself. Background Technology

[0002] A typical existing filter usually includes at least one series resonator connected in series between the input and output ports, and at least one parallel resonator connected in parallel between the input and output ports, wherein the series resonator and the parallel resonator have different frequencies. The manufacturing process of an existing filter is explained below using a thin-film bulk acoustic wave resonator to implement both the series and parallel resonators, with the frequency of the series resonator being higher than that of the parallel resonator.

[0003] Specifically, a substrate is first provided; then, the substrate is etched to form grooves in the areas where the series resonator and parallel resonator are to be formed, and the grooves are filled with sacrificial materials (for ease of description, the groove corresponding to the series resonator is referred to as groove A and the sacrificial material filling groove A is referred to as sacrificial material A, the groove corresponding to the parallel resonator is referred to as groove B and the sacrificial material filling groove B is referred to as sacrificial material B); then, a first metal material is deposited on the substrate and patterned to form a lower electrode A covering sacrificial material A and a lower electrode B covering sacrificial material B; then, a piezoelectric material is deposited on the substrate and patterned to form a piezoelectric layer A covering lower electrode A and a piezoelectric layer B covering lower electrode B; then, a second metal material is deposited and patterned... The second metal material is patterned to form an upper electrode A above the piezoelectric layer A and an upper electrode B above the piezoelectric layer B. Then, a lift-off process is used to form a mass load layer for resonator frequency adjustment on the upper electrode B. Specifically, for the structure obtained after forming the upper electrodes A and B, a photoresist layer is spin-coated over the upper surface of the structure and patterned to expose the upper electrode B. A third metal material is deposited to cover the upper electrode B and the photoresist layer. After deposition, the photoresist layer is removed, and the third metal material covering the photoresist layer is also removed simultaneously, thus forming a metal layer (i.e., a mass load layer) on the upper electrode B. Finally, sacrificial material A is removed to form a cavity A below the lower electrode A and a cavity B below the lower electrode B. In this design, the upper electrode A, piezoelectric layer A, and lower electrode A form a stacked structure A. This stacked structure A, together with the cavity A and the substrate below, constitutes a series resonator. The upper electrode A, piezoelectric layer A, lower electrode A, and cavity A overlap in the device thickness direction, forming the effective resonant region A of the series resonator. Similarly, the mass load layer, upper electrode B, piezoelectric layer B, and lower electrode B form a stacked structure B. This stacked structure B, together with the cavity B and the substrate below, constitutes a parallel resonator. The mass load layer, upper electrode B, piezoelectric layer B, lower electrode B, and cavity B overlap in the device thickness direction, forming the effective resonant region B of the parallel resonator. Thus, the filter is formed. Figure 1 This is a cross-sectional schematic diagram of a common filter in the prior art, in which only a series resonator 1A and a parallel resonator 1B are schematically drawn, and the connection structure between the resonators is omitted. Figure 1 The middle substrate is indicated by reference numeral 10. The lower electrode A, piezoelectric layer A, upper electrode A, and cavity A are indicated by reference numerals 11a, 12a, 13a, and 15a, respectively. The lower electrode B, piezoelectric layer B, upper electrode B, mass load layer, and cavity B are indicated by reference numerals 11b, 12b, 13b, 14b, and 15b, respectively.

[0004] As is known to those skilled in the art, the effective electromechanical coupling coefficient of a thin-film bulk acoustic resonator primarily depends on the thickness of the piezoelectric layer in its effective resonant region. Based on this, it can be understood that for a filter formed using the aforementioned method, since the thickness of piezoelectric layer A in the effective resonant region A of the series resonator and the thickness of piezoelectric layer B in the effective resonant region B of the parallel resonator are the same, all resonators in the filter have the same effective electromechanical coupling coefficient. However, in some application scenarios, the resonators need to be designed with different effective electromechanical coupling coefficients according to the performance requirements of the filter, and it is clear that the existing technology cannot adequately meet these requirements. Summary of the Invention

[0005] To overcome the aforementioned deficiencies in the prior art, the present invention provides a method for manufacturing a semiconductor device, the method comprising: providing a substrate; forming a groove and a first sacrificial layer filling the groove in a first region on the upper surface of the substrate, and forming a second sacrificial layer over a second region on the upper surface of the substrate; depositing a lower electrode layer material on the substrate and patterning it to form a first lower electrode covering the first sacrificial layer and a second lower electrode covering the second sacrificial layer; depositing a piezoelectric layer material covering the first lower electrode and the second lower electrode and planarizing or patterning it to form a first piezoelectric layer stacked over the first lower electrode and a second piezoelectric layer stacked over the second lower electrode, wherein the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer; forming an upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer and patterning it to form a first upper electrode stacked over the first piezoelectric layer and a second upper electrode stacked over the second piezoelectric layer; and removing the first sacrificial layer and the second sacrificial layer to form a first cavity under the first lower electrode and a second cavity under the second lower electrode.

[0006] According to another aspect of the invention, the manufacturing method comprises the steps of forming a groove and a first sacrificial layer filling the groove in a first region on the upper surface of the substrate, and forming a second sacrificial layer over a second region on the upper surface of the substrate, including: etching the upper surface of the substrate to form a groove in the first region; depositing a first sacrificial material on the upper surface of the substrate with a thickness greater than the depth of the groove; planarizing the first sacrificial material so that the upper surface of the first sacrificial material is flush with the upper surface of the substrate; filling the groove with the first sacrificial material to form the first sacrificial layer; and depositing and patterning a second sacrificial material on the upper surface of the substrate to form a second sacrificial layer over the second region on the upper surface of the substrate.

[0007] According to another aspect of the invention, after performing a planarization or patterning operation on the piezoelectric layer material, the manufacturing method further includes: adding a mass load to the first upper electrode and / or the second upper electrode.

[0008] According to another aspect of the invention, in the manufacturing method, when the piezoelectric layer material is planarized, the step of adding a mass load to the first upper electrode and / or the second upper electrode includes: forming the upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer using a deposition or electroplating method; etching the upper electrode layer material such that the thickness of the portion of the upper electrode layer material overlapping the first lower electrode and / or the second lower electrode in the device thickness direction is greater than the thickness of other portions of the upper electrode layer material; and patterning the upper electrode layer material to form the first upper electrode and the second upper electrode.

[0009] According to another aspect of the invention, in the manufacturing method, when the piezoelectric layer material is patterned, the step of adding a mass load to the first upper electrode and / or the second upper electrode includes: forming the upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer using a deposition method; treating the upper surface of the upper electrode layer material using a planarization operation such that the thickness of the portion of the upper electrode layer material that overlaps with the first lower electrode and / or the second lower electrode in the device thickness direction is greater than the thickness of other portions of the upper electrode layer material; and patterning the upper electrode layer material to form the first upper electrode and the second upper electrode.

[0010] According to another aspect of the invention, after forming the first upper electrode and the second upper electrode, the manufacturing method further includes forming a passivation layer covering the first upper electrode and the second upper electrode.

[0011] According to another aspect of the invention, the manufacturing method further includes: forming a through-hole penetrating the piezoelectric layer; filling the through-hole with a conductive material, the conductive material contacting the second upper electrode and the first lower electrode respectively, so that the second upper electrode and the first lower electrode form an electrical connection.

[0012] The present invention also provides a semiconductor device comprising at least a first thin-film bulk acoustic wave resonator and a second thin-film bulk acoustic wave resonator, wherein: the first thin-film bulk acoustic wave resonator comprises a substrate, a first cavity, a first lower electrode, a first piezoelectric layer, and a first upper electrode sequentially stacked on the first cavity, the first cavity being located between the substrate and the first lower electrode, and extending towards the substrate within the effective resonant region of the first thin-film bulk acoustic wave resonator; the second thin-film bulk acoustic wave resonator comprises the substrate, a second cavity, a second lower electrode, a second piezoelectric layer, and a second upper electrode sequentially stacked on the substrate, the second cavity being located between the substrate and the second lower electrode, and extending towards the second lower electrode within the effective resonant region of the second thin-film bulk acoustic wave resonator; within the effective resonant regions of the first and second thin-film bulk acoustic wave resonators, the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer.

[0013] According to another aspect of the invention, in the semiconductor device, the thicknesses of the first upper electrode and the second upper electrode are not equal, wherein the first upper electrode and / or the second upper electrode have an adjustment structure for adjusting the mass load.

[0014] According to another aspect of the invention, in the semiconductor device, the adjustment structure is stacked on top of the first upper electrode and / or the second upper electrode.

[0015] According to another aspect of the invention, in the semiconductor device, the adjustment structure is disposed between the first upper electrode and the first piezoelectric layer, and / or the adjustment structure is disposed between the second upper electrode and the second piezoelectric layer; the upper surfaces of both the first upper electrode and the second upper electrode are flush.

[0016] According to another aspect of the invention, in the semiconductor device, the material of the adjustment structure is the same as the material of the first upper electrode and / or the second upper electrode.

[0017] According to another aspect of the invention, in the semiconductor device, the first piezoelectric layer is connected to the second piezoelectric layer.

[0018] According to another aspect of the invention, the semiconductor device further includes a passivation layer covering the first upper electrode and the second upper electrode.

[0019] According to another aspect of the invention, the semiconductor device further includes: a conductive material that contacts the second upper electrode and the first lower electrode respectively.

[0020] The semiconductor device manufacturing method provided by this invention has the following advantages: by forming thin-film bulk acoustic wave resonators with different piezoelectric layer thicknesses on a substrate, thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients are obtained, thus making them suitable for application scenarios with different requirements for the effective electromechanical coupling coefficient of thin-film bulk acoustic wave resonators. Accordingly, the semiconductor device provided by this invention can well meet the application scenarios with different requirements for the effective electromechanical coupling coefficient of thin-film bulk acoustic wave resonators. Attached Figure Description

[0021] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0022] Figure 1 This is a cross-sectional schematic diagram of a common filter in existing technology;

[0023] Figure 2 This is a flowchart of a method for manufacturing a semiconductor device according to a specific embodiment of the present invention;

[0024] Figures 3 to 9 According to Figure 2 The diagram shows cross-sectional schematics of the various stages of manufacturing a semiconductor device using the method described.

[0025] Figure 10 This is a cross-sectional schematic diagram of a semiconductor device according to a specific embodiment of the present invention;

[0026] Figures 11 to 16 This is a cross-sectional schematic diagram of the various stages of adding mass load to the first upper electrode and the second upper electrode according to a specific embodiment of the present invention.

[0027] Figure 17 and Figure 18 According to two specific embodiments of the present invention Figure 16 A cross-sectional schematic diagram of a semiconductor device formed based on the structure shown.

[0028] Figure 19 This is a flowchart of a method for manufacturing a semiconductor device according to a specific embodiment of the present invention;

[0029] Figures 20 to 27 According to Figure 19 The diagram shows cross-sectional schematics of the various stages of manufacturing a semiconductor device using the method described.

[0030] Figure 28 This is a cross-sectional schematic diagram of a semiconductor device according to a specific embodiment of the present invention;

[0031] Figure 29This is a cross-sectional schematic diagram of adding a mass load to the first upper electrode and the second upper electrode according to a specific embodiment of the present invention;

[0032] Figure 30 and Figure 31 According to two specific embodiments of the present invention Figure 29 A cross-sectional schematic diagram of the semiconductor device formed based on the structure shown.

[0033] The same or similar reference numerals in the accompanying drawings represent the same or similar parts. Detailed Implementation

[0034] To better understand and explain the present invention, a further detailed description of the invention will be provided below in conjunction with the accompanying drawings.

[0035] This invention provides a method for manufacturing a semiconductor device. For example... Figure 2 As shown, the manufacturing method includes:

[0036] In step S101, a substrate is provided;

[0037] In step S102, a groove and a first sacrificial layer filling the groove are formed in a first region on the upper surface of the substrate, and a second sacrificial layer is formed on a second region on the upper surface of the substrate.

[0038] In step S103, a lower electrode layer material is deposited on the substrate and patterned to form a first lower electrode covering the first sacrificial layer and a second lower electrode covering the second sacrificial layer.

[0039] In step S104, a piezoelectric layer material is deposited covering the first lower electrode and the second lower electrode and planarized to form a first piezoelectric layer stacked on the first lower electrode and a second piezoelectric layer stacked on the second lower electrode, wherein the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer.

[0040] In step S105, an upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer is formed and patterned to form a first upper electrode stacked on the first piezoelectric layer and a second upper electrode stacked on the second piezoelectric layer.

[0041] In step S106, the first sacrificial layer and the second sacrificial layer are removed to form a first cavity under the first lower electrode and a second cavity under the second lower electrode.

[0042] The following will combine Figures 3 to 9 The above steps will be explained in detail.

[0043] Specifically, in step S101, as Figure 3As shown, a substrate 101 is provided. This invention does not limit the material of the substrate 101; it can be made of existing or future materials used for manufacturing thin-film bulk acoustic wave resonator substrates, such as silicon, germanium, or silicon-germanium. For simplicity, not all possible materials for the substrate 101 will be listed here. Furthermore, the dimensions (including thickness) of the substrate 101 can be customized according to actual design requirements.

[0044] In this embodiment, two types of thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients will be formed on the substrate 101. These two types of thin-film bulk acoustic wave resonators will be referred to as the first thin-film bulk acoustic wave resonator and the second thin-film bulk acoustic wave resonator, respectively. The first thin-film bulk acoustic wave resonator has a first effective electromechanical coupling coefficient, and the second thin-film bulk acoustic wave resonator has a second effective electromechanical coupling coefficient. The first effective electromechanical coupling coefficient is different from the second effective electromechanical coupling coefficient. Furthermore, in this embodiment, the acoustic reflection structure of both the first and second thin-film bulk acoustic wave resonators is a cavity. The cavity of the first thin-film bulk acoustic wave resonator is referred to as the first cavity, and the cavity of the second thin-film bulk acoustic wave resonator is referred to as the second cavity. It should be noted that after executing step S101 and before executing step S102, the region on the upper surface of the substrate 101 corresponding to the first cavity (hereinafter referred to as the first region) and the region on the upper surface of the substrate 101 corresponding to the second cavity (hereinafter referred to as the second region) are pre-determined according to actual design requirements.

[0045] Furthermore, it should be noted that the specific number of the first and second thin-film bulk acoustic wave resonators in the semiconductor device is determined by actual design requirements, and this invention does not impose any limitations on this. For the sake of simplicity, the accompanying drawings only schematically illustrate the process of forming a first and a second thin-film bulk acoustic wave resonator on the substrate 101.

[0046] In step S102, as Figure 4 and Figure 5 As shown, a groove and a first sacrificial layer 102 filling the groove are formed in a first region on the upper surface of the substrate 101, and a second sacrificial layer 103 is formed on a second region on the upper surface of the substrate 101.

[0047] The formation steps of the first sacrificial layer 102 are explained below.

[0048] First, a groove is formed. The steps for forming the groove are as follows: First, the upper surface of the substrate is etched to form a groove in a first region. Specifically, a photoresist layer (not shown) is formed on the upper surface of the substrate 101, and the photoresist layer is patterned to expose a first region on the upper surface of the substrate 101; then, the first exposed region on the upper surface of the substrate 101 is etched using the photoresist layer as a mask; finally, the photoresist is removed. Depending on the application scenario, various dry etching processes or wet etching processes can be used for etching. The depth of the groove can be set as needed, and this embodiment of the invention does not limit this.

[0049] After the groove is formed, a first sacrificial material with a thickness greater than the depth of the groove is deposited on the upper surface of the substrate 101. In this embodiment, the first sacrificial material can be silicon nitride (SiN). It should be noted that the first sacrificial material is not limited to silicon nitride, and other suitable materials can be selected according to actual design requirements. For example, conventional sacrificial materials such as silicon phosphosilicate glass (PSG), borosilicate glass (BPSG), and intrinsic silicon dioxide (USG) are all suitable for this invention, as long as the sacrificial layer can be etched selectively in the subsequent release step. Since the choice of sacrificial layer material is related to the materials of other parts of the thin-film bulk acoustic resonator, for the sake of simplicity, all possible materials for the sacrificial layer will not be listed here.

[0050] Finally, a planarization operation is performed on the first sacrificial material to make its upper surface flush with the upper surface of the substrate 101 (e.g., Figure 4 As shown), the first sacrificial material filling the groove forms the first sacrificial layer 102. It should be noted that the term "flush" above means that the height difference between the two is within the allowable range of process error, and the same applies below.

[0051] The formation of the first sacrificial layer 102 has been explained above. The following section describes the formation steps of the second sacrificial layer 103.

[0052] A second sacrificial material is deposited on the upper surface of the substrate 101 and patterned to form a second sacrificial layer 103 over a second region on the upper surface of the substrate 101 (e.g., ...). Figure 5 (As shown in the diagram). The present invention does not impose specific limitations on the shape of the second sacrificial layer. In this embodiment, the second sacrificial layer has a longitudinal section with equal width at the top and bottom. In other embodiments, the second sacrificial layer may also have other shapes, such as a trapezoidal longitudinal section. The second sacrificial material may also be any of the first sacrificial materials listed above, such as silicon nitride (SiN).

[0053] Understandable, Figure 5The diagram only illustrates one possible positional relationship between the first region and the second region. However, the positional relationship between the first region and the second region is not limited to the above situation. They can be set at other positions on the substrate 101 and other positional relationships can be formed according to the specific layout of the resonator, the size of the substrate, etc.

[0054] In step S103, as Figure 6 As shown, a lower electrode layer material is deposited on a substrate 101 and patterned to form a first lower electrode 104 covering a first sacrificial layer 102 and a second lower electrode 105 covering a second sacrificial layer 103.

[0055] This invention does not impose any limitations on the material of the lower electrode layer; it can be implemented using existing or future materials used for manufacturing thin-film bulk acoustic resonator electrodes, such as silicon, germanium, silicon-germanium, selenium, molybdenum, etc. The thickness of the lower electrode can range from 200 nm to 900 nm.

[0056] Since the first lower electrode 104 and the second lower electrode 105 are formed using the same lower electrode layer material, they have the same thickness. However, due to the different arrangement of the first sacrificial layer 102 and the second sacrificial layer 103, the heights of the formed first lower electrode 104 and the second lower electrode 105 are different. It should be noted that the difference in height between the first lower electrode 104 and the second lower electrode 105 refers to the difference in height between the upper surface of the portion of the first lower electrode 104 above the first sacrificial layer 102 and the upper surface of the portion of the second lower electrode 105 above the second sacrificial layer 103. More specifically, as... Figure 6 As shown, the height of the upper surface of the portion of the first lower electrode 104 located above the first sacrificial layer 102 is lower than the height of the upper surface of the portion of the second lower electrode 105 located above the second sacrificial layer 103.

[0057] The patterning of the lower electrode can be achieved using existing conventional processes. For the sake of simplicity, the process of patterning the lower electrode will not be described in detail here.

[0058] In step S104, as Figure 7As shown, piezoelectric layer material is deposited over the first lower electrode 104 and the second lower electrode 105 and then planarized to form a first piezoelectric layer 106 stacked on the first lower electrode 104 and a second piezoelectric layer 107 stacked on the second lower electrode 105. In this embodiment, the first piezoelectric layer 106 and the second piezoelectric layer 107 are connected, i.e., the first piezoelectric layer 106 and the second piezoelectric layer 107 are integrated. In other embodiments, depending on actual design requirements, the first piezoelectric layer 106 and the second piezoelectric layer 107 may not be connected. It should be noted that in order to ensure the formation of the second piezoelectric layer 107, the thickness of the second sacrificial layer 103 needs to be reasonably set. Specifically, the thickness of the second sacrificial layer 103 needs to be less than the thickness of the piezoelectric layer material; otherwise, the portion of the piezoelectric layer material above the second sacrificial layer 103 will be completely removed after planarization, and an effective second piezoelectric layer 107 cannot be formed.

[0059] The piezoelectric layer material can be made using conventional piezoelectric materials such as aluminum nitride, zinc oxide, lithium niobate, and lead titanate zirconate.

[0060] After planarization, the upper surface of the first piezoelectric layer 106 is flush with the upper surface of the second piezoelectric layer 107. However, due to the difference in height between the first lower electrode 104 and the second lower electrode 105, the thicknesses of the first piezoelectric layer 106 and the second piezoelectric layer 107 are different. This difference in thickness refers to the difference in thickness between the portion of the first piezoelectric layer 106 above the first sacrificial layer 102 and the portion of the second piezoelectric layer 107 above the second sacrificial layer 103. More specifically, as... Figure 7 As shown, the thickness of the portion of the first piezoelectric layer 106 above the first sacrificial layer 102 (denoted as y1 in the figure) is greater than the thickness of the portion of the second piezoelectric layer 107 above the second sacrificial layer 103 (denoted as y2 in the figure).

[0061] In this embodiment, the thickness range of the first piezoelectric layer 106 (i.e., the thickness range of the portion of the first piezoelectric layer 106 located above the first sacrificial layer 102) can be 500nm to 1000nm, such as 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, etc., and the thickness range of the second piezoelectric layer 107 (i.e., the thickness of the portion of the second piezoelectric layer 107 located above the second sacrificial layer 103) can be 100nm to 400nm, such as 100nm, 200nm, 300nm, 400nm, etc.

[0062] In step S105, an upper electrode layer material covering the first piezoelectric layer 106 and the second piezoelectric layer 107 is formed and patterned to form a first upper electrode 108 stacked on the first piezoelectric layer 106 and a second upper electrode 109 stacked on the second piezoelectric layer 107. In this embodiment, the thickness of both the first upper electrode 108 and the second upper electrode 109 can be in the range of 100 nm to 300 nm, and they can be made of the same or similar material as the lower electrodes (i.e., the first lower electrode 104 and the second lower electrode 105), for example, molybdenum (Mo). The first upper electrode 108 and the second upper electrode 109 can be formed using existing conventional processes. For the sake of simplicity, the manufacturing process of the first upper electrode 108 and the second upper electrode 109 will not be described in detail here.

[0063] In step S106, as Figure 9 As shown, the first sacrificial layer 102 and the second sacrificial layer 103 are removed to form a first cavity 110 under the first lower electrode 104 and a second cavity 111 under the second lower electrode 105. The present invention does not limit the specific method of removing the sacrificial layers; for example, it can be achieved by forming a release hole to expose the sacrificial layer and removing the sacrificial layer using a corrosive solution through the release hole.

[0064] In this embodiment, the first upper electrode 108, the first piezoelectric layer 106, the first lower electrode 104, the first cavity 110, and the substrate portion below together constitute a first thin-film bulk acoustic resonator. The first cavity 110 overlaps with the first lower electrode 104, the first piezoelectric layer 106, and the first upper electrode 108 in the device thickness direction; this overlapping region is the effective resonant region of the first thin-film bulk acoustic resonator. Figure 9 The region above the substrate 101 between dashed lines a1 and a2 is referred to as the "first effective resonant region" for simplicity. The second upper electrode 109, the second piezoelectric layer 107, the second lower electrode 105, the second cavity 111, and the substrate portion below together constitute the second thin-film bulk acoustic wave resonator. The second cavity 111 overlaps with the second lower electrode 105, the second piezoelectric layer 107, and the second upper electrode 109 in the device thickness direction; this overlapping region is the effective resonant region of the second thin-film bulk acoustic wave resonator. Figure 9The region above the substrate 101 between dashed lines a3 and a4 is referred to as the "second effective resonant region" for simplicity. The first effective electromechanical coupling coefficient of the first thin-film bulk acoustic resonator mainly depends on the thickness of the first piezoelectric layer 106 within the first effective resonant region. The second effective electromechanical coupling coefficient of the second thin-film bulk acoustic resonator mainly depends on the thickness of the second piezoelectric layer 107 within the second effective resonant region. Since the thickness of the first piezoelectric layer 106 within the first effective resonant region differs from the thickness of the second piezoelectric layer 107 within the second effective resonant region, the first effective electromechanical coupling coefficient of the first thin-film bulk acoustic resonator differs from the second effective electromechanical coupling coefficient of the second thin-film bulk acoustic resonator.

[0065] The semiconductor device manufacturing method provided by this invention, due to the different arrangement of the first sacrificial layer and the second sacrificial layer, allows thin-film bulk acoustic wave resonators with different piezoelectric layer thicknesses to be formed on a substrate by performing only one planarization operation on the piezoelectric layer material, thereby obtaining thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients, and thus applicable to application scenarios with different requirements for the effective electromechanical coupling coefficient of thin-film bulk acoustic wave resonators.

[0066] It should be noted that in this embodiment, two types of thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients are formed on the substrate, namely, a first thin-film bulk acoustic wave resonator and a second thin-film bulk acoustic wave resonator. Those skilled in the art will understand that in other embodiments, N types of thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients can be formed on the substrate according to actual design requirements, where N is an integer greater than 2. For ease of description, the N types of thin-film bulk acoustic wave resonators will be referred to as the first thin-film bulk acoustic wave resonator, the second thin-film bulk acoustic wave resonator, ..., the Nth thin-film bulk acoustic wave resonator. Taking the example where the acoustic reflection structure of all N types of thin-film bulk acoustic wave resonators is a cavity, the cavity of the first thin-film bulk acoustic wave resonator is called the first cavity, the cavity of the second thin-film bulk acoustic wave resonator is called the second cavity, ..., the cavity of the Nth thin-film bulk acoustic wave resonator is called the Nth cavity. Specifically, firstly, according to actual design requirements, the first region corresponding to the first cavity, the second region corresponding to the second cavity, ..., and the Nth region corresponding to the Nth cavity are predetermined on the upper surface of the substrate. Next, a groove is formed in the first region and a first sacrificial layer is formed in the groove. A second sacrificial layer is formed on the second region, ..., and an Nth sacrificial layer is formed on the Nth region, wherein the thicknesses of the second sacrificial layer, ..., and the Nth sacrificial layer are all different. Then, a piezoelectric layer material is deposited on the substrate and planarized to form a first piezoelectric layer over a first sacrificial layer, a second piezoelectric layer over a second sacrificial layer, ..., an Nth piezoelectric layer over an Nth sacrificial layer, wherein the thicknesses of the first piezoelectric layer, the second piezoelectric layer, ..., the Nth piezoelectric layer are all different; next, a first upper electrode is formed on the first piezoelectric layer, a second upper electrode is formed on the second piezoelectric layer, ..., the Nth upper electrode is formed on the Nth piezoelectric layer; finally, the first sacrificial layer is removed to form a first cavity, the second sacrificial layer is removed to form a second cavity, ..., and the Nth sacrificial layer is removed to form an Nth cavity, thereby forming a first thin-film bulk acoustic resonator, a second thin-film bulk acoustic resonator, ..., and an Nth thin-film bulk acoustic resonator, wherein the first thin-film bulk acoustic resonator, the second thin-film bulk acoustic resonator, ..., the Nth thin-film bulk acoustic resonator have different effective electromechanical coupling coefficients.

[0067] like Figure 10As shown, the manufacturing method provided by the present invention may further include forming a passivation layer 112 covering the first upper electrode 108 and the second upper electrode 109. Specifically, after performing step S105, a passivation material is deposited on the upper surface of the structure and the passivation material is planarized to form a passivation layer 112 covering the first upper electrode 108 and the second upper electrode 109. The planarization operation on the passivation material can form a passivation layer with a flat surface, thereby forming a thin-film bulk acoustic resonator with a flat surface. After the passivation layer 112 is formed, step S106 is performed. It will be understood by those skilled in the art that in other embodiments, the passivation layer 112 can also be formed directly by depositing the passivation material without a planarization operation, and the present invention does not impose any limitations on this. The passivation layer 112 can be made of aluminum nitride (AlN), and its thickness can range from 100 nm to 300 nm. It is understood that the material and thickness of the passivation layer 112 are merely exemplary and not limiting, and those skilled in the art can also select other materials and manufacture passivation layers of other thicknesses as needed. The passivation layer 112 can protect the lower electrode and also serve as an insulator.

[0068] It should be noted that multiple thin-film bulk acoustic resonators located on the same substrate 101 need to be electrically connected to form a filter. In this embodiment, as... Figure 10 As shown, after the passivation layer 112 is formed and before the first sacrificial layer 102 and the second sacrificial layer 103 are released, a via (not shown) penetrating the passivation layer 112 and the piezoelectric layer can also be formed. This via exposes at least a portion of the aforementioned second upper electrode 109 (e.g., Figure 10 The upper surface of the right portion and the entire right sidewall of the second upper electrode 109 shown) and part of the aforementioned first lower electrode 104 (as shown) Figure 10 The upper surface of the left portion of the first lower electrode 104 shown. Figure 10 The portion of the second upper electrode 109 and the first lower electrode 104 exposed by the through-hole shown allows for a shorter length of conductive material between them, which not only facilitates wiring but also saves costs. The through-hole can be manufactured using existing processes, which will not be detailed here. Next, conductive material 113 is filled into the through-hole, which, together with the through-hole, constitutes a conductive via structure for forming an electrical connection between the second upper electrode 109 and the first lower electrode 104. The conductive material 113 can be a metal, alloy (e.g., copper alloy, aluminum alloy), or composite metal (e.g., titanium-steel composite, copper-steel composite, titanium-zinc composite, etc.).

[0069] Depending on the application scenario, the above-mentioned electrical connection can also be achieved using metal wires. Those skilled in the art will understand that the above-described conductive hole structure and metal wires are merely illustrative examples and should not be construed as limiting the electrical connection structures between different thin-film bulk acoustic resonators. Any structure that can achieve electrical connection between different thin-film bulk acoustic resonators is applicable to this invention. For the sake of brevity, not all possible electrical connection structures will be listed here. Furthermore, it should be noted that... Figure 10 The electrical connection between the first thin-film bulk acoustic resonator and the second thin-film bulk acoustic resonator is achieved by connecting the first lower electrode 104 and the second upper electrode 109 through a conductive hole structure. This is only one embodiment. The electrical connection between the first thin-film bulk acoustic resonator and the second thin-film bulk acoustic resonator can also be achieved, for example, by the electrical connection between the first upper electrode 108 and the second upper electrode 109 (for example, forming a connection portion electrically connecting the two while etching the upper electrode layer material to form the first upper electrode 108 and the second upper electrode 109), or by the electrical connection between the first lower electrode 104 and the second lower electrode 105 (for example, forming a connection portion electrically connecting the two while etching the lower electrode layer material to form the first lower electrode 104 and the second lower electrode 105), or by the electrical connection between the first upper electrode 108 and the second lower electrode 105. The present invention does not limit this in any way, and can be designed accordingly according to actual design requirements.

[0070] Those skilled in the art will understand that, for embodiments of semiconductor devices that do not include a passivation layer, the electrical connection between the second upper electrode 109 and the first lower electrode 104 can be formed after the first upper electrode 108 and the second upper electrode 109 are formed.

[0071] In some application scenarios, according to actual design requirements, in addition to needing different thin-film bulk acoustic wave resonators to have different effective electromechanical coupling coefficients, it is also necessary to adjust the frequency of the thin-film bulk acoustic wave resonators. In a preferred embodiment, after planarizing the piezoelectric layer material, the semiconductor device manufacturing method provided by the present invention further includes: adding a mass load to the first upper electrode and / or the second upper electrode. The following will combine... Figures 11 to 16 Based on Figure 7 Based on the structure shown, a specific embodiment is used to illustrate how to add a mass load to the first upper electrode and the second upper electrode.

[0072] Specifically, firstly, as Figure 11As shown, an upper electrode layer material 1081' covering the first piezoelectric layer 106 and the second piezoelectric layer 107 is formed using a deposition or electroplating method. The upper electrode layer material 1081' can be the same as the upper electrode layer material described above, and the deposition can be performed using a physical vapor deposition method. In this embodiment, the thickness of the upper electrode layer material 1081' ranges from 100 nm to 800 nm, for example, 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, etc. More preferably, the thickness of the upper electrode layer material 1081' ranges from 200 nm to 600 nm.

[0073] Then as Figure 12 As shown, a layer of photoresist is spin-coated onto the upper surface of the upper electrode layer material 1081' and patterned to form a photoresist layer 120, which is located above the first sacrificial layer 102.

[0074] Then as Figure 13 As shown, the exposed area of ​​the upper surface of the upper electrode layer material 1081' is etched using the photoresist layer 120 as a mask, and the photoresist layer 120 is removed after etching. The etching depth of the upper electrode layer material 1081' in this step is defined as the first etching depth, wherein the first etching depth is less than the upper electrode layer material 1081'. Preferably, the range of the first etching depth is 10 nm to 200 nm.

[0075] Then as Figure 14 As shown, in Figure 13 The upper surface of the structure shown is further spin-coated with a layer of photoresist and patterned to form photoresist layer 121 and photoresist layer 122, wherein photoresist layer 121 is located above the first sacrificial layer 102 and photoresist layer 122 is located above the second sacrificial layer 103.

[0076] Then as Figure 15 As shown, the exposed area of ​​the upper surface of the upper electrode layer material 1081' is etched using photoresist layers 121 and 122 as masks, and the photoresist layers 121 and 122 are removed after etching. The etching depth of the upper electrode layer material 1081' in this step is defined as the second etching depth, wherein the second etching depth is less than the difference between the upper electrode layer material 1081' and the first etching depth. Preferably, the range of the second etching depth is 10 nm to 200 nm. Thus, after two etchings, the upper electrode layer material 1081' forms a protrusion 108' above the first sacrificial layer 102 and a protrusion 109' on the second sacrificial layer 103.

[0077] Finally, as Figure 16As shown, the upper electrode layer material 1081' is patterned to form a first upper electrode and a second upper electrode. The portion of the patterned upper electrode layer material above the first piezoelectric layer 106 is the first upper electrode, and the portion above the second piezoelectric layer 107 is the second upper electrode. In this embodiment, the first upper electrode includes a protrusion 108' and a portion below the protrusion 108' (hereinafter referred to as the first substrate 108"). The second upper electrode includes a protrusion 109' and a portion below the protrusion 109' (hereinafter referred to as the second substrate 109"). The protrusion 108' can adjust the mass load of the first upper electrode; hereinafter, the protrusion 108' is referred to as the first adjustment structure 108'. The protrusion 109' can adjust the mass load of the second upper electrode; hereinafter, the protrusion 109' is referred to as the second adjustment structure 109'. The thicknesses of the first adjustment structure 108' and the second adjustment structure 109' are determined according to actual design requirements.

[0078] It should be noted that in this embodiment, the substrate and its corresponding adjustment structure are made of the same material and are an integral structure. The dotted lines in the figure are used to divide the substrate and its corresponding adjustment structure only for the purpose of illustrating their positional relationship. In other embodiments, the upper electrode layer material may also be composed of two different materials, thereby making the adjustment structure and its corresponding substrate different materials. This invention does not impose any limitations on this.

[0079] After forming the first and second upper electrodes with adjustment structures, as Figure 17 As shown, the first sacrificial layer 102 and the second sacrificial layer 103 are removed to form a first cavity 110 below the first lower electrode 104 and a second cavity 111 below the second lower electrode 105, respectively.

[0080] In this embodiment, a first adjustment structure 108' and a second adjustment structure 109' with different thicknesses are formed by two etching processes on the upper electrode layer material (in this embodiment, the thickness of the first adjustment structure 108' is greater than the thickness of the second adjustment structure 109'), thereby achieving adjustment of the mass load of the first and second upper electrodes, and thus ensuring that the frequencies of the first and second thin-film bulk acoustic wave resonators can well meet the design requirements. As mentioned in the background, the frequency adjustment of thin-film bulk acoustic wave resonators is currently mainly achieved by forming the mass load layer through a lift-off process. However, the lift-off process is cumbersome, difficult to implement, and costly, resulting in a complex, difficult, and costly overall manufacturing process for the device. This invention, however, can form the adjustment structure without using a lift-off process to achieve frequency adjustment of the thin-film bulk acoustic wave resonator. In other words, compared to the prior art, the implementation of this invention is simpler, easier to implement, and relatively cheaper.

[0081] It should be noted that:

[0082] (1) In this embodiment, the thickness of the first adjustment structure 108' is greater than the thickness of the second adjustment structure 109'. It will be understood by those skilled in the art that in other embodiments, the thickness of the first adjustment structure 108' can be made smaller than the thickness of the second adjustment structure 109' by two etching processes, depending on actual design requirements.

[0083] (2) In this embodiment, the first adjustment structure 108' and the second adjustment structure 109' are formed by two etching processes. Those skilled in the art will understand that in other embodiments, depending on actual design requirements, the first adjustment structure for adjusting the mass load of the first upper electrode or the second adjustment structure for adjusting the mass load of the second upper electrode can be formed by only one etching process; this invention does not limit this in any way.

[0084] (3) In this embodiment, after forming the first upper electrode with the first adjustment structure 108' and the second upper electrode with the second adjustment structure 109', the first sacrificial layer 102 and the second sacrificial layer 103 are removed to form the first cavity 110 and the second cavity 111. Those skilled in the art will understand that in other embodiments, after forming the first upper electrode with the first adjustment structure 108' and the second upper electrode with the second adjustment structure 109', the following steps may be performed: Figure 18 As shown, firstly, a passivation layer 112 covering the first upper electrode and the second upper electrode is formed. Then, a conductive material 113 for realizing the electrical connection between the thin film bulk acoustic resonators is formed according to the actual design requirements. Finally, the first sacrificial layer 102 and the second sacrificial layer 103 are removed to form the first cavity 110 and the second cavity 111 respectively.

[0085] (4) In this embodiment, two types of adjustment structures are formed through two etching processes: a first adjustment structure for adjusting the mass load of the first upper electrode in the first thin-film bulk acoustic resonator, and a second adjustment structure for adjusting the mass load of the second upper electrode in the second thin-film bulk acoustic resonator. Those skilled in the art will understand that in other embodiments, adjustment structures of M thicknesses can be formed according to actual design requirements, where M is an integer greater than 2. Taking M=3 as an example, it is assumed that the design requirement is that all first upper electrodes of the first thin-film bulk acoustic resonators have adjustment structure A, some second upper electrodes of the second thin-film bulk acoustic resonators have adjustment structure B, and the remaining second upper electrodes of the second thin-film bulk acoustic resonators have adjustment structure C, wherein the thickness of adjustment structure A is greater than that of adjustment structure B, and the thickness of adjustment structure B is greater than that of adjustment structure C. Based on this, after depositing the top electrode layer material, the area outside the region where the adjustment structure A is to be formed is first etched. Then, the area outside the regions where adjustment structures A and B are to be formed is etched a second time. Finally, the area outside the regions where adjustment structures A, B, and C are to be formed is etched a third time. In this way, adjustment structures A, B, and C of different thicknesses can be formed. It should be noted that the specific value of M and the specific formation location of each adjustment structure are determined by actual design requirements. The foregoing examples are merely illustrative assumptions and should not be construed as limiting the invention. Furthermore, for cases where M is greater than 3, the same principle applies, and will not be elaborated further here.

[0086] This invention provides a method for manufacturing a semiconductor device. For example... Figure 19 As shown, the manufacturing method includes:

[0087] In step S401, a substrate is provided;

[0088] In step S402, a groove and a first sacrificial layer filling the groove are formed in a first region on the upper surface of the substrate, and a second sacrificial layer is formed on a second region on the upper surface of the substrate.

[0089] In step S403, a lower electrode layer material is deposited on the substrate and patterned to form a first lower electrode covering the first sacrificial layer and a second lower electrode covering the second sacrificial layer.

[0090] In step S404, a piezoelectric layer material is deposited covering the first lower electrode and the second lower electrode and patterned to form a first piezoelectric layer stacked on the first lower electrode and a second piezoelectric layer stacked on the second lower electrode, wherein the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer.

[0091] In step S405, an upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer is formed and patterned to form a first upper electrode stacked on the first piezoelectric layer and a second upper electrode stacked on the second piezoelectric layer.

[0092] In step S406, the first sacrificial layer and the second sacrificial layer are removed to form a first cavity under the first lower electrode and a second cavity under the second lower electrode.

[0093] The following will combine Figures 20 to 27 The above steps will be explained in detail.

[0094] Specifically, in step S401, as Figure 20 As shown, a substrate 401 is provided.

[0095] In step S402, as Figure 21 and Figure 22 As shown, a groove is formed in a first region on the upper surface of substrate 401 and a first sacrificial layer 402 is formed to fill the groove, and a second sacrificial layer 403 is formed on a second region on the upper surface of substrate 401.

[0096] In step S403, as Figure 23 As shown, a lower electrode layer material is deposited on a substrate 401 and patterned to form a first lower electrode 404 covering a first sacrificial layer 402 and a second lower electrode 405 covering a second sacrificial layer 403.

[0097] Steps S401 to S403 described above can be referred to steps S101 to S103 in the foregoing embodiments, and will not be repeated here.

[0098] In step S404, firstly as follows Figure 24 As shown, a piezoelectric layer material 4061 is deposited covering the first lower electrode 404 and the second lower electrode 405. The piezoelectric layer material 4061 is then patterned to form a first piezoelectric layer stacked on the first lower electrode 404 and a second piezoelectric layer stacked on the second lower electrode 405, wherein the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer. It should be noted that the greater thickness of the first piezoelectric layer than the second piezoelectric layer refers to the portion of the first piezoelectric layer above the first sacrificial layer 402 being greater than the portion of the second piezoelectric layer above the second sacrificial layer 403. The piezoelectric layer material can be a conventional piezoelectric material such as aluminum nitride, zinc oxide, lithium niobate, or lead zirconate titanate.

[0099] In this embodiment, the steps for patterning the piezoelectric layer material 4061 are as follows: First, a first photoresist layer (not shown) is spin-coated onto the upper surface of the piezoelectric layer material 4061, and the first photoresist layer is patterned to expose the region of the piezoelectric layer material 4061 located above the first sacrificial layer 402; then, the exposed region of the piezoelectric layer material 4061 is etched to form a groove (hereinafter referred to as the first groove) above the first sacrificial layer 402; then, the first photoresist layer is removed; then, the piezoelectric layer material 4061 is patterned on its upper surface. A second photoresist layer (not shown) is spin-coated and patterned to expose the region of the piezoelectric layer material 4061 above the second sacrificial layer 403. The exposed region of the piezoelectric layer material 4061 is then etched to form a groove (hereinafter referred to as the second groove) above the second sacrificial layer 403, wherein the etching depth of the portion of the piezoelectric layer material 4061 above the second sacrificial layer 403 is greater than the etching depth of the portion of the piezoelectric layer material 4061 above the first sacrificial layer 402. The second photoresist layer is then removed. This forms a first piezoelectric layer and a second piezoelectric layer with different thicknesses (specifically, the first piezoelectric layer is thicker than the second piezoelectric layer). Preferably, as follows... Figure 25 As shown, the etching depth of the portion of the piezoelectric layer material 4061 located above the second sacrificial layer 403 is greater than the thickness of the second sacrificial layer 403. Furthermore, Figure 25 The first groove formed by etching the piezoelectric layer material 4061 above the first sacrificial layer 402 is indicated by reference numeral 406a, and the second groove formed by etching the piezoelectric layer material 4061 above the second sacrificial layer 403 is indicated by reference numeral 407a.

[0100] Those skilled in the art will understand that in other embodiments, only the first groove 406a or only the second groove 407a may be formed, as long as the first and second piezoelectric layers of different thicknesses are formed by patterned piezoelectric layer material.

[0101] In step S405, as Figure 26 As shown, an upper electrode layer material covering the first piezoelectric layer 406 and the second piezoelectric layer 407 is formed and patterned to form a first upper electrode 408 stacked on the first piezoelectric layer 406 and a second upper electrode 409 stacked on the second piezoelectric layer 407. The first upper electrode 408 and the second upper electrode 409 can be formed using existing conventional processes. For the sake of simplicity, the manufacturing process of the first upper electrode 408 and the second upper electrode 409 will not be described in detail here.

[0102] In step S406, as Figure 27As shown, the first sacrificial layer 402 and the second sacrificial layer 403 are removed to form a first cavity 410 under the first lower electrode 404 and a second cavity 411 under the second lower electrode 405.

[0103] In this embodiment, the first upper electrode 408, the first piezoelectric layer 406, the first lower electrode 404, the first cavity 410, and the substrate portion below together constitute a first thin-film bulk acoustic resonator. The first cavity 410 overlaps with the first lower electrode 404, the first piezoelectric layer 406, and the first upper electrode 408 in the device thickness direction; this overlapping region is the first effective resonant region of the first thin-film bulk acoustic resonator. Figure 27 The region above the substrate 401 between dashed lines d1 and d2. The second upper electrode 409, the second piezoelectric layer 407, the second lower electrode 405, the second cavity 411, and the substrate portion below together constitute the second thin-film bulk acoustic wave resonator. The second cavity 411 overlaps with the second lower electrode 405, the second piezoelectric layer 407, and the second upper electrode 409 in the device thickness direction; this overlapping region is the second effective resonant region of the second thin-film bulk acoustic wave resonator. Figure 27 The region above the substrate 401 between dashed lines d3 and d4. The first effective electromechanical coupling coefficient of the first thin-film bulk acoustic resonator depends mainly on the thickness of the first piezoelectric layer 406 in the first effective resonant region. The second effective electromechanical coupling coefficient of the second thin-film bulk acoustic resonator depends mainly on the thickness of the second piezoelectric layer 407 in the second effective resonant region. Since the thickness of the first piezoelectric layer 406 in the first effective resonant region is different from the thickness of the second piezoelectric layer 407 in the second effective resonant region, the first effective electromechanical coupling coefficient of the first thin-film bulk acoustic resonator is different from the second effective electromechanical coupling coefficient of the second thin-film bulk acoustic resonator.

[0104] The semiconductor device manufacturing method provided by the present invention can also be used to pattern the piezoelectric layer material to form thin film bulk acoustic wave resonators with different piezoelectric layer thicknesses on a substrate, thereby obtaining thin film bulk acoustic wave resonators with different effective electromechanical coupling coefficients, and thus applicable to application scenarios with different requirements for the effective electromechanical coupling coefficient of the thin film bulk acoustic wave resonator.

[0105] It should be noted that in this embodiment, a first piezoelectric layer and a second piezoelectric layer of different thicknesses are formed by patterning the piezoelectric layer material, thereby forming two types of thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients on the substrate. Those skilled in the art will understand that in other embodiments, depending on actual design requirements, L piezoelectric layers of different thicknesses (L is an integer greater than 2) can also be formed by patterning the piezoelectric layer material, thereby forming L types of thin-film bulk acoustic wave resonators with different effective electromechanical coupling coefficients on the substrate.

[0106] like Figure 28 As shown, the manufacturing method provided by the present invention may further include forming a passivation layer 412 covering the first upper electrode 408 and the second upper electrode 409. The formation process of the passivation layer 412 can be referred to the foregoing. Figure 10 For the sake of brevity, the formation process of the intermediate passivation layer 112 will not be described in detail here.

[0107] It should be noted that multiple thin-film bulk acoustic resonators located on the same substrate 401 need to be electrically connected to form a filter. In this embodiment, as... Figure 28 As shown, a conductive hole structure filled with conductive material 413 is formed, which is used to form an electrical connection between the second upper electrode 409 and the first lower electrode 404. The formation process of the conductive hole structure can be referred to the foregoing. Figure 10 For the sake of simplicity, the formation process of the conductive hole structure will not be described in detail here.

[0108] In some application scenarios, according to actual design requirements, in addition to needing different thin-film bulk acoustic wave resonators to have different effective electromechanical coupling coefficients, it is also necessary to adjust the frequency of the thin-film bulk acoustic wave resonators. In a preferred embodiment, after patterning the piezoelectric layer material, the semiconductor device manufacturing method provided by the present invention further includes: adding a mass load to the first upper electrode and / or the second upper electrode. The following will combine... Figure 29 Based on Figure 25 Based on the structure shown, a specific embodiment is used to illustrate how to add a mass load to the first upper electrode and the second upper electrode.

[0109] Specifically, firstly in Figure 25 Based on the structure shown, an upper electrode layer material covering the first piezoelectric layer 406 and the second piezoelectric layer 407 is formed using deposition or electroplating methods. In this embodiment, the thickness of the upper electrode layer material ranges from 300 nm to 1000 nm, for example, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, etc. More preferably, the thickness of the upper electrode layer material ranges from 400 nm to 800 nm. Then, the upper electrode layer material is planarized. In this embodiment, for the planarized upper electrode layer material, the thickness of the portion above the first groove 406a is greater than the depth of the first groove 406a, and the thickness of the portion above the second groove 407a is greater than the depth of the second groove 407a. Finally, as shown... Figure 29The planarized upper electrode layer material is patterned to form a first upper electrode and a second upper electrode. The first upper electrode is located above the first piezoelectric layer 406, and the second upper electrode is located above the second piezoelectric layer 407. In this embodiment, the first upper electrode includes a portion located within the first groove 406a and a portion located above the first groove 406a (hereinafter referred to as the first substrate 408"). The second upper electrode includes a portion located within the second groove 407a and a portion located above the second groove 407a (hereinafter referred to as the second substrate 409"). The portion located within the first groove 406a can adjust the mass load of the first upper electrode, and is referred to as the first adjustment structure 408'. The portion located within the second groove 407a can adjust the mass load of the second upper electrode, and is referred to as the second adjustment structure 409'. It should be noted that in this embodiment, the substrate and its corresponding adjustment structure are made of the same material and are an integral structure. The dashed lines in the figure are used to divide the substrate and its corresponding adjustment structure only for the purpose of illustrating their positional relationship. In other embodiments, the adjustment structure and its corresponding substrate may be made of different materials, and the present invention does not impose any limitations on this.

[0110] After forming a first upper electrode having a first adjustment structure 408' and a second upper electrode having a second adjustment structure 409', as Figure 30 As shown, the first sacrificial layer 402 and the second sacrificial layer 403 are removed to form a first cavity 410 below the first lower electrode 404 and a second cavity 411 below the second lower electrode 405, respectively.

[0111] In this embodiment, the piezoelectric layer material is patterned to form a first piezoelectric layer and a second piezoelectric layer with different thicknesses. The first groove 406a and the second groove 407a formed during the patterning process, after being filled with the upper electrode layer material, precisely form the first adjustment structure 408' and the second adjustment structure 409', thereby achieving adjustment of the mass load of the first and second upper electrodes. This allows the frequencies of the first and second thin-film bulk acoustic wave resonators to well meet the design requirements. As mentioned in the background, the frequency adjustment of thin-film bulk acoustic wave resonators is currently mainly achieved by forming the mass load layer through a lift-off process. However, the lift-off process is cumbersome, difficult to implement, and costly, resulting in a complex, difficult, and costly overall manufacturing process for the device. This invention, however, can form the adjustment structure without using a lift-off process to achieve frequency adjustment of the thin-film bulk acoustic wave resonator. In other words, compared with the prior art, the implementation of this invention is simpler, easier to implement, and relatively cheaper.

[0112] It should be noted that:

[0113] (1) In order to make the first adjustment structure 408' and the second adjustment structure 409' have different effects on the adjustment of the upper electrode mass, their thicknesses need to be different. That is, when patterning the piezoelectric layer material, the depths of the first groove 406a formed on the first piezoelectric layer 406 and the second groove 407a formed on the second piezoelectric layer 407 need to be different.

[0114] (2) In this embodiment, the thickness of the first adjusting structure 408' is greater than the thickness of the second adjusting structure 409'. Those skilled in the art will understand that in other embodiments, the thickness of the first adjusting structure 408' may be less than the thickness of the second adjusting structure 409', depending on actual design requirements.

[0115] (3) In this embodiment, a first adjustment structure 408' and a second adjustment structure 409' are formed. Those skilled in the art will understand that in other embodiments, depending on actual design requirements, only the first adjustment structure 408' for adjusting the mass load of the first upper electrode or only the second adjustment structure 409' for adjusting the mass load of the second upper electrode may be formed, and the present invention does not limit this in any way.

[0116] (4) In this embodiment, after forming the first upper electrode having the first adjustment structure 408' and the second upper electrode having the second adjustment structure 409', the first sacrificial layer 402 and the second sacrificial layer 403 are removed to form the first cavity 410 and the second cavity 411. Those skilled in the art will understand that in other embodiments, after forming the first upper electrode having the first adjustment structure 408' and the second upper electrode having the second adjustment structure 409', the following may also be performed... Figure 31 As shown, a passivation layer 412 covering the first upper electrode and the second upper electrode is first formed. Then, a conductive material 413 for realizing the electrical connection between the thin film bulk acoustic resonators is formed according to the actual design requirements. Finally, the first sacrificial layer 402 and the second sacrificial layer 403 are removed to form the first cavity 410 and the second cavity 411 respectively.

[0117] (5) In this embodiment, two types of adjustment structures with different thicknesses are formed: a first adjustment structure for adjusting the mass load of the first upper electrode in the first thin-film bulk acoustic resonator, and a second adjustment structure for adjusting the mass load of the second upper electrode in the second thin-film bulk acoustic resonator. Those skilled in the art will understand that in other embodiments, K types of adjustment structures with different thicknesses can be formed according to actual design requirements, where K is an integer greater than 2. Let's take K=3 as an example. Assume that the design requirement is that the first upper electrode of all first thin-film bulk acoustic resonators has an adjustment structure A', the second upper electrode of some second thin-film bulk acoustic resonators has an adjustment structure B', and the second upper electrode of the remaining second thin-film bulk acoustic resonators has an adjustment structure C', wherein the thicknesses of adjustment structures A', B', and C' are different. Based on this, when patterning the piezoelectric layer material, grooves of different thicknesses are formed at positions corresponding to adjustment structures A', B', and C', thus forming adjustment structures A', B', and C' with different thicknesses. It should be noted that the specific value of K and the specific location of each adjustment structure are determined by actual design requirements. The examples given above are merely illustrative assumptions and should not be construed as limitations on the present invention. Furthermore, the same applies to cases where K is greater than 3, which will not be elaborated upon here.

[0118] Accordingly, the present invention also provides a semiconductor device, which includes at least a first thin-film bulk acoustic resonator and a second thin-film bulk acoustic resonator, wherein:

[0119] The first thin-film bulk acoustic resonator includes a substrate, a first cavity, a first lower electrode, a first piezoelectric layer and a first upper electrode stacked sequentially on the cavity. The first cavity is located between the substrate and the first lower electrode. Within the effective resonant region of the first thin-film bulk acoustic resonator, the first cavity extends toward the substrate.

[0120] The second thin-film bulk acoustic wave resonator includes the aforementioned substrate, a second cavity, a second lower electrode, a second piezoelectric layer, and a second upper electrode stacked sequentially on the substrate. The second cavity is located between the substrate and the second lower electrode and extends towards the second lower electrode within the effective resonant region of the second thin-film bulk acoustic wave resonator.

[0121] Within the effective resonant regions of the first and second thin-film bulk acoustic resonators, the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer.

[0122] The following will combine Figure 9 and Figure 27 The various components of the above-described semiconductor device will be described in detail with reference to specific embodiments.

[0123] Specifically, such as Figure 9 and Figure 27 As shown, the semiconductor device provided by the present invention includes a first thin-film bulk acoustic wave resonator and a second thin-film bulk acoustic wave resonator, wherein: the first thin-film bulk acoustic wave resonator includes a substrate ( Figure 9 In the accompanying figure, reference numeral 101 is used to indicate... Figure 27 (represented by reference numeral 401 in the attached drawing), first cavity ( Figure 9 In the figure, it is indicated by reference numeral 110. Figure 27 (Referring to 410 in the attached figure), the first lower electrode (represented by reference numeral 410) is stacked sequentially on the first cavity. Figure 9 In the accompanying drawing, reference numeral 104 is used to indicate... Figure 27 (represented by reference numeral 404 in the attached figure), first piezoelectric layer ( Figure 9 In the figure, reference numeral 106 is used to indicate, Figure 27 (represented by reference numeral 406 in the attached figure) and the first upper electrode ( Figure 9 In the accompanying figure, reference numeral 108 is used to indicate... Figure 27 The first cavity is indicated by reference numeral 408 in the accompanying drawing. The first cavity is located between the substrate and the first lower electrode, wherein the first cavity is formed by a groove formed on the substrate and the first lower electrode, that is, within the effective resonant region of the first thin-film bulk acoustic resonator, the first cavity extends toward the substrate.

[0124] The effective resonant region of the first thin-film bulk acoustic resonator can be understood as the "first effective resonant region" mentioned above. The depth of the first cavity can be determined as needed, and its shape can be set as needed, for example, it can be... Figure 9 and Figure 27 The longitudinal section shown is an inverted trapezoidal structure.

[0125] The aforementioned second thin-film bulk acoustic resonator includes a substrate ( Figure 9 In the accompanying figure, reference numeral 101 is used to indicate... Figure 27 (represented by reference numeral 401 in the attached drawing), second cavity ( Figure 9 In the figure, it is indicated by reference numeral 111. Figure 27 (Referring to Figure 411), the second lower electrode (represented by reference numeral 411) is stacked sequentially on the substrate. Figure 9 In the figure, it is indicated by reference numeral 105. Figure 27 (represented by reference numeral 405 in the attached figure), second piezoelectric layer ( Figure 9 In the figure, reference numeral 107 is used to indicate that... Figure 27 (represented by reference numeral 407 in the attached figure) and the second upper electrode ( Figure 9 In the figure, reference numeral 109 is used to indicate the location. Figure 27 (Referring to Figure 409) The second cavity is located between the substrate and the second lower electrode. The second cavity is formed on the substrate and is surrounded by the substrate and the upwardly protruding second lower electrode. That is, within the effective resonant region of the second thin-film bulk acoustic resonator, the second cavity extends toward the second lower electrode.

[0126] The effective resonant region of the second thin-film bulk acoustic resonator can be understood as the "second effective resonant region" mentioned above. The shape of the second cavity can be set as needed, for example, it can be... Figure 9 and Figure 27 The structure shown in the longitudinal section has the same width at the top and bottom, which facilitates the deposition of layers on it.

[0127] In this embodiment, the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer. It should be noted that, here, the thickness of the first piezoelectric layer being greater than the thickness of the second piezoelectric layer means that the thickness of the portion of the first piezoelectric layer located within the first effective resonant region is greater than the thickness of the portion of the second piezoelectric layer located within the second effective resonant region.

[0128] Specifically Figure 9 In the structure shown, the first lower electrode 104 and the second lower electrode 105 have the same thickness. However, due to the different positions of the first cavity 110 and the second cavity 111, the upper surface of the first lower electrode 104 in the first effective resonant region of the first bulk acoustic wave resonator is lower than that of the second lower electrode 105 in the second effective resonant region of the second bulk acoustic wave resonator. Consequently, the lower surface of the first piezoelectric layer 106 in the first effective resonant region is lower than that of the lower surface of the second piezoelectric layer 107 in the second effective resonant region. The upper surfaces of the first piezoelectric layer 106 and the second piezoelectric layer 107 are flush. As a result, the thickness of the first piezoelectric layer 106 in the first effective resonant region is greater than that of the second piezoelectric layer 107 in the second effective resonant region. It should be noted that (1) in this embodiment, the first lower electrode 104 and the second lower electrode 105 have the same thickness, which facilitates the formation of both by depositing the lower electrode layer material in one step. In other embodiments, the thicknesses of the first lower electrode 104 and the second lower electrode 105 may also be different, but the thickness needs to be controlled so that the upper surface of the first lower electrode 104 in the first effective resonant region is lower than the upper surface of the second lower electrode 105 in the second effective resonant region, thereby ensuring that the thickness of the first piezoelectric layer 106 in the first effective resonant region is greater than the thickness of the second piezoelectric layer 107 in the second effective resonant region. (2) In this embodiment, the thicknesses of the first upper electrode 108 and the second upper electrode 109 are the same, which facilitates the formation of both by depositing the upper electrode layer material in one step. In other embodiments, the thicknesses of the first upper electrode 108 and the second upper electrode 109 may also be different, and the present invention does not limit this. (3) The upper surfaces of the first piezoelectric layer 106 and the second piezoelectric layer 107 are flush, which can be achieved by a planarization operation after depositing the piezoelectric layer material.

[0129] Specifically Figure 27The structure shown has a first groove formed on the first piezoelectric layer 406 and a second groove formed on the second piezoelectric layer 407, such that the thickness of the portion of the first piezoelectric layer 406 within the first effective resonant region is greater than the thickness of the second piezoelectric layer 407 within the second effective resonant region. It should be noted that (1) in this embodiment, grooves are formed on both the first piezoelectric layer 406 and the second piezoelectric layer 407. In other embodiments, only the first groove may be formed on the first piezoelectric layer 406, or only the second groove may be formed on the second piezoelectric layer, as long as the thickness of the portion of the first piezoelectric layer 406 within the first effective resonant region is greater than the thickness of the portion of the second piezoelectric layer 407 within the second effective resonant region. This invention does not impose any limitations on this. (2) In this embodiment, the first lower electrode 404 and the second lower electrode 405 have the same thickness, facilitating their formation by a single deposition of the lower electrode layer material. In other embodiments, the thicknesses of the first lower electrode 404 and the second lower electrode 405 may also be different. (3) In this embodiment, the first upper electrode 408 and the second upper electrode 409 have the same thickness, which facilitates their formation by depositing the upper electrode layer material in one step. In other embodiments, the thicknesses of the first upper electrode 408 and the second upper electrode 409 may also be different, and the present invention does not limit this. (4) The first groove on the first piezoelectric layer 406 and the second groove on the second piezoelectric layer 407 can be formed by patterning the piezoelectric layer material after depositing the piezoelectric layer material.

[0130] Furthermore, it should be noted that (1) in this embodiment, as Figure 9 and Figure 27 As shown, the first piezoelectric layer and the second piezoelectric layer are connected to form an integrated structure. In some other embodiments, the first piezoelectric layer and the second piezoelectric layer may not be connected to meet the requirements of the corresponding scenario. (2) The materials and dimensions of the substrate, the first lower electrode, the second lower electrode, the first piezoelectric layer, the second piezoelectric layer, the first upper electrode, and the second upper electrode can be referred to the corresponding parts above. For the sake of brevity, they will not be described again here.

[0131] The semiconductor device provided by the present invention includes a first thin-film bulk acoustic wave resonator and a second thin-film bulk acoustic wave resonator. The thickness of the first piezoelectric layer in the first effective resonant region of the first thin-film bulk acoustic wave resonator is greater than the thickness of the second piezoelectric layer in the second effective resonant region of the second thin-film bulk acoustic wave resonator, thereby making the effective electromechanical coupling coefficients of the first thin-film bulk acoustic wave resonator and the second thin-film bulk acoustic wave resonator different, thus making it suitable for application scenarios with different requirements for the effective electromechanical coupling coefficient of the thin-film bulk acoustic wave resonator.

[0132] According to actual design requirements, such as Figure 10 and Figure 28 As shown, the semiconductor device provided by the present invention may further include a passivation layer covering the first upper electrode and the second upper electrode. Figure 10 In the figure, it is indicated by reference numeral 112. Figure 28 (Referring to figure 412 in the figure). The material and dimensions of the passivation layer can be found in the corresponding section above, and will not be repeated here for the sake of brevity.

[0133] Multiple thin-film bulk acoustic resonators located on the same substrate need to be electrically connected to form a filter. In one specific embodiment, such as Figure 10 and Figure 28 As shown, the first lower electrode of the first thin-film bulk acoustic resonator is connected to the second upper electrode of the second thin-film bulk acoustic resonator through a conductive via structure. The conductive via structure consists of through-holes penetrating the passivation layer and the piezoelectric layer, and conductive material filling the through-holes. Figure 10 In the figure, it is indicated by reference numeral 113. Figure 28 (Referring to Figure 413 in the figure) is constructed. The selection of conductive materials, etc., can be referred to the corresponding content above, and will not be repeated here for the sake of brevity. It should be noted that (1) in other embodiments, the electrical connection between the thin film bulk acoustic resonators can also be achieved by means of, for example, metal wires. For the sake of brevity, all possible electrical connection methods will not be listed here. (2) in other embodiments, the electrical connection between the first thin film bulk acoustic resonator and the second thin film bulk acoustic resonator can also be achieved by, for example, the electrical connection between the first upper electrode and the second upper electrode, or by, for example, the electrical connection between the first lower electrode and the second lower electrode, or by, for example, the electrical connection between the first upper electrode and the second lower electrode. The present invention does not limit this in any way, and can be designed accordingly according to actual design requirements. (3) in this embodiment, the conductive hole structure penetrates the passivation layer and the piezoelectric layer. In other embodiments, if the semiconductor device does not include the passivation layer, the conductive hole structure only penetrates the piezoelectric layer.

[0134] In some application scenarios, based on actual design requirements, in addition to needing different thin-film bulk acoustic wave resonators to have different effective electromechanical coupling coefficients, it is also necessary to adjust the frequency of the thin-film bulk acoustic wave resonators. In a preferred embodiment, the thicknesses of the first upper electrode of the first thin-film bulk acoustic wave resonator and the second upper electrode of the second thin-film bulk acoustic wave resonator are not equal, wherein the first upper electrode and / or the second upper electrode have adjustment structures for adjusting the mass load (the adjustment structure of the first upper electrode is the first adjustment structure, and the adjustment structure of the second upper electrode is the second adjustment structure). It should be noted that the unequal thicknesses of the first and second upper electrodes here refer to the difference between the thickness of the first upper electrode in the first effective resonant region and the thickness of the second upper electrode in the second effective resonant region. The following will combine... Figure 17 and Figure 30 The following explanation will be based on the example of a first upper electrode having a first adjustment structure and a second upper electrode having a second adjustment structure.

[0135] like Figure 17 As shown, the adjustment structure is stacked on top of its corresponding upper electrode. In this embodiment, the first upper electrode includes a first substrate 108” and a first adjustment structure 108', the first adjustment structure 108' being located on the first substrate 108” and used to adjust the mass load of the first upper electrode; the second upper electrode includes a second substrate 109” and a second adjustment structure 109', the second adjustment structure 109' being located on the second substrate 109” and used to adjust the mass load of the second upper electrode.

[0136] like Figure 30 As shown, the adjustment structure is located between the corresponding upper electrode and the piezoelectric layer. In this embodiment, a first groove is formed on the first piezoelectric layer 406, a second groove is formed on the second piezoelectric layer 407, a first upper electrode is formed on the first piezoelectric layer 406, and a second upper electrode is formed on the second piezoelectric layer 407, wherein the upper surfaces of the first upper electrode and the second upper electrode are flush. For the first upper electrode, it includes a first substrate 408” and a first adjustment structure 408', wherein the first adjustment structure 408' is located in a first groove on the first piezoelectric layer 406 and is used to adjust the mass load of the first upper electrode, and the first substrate 408” is located above the first adjustment structure 408', that is, the first adjustment structure 408' is disposed between the first upper electrode and the first piezoelectric layer 406; for the second upper electrode, it includes a second substrate 409” and a second adjustment structure 409', wherein the second adjustment structure 409' is located in a second groove on the second piezoelectric layer 407 and is used to adjust the mass load of the second upper electrode, and the second substrate 409” is located above the second adjustment structure 409', that is, the second adjustment structure 409' is disposed between the second upper electrode and the second piezoelectric layer 407.

[0137] It should be noted that (1) refers to Figure 17 and Figure 30 The structure shown has the same material as the upper electrode, i.e., the first adjustment structure, the first substrate, the second adjustment structure, and the second substrate are all made of the same material. Correspondingly, the first substrate and the first adjustment structure are integrated, and the second substrate and the second adjustment structure are integrated. The figure uses dashed lines to divide the substrate and its corresponding adjustment structure, only to illustrate their positional relationship. Those skilled in the art will understand that in other embodiments, the adjustment structure may be made of a different material than the upper electrode. For example, the first adjustment structure and the second adjustment structure may be made of the same material, but different from the materials of the first substrate and the second substrate, etc. The present invention does not limit this in any way. (2) Regarding Figure 17In the structure shown, in order to realize the adjustment function of the upper electrode mass load, the first adjustment structure 108', the first substrate 108”, the first piezoelectric layer 106, the first lower electrode 104 and the first cavity 110 have an overlapping area in the device thickness direction. Similarly, the second adjustment structure 109', the second substrate 109”, the second piezoelectric layer 107, the second lower electrode 105 and the second cavity 111 have an overlapping area in the device thickness direction. (3) For Figure 17 The structure shown, with the first adjustment structure 108' and the second adjustment structure 109' tailored to actual design requirements, typically has different thicknesses. The thicknesses of the first adjustment structure 108' and the second adjustment structure 109' can be found in the preceding sections and will not be repeated here for simplicity. Regarding... Figure 30 The thickness of the first adjustment structure 408' and the second adjustment structure 409' shown in the diagram is related to the depth of the grooves on the first and second piezoelectric layers. (4) For Figure 17 and Figure 30 The structure shown may, in other embodiments, have only the first upper electrode with the first adjustment structure, or only the second upper electrode with the second adjustment structure; the present invention does not limit this in any way. (5) Regarding Figure 17 The structure shown, the first adjustment structure 108' and the second adjustment structure 109' can be formed by patterning after depositing the upper electrode layer material; for the purposes of Figure 30 The structure shown involves patterning the piezoelectric layer material to form a first groove on the first piezoelectric layer 406 and a second groove on the second piezoelectric layer 407. These first and second grooves then form the first adjustment structure 408' and the second adjustment structure 409'. Compared to existing semiconductor devices that form the upper electrode mass load layer using a lift-off process, the semiconductor device provided by this invention has a simpler and easier-to-implement process, and is relatively less expensive.

[0138] For semiconductor devices with an adjustable upper electrode, such as Figure 18 and Figure 31 As shown, it may further include a passivation layer covering the first upper electrode and the second upper electrode. Figure 18 In the figure, it is indicated by reference numeral 112. Figure 31 (Referring to figure 412). Furthermore, for semiconductor devices with specific adjustment structures for the upper electrode, the connection method between the two thin-film bulk acoustic resonators can refer to the case where the upper electrode does not have an adjustment structure as described above. Figure 17 and Figure 30A specific connection method is given, wherein the first lower electrode of the first thin-film bulk acoustic resonator is connected to the second upper electrode of the second thin-film bulk acoustic resonator through a conductive hole structure. The conductive hole structure consists of a through-hole penetrating the passivation layer and the piezoelectric layer, and a conductive material filling the through-hole. Figure 18 In the figure, it is indicated by reference numeral 113. Figure 31 (Indicated by reference numeral 413 in the attached figure) constitutes the structure.

[0139] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be embraced within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims. Furthermore, it is clear that the word "comprising" does not exclude other components, units, or steps, and the singular does not exclude the plural. Multiple components, units, or devices recited in the system claims may also be implemented by a single component, unit, or device in software or hardware.

[0140] The above-disclosed embodiments are merely some preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A method for manufacturing a semiconductor device, the method comprising: Provide substrate; A groove and a first sacrificial layer filling the groove are formed in a first region on the upper surface of the substrate, and a second sacrificial layer is formed on a second region on the upper surface of the substrate; Electrode layer material is deposited on the substrate and patterned to form a first lower electrode covering the first sacrificial layer and a second lower electrode covering the second sacrificial layer; Piezoelectric layer material is deposited covering the first lower electrode and the second lower electrode and then planarized or patterned to form a first piezoelectric layer stacked on the first lower electrode and a second piezoelectric layer stacked on the second lower electrode, wherein the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer. An upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer is formed and patterned to form a first upper electrode stacked on the first piezoelectric layer and a second upper electrode stacked on the second piezoelectric layer; The first sacrificial layer and the second sacrificial layer are removed to form a first cavity under the first lower electrode and a second cavity under the second lower electrode.

2. The manufacturing method according to claim 1, wherein, The steps of forming a groove and a first sacrificial layer filling the groove in a first region on the upper surface of the substrate, and forming a second sacrificial layer over a second region on the upper surface of the substrate, include: The upper surface of the substrate is etched to form a groove in the first region, and a first sacrificial material with a thickness greater than the depth of the groove is deposited on the upper surface of the substrate; The first sacrificial material is planarized so that its upper surface is flush with the upper surface of the substrate, and the first sacrificial material filling the groove forms the first sacrificial layer. A second sacrificial material is deposited on the upper surface of the substrate and patterned to form a second sacrificial layer over the second region on the upper surface of the substrate.

3. The manufacturing method according to claim 1, after performing a planarization or patterning operation on the piezoelectric layer material, the manufacturing method further includes: Add a mass load to the first upper electrode and / or the second upper electrode.

4. The manufacturing method according to claim 3, wherein, When the piezoelectric layer material is planarized, the step of adding a mass load to the first upper electrode and / or the second upper electrode includes: The upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer is formed using a deposition or electroplating method; The upper electrode layer material is etched such that the thickness of the portion of the upper electrode layer material that overlaps with the first lower electrode and / or the second lower electrode in the device thickness direction is greater than the thickness of other portions of the upper electrode layer material. The upper electrode layer material is patterned to form the first upper electrode and the second upper electrode.

5. The manufacturing method according to claim 3, wherein, When the piezoelectric layer material is patterned, the step of adding a mass load to the first upper electrode and / or the second upper electrode includes: The upper electrode layer material covering the first piezoelectric layer and the second piezoelectric layer is formed using a deposition method; The upper surface of the upper electrode layer material is processed using a planarization operation, such that the thickness of the portion of the upper electrode layer material that overlaps with the first lower electrode and / or the second lower electrode in the device thickness direction is greater than the thickness of other portions of the upper electrode layer material. The upper electrode layer material is patterned to form the first upper electrode and the second upper electrode.

6. The manufacturing method according to claim 1, further comprising, after forming the first upper electrode and the second upper electrode: A passivation layer is formed covering the first upper electrode and the second upper electrode.

7. The manufacturing method according to claim 1 or 6, further comprising, after forming the first upper electrode and the second upper electrode: Forming a through-hole penetrating the piezoelectric layer; The through hole is filled with a conductive material, which contacts the second upper electrode and the first lower electrode respectively, so that the second upper electrode and the first lower electrode form an electrical connection.

8. A semiconductor device, comprising at least a first thin-film bulk acoustic resonator and a second thin-film bulk acoustic resonator, wherein: The first thin-film bulk acoustic resonator includes a substrate, a first cavity, a first lower electrode, a first piezoelectric layer, and a first upper electrode stacked sequentially on the first cavity. The first cavity is located between the substrate and the first lower electrode. Within the effective resonant region of the first thin-film bulk acoustic resonator, the first cavity extends toward the substrate. The second thin-film bulk acoustic resonator includes the substrate, the second cavity, the second lower electrode, the second piezoelectric layer and the second upper electrode stacked sequentially on the substrate. The second cavity is located between the substrate and the second lower electrode. Within the effective resonant region of the second thin-film bulk acoustic resonator, the second cavity extends toward the second lower electrode. Within the effective resonant regions of the first and second thin-film bulk acoustic resonators, the thickness of the first piezoelectric layer is greater than the thickness of the second piezoelectric layer.

9. The semiconductor device according to claim 8, wherein: The thicknesses of the first upper electrode and the second upper electrode are not equal, wherein the first upper electrode and / or the second upper electrode have an adjustment structure for adjusting the mass load.

10. The semiconductor device according to claim 9, wherein: The adjustment structure is stacked on top of the first upper electrode and / or the second upper electrode.

11. The semiconductor device according to claim 9, wherein: The adjustment structure is disposed between the first upper electrode and the first piezoelectric layer, and / or the adjustment structure is disposed between the second upper electrode and the second piezoelectric layer; The upper surfaces of the first upper electrode and the second upper electrode are flush.

12. The semiconductor device according to claim 10 or 11, wherein: The material of the adjustment structure is the same as that of the first upper electrode and / or the second upper electrode.

13. The semiconductor device according to any one of claims 8 to 11, wherein: The first piezoelectric layer is connected to the second piezoelectric layer.

14. The semiconductor device according to any one of claims 8 to 11, further comprising: A passivation layer covering the first upper electrode and the second upper electrode.

15. The semiconductor device according to any one of claims 8 to 11, further comprising: The conductive materials that respectively contact the second upper electrode and the first lower electrode.

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