Display panel

Abstract

The application discloses a display panel, comprising a sub-pixel, a first metal layer, a second metal layer, a transparent conductive layer and a third metal layer. The sub-pixel comprises a switching element. The first metal layer comprises a scanning line electrically connected to the switching element. The second metal layer is arranged on the first metal layer and comprises a pixel electrode and a data line, the pixel electrode and the data line are electrically connected to the switching element, and a part of the data line comprises a black layer. The transparent conductive layer comprises a transparent electrode arranged on the pixel electrode and electrically connected to the pixel electrode. The third metal layer comprises a reflective electrode arranged on the transparent electrode and electrically connected to the transparent electrode.

Description

Technical Field

[0001] This invention relates to a display panel, and more particularly to a reflective display panel. Background Technology

[0002] In reflective display panels, gaps exist between adjacent sub-pixels, and light reflected by the metal electrodes may leak through these gaps, resulting in poor contrast. Therefore, reducing light leakage in reflective display panels has become one of the important research issues for improving display quality. Summary of the Invention

[0003] The technical problem to be solved by this invention is how to reduce light leakage in the display panel to improve display quality.

[0004] To address the aforementioned technical problems, the present invention provides a display panel, comprising a display area and a non-display area, the non-display area being disposed on at least one side of the display area. The display panel includes a first substrate, a first sub-pixel, a first metal layer, a second metal layer, a transparent conductive layer, and a third metal layer. The first sub-pixel is disposed on the first substrate and within the display area, and includes a first switching element. The first metal layer is disposed on the first substrate, and includes multiple first signal lines disposed within the display area. Each first signal line includes a first scan line electrically connected to the first switching element, and the first scan line extends along a first direction. A second metal layer is disposed on the first metal layer, and includes a first pixel electrode of the first sub-pixel and multiple second signal lines. The first pixel electrode is electrically connected to the first switching element. The second signal lines are disposed within the display area, and each second signal line includes a data line electrically connected to the first switching element. The data line extends along a second direction, the first direction and the second direction being different, and a portion of the data line includes a blackening layer. A transparent conductive layer is disposed on the second metal layer, which is located between the transparent conductive layer and the first metal layer. The transparent conductive layer includes a first transparent electrode of the first sub-pixel, and the first transparent electrode is disposed on and electrically connected to the first pixel electrode. A third metal layer is disposed on the transparent conductive layer, which is located between the third metal layer and the second metal layer. The third metal layer includes a first reflective electrode of the first sub-pixel, and the first reflective electrode is disposed on and electrically connected to the first transparent electrode.

[0005] In the display panel of the present invention, part or all of the metal layer located below the gap includes a blackening layer, which can reduce reflected light and light leakage, thereby improving contrast. Attached Figure Description

[0006] Figure 1 This is a top view of the display panel according to the first embodiment of the present invention.

[0007] Figure 2 This is a top view schematic diagram of the pixel structure of the display panel according to the first embodiment of the present invention.

[0008] Figure 3 This is a cross-sectional schematic diagram of the display panel according to the first embodiment of the present invention.

[0009] Figure 4 This is a cross-sectional schematic diagram of the blackening layer in the first embodiment of the present invention.

[0010] Figure 5 This is a cross-sectional schematic diagram of the blackening layer in a first variation of the first embodiment of the present invention.

[0011] Figure 6 This is a cross-sectional schematic diagram of the blackening layer in a second variation of the first embodiment of the present invention.

[0012] Figure 7 This is a cross-sectional schematic diagram of the display panel according to the second embodiment of the present invention.

[0013] Explanation of reference numerals in the attached figures: 10 - Display panel; 100, 200 - Substrate; 100s - Top surface; 102, 108, 116 - Metal layers; 104, 110, 112 - Insulating layers; 114 - Transparent conductive layer; 1180 - First section; 1182 - Second section; 1200 - Third section; 1202 - Fourth section; 1220, 1221, 1260, 1261 - Edges; 124 - Blackening layer; 1280, 1282, 1284 - Sublayers; 300 - Liquid crystal layer; AA - Display area; CH - Semiconductor layer; C E1, CE2, 202 - Common electrode; CL - Common signal line; D - Drain; DL1, DL2, DL3 - Data lines; G - Gate; GL1, GL2 - Scan lines; GP - Gap; IL - Ambient light; PA - Non-display area; PE1, PE2 - Pixel electrodes; RE1, RE2 - Reflective electrodes; S - Source; SP, SP1, SP2 - Sub-pixels; SW1, SW2 - Switching elements; TE1, TE2 - Transparent electrodes; V1, V2 - Contact holes; W1 - First width; W2 - Second width; X, Y, Z - Directions. Detailed Implementation

[0014] To enable those skilled in the art to further understand the present invention, preferred embodiments are described below, and the composition and desired effects of the invention are explained in detail with reference to the accompanying drawings. It should be noted that the drawings are simplified schematic diagrams; therefore, only components and combinations related to the present invention are shown to provide a clearer description of the basic architecture or implementation method of the invention. Actual components and layouts may be more complex. Furthermore, for ease of explanation, the components shown in the various drawings are not drawn to scale according to the actual number, shape, and size; the detailed scale can be adjusted according to design requirements.

[0015] The following diagram illustrates a direction X (or a first direction), a direction Y (or a second direction), and a direction Z (or a perpendicular projection direction). Direction Z may be perpendicular to an upper surface 100s of a substrate 100 (e.g., ...). Figure 3 Directions X and Y can be parallel to the upper surface 100s of the substrate 100. Direction Z can be perpendicular to directions X and Y, and direction X can be perpendicular to direction Y. The following diagrams can be used to describe the spatial relationship of the structure based on directions X, Y, and Z.

[0016] Please refer to Figures 1 to 4 , Figure 1 This is a top view of the display panel according to the first embodiment of the present invention. Figure 2 This is a top view schematic diagram of the pixel structure of the display panel according to the first embodiment of the present invention. Figure 3 This is a cross-sectional schematic diagram of the display panel according to the first embodiment of the present invention. Figure 4 This is a cross-sectional schematic diagram of the blackening layer in the first embodiment of the present invention. Figure 3 The structure can correspond to Figure 2 The cross-sections A-A', B-B', and C-C' are shown in the figure. The display panel in this embodiment may be a reflective liquid crystal panel, but the present invention is not limited thereto.

[0017] like Figure 1 The display panel 10 includes a display area AA and a non-display area PA. The non-display area PA is disposed on at least one side of the display area AA, such as... Figure 1 The non-display area PA may surround the display area AA, but is not limited thereto. Furthermore, the display panel 10 includes multiple sub-pixels SP disposed within the display area AA. For example... Figure 1 and Figure 2 The display panel 10 includes a sub-pixel SP1 (or may be referred to as a first sub-pixel) and a sub-pixel SP2 (or may be referred to as a second sub-pixel), and sub-pixels SP1 and SP2 are arranged adjacent to each other in the X direction. Each sub-pixel SP includes at least one switching element. Figure 2Sub-pixel SP1 includes a switching element SW1 (or may be referred to as the first switching element), and sub-pixel SP2 includes a switching element SW2 (or may be referred to as the second switching element).

[0018] The switching element may include a thin-film transistor, which may be, for example, a bottom-gate thin-film transistor, but is not limited thereto. In other embodiments, the thin-film transistor may also be a top-gate thin-film transistor. Furthermore, the thin-film transistor may be a low-temperature polysilicon (LTPS) thin-film transistor, an indium gallium zinc oxide (IGZO) thin-film transistor, or an amorphous silicon (a-Si) thin-film transistor, but is not limited thereto.

[0019] like Figure 3 The display panel 10 includes a substrate 100 (or may be referred to as a first substrate), a substrate 200 (or may be referred to as a second substrate), and a liquid crystal layer 300. The substrate 200 is disposed opposite the substrate 100 in the Z direction, and the liquid crystal layer 300 is disposed between the substrate 100 and the substrate 200. In addition, sub-pixels SP1, SP2 and switching elements SW1, SW2 are disposed on the substrate 100.

[0020] Substrates 100 and 200 may include, but are not limited to, rigid substrates such as glass substrates, plastic substrates, quartz substrates, or sapphire substrates. Substrates 100 and 200 may also include flexible substrates such as polyimide (PI) substrates or polyethylene terephthalate (PET) substrates, but are not limited to these. Liquid crystal layer 300 may include any suitable type of liquid crystal, but is not limited to these.

[0021] like Figure 3 The display panel 10 includes a metal layer 102 (or may be referred to as a first metal layer), an insulating layer 104, a metal layer 108 (or may be referred to as a second metal layer), an insulating layer 110, an insulating layer 112, a transparent conductive layer 114, and a metal layer 116 (or may be referred to as a third metal layer), but is not limited thereto.

[0022] A metal layer 102 is disposed on the substrate 100, and the metal layer 102 includes a gate G for each switching element (such as switching element SW1). The metal layer 102 includes multiple first signal lines disposed within the display area AA, such as... Figure 2The first signal line may include at least one scan line GL1 (or may be referred to as the first scan line), one scan line GL2 (or may be referred to as the second scan line), and one common signal line CL, but is not limited thereto. Scan lines GL1, GL2, and the common signal line CL extend along the X direction, and scan lines GL1 and GL2 are arranged along the Y direction. The common signal line CL is positioned between scan lines GL1 and GL2 in the Y direction; that is, a common signal line may be positioned between two adjacent scan lines in the Y direction, but is not limited thereto.

[0023] Scan line GL1 is electrically connected to the gate G of switching element SW1, and scan line GL2 is electrically connected to the gate G of switching element SW2. Furthermore, metal layer 102 includes a common electrode CE1 (or a first common electrode) for sub-pixel SP1 and a common electrode CE2 (or a second common electrode) for sub-pixel SP2. The common electrodes CE1 and CE2 are arranged along direction X, and a common signal line CL is electrically connected to the common electrodes CE1 and CE2.

[0024] like Figure 3 Each switching element (such as switching element SW1) includes a semiconductor layer CH, a metal layer 108 disposed on a metal layer 102, and an insulating layer 104 disposed between the semiconductor layer CH and the metal layer 102 and between the metal layer 108 and the metal layer 102. The semiconductor layer CH includes polycrystalline silicon, amorphous silicon, or metal oxide, but is not limited thereto.

[0025] Metal layer 108 includes multiple second signal lines disposed within display area AA, such as... Figure 2 The second signal line may include at least one data line DL1, one data line DL2, and one data line DL3, but is not limited thereto. Data lines DL1, DL2, and DL3 extend along the Y direction and are arranged along the X direction, with data line DL1 positioned between data lines DL2 and DL3 in the X direction. Data line DL1 is electrically connected to a source S of switching element SW1 and also electrically connected to a source S of switching element SW2.

[0026] Metal layer 108 includes a pixel electrode for each sub-pixel, such as Figure 2 The metal layer 108 includes a pixel electrode PE1 (or a first pixel electrode) for sub-pixel SP1 and a pixel electrode PE2 (or a second pixel electrode) for sub-pixel SP2. Pixel electrode PE1 is electrically connected to a drain D of switching element SW1, and pixel electrode PE2 is electrically connected to the drain D of switching element SW2. The metal layer 108 also includes a source S and a drain D for each sub-pixel.

[0027] like Figure 2In direction Z, the common electrode CE1 is disposed between the pixel electrode PE1 and the substrate 100, and the common electrode CE2 is disposed between the pixel electrode PE2 and the substrate 100. In direction Y, the pixel electrode PE1, the common electrode CE1, the pixel electrode PE2, and the common electrode CE2 are disposed between the scan line GL1 and the scan line GL2. The pixel electrode PE1 and the common electrode CE1 are disposed above the switching element SW1 and the scan line GL1, while the pixel electrode PE2 and the common electrode CE2 are disposed below the switching element SW2 and the scan line GL2.

[0028] like Figure 3 An insulating layer 110 is disposed on the metal layer 108 and the semiconductor layer CH, and an insulating layer 112, a transparent conductive layer 114, and a metal layer 116 are sequentially disposed on the insulating layer 110, but not limited thereto. The thickness of the insulating layer 112 may be greater than the thickness of the insulating layer 110, but not limited thereto. The insulating layers 104, 110, and 112 may include inorganic or organic insulating materials, but not limited thereto.

[0029] The insulating layer 110 includes a plurality of contact holes V1, each contact hole V1 exposing a portion of the upper surface of a pixel electrode. For example... Figure 3 The contact hole V1 penetrates the insulating layer 110 and exposes a portion of the upper surface of the pixel electrode PE1. The insulating layer 112 includes multiple contact holes V2, each of which exposes one contact hole V1. Figure 3 The contact hole V2 passes through the insulation layer 112 and exposes the contact hole V1 and a portion of the upper surface of the insulation layer 110.

[0030] A transparent conductive layer 114 is disposed on the metal layer 108, and the metal layer 108 is disposed between the transparent conductive layer 114 and the metal layer 102. The transparent conductive layer 114 includes a transparent electrode for each sub-pixel, such as... Figure 2 The transparent conductive layer 114 includes a transparent electrode TE1 (or a first transparent electrode) for sub-pixel SP1 and a transparent electrode TE2 (or a second transparent electrode) for sub-pixel SP2.

[0031] Transparent electrode TE1 is disposed on and electrically connected to pixel electrode PE1, while transparent electrode TE2 is disposed on and electrically connected to pixel electrode PE2. For example... Figure 3 The transparent electrode TE1 can extend into contact holes V2 and V1 and can contact the pixel electrode PE1. Similarly, Figure 2The transparent electrode TE2 can also extend into the corresponding contact holes V2 and V1 and can contact the pixel electrode PE2. The transparent conductive layer 114 may include, but is not limited to, indium tin oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide (AZO).

[0032] A metal layer 116 is disposed on the transparent conductive layer 114, and the transparent conductive layer 114 is disposed between the metal layer 116 and the metal layer 108. The metal layer 116 includes a reflective electrode for each sub-pixel, such as... Figure 2 The metal layer 116 includes a reflective electrode RE1 (or may be referred to as the first reflective electrode) for sub-pixel SP1 and a reflective electrode RE2 (or may be referred to as the second reflective electrode) for sub-pixel SP2.

[0033] like Figure 3 A reflective electrode RE1 is disposed on and electrically connected to a transparent electrode TE1. The reflective electrode RE1 can contact the transparent electrode TE1, and can also extend into contact holes V2 and V1. Similarly, a reflective electrode RE2 is disposed on and electrically connected to a transparent electrode TE2. The reflective electrode RE2 can contact the transparent electrode TE2, and can also extend into contact holes V2 and V1.

[0034] Metal layers 102 and 108 may include single metal layers such as aluminum, copper, titanium, and tungsten, or composite metal layers such as molybdenum / aluminum / molybdenum, titanium / aluminum / titanium, titanium / copper / titanium, titanium / copper, etc., but are not limited thereto. Metal layer 116 may include suitable reflective metal materials such as silver, and conductive layer 116 may also include single metal layers or composite metal layers, but is not limited thereto.

[0035] The reflective electrode RE1, the transparent electrode TE1, and the pixel electrode PE1 can be electrically connected to each other and can be used together as pixel electrodes. Similarly, the reflective electrode RE2, the transparent electrode TE2, and the pixel electrode PE2 can be electrically connected to each other and can also be used together as pixel electrodes, but this is not a limitation.

[0036] A gap GP exists between the reflective electrode RE1 and the reflective electrode RE2. For example, the gap GP may be located between an edge 1220 of the reflective electrode RE1 and an edge 1221 of the reflective electrode RE2, but is not limited thereto.

[0037] like Figure 3A portion of the data line DL1 located below the gap GP in the Z direction includes a blackening layer 124. In other words, the gap GP and the blackening layer 124 of a portion of the data line DL1 partially overlap in the Z direction. The data line DL1 may also entirely include the blackening layer 124, but is not limited to this. Furthermore, as... Figure 2 Data lines DL1, DL2 and DL3 may all be located below the corresponding gap GP and may all include the blackening layer 124, but are not limited thereto.

[0038] If the gap GP is too large during the fabrication of reflective electrodes RE1 and RE2, the electric field within the display panel 10 may become unstable in the region near the gap GP, thus preventing effective control of the liquid crystal within that region. In this case, when ambient light IL is incident from the substrate 200 into the display panel 10 and reflected by the metal layer below the gap GP (such as the data line DL1), this reflected light may penetrate the gap GP and exit the display panel 10, causing light leakage and resulting in poor contrast.

[0039] However, in this embodiment, part or all of the metal layer (such as the data line DL1) located below the gap GP includes a blackening layer 124, which reduces light leakage caused by the reflection of ambient light IL incident on the display panel 10 by the metal layer, thereby improving contrast. Furthermore, it eliminates the need to provide a shielding layer (such as a black matrix) on the substrate 200. Therefore, no shielding layer is provided on the substrate 200 in this embodiment, thus saving costs.

[0040] Furthermore, in the metal layer 108 of this embodiment, except for the portion below the gap GP (such as data lines DL1, DL2, and / or DL3), the remaining portion may not include a blackening layer, but this is not a limitation. Additionally, the metal layer 102 of this embodiment may not include a blackening layer, but this is not a limitation.

[0041] like Figure 4 In this embodiment, the blackening layer 124 may include a single-layer structure, and the single-layer structure includes a blackening metal. The blackening metal may include blackening molybdenum, but is not limited thereto.

[0042] In addition, such as Figure 2 The transparent electrode may include designs with different widths. The transparent electrode TE1 includes a first portion 1180 and a second portion 1182. The pixel electrode PE1 may overlap with the first portion 1180 in the Z direction, and the first portion 1180 includes a first width W1 in the X direction. The second portion 1182 is disposed on one side of the first portion 1180 in the Y direction, such as... Figure 2The second part 1182 may be positioned above the first part 1180 in the Y direction, but is not limited thereto. The second part 1182 includes a second width W2 in the X direction, and the second width W2 is greater than the first width W1.

[0043] The transparent electrode TE2 includes a third part 1200 and a fourth part 1202. For example... Figure 2 The pixel electrode PE2 can overlap with a portion of the third part 1200 in the Z direction. The fourth part 1202 is disposed on one side of the third part 1200 in the Y direction, such as... Figure 2 The fourth part 1202 may be positioned below the third part 1200 in the Y direction, but is not limited thereto. The width of the fourth part 1202 in the X direction is greater than the width of the third part 1200 in the X direction.

[0044] In existing display panel designs, the transparent electrode does not have a recessed portion; that is, the edge of the transparent electrode is aligned with or overlaps with the edge of the reflective electrode in the Z direction. However, in some embodiments of the present invention, the transparent electrode TE1 includes a recessed first portion 1180 and the transparent electrode TE2 includes a recessed third portion 1200 to increase the distance between the transparent electrodes TE1 and TE2, and to ensure that an edge 1260 of the transparent electrode TE1 is away from the edge 1220 of the reflective electrode RE1 without overlapping with each other, and that an edge 1261 of the transparent electrode TE2 is away from the edge 1221 of the reflective electrode RE2 without overlapping with each other.

[0045] In addition, such as Figure 3 The display panel 10 includes a common electrode 202 disposed on the substrate 200, and the common electrode 202 is disposed between the liquid crystal layer 300 and the substrate 200. In this embodiment, the common electrode 202 may be formed entirely on the substrate 200 without being patterned, but this is not a limitation. In some embodiments, the common electrode 202 may be patterned.

[0046] The display panel of the present invention is not limited to the above embodiments. Other embodiments of the present invention will continue to be disclosed below; however, in order to simplify the description and highlight the differences between the embodiments or variations, the same reference numerals are used to refer to the same components below, and repeated parts will not be described again.

[0047] Please refer to Figure 5 This is a cross-sectional schematic diagram of the blackening layer in a first variation of the first embodiment of the present invention. The difference from the first embodiment is that the blackening layer 124 in this variation includes a stacked structure. For example... Figure 5The stacked structure may include a sublayer 1280 and a sublayer 1282, but the number of sublayers is not limited thereto. Sublayer 1280 is disposed on sublayer 1282. Since the blackening layer 124 may be disposed on the substrate 100, sublayer 1282 may be closer to the substrate 100 and sublayer 1280 may be farther away from the substrate 100, and sublayer 1282 may be disposed between sublayer 1280 and the substrate 100. In the stacked structure, the sublayer furthest from the substrate 100 (i.e., sublayer 1280) includes a blackened metal (such as blackened molybdenum), but is not limited thereto. Sublayer 1282 may include a non-blackened metal, such as aluminum, but is not limited thereto. The stacked structure of the blackening layer 124 in this variation embodiment can be applied in other embodiments of the present invention.

[0048] Please refer to Figure 6 This is a cross-sectional schematic diagram of the blackening layer in a second variation of the first embodiment of the present invention. The difference from the first variation is that the stacked structure in this variation may include a sublayer 1280, a sublayer 1282 and a sublayer 1284, but the number of sublayers is not limited thereto.

[0049] Since the blackening layer 124 can be disposed on the substrate 100, the sublayer 1284 can be closer to the substrate 100, the sublayer 1280 can be farther away from the substrate 100, the sublayer 1284 can be disposed between the sublayer 1280 and the substrate 100, and the sublayer 1282 can be disposed between the sublayer 1280 and the sublayer 1284.

[0050] In the stacked structure, the sublayer furthest from the substrate 100 (i.e., sublayer 1280) includes a blackened metal (such as blackened molybdenum), but is not limited thereto. Sublayers 1282 and 1284 may include unblackened metal. Sublayer 1282 may include aluminum, and sublayer 1284 may include molybdenum, but is not limited thereto. The stacked structure of the blackened layer 124 in this variation embodiment can be applied in other embodiments of the present invention.

[0051] Please refer to Figure 7 This is a cross-sectional schematic diagram of the display panel according to the second embodiment of the present invention. The difference from the first embodiment is that both metal layer 102 and metal layer 108 in this embodiment include a blackening layer 124, but this is not a limitation. More specifically, the entire metal layer 102 and the entire metal layer 108 include a blackening layer 124; therefore, all devices in metal layer 102 and all devices in metal layer 108 can be formed from the blackening layer 124.

[0052] In some embodiments, the entire metal layer 108 may include the blackening layer 124, while the metal layer 102 may not include the blackening layer 124, but this is not a limitation. In some embodiments, the entire or part of the metal layer 108 may include... Figure 5 or Figure 6The blackening layer 124 in the metal has a stacked structure, but is not limited thereto. In some embodiments, all or part of the metal layer 102 may include... Figure 5 or Figure 6 The blackening layer 124 in the stacked structure, but not limited to this.

[0053] In summary, in the display panel of the present invention, part or all of the metal layer located below the gap includes a blackening layer, thereby reducing light leakage caused by ambient light incident on the display panel after reflection by the metal layer, and thus improving contrast. The transparent electrode includes a recessed portion, so that the edge of the transparent electrode is far away from the edge of the reflective electrode and no longer overlaps with it. Even if the manufacturing deviation of the reflective electrode is large, the phenomenon of residual metal material in the reflective electrode can be reduced, and short circuits caused by the migration of residual metal ions can also be reduced.

[0054] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that, include: A display area and a non-display area, wherein the non-display area is disposed on at least one side of the display area; First substrate; A first sub-pixel is disposed on the first substrate and within the display area, and the first sub-pixel includes a first switching element; A first metal layer is disposed on the first substrate. The first metal layer includes a plurality of first signal lines disposed within the display area. The plurality of first signal lines include a first scan line electrically connected to the first switching element, and the first scan line extends along a first direction. A second metal layer is disposed on the first metal layer, the second metal layer comprising: A first pixel electrode of the first sub-pixel, and the first pixel electrode is electrically connected to the first switching element; and Multiple second signal lines are disposed within the display area. The multiple second signal lines include a data line electrically connected to the first switching element. The data line extends along a second direction, which is different from the first direction. A portion of the data line includes a blackening layer. A transparent conductive layer is disposed on the second metal layer, and the second metal layer is disposed between the transparent conductive layer and the first metal layer. The transparent conductive layer includes a first transparent electrode of the first sub-pixel, and the first transparent electrode is disposed on and electrically connected to the first pixel electrode. A third metal layer is disposed on the transparent conductive layer, the transparent conductive layer is disposed between the third metal layer and the second metal layer, the third metal layer includes a first reflective electrode of the first sub-pixel, and the first reflective electrode is disposed on the first transparent electrode and electrically connected to the first transparent electrode.

2. The display panel as described in claim 1, characterized in that, It also includes a second sub-pixel disposed on the first substrate. The first sub-pixel and the second sub-pixel are disposed adjacent to each other in the first direction, and the second sub-pixel includes: A second switching element is disposed on the first substrate; A second pixel electrode is electrically connected to the second switching element, and the second metal layer includes the second pixel electrode; A second transparent electrode is disposed on and electrically connected to the second pixel electrode, and the transparent conductive layer includes the second transparent electrode; and A second reflective electrode is disposed on and electrically connected to the second transparent electrode. The third metal layer includes the second reflective electrode. There is a gap between the first reflective electrode and the second reflective electrode. The gap and the blackening layer of the data line partially overlap in a vertical projection direction, wherein the vertical projection direction is perpendicular to an upper surface of the first substrate.

3. The display panel as described in claim 2, characterized in that, The first metal layer includes a first common electrode of the first sub-pixel, a second common electrode of the second sub-pixel, and a common signal line, wherein the plurality of first signal lines of the first metal layer include a second scan line. The second scan line extends along the first direction and is electrically connected to the second switching element, and the second switching element is electrically connected to the data line. The first common electrode is disposed between the first pixel electrode and the first substrate, the second common electrode is disposed between the second pixel electrode and the first substrate, and the common signal line extends along the first direction and is electrically connected to the first common electrode and the second common electrode.

4. The display panel as described in claim 1, characterized in that, All of the second metal layers include the blackening layer.

5. The display panel as described in claim 4, characterized in that, All of the first metal layers include the blackening layer.

6. The display panel as described in claim 1, characterized in that, The blackening layer includes a stacked structure, and the first sublayer of the stacked structure furthest from the first substrate includes a blackening metal.

7. The display panel as described in claim 6, characterized in that, The stacked structure includes a second sublayer disposed between the first sublayer and the first substrate, and the second sublayer includes an unblackened metal.

8. The display panel as described in claim 6, characterized in that, The stacked structure includes a second sublayer and a third sublayer, the second sublayer being disposed between the first sublayer and the first substrate, the third sublayer being disposed between the first sublayer and the second sublayer, and the second sublayer and the third sublayer including an unblackened metal.

9. The display panel as claimed in claim 1, characterized in that, The blackening layer comprises a single-layer structure, and the single-layer structure comprises a blackening metal.

10. The display panel as claimed in claim 1, characterized in that, Also includes: A second substrate is disposed relative to the first substrate in a vertical projection direction, and no shielding layer is disposed on the second substrate; as well as A liquid crystal layer is disposed between the first substrate and the second substrate.

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